Three-dimensional image processing system for laser scanning
By discretizing, quantizing, hashing, allocating physical base addresses, and isolating addresses in laser scanning point cloud data, the problem of false sharing in hardware cache is solved, improving the processor's cache hit rate and memory bus bandwidth utilization, thus achieving continuity and efficiency in 3D image processing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- BAIGU GEOGRAPHIC INFORMATION CO LTD
- Filing Date
- 2026-04-17
- Publication Date
- 2026-05-15
AI Technical Summary
When processing laser scanning point cloud data, existing technologies cannot effectively solve the problem of false sharing of hardware caches through logical hash mapping, resulting in frequent cache misses by the processor and affecting system throughput.
The point cloud acquisition module obtains the original discrete point set, the coordinate mapping module performs discretization, quantization and hash mapping, the storage alignment module allocates physical base addresses and isolates addresses, the feature extraction module extracts local geometric topological features, and the monitoring module adjusts the voxel quantization scale in real time to ensure hardware cache line alignment and reduce false sharing.
It improves the processor's cache hit rate and the effective bandwidth utilization of the memory bus, ensuring the continuity and efficiency of 3D image processing, and resolves the latency and memory access conflicts caused by hardware cache false sharing.
Smart Images
Figure CN122048628A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of image processing technology, and more specifically, to a three-dimensional image processing system for laser scanning. Background Technology
[0002] Currently, octrees or KD trees are commonly used to establish spatial indexes for the original discrete point sets generated by laser scanning, which are used to traverse and aggregate geometric shapes. This approach is universal when dealing with topological relationships in Euclidean space. The point cloud generated by laser scanning has obvious spatial non-uniformity. When the processing unit retrieves coordinate data based on geometric proximity, the discontinuous spatial coordinates cause the underlying storage addresses to be randomly scattered, resulting in frequent cache misses by the processor. This makes memory access overhead a physical constraint on system throughput.
[0003] Although the field has attempted to optimize storage layout using logical hash mapping, existing technologies, while optimizing data organization and management strategies at the logical level, still fail to fundamentally resolve underlying memory access conflicts for point cloud sets with overlapping spaces and different materials. For example, Chinese invention patent CN119271678B discloses a point cloud data access method, device, storage medium, and electronic device. It constructs a distributed coordinate system through multi-dimensional attributes and implements hierarchical storage to improve the retrieval efficiency of large-scale point cloud scenarios at the application layer. The design logic of such solutions relies on a general relational storage architecture, with the core objective of solving macro-scale data positioning. However, it ignores the underlying hardware response characteristics under non-ideal conditions of laser scanning. The logical layer partitioning lacks physical constraints on the hardware cache line loading boundaries. Simple logical address partitioning cannot constrain the hardware's memory access alignment behavior. When logically independent point cloud blocks are located within the same cache line loading boundary in physical video memory, the processor triggers false sharing across cache lines when prefetching data, causing cache pollution and generating processing latency fluctuations.
[0004] Therefore, how to reconstruct the storage mapping rules of spatial coordinates based on the memory access characteristics of computing hardware in order to eliminate false shared collisions in the process of physical memory access has become the technical problem to be solved by this invention. Summary of the Invention
[0005] This invention provides a three-dimensional image processing system for laser scanning, the system comprising:
[0006] The point cloud acquisition module acquires the original discrete point set containing spatial three-dimensional physical coordinates and point reflection intensity;
[0007] The coordinate mapping module completes the following steps: Step 1021: Discretize and quantize the three-dimensional physical coordinates of the points in the original discrete point set according to the preset voxel quantization scale to generate a discrete grid index that represents the position of the three-dimensional spatial grid; Step 1022: Map the discrete grid index to a globally unique logical address label in the logical address space using a preset spatial hash mapping function.
[0008] The storage alignment module completes the following steps: Step 1031: Retrieve the corresponding hardware cache line alignment width value inside the processor, and use the hardware cache line alignment width value as the logical address label when allocating the physical base address in the underlying physical memory space; Step 1032: Extract the distribution characteristics of the reflection intensity of the original discrete points, and allocate non-overlapping physical storage pages in the underlying physical memory space for point cloud data with different reflection characteristics based on the distribution characteristics; Step 1033: The physical storage pages map sampling points with different reflectivities to non-interfering hardware cache loading cycles, and use the address alignment isolation mechanism to cut off the pseudo-shared paths between sampling point data blocks belonging to different objects in the physical memory space;
[0009] The feature extraction module extracts local geometric topological features of the original discrete point set through the linear memory access path provided by the physical storage page within the hardware cache loading cycle.
[0010] Preferably, the coordinate mapping module also performs the following sub-steps: Step 10211: Calculate the local change slope of the point reflection intensity; Step 10212: When the local change slope exceeds a preset slope threshold, mark the corresponding point cloud data as the heterogeneous surface belonging point; Step 10213: In the physical memory space, insert padding blocks that are multiples of the hardware cache line alignment width between the logical address labels corresponding to the heterogeneous surface belonging points, so as to complete the linear decoupling of the object surface topology at the physical storage level.
[0011] Preferably, the storage alignment module also performs the following sub-steps: Step 10311: Configure storage overflow protection logic, the truncation length of the storage overflow protection logic is matched with the concurrent data bit width of the hardware vector register; Step 10312: When the number of sampling points in a single logical address tag reaches the concurrent data bit width, reset the excess data to the preset redundant physical partition to prevent sudden interruption of the linear memory access path due to excessively high voxel density.
[0012] Preferably, the storage alignment module obtains the storage bandwidth parameters of the physical video memory space and dynamically adjusts the concurrent prefetch depth of the linear memory access path based on the storage bandwidth parameters during the processing stage; when the storage bandwidth parameters are lower than the bandwidth threshold, the storage alignment module reduces the concurrent prefetch depth to maintain the access stability of the hardware cache loading cycle, thereby ensuring the continuity of spatial geometric feature extraction under the condition of limited underlying hardware resources.
[0013] Preferably, the coordinate mapping module also generates voxel masks based on the occupancy status of each three-dimensional space grid; the feature extraction module retrieves the voxel masks corresponding to each logical address label, and skips the physical base address in the corresponding physical memory space when the voxel mask indicates a null value corresponding to an inactive state, so as to reduce unnecessary data retrieval operations through the sparse index filtering mechanism and improve the overall processing efficiency for sparse laser scanning data.
[0014] Preferably, the feature extraction module temporarily stores the common geometric descriptors of adjacent logical address tags in the shared cache area inside the physical memory; the feature extraction module uses the common geometric descriptors to establish neighborhood associations across physical storage pages, so as to realize cross-voxel feature fusion in the process of extracting local geometric topology features, thereby restoring the spatial continuity inherent in the original discrete point set through the logical level secondary cache reuse mechanism while ensuring physical address isolation.
[0015] Preferably, the point cloud acquisition module performs intensity filtering on the acquired original discrete point set and uses a preset intensity noise threshold to filter out sampling points whose point reflection intensity is lower than the intensity noise threshold. After filtering, the point cloud acquisition module transmits the purified discrete point set to the coordinate mapping module to reduce the invalid quantization load in the subsequent hash mapping process during the front-end data access stage, and ensure that the physical memory space stores only valid geometric topology information.
[0016] Preferably, the system also includes a monitoring module, which monitors the data throughput of the feature extraction module in real time during the hardware cache loading cycle; based on the fluctuation of the data throughput, the monitoring module feeds back adjustment instructions to the coordinate mapping module to dynamically adjust the spatial resolution of the voxel quantization scale, so that the access pressure of the physical memory space and the hardware memory access capability of the processor can be dynamically matched in real time.
[0017] Preferably, the feature extraction module performs tensor quantization encapsulation on the extracted local geometric topological features and outputs a geometric feature matrix representing the three-dimensional shape of the target object. The geometric feature matrix contains multi-dimensional surface normal vectors and curvature information, and the data arrangement format of the geometric feature matrix is consistent with the distribution logic of the underlying physical storage pages, so as to ensure that the final output image feature tensor can be directly retrieved by the downstream perception algorithm through continuous memory access mode.
[0018] The embodiments of the present invention have at least the following beneficial effects:
[0019] 1. In the 3D image processing of laser scanning, this system obtains the physical alignment width constant of the processor's cache line and uses it as the forced offset step size for logical address splitting. This allows point cloud data with different reflection characteristics to be distributed in the physical memory within independent cache loading cycles that do not interfere with each other. This physical layer address isolation mechanism eliminates the false sharing phenomenon caused by the compact arrangement of data from the bottom layer, ensuring that the processor maintains a continuous memory access path when extracting local 3D features, and improving the effective bandwidth utilization of the memory bus.
[0020] 2. The hash mapping unit adjusts the splitting path of the baseline logical address based on the reflection intensity gradient variance. It uses material characteristics to physically sever the coordinate association between spatially adjacent but belonging to different objects. This data recombination method completes the purification of spatial topology before the feature aggregation stage, preventing data from different object surfaces from being confused in the same calculation cycle and ensuring the topological fidelity of the extracted three-dimensional spatial geometric features.
[0021] 3. This system is configured with fixed-length overflow truncation logic and matched with the concurrent computation width of the hardware vector register. When the number of coordinates in a single logical address reaches the hardware processing limit, the excess data is reset and written to a preset spare address range. This mechanism establishes a hard timing constraint for the processing of discrete point clouds, eliminates the long-tail effect of hash collisions caused by large-scale regular physical surfaces, and maintains a fixed response cycle for the system in dynamic spatial reconstruction tasks. Attached Figure Description
[0022] The above and other objects, features, and advantages of exemplary embodiments of the present invention will become readily apparent from the following detailed description taken in conjunction with the accompanying drawings, in which several embodiments of the invention are illustrated by way of example and not limitation, wherein:
[0023] Figure 1 This is a diagram showing the core functional modules and data flow of the three-dimensional image processing system of the present invention.
[0024] Figure 2 This is a schematic diagram illustrating the prefetch depth adaptive adjustment principle of the bus bandwidth monitoring of the present invention. Detailed Implementation
[0025] The principles and spirit of the present invention will now be described with reference to several exemplary embodiments in conjunction with the accompanying drawings. It should be understood that these embodiments are provided merely to enable those skilled in the art to better understand and implement the present invention, and are not intended to limit the scope of the present invention in any way. On the contrary, these embodiments are provided to make the present invention more thorough and complete, and to fully convey the scope of the present invention to those skilled in the art.
[0026] A three-dimensional image processing system for laser scanning, the system comprising:
[0027] The point cloud acquisition module acquires the original discrete point set containing spatial three-dimensional physical coordinates and point reflection intensity;
[0028] The coordinate mapping module completes the following steps: Step 1021: Discretize and quantize the three-dimensional physical coordinates of the points in the original discrete point set according to the preset voxel quantization scale to generate a discrete grid index that represents the position of the three-dimensional spatial grid; Step 1022: Map the discrete grid index to a globally unique logical address label in the logical address space using a preset spatial hash mapping function.
[0029] The storage alignment module completes the following steps: Step 1031: Retrieve the corresponding hardware cache line alignment width value inside the processor, and use the hardware cache line alignment width value as the logical address label when allocating the physical base address in the underlying physical memory space; Step 1032: Extract the distribution characteristics of the reflection intensity of the original discrete points, and allocate non-overlapping physical storage pages in the underlying physical memory space for point cloud data with different reflection characteristics based on the distribution characteristics; Step 1033: The physical storage pages map sampling points with different reflectivities to non-interfering hardware cache loading cycles, and use the address alignment isolation mechanism to cut off the pseudo-shared paths between sampling point data blocks belonging to different objects in the physical memory space;
[0030] The feature extraction module extracts local geometric topological features of the original discrete point set through the linear memory access path provided by the physical storage page within the hardware cache loading cycle.
[0031] Preferably, the coordinate mapping module also performs the following sub-steps: Step 10211: Calculate the local change slope of the point reflection intensity; Step 10212: When the local change slope exceeds a preset slope threshold, mark the corresponding point cloud data as the heterogeneous surface belonging point; Step 10213: In the physical memory space, insert padding blocks that are multiples of the hardware cache line alignment width between the logical address labels corresponding to the heterogeneous surface belonging points, so as to complete the linear decoupling of the object surface topology at the physical storage level.
[0032] Preferably, the storage alignment module uses the following formula to determine the physical base address of each point cloud data in the physical memory space: ,in, Physical base address S is the logical address label, S is the preset memory mapping step size coefficient, δ is the preset offset adjustment factor used to characterize the distribution characteristics of reflection intensity, and L is the hardware cache line alignment width value; the storage alignment module writes the quantized point cloud data into the corresponding physical storage page according to the physical base address.
[0033] Preferably, the storage alignment module also performs the following sub-steps: Step 10311: Configure storage overflow protection logic, the truncation length of the storage overflow protection logic is matched with the concurrent data bit width of the hardware vector register; Step 10312: When the number of sampling points in a single logical address tag reaches the concurrent data bit width, reset the excess data to the preset redundant physical partition to prevent sudden interruption of the linear memory access path due to excessively high voxel density.
[0034] Preferably, the storage alignment module obtains the storage bandwidth parameters of the physical video memory space and dynamically adjusts the concurrent prefetch depth of the linear memory access path based on the storage bandwidth parameters during the processing stage; when the storage bandwidth parameters are lower than the bandwidth threshold, the storage alignment module reduces the concurrent prefetch depth to maintain the access stability of the hardware cache loading cycle, thereby ensuring the continuity of spatial geometric feature extraction under the condition of limited underlying hardware resources.
[0035] Preferably, the coordinate mapping module also generates voxel masks based on the occupancy status of each three-dimensional space grid; the feature extraction module retrieves the voxel masks corresponding to each logical address label, and skips the physical base address in the corresponding physical memory space when the voxel mask indicates a null value corresponding to an inactive state, so as to reduce unnecessary data retrieval operations through the sparse index filtering mechanism and improve the overall processing efficiency for sparse laser scanning data.
[0036] Preferably, the feature extraction module temporarily stores the common geometric descriptors of adjacent logical address tags in the shared cache area inside the physical memory; the feature extraction module uses the common geometric descriptors to establish neighborhood associations across physical storage pages, so as to realize cross-voxel feature fusion in the process of extracting local geometric topology features, thereby restoring the spatial continuity inherent in the original discrete point set through the logical level secondary cache reuse mechanism while ensuring physical address isolation.
[0037] Preferably, the point cloud acquisition module performs intensity filtering on the acquired original discrete point set and uses a preset intensity noise threshold to filter out sampling points whose point reflection intensity is lower than the intensity noise threshold. After filtering, the point cloud acquisition module transmits the purified discrete point set to the coordinate mapping module to reduce the invalid quantization load in the subsequent hash mapping process during the front-end data access stage, and ensure that the physical memory space stores only valid geometric topology information.
[0038] Preferably, the system also includes a monitoring module, which monitors the data throughput of the feature extraction module in real time during the hardware cache loading cycle; based on the fluctuation of the data throughput, the monitoring module feeds back adjustment instructions to the coordinate mapping module to dynamically adjust the spatial resolution of the voxel quantization scale, so that the access pressure of the physical memory space and the hardware memory access capability of the processor can be dynamically matched in real time.
[0039] Preferably, the feature extraction module performs tensor quantization encapsulation on the extracted local geometric topological features and outputs a geometric feature matrix representing the three-dimensional shape of the target object. The geometric feature matrix contains multi-dimensional surface normal vectors and curvature information, and the data arrangement format of the geometric feature matrix is consistent with the distribution logic of the underlying physical storage pages, so as to ensure that the final output image feature tensor can be directly retrieved by the downstream perception algorithm through continuous memory access mode.
[0040] Example 1: In a high-frequency spatial topology reconstruction scenario at a continuously operating industrial reverse engineering site, a laser scanning device outputs a real-time scan point cloud of a complex engine block containing reflective metal and a frosted heat-resistant coating. This scan point cloud exhibits non-uniform sparsity and contains a large number of overlapping coordinates that are spatially very close but have different surface materials. When the underlying processor extracts geometric topological features by traversing adjacent coordinates based on Euclidean distance, conventional 3D image data processing mechanisms load logically independent but physically compact data blocks into the same cache line boundary. This prefetches data of different materials into the processor cache, causing false shared collisions across cache lines and resulting in a large number of cache misses within the processor. This causes memory bandwidth to continuously become a hard factor affecting system data throughput. The point cloud acquisition module acquires the original discrete point set containing spatial three-dimensional physical coordinates and point reflection intensity. The coordinate mapping module quantizes the spatial three-dimensional physical coordinates of the points in the original discrete point set according to the preset voxel quantization scale, generates a discrete grid index representing the position of the three-dimensional spatial grid, and uses a preset spatial hash mapping function to map the discrete grid index to a globally unique logical address label in the logical address space. In this mapping path, the coordinate mapping module calculates the local change slope of the point reflection intensity. When the local change slope exceeds the preset slope threshold, the corresponding point cloud data is marked as the heterogeneous surface belonging point. Based on the basic material property of point reflection intensity, a recognition is generated at the logical level, and deterministic information benchmarks belonging to the coordinate association of different objects are separated.
[0041] In this process, the preset spatial hash mapping function is constructed as a collision-free hash equation, and its calculation formula is set as follows: ;in, Represents the generated logical address label, , , This represents the discrete grid index components obtained by dimensionality reduction from continuous three-dimensional physical coordinates. , , These represent three distinct prime constants preset to suppress local hash collisions. The maximum addressable capacity of the hash table representing the underlying physical memory allowance. Representing the bitwise XOR operator, and to bridge the spatial local geometric tearing problem inevitably caused by the hash dimensionality reduction process, the coordinate mapping module concatenates a local residual record matrix at the end of the data packet of each logical address tag, specifically used to record the relative sub-voxel offset of the coordinates of each original physical point within the same hash bucket; addressing the structural mismatch problem of logical space isolation and underlying physical memory access entanglement, the storage alignment module retrieves the corresponding hardware cache line alignment width value inside the target image processor, using the hardware cache line alignment width value as the forced offset step size when allocating the physical base address of the logical address tag in the underlying physical memory space. This storage alignment module extracts the distribution characteristics of the concentrated point reflection intensity of the original discrete points, and... Based on the distribution characteristics, non-overlapping physical storage pages are allocated in the underlying physical memory space for point cloud data with different reflection characteristics. In the physical memory space, padding blocks that are integer multiples of the hardware cache line alignment width are inserted between the logical address tags corresponding to the heterogeneous surface points. The address alignment isolation mechanism is used to cut off the pseudo-shared paths between sampling point data blocks belonging to different objects in the physical memory space. The inherent hardware width of the target processor is used as the scale for the dimensionality reduction and arrangement of the three-dimensional sparse coordinate tensor. This makes the determination criteria for point reflection intensity form a positive cooperative mapping with the cache loading boundary of the underlying storage hardware. The geometric heterogeneity conflict of the three-dimensional coordinate system is transformed into the physical isolation allocation result of the underlying continuous one-dimensional memory vector address.
[0042] To address heterogeneous boundary points that are physically adjacent but forcibly isolated to different physical pages due to their different surface materials, and to break the memory access deadlock caused by the collision between topological cross-region dependency and rigid storage isolation, the system establishes a high-frequency secondary fusion transition mechanism above the main memory physical layer. The processor pre-transfers homogeneous point cloud data, originally isolated on different pages of main memory, to the processor's on-chip high-speed static random access memory (SRAM) in separate blocks during its independent continuous hardware memory access cycles. The feature extraction module, operating in the low-latency bus environment within the SRAM without page barriers, quickly retrieves adjacent logical addresses and completes the physical boundary splicing of cross-material points. This achieves a closed-loop system that maintains underlying physical isolation and upper-layer topological consistency while avoiding catastrophic cross-page calls in main memory. When the physical storage pages are arranged in physical video memory and within the hardware cache loading cycle, the feature extraction module extracts the local geometric topological features of the original discrete point set through the linear memory access path provided by the physical storage pages. Because sampling points with different reflectivities are forcibly mapped to mutually uninterrupted independent memory access paths... During the hardware cache loading cycle, the processor maintains a continuous memory access state when reading specific surface topology data, thereby improving the effective bandwidth utilization of the memory bus. The underlying structural differences between three-dimensional spatial sparsity and linear memory access mechanisms are eliminated in the basic data flow control dimension. The memory access capability and the processor hardware's continuous memory access requirements are dynamically matched. The process of extracting local geometric topology features through linear memory access paths physically relies on the single instruction multiple data flow mechanism. The feature extraction module sequentially reads the one-dimensional homogeneous point cloud coordinate array in the continuous on-chip cache address, sets a one-dimensional sliding calculation window using hardware concurrent instructions, and calculates the spatial difference covariance matrix of adjacent coordinates within the window through the basic arithmetic logic unit. This is used to fit the normal vector of the micro-tangent plane, and the principal curvature is obtained by differentiating the normal vector along the one-dimensional continuous storage direction. This process safely reduces the three-dimensional topology calculation that traditionally requires cross-physical page retrieval to the sequential calculation and window output of a pre-sorted one-dimensional array, thereby completing the physical extraction of geometric features without increasing the complexity of the structure.
[0043] Example 2: In the high-frequency spatial topology reconstruction scenario of the edge computing node test platform, the test platform is connected to a laser scanning device with a wavelength of 1550nm. The laser scanning device scans a standard engine block model with a mixture of reflective metal and a frosted heat-resistant coating, outputting the original discrete point set. To verify the interference suppression capability, Gaussian white noise with a signal-to-noise ratio of 15dB and mechanical vibration harmonic interference with a frequency of 50Hz are superimposed at the signal source end. Due to the influence of surface material differences, the original discrete point set presents non-uniform sparse overlapping coordinates under the same field of view. The coordinate mapping module needs to quantize the original discrete point set. A voxel quantization scale is established, and its value constrains the spatial geometric topological resolution and the fragmentation rate of the underlying physical memory. Decreasing the voxel quantization scale improves spatial topological fidelity but simultaneously exacerbates the dispersion when mapping 3D spatial coordinates to a 1D linear address. The coordinate mapping module establishes a linear constraint equation based on the laser scanner's spot divergence angle and target reconstruction accuracy. With a divergence angle set at 0.1 mrad and a reconstruction accuracy of 0.5 mm, the voxel quantization scale is calculated to be 1.0 mm³, corresponding to the hardware cache line alignment width of the target image processor. The storage alignment module is 64 bytes long and uses the hardware cache line alignment width value. As a logical address label, it represents the offset step size for allocating the physical base address in the underlying physical memory space.
[0044] The test platform constructs verification gradients with different heterogeneous overlap densities. The control group uses compact memory allocation logic without memory isolation. The experimental group allocates physical storage pages and fill blocks based on the distribution characteristics of point reflection intensity. Under low-density heterogeneous overlap conditions, the proportion of the material transition area on the cylinder surface is set to 5%; under medium-density heterogeneous overlap conditions, the proportion is set to 25%; and under high-density heterogeneous overlap conditions, a hybrid coating is used to set the proportion of the material transition area to 60%. In the high-density heterogeneous overlap condition, the point cloud acquisition module collects the original discrete point set containing Gaussian white noise and mechanical vibration harmonic interference. The coordinate mapping module calculates the local change slope of the point reflection intensity. The sensor array outputs a measured value of 45.2 for the local change slope of the transition area, which is greater than the preset slope threshold of 30.0. The coordinate mapping module marks the corresponding point cloud data as the heterogeneous surface belonging point. The storage alignment module extracts the distribution characteristics and inserts a 128-byte fill block between adjacent logical address tags in the physical memory space. The size of this fill block is equal to twice the hardware cache line alignment width. The control group generated logically continuous memory blocks corresponding to data with different reflection characteristics. When the image processor extracted geometric topological features, it prefetched heterogeneous point data into the same cache line. The experimental group relied on fill blocks to form misaligned isolation of heterogeneous data on the physical storage page. The hardware performance monitoring node output hardware memory access efficiency statistics. Under low-density heterogeneous overlap conditions, the processor cache hit rate of the control group was 78.5%, while that of the experimental group was 85.2%. Under medium-density heterogeneous overlap conditions, the cache hit rate of the control group was 62.1%, while that of the experimental group was 84.8%. Under high-density heterogeneous overlap conditions, the cache hit rate of the control group was 41.3%, and the effective memory bus bandwidth utilization was 12.4 GB / s. The effective memory bus bandwidth utilization of the experimental group was 83.7% under high-density heterogeneous overlap conditions. With a utilization rate of 38.6GB / s, the stability of this high-frequency processing also benefits from the shared geometric descriptor data structure generated on-chip. This descriptor does not contain redundant coordinate floating-point source data, but is highly compressed and encapsulated by the logical address cross-page offset index of adjacent boundaries and the normal tensor of the corresponding micro-sections. When processing cross-material transition regions, the feature extraction module only needs to retrieve and exchange the lightweight descriptor of adjacent logical tags in the on-chip L1 cache to reconstruct the geometric topological association at the boundary. This avoids the black-box bottleneck of generating and maintaining a complex tree-like index structure to restore physical continuity. The hardware cache line alignment width value defines the integer multiple of the fill block boundary inserted between the heterogeneous surface belonging points, transforming the geometric heterogeneity conflict of the three-dimensional coordinate system into a physically isolated allocation form of the underlying continuous one-dimensional video memory vector address, solving the memory access blocking problem caused by spatial sparsity and ensuring system data throughput.
[0045] Example 3: When the edge computing node processes the original discrete point set output by the laser scanning device, and the laser scanning device scans the engine block, ambient light interference causes dynamic drift in the physical measurement baseline of point reflection intensity. A fixed judgment threshold causes identification deviation of heterogeneous surface belonging points, resulting in clustering and aliasing of the three-dimensional spatial physical coordinates of different materials in the logical address space. The coordinate mapping module applies a spatial hash mapping function based on constants and does not dynamically adjust the logical address labels according to the real-time reflection intensity distribution characteristics. This causes storage page intersection when the storage alignment module allocates physical base addresses in the underlying physical memory space. The coordinate mapping module calibrates the slope threshold. The coordinate mapping module controls the laser scanning equipment to scan a metal calibration component with a known reflectivity jump step, acquiring a reference point cloud sequence. The coordinate mapping module extracts 10 consecutive spatial coordinates from the reference point cloud sequence to form a sliding sampling window. The coordinate mapping module extracts the maximum and minimum values of the reflection intensity of points within the sliding sampling window, calculates the difference between the maximum and minimum values, divides this difference by the spatial span distance of the sliding sampling window, and generates a reference change slope. The coordinate mapping module multiplies the reference change slope by a redundancy coefficient of 1.2 to generate a slope threshold. This calibration step determines the real-time physical response characteristics of the heterogeneous surface reference-associated laser scanning equipment.
[0046] The point cloud acquisition module acquires the original discrete point set of the engine cylinder block. The coordinate mapping module calculates the difference in the three-dimensional physical coordinates of five adjacent points in the original discrete point set along the laser scanning trajectory, generating the local slope of the point reflection intensity. Based on the physical characteristics of the bidirectional reflection distribution function of the surface material, on the non-acute geometric abrupt continuous scanning surface, the step jump of the reflection intensity characterizes the alternation of physical boundaries of dissimilar materials. When the local slope is greater than the slope threshold, the coordinate mapping module marks the corresponding point cloud data as the heterogeneous surface belonging point. The storage alignment module extracts the reflection intensity variance of the heterogeneous surface belonging point within the field of view, divides the reflection intensity variance by a preset normalization constant, and generates an offset adjustment factor δ. Based on the integer alignment constraint of the cache loading boundary of the underlying video memory hardware, the formula for the built-in rounding mapping algorithm of the offset adjustment factor δ generation procedure is as follows: ,in, The variance of the reflection intensity at the point of origin of the heterogeneous surface is extracted by the system and is a statistical dimensionless parameter greater than or equal to zero. , representing the preset normalization constant, is the inherent reflection background noise variance constant measured by a single uniform reference material under the reference working condition of an anechoic chamber without ambient light interference. The floor function operator outputs an offset adjustment factor δ that is always a non-negative integer. Multiplying this by the subsequent hardware cache line alignment width value results in a result that satisfies the hard constraint of integer addressing on the underlying physical bus. The storage alignment module retrieves the hardware cache line alignment width value L of the target image processor and the preset memory mapping step size coefficient S. The coordinate mapping module applies a spatial hash mapping function to convert discrete grid indices into logical address tags. The storage alignment module calculates the physical base address of the point cloud data. Specific physical base address The calculation formula is as follows: ,in, Physical base address δ is the logical address label, S is the memory mapping step size coefficient, δ is the offset adjustment factor, and L is the hardware cache line alignment width value.
[0047] The storage alignment module is based on the physical base address. The quantized point cloud data is written to the corresponding physical storage page. The storage alignment module calls the underlying page-locked memory allocation interface of the target image processor to calculate the physical base address. By directly defining and locking contiguous physical memory sectors on the video memory device side, bypassing the operating system's default virtual memory paging and dynamic swapping mechanisms, an absolute static mapping relationship is established between upper-layer software addressing and the underlying hardware storage capacitor array address. The storage alignment module monitors the number of sampling points within a single logical address tag. When the number of sampling points reaches the concurrent data width of 256 bits in the hardware vector register, the storage alignment module resets the excess data to a preset redundant physical partition. The storage alignment module writes a prefetch associated pointer to the data bits at the end of the original physical memory page, completely recording the starting absolute physical base address of the corresponding redundant physical partition. In fact, the prefetch associated pointer at this entry point is not simply an application software logical variable, but is solidified by the underlying interface into a Direct Memory Access (DMA) descriptor list format conforming to the bus communication protocol. When the processor's execution pointer touches the end of a physical memory page, the DMA descriptor payload is directly thrown into the hardware dispatch queue of the graphics processor's memory management unit (MMU) via a memory barrier instruction. This mechanism transforms the associated actions of the upper-layer software into native memory transport electrical signals of the underlying scatter-gather engine in microseconds, thereby filling the intermediate logic gap in the direct cross-scale driving of the underlying memory controller's physical actions by the software-layer pointer. When the feature extraction module issues a data prefetch request on the bus, it reads and parses the prefetch associated pointer, driving the burst transfer between the main memory area and the redundant partition at the underlying memory controller hardware level to reconstruct the continuous L2 cache loading queue across non-contiguous physical pages, maintaining the continuous triggering conditions of the hardware prefetch pipeline. The storage alignment module adjusts the offset factor accordingly. Dynamically adjust the fill block size to block false shared cache paths caused by concurrent prefetching and maintain effective bandwidth utilization of the processor memory bus.
[0048] Example 4: When an edge computing node faces the task of deploying and initializing physical memory mapping for a new type of laser scanning equipment, the coordinate mapping module initiates the field calibration procedure, controlling the laser scanning equipment to scan a metal calibration component with known reflection intensity to obtain an initial discrete point set; it extracts the baseline noise floor value of the point reflection intensity of the initial discrete point set under conditions without ambient light interference, multiplies it by a preset compensation coefficient to generate a basic offset; the coordinate mapping module sequentially inputs multiple incremental test voxel scales, calculates the logical address collision rate of the initial discrete point set at each test voxel scale based on the spatial hash mapping function; the coordinate mapping module extracts parameters to make the logical address collision rate less than a preset collision rate. The minimum test voxel scale of the threshold is solidified into the voxel quantization scale during the operation phase. At the same time, the basic offset is injected into the initialization structure of the spatial hash mapping function. For residual spatial address collision nodes that occur during the operation phase and are below the preset collision threshold, the coordinate mapping module enables a deterministic linear probe rehashing loop. When the probe loop detects that the target logical address label is not empty, it continuously performs addressing probe towards the end of the logical address space in a set monotonically increasing integer step size until it locks the first blank logical address space that is not occupied by data and writes it into the point cloud entity. The address overlap state is cleared from the bottom of the addressing to ensure the global uniqueness of the logical address label output to the feature extraction module.
[0049] After the parameters at the voxel quantization scale are fixed, the storage alignment module initiates the boundary partitioning procedure of the underlying physical memory space and sends a probe command containing the three-dimensional physical coordinates of the field of view limit to the target image processor. The storage alignment module reads the limit logical address tag returned by the target image processor and calculates the alignment width value between the limit logical address tag and the hardware cache line. The product of the two is used to generate the basic video memory capacity; the spatial distribution density of the heterogeneous surface belonging points in the initial discrete point set is extracted, and the ratio of the spatial distribution density to the preset density benchmark value is calculated to generate the video memory mapping step size coefficient S; the storage alignment module calculates the product of the basic video memory capacity and the video memory mapping step size coefficient S to generate the actual total physical video memory capacity, and delineates continuous physical pages at the end address of the actual total physical video memory capacity as redundant physical partitions; the edge computing node establishes the underlying physical video memory layout boundary adapted to the current hardware response characteristics.
[0050] Example 5: When a 3D image processing system faces fluctuations in concurrent memory access load of the underlying physical video memory, data congestion occurs on the memory bus. The storage alignment module initiates dynamic access depth control logic. This storage alignment module retrieves the underlying performance register data of the physical video memory controller, extracts the cumulative number of memory read bytes and the cumulative number of memory write bytes within a preset sampling period, adds the cumulative number of memory read bytes and the cumulative number of memory write bytes, divides it by the time length of the preset sampling period, and calculates the real-time storage bandwidth parameter. The storage alignment module reads the factory rated bus bandwidth value of the target image processor, multiplies the factory rated bus bandwidth value by a boundary safety factor of 0.8, and establishes the bandwidth threshold for determining the bus congestion state.
[0051] The storage alignment module compares the real-time storage bandwidth parameter with the bandwidth threshold on a cycle-by-cycle basis. When the real-time storage bandwidth parameter is less than the bandwidth threshold, the storage alignment module initiates the downlink adjustment logic of the concurrent prefetch depth. It calculates the difference between the bandwidth threshold and the real-time storage bandwidth parameter, divides the difference by the bandwidth threshold to generate the congestion deviation rate, retrieves the initial concurrent prefetch depth and response adjustment gain, calculates the difference between the value 1 and the product of the response adjustment gain and the congestion deviation rate, multiplies the difference by the initial concurrent prefetch depth to obtain the adjusted concurrent prefetch depth, and rounds the adjusted concurrent prefetch depth down to generate the memory access boundary parameter. Based on the memory access boundary parameter, it truncates the subsequent cache loading queue in the physical storage page, limiting the number of physical memory read requests sent to the memory bus by the target image processor in a single hardware cache loading cycle. The 3D image processing system maintains the continuity of spatial geometric topology feature extraction under the physical conditions of fluctuations in underlying hardware resources.
[0052] The above description is only a few preferred embodiments of the present invention and an explanation of the technical principles used. Those skilled in the art should understand that the scope of the invention involved in the embodiments of the present invention is not limited to the technical solutions formed by a specific combination of the above-mentioned technical features, but should also cover other technical solutions formed by any combination of the above-mentioned technical features or their equivalent features without departing from the above-mentioned inventive concept. For example, technical solutions formed by replacing the above-mentioned features with (but not limited to) technical features with similar functions disclosed in the embodiments of the present invention.
Claims
1. A three-dimensional image processing system for laser scanning, characterized in that, The system includes: The point cloud acquisition module acquires the original discrete point set containing spatial three-dimensional physical coordinates and point reflection intensity; The coordinate mapping module completes the following steps: Step 1021: Discretize and quantize the three-dimensional physical coordinates of the points in the original discrete point set according to the preset voxel quantization scale to generate a discrete grid index that represents the position of the three-dimensional spatial grid; Step 1022: Map the discrete grid index to a globally unique logical address label in the logical address space using a preset spatial hash mapping function. The storage alignment module completes the following steps: Step 1031: Retrieve the corresponding hardware cache line alignment width value inside the processor, and use the hardware cache line alignment width value as the logical address label when allocating the physical base address in the underlying physical memory space; Step 1032: Extract the distribution characteristics of the reflection intensity of the original discrete points, and allocate non-overlapping physical storage pages in the underlying physical memory space for point cloud data with different reflection characteristics based on the distribution characteristics; Step 1033: The physical storage pages map sampling points with different reflectivities to non-interfering hardware cache loading cycles, and use the address alignment isolation mechanism to cut off the pseudo-shared paths between sampling point data blocks belonging to different objects in the physical memory space; The feature extraction module extracts local geometric topological features of the original discrete point set through the linear memory access path provided by the physical storage page within the hardware cache loading cycle.
2. The three-dimensional image processing system for laser scanning according to claim 1, characterized in that, The coordinate mapping module also completes the following sub-steps: Step 10211: Calculate the local change slope of the point reflection intensity; Step 10212: When the local change slope exceeds the preset slope threshold, mark the corresponding point cloud data as the heterogeneous surface belonging point; Step 10213: In the physical memory space, insert padding blocks that are multiples of the hardware cache line alignment width between the logical address labels corresponding to the heterogeneous surface belonging points, so as to complete the linear decoupling of the object surface topology at the physical storage level.
3. The three-dimensional image processing system for laser scanning according to claim 1, characterized in that, The storage alignment module also completes the following sub-steps: Step 10311: Configure storage overflow protection logic, the truncation length of the storage overflow protection logic is matched with the concurrent data bit width of the hardware vector register; Step 10312: When the number of sampling points in a single logical address tag reaches the concurrent data bit width, reset the excess data to the preset redundant physical partition to prevent sudden interruption of the linear memory access path due to excessively high voxel density.
4. A three-dimensional image processing system for laser scanning according to claim 1, characterized in that, The storage alignment module obtains the storage bandwidth parameters of the physical video memory space and dynamically adjusts the concurrent prefetch depth of the linear memory access path based on the storage bandwidth parameters during the processing stage. When the storage bandwidth parameters are lower than the bandwidth threshold, the storage alignment module reduces the concurrent prefetch depth to maintain the access stability of the hardware cache loading cycle, thereby ensuring the continuity of spatial geometric feature extraction under the condition of limited underlying hardware resources.
5. A three-dimensional image processing system for laser scanning according to claim 1, characterized in that, The coordinate mapping module also generates voxel masks based on the occupancy status of each 3D spatial grid; The feature extraction module retrieves the voxel mask corresponding to each logical address label, and skips the physical base address in the corresponding physical memory space when the voxel mask indicates a null value corresponding to an inactive state. This reduces unnecessary data retrieval operations through a sparse index filtering mechanism, thereby improving the overall processing efficiency for sparse laser scanning data.
6. A three-dimensional image processing system for laser scanning according to claim 1, characterized in that, The feature extraction module temporarily stores the common geometric descriptors of adjacent logical address tags in the shared cache area inside the physical memory. The feature extraction module uses the common geometric descriptors to establish neighborhood associations across physical storage pages, so as to realize cross-voxel feature fusion in the process of extracting local geometric topology features. Thus, under the premise of ensuring physical address isolation, the spatial continuity inherent in the original discrete point set is restored through the logical level second-level cache reuse mechanism.
7. A three-dimensional image processing system for laser scanning according to claim 1, characterized in that, The point cloud acquisition module performs intensity filtering on the acquired raw discrete point set, and uses a preset intensity noise threshold to filter out sampling points whose point reflection intensity is lower than the intensity noise threshold. After filtering, the point cloud acquisition module transmits the purified discrete point set to the coordinate mapping module to reduce the invalid quantization load in the subsequent hash mapping process during the front-end data access stage, and ensure that the physical memory space stores only valid geometric topology information.
8. A three-dimensional image processing system for laser scanning according to claim 1, characterized in that, The system also includes a monitoring module, which monitors the data throughput of the feature extraction module in real time during the hardware cache loading cycle; based on the fluctuation of the data throughput, the monitoring module feeds back adjustment instructions to the coordinate mapping module to dynamically adjust the spatial resolution of the voxel quantization scale.
9. A three-dimensional image processing system for laser scanning according to claim 1, characterized in that, The feature extraction module performs tensor quantization encapsulation on the extracted local geometric topological features and outputs a geometric feature matrix that characterizes the three-dimensional shape of the target object. The geometric feature matrix contains multi-dimensional surface normal vectors and curvature information, and the data arrangement format of the geometric feature matrix is consistent with the distribution logic of the underlying physical storage pages, so as to ensure that the final output image feature tensor can be directly retrieved by the downstream perception algorithm through continuous memory access mode.