Display panel and display device

Abstract

The invention provides a display panel and a display device.The display panel comprises a plurality of pixel driving units, a first wiring layer and a second wiring layer, each pixel driving unit comprises a signal connecting line, the first wiring layer comprises a plurality of data lines and a plurality of power signal lines, and the data lines and the power signal lines extend in the first direction; the second wiring layer comprises a plurality of groups of first fan-out wires and first signal wires which are located on the same straight line and extend in the second direction, gaps are formed between the groups of first fan-out wires and first signal wires, the signal connecting wires have first orthographic projections on the display panel, and the data wires have second orthographic projections on the display panel; the power signal lines have third orthographic projections on the display panel, the gaps have fourth orthographic projections on the display panel, the fourth orthographic projections are covered with the first orthographic projections or the second orthographic projections or the third orthographic projections, and display moire generated in the display process of the display panel due to metal density difference is effectively prevented.

Description

[0001] This application is a divisional application. The original application has the application number 202211628157.X and the original application date is December 16, 2022. The entire contents of the original application are incorporated herein by reference. Technical Field

[0002] This invention relates generally to the field of display panel technology, and more specifically, to a display panel and a display device. Background Technology

[0003] With the continuous development of electronic technology, more and more application scenarios in life require the use of display panels. Therefore, how to ensure the display effect of display panels is a problem that needs to be solved. Summary of the Invention

[0004] To address the above-mentioned or other problems, the present invention provides the following technical solutions.

[0005] In a first aspect, the present invention provides a display panel having an adjacent display area and a border area, the display panel comprising at least: Multiple pixel driving units are located in the display area, and each pixel driving unit includes at least a signal connection line; A first wiring layer, located in the display area, includes at least multiple data lines and multiple power signal lines, each of the data lines and power signal lines extending along a first direction and respectively coupled to multiple pixel driving units arranged along the first direction; and, The second routing layer, located in the display area, includes at least multiple sets of first fan-out routing lines and first signal routing lines located on the same straight line and extending along the second direction. The first fan-out routing lines are used to lead the corresponding data lines to the border area. The second direction and the first direction have an angle between them. In this configuration, there is a gap between the first fan-out trace and the first signal trace in each group, and the signal connection line has a first orthographic projection on the display panel, the data line has a second orthographic projection on the display panel, the power signal line has a third orthographic projection on the display panel, and the gap has a fourth orthographic projection on the display panel. The first orthographic projection, the second orthographic projection, or the third orthographic projection covers the fourth orthographic projection.

[0006] According to an embodiment of the present invention, the display panel further includes a plurality of second signal traces, each of the second signal traces extending along the second direction and coupled to a plurality of pixel driving units arranged along the second direction via a plurality of signal connection lines.

[0007] According to a display panel of an embodiment of the present invention, the second signal trace includes at least a reference voltage line and a reset signal line.

[0008] According to a display panel of an embodiment of the present invention, the first signal trace is coupled to the corresponding power signal trace.

[0009] According to a display panel of an embodiment of the present invention, the display panel further includes a plurality of scan lines, each scan line extending along the second direction and coupled to a plurality of pixel driving units arranged along the second direction.

[0010] According to a display panel of an embodiment of the present invention, the display panel further includes a source driving circuit and a third wiring layer, wherein: The source drive circuit is located in the frame area; The third routing layer is located in the display area and includes at least a plurality of second fan-out routing lines. Each second fan-out routing line extends along the first direction, and both ends of each second fan-out routing line are respectively coupled to the source drive circuit and the corresponding first fan-out routing line.

[0011] According to a display panel of an embodiment of the present invention, the third trace layer further includes a plurality of third signal traces, each of the third signal traces extending along the first direction and respectively coupled to the corresponding first signal trace.

[0012] According to a display panel of an embodiment of the present invention, the second fan-out trace is located above the data line, and the third signal trace is located above the power signal line.

[0013] According to a display panel of an embodiment of the present invention, the display area includes a first sub-display area and a second sub-display area disposed adjacent to each other, wherein: The first fan-out trace, the first signal trace, the second fan-out trace, and the third signal trace are located in the first sub-display area; The second routing layer also includes multiple fourth signal traces, which extend along the second direction and are located in the second sub-display area; The third wiring layer also includes multiple fifth signal traces, which extend along the first direction and are located in the second sub-display area; Furthermore, the fourth signal trace and the fifth signal trace are respectively coupled to the corresponding power signal trace.

[0014] In a second aspect, the present invention provides a display device comprising at least a display panel as described in any of the preceding claims.

[0015] The beneficial effects of the present invention are as follows: The present invention provides a display panel and a display device. The display panel has an adjacent display area and a border area, and includes at least a plurality of pixel driving units, a first wiring layer and a second wiring layer. The plurality of pixel driving units are located in the display area, and each pixel driving unit includes at least a signal connection line. The first wiring layer is located in the display area and includes at least a plurality of data lines and a plurality of power signal lines. Each data line and each power signal line extends along a first direction and is respectively coupled to the plurality of pixel driving units arranged along the first direction. The second wiring layer is located in the display area and includes at least a plurality of sets of first fan-out wirings located on the same straight line and extending along a second direction. The first signal trace and the first fan-out trace are used to lead the corresponding data line to the frame area. The second direction has an angle with the first direction. There is a gap between each group of first fan-out traces and first signal traces. The signal connection line has a first orthographic projection on the display panel, the data line has a second orthographic projection on the display panel, the power signal line has a third orthographic projection on the display panel, and the gap has a fourth orthographic projection on the display panel. The display panel provided by the present invention is designed so that the first orthographic projection or the second orthographic projection or the third orthographic projection covers the fourth orthographic projection, which effectively prevents the display panel from generating display cloud patterns during the display process due to the difference in metal density. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the present invention, the drawings used in the description of the various embodiments made according to the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0017] Figure 1 This is a top view of the display panel structure in one implementation method.

[0018] Figure 2 This is a cross-sectional structural diagram of a display panel in one implementation method.

[0019] Figure 3 This is a top view structural diagram of a display panel provided according to an embodiment of the present invention.

[0020] Figure 4 This is a cross-sectional structural diagram of a display panel provided according to an embodiment of the present invention.

[0021] Figure 5 This is a schematic diagram of the circuit structure of a pixel driving unit provided according to an embodiment of the present invention.

[0022] Figure 6a and Figure 6bThis is an exemplary layout of a pixel driving unit provided in an embodiment of the present invention.

[0023] Figure 7 This is another top view structural schematic diagram of a display panel provided according to an embodiment of the present invention.

[0024] Figure 8 This is a schematic diagram of the structure of a display device provided according to an embodiment of the present invention.

[0025] Figure 9 This is a schematic diagram of the structure of a mobile terminal provided according to an embodiment of the present invention. Detailed Implementation

[0026] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0027] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0028] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows for communication; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0029] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0030] The following disclosure provides many different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the invention. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, examples of various specific processes and materials are provided in this invention, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0031] Please see Figure 3 , Figure 4 as well as Figure 7 , Figure 3 , Figure 4 as well as Figure 7 The figures show a top view, a cross-sectional view, and another top view of the display panel 100 provided according to an embodiment of the present invention. The figures clearly show the components of the embodiment of the present invention and their relative positions.

[0032] like Figure 3 , Figure 4 as well as Figure 7 As shown, the display panel 100 has a display area S1 and a border area S2 arranged adjacent to each other, and includes at least a plurality of pixel driving units 110, a first wiring layer and a second wiring layer. Next, in conjunction with... Figure 3 , Figure 4 as well as Figure 7 The components of the display panel 100 are described in detail.

[0033] Multiple pixel driving units 110 are located in the display area S1, and each pixel driving unit 110 includes at least a signal connection line 111.

[0034] It should be noted that you should refer to [link / reference]. Figure 5 , Figure 6a as well as Figure 6b , Figure 5 , Figure 6a as well as Figure 6b The circuit structure diagram and exemplary layout of the pixel driving unit 110 are shown respectively. Figure 5 , Figure 6a as well as Figure 6b As shown, the display panel 100 also includes multiple second signal traces 140, each of which extends along the second direction X2 and is coupled to multiple pixel driving units arranged along the second direction X2 via multiple signal connection lines 111.

[0035] Specifically, Figure 5 The diagram shown is a schematic of the circuit structure of a pixel driving unit 110 with a possible architecture of 7M1C (MOS transistors M1 to M7 and capacitor C1). It should be understood that the pixel driving unit 110 in the embodiments of the present invention may also be other circuit architectures, which will not be described in detail here.

[0036] In one embodiment of the present invention, the second signal trace 140 may be a reference voltage line (V-reference, Vi), and in this embodiment, the signal connection line 111 may be... Figure 5 The connection trace is located between the reference voltage line Vi and the seventh MOS transistor M7.

[0037] In other embodiments of the present invention, the second signal trace 140 may also be a reset signal trace or a signal trace that performs other functions. In such embodiments, the signal connection line 111 may be a connection trace located between the reset signal trace (or a signal trace that performs other functions) and the MOS transistor coupled thereto. The present invention does not limit the specific function of the second signal trace 140.

[0038] The first wiring layer (not shown) is located in the display area S1 and includes at least a plurality of data lines 121 (Data) and a plurality of power signal lines 122 (VDD). Each data line 121 and each power signal line 122 extends along the first direction X1 and is coupled to a plurality of pixel driving units 110 arranged along the first direction X1.

[0039] The second routing layer (not shown) is located in the display area S1 and includes at least multiple sets of first fan-out routing lines 131 and first signal routing lines 132 located on the same straight line and extending along the second direction X2. The first fan-out routing lines 131 are used to lead the corresponding data lines 121 out to the border area S2. The second direction X2 and the first direction X1 have an angle. Specifically, in the embodiment of the present invention, the first direction X and the second direction Y are perpendicular to each other.

[0040] It should be noted that the display panel has a fan-out area located in the bezel area. The driving circuit for driving each pixel unit circuit is located in the fan-out area. In some embodiments, the fan-out traces that connect each pixel unit circuit to the driving circuit are also located in the fan-out area.

[0041] However, such an arrangement results in a wide bezel on the display panel. Therefore, in this embodiment of the invention, the display panel 100 adopts a FIAA (Fan-out in Active Area) architecture to reduce the size of the bezel area S2 of the display panel 100 and achieve a narrow bezel. Specifically, in the display panel 100, some fan-out traces (such as the first fan-out trace 131) are designed in the display area S1 of the display panel 100 so that each pixel driving unit 110 can be coupled to the driving circuit located in the bezel area S2.

[0042] Further, please refer to Figure 1 and Figure 2 , Figure 1 and Figure 2 A top view and a cross-sectional view of the display panel 100' according to one embodiment are shown respectively.

[0043] like Figure 1 and Figure 2 As shown, in some implementations of the FIAA architecture display panel 100', there is a gap A' between each group of first fan-out traces 131' and first signal traces 132' in the second trace layer ', and the size of the gap A' is relatively large, so that the orthographic projection of the signal connection line 111' in the pixel driving unit 110' onto the display panel 100' cannot completely cover the orthographic projection of the gap A' onto the display panel 100', such as... Figure 1 As shown. Specifically, as... Figure 2 As shown, in these embodiments, the gap A' includes a first part A1 and a second part A2, wherein the first part A1 coincides with the orthographic projection of the signal connection line 111' on the display panel 100', and the second part A2 does not coincide with the orthographic projection of the signal connection line 111' on the display panel 100'.

[0044] It should be noted that, through research by the inventors in this case, it was discovered that, as Figure 2As shown, when viewed from above at gap A', the first part A1 has a signal connection line 111' that acts as a shield for the structure below, while the second part A2 does not have such a signal connection line 111' for shielding. This results in a difference in metal density between the first part A1 and the second part A2. Furthermore, since the wiring of the display panel 100' has a certain regularity, the arrangement of the second part A2 on the display panel 100' also has a certain regularity, resulting in display mura.

[0045] Now return to the reference Figure 3 and Figure 4 In this embodiment of the invention, there is a gap A between each group of first fan-out traces 131 and first signal traces 132, and the signal connection line 111 has a first orthographic projection on the display panel 100, the data line 121 has a second orthographic projection on the display panel 100, the power signal line 122 has a third orthographic projection on the display panel, and the gap A has a fourth orthographic projection on the display panel 100. The inventors of this invention designed the first or second or third orthographic projection to cover the fourth orthographic projection. Thus, when the display panel 100 is viewed from above at the gap A, the signal connection line 111, the data line 121, or the power signal line 122 can completely block the components located below it. Therefore, the problem of different metal densities mentioned above is avoided, thereby effectively preventing the display panel 100 from generating the aforementioned display cloud pattern during the display process.

[0046] It should be further explained that, in the embodiments of the present invention, as... Figure 1 As shown, the two sides of the signal connection line 111 are respectively aligned with the ends of the first fan-out trace 131 and the first signal trace 132 near gap A.

[0047] Specifically, the size of the aforementioned gap A in the second direction X2 can be any value between 2 micrometers and 4 micrometers. In this embodiment, the aforementioned size is 3 micrometers (µm).

[0048] For further information, please refer to [link / reference]. Figure 3 In this embodiment of the invention, the data line 121 is coupled to the first fan-out trace 131 through the first via B.

[0049] Furthermore, the display panel 100 also includes a source drive circuit 150 and a third wiring layer (not shown), wherein: The source drive circuit 150 is located in the frame area S2; The third routing layer is located in the display area S1 and includes at least a plurality of second fan-out routing lines 161. Each second fan-out routing line 161 extends along the first direction X1, and both ends of each second fan-out routing line 161 are coupled to the source drive circuit 150 and the corresponding first fan-out routing line 131, respectively.

[0050] It should be noted that, in this embodiment of the invention, each data line 121 located in the first routing layer is sequentially connected to the corresponding driving module in the source driving circuit 150 by passing through the first fan-out routing line 131 located in the second routing layer and the second fan-out routing line 161 located in the third routing layer.

[0051] For further information, please refer to [link / reference]. Figure 3 In this embodiment of the invention, the purpose of setting the first signal trace 132 in each group of first fan-out traces 131 and first signal traces 132 is to make the metal pattern in the display panel 100 uniform, thereby improving the display effect of the display panel 100.

[0052] Furthermore, through further research, the inventors discovered that if the potential of each first signal trace 132 is set to floating, it will cause uneven signal transmission in the display panel 100 and easily generate static electricity, affecting the reliability of signal transmission in the display panel 100. Therefore, in this embodiment of the invention, the inventors designed to couple each first signal trace 132 to the DC signal in the display panel 100 to solve the above problems.

[0053] For details, please continue reading. Figure 3 The first signal trace 132 can be coupled to the corresponding power signal trace 122 through the second via C.

[0054] Furthermore, in other embodiments of the present invention, the first signal trace 132 may also be coupled to any other corresponding signal trace configured with a DC signal.

[0055] Furthermore, in order to reduce the voltage drop (IR-Drop) generated during signal transmission in the display panel 100, the traces coupled to the DC signal need to be designed in a grid pattern. Specifically, in the embodiments of the present invention, such as... Figure 3 As shown, the third routing layer also includes multiple third signal traces 162, each of which extends along the first direction X1 and is coupled to the corresponding first signal trace 132.

[0056] Specifically, in this embodiment of the invention, the second fan-out trace 161 and the third signal trace 162 extend along the first direction X1 and are arranged along the second direction X2. Further, as... Figure 3 As shown, in this embodiment of the invention, the second fan-out trace 161 is located above the data line 121, and the third signal trace 162 is located above the power signal line 122.

[0057] Furthermore, such as Figure 3As shown, in this embodiment of the invention, the display panel 100 further includes multiple scan lines 170, each scan line 170 extending along the second direction X2 and coupled to multiple pixel driving units 110 arranged along the second direction X2.

[0058] Next, please refer to Figure 7 The diagram shown is another top view of the display panel 100 provided according to an embodiment of the present invention, as illustrated below. Figure 7 As shown, the display area S1 mentioned above specifically includes a first sub-display area D1 and a second sub-display area D2 arranged adjacent to each other, wherein: The first outgoing line 131, the first signal line 132, the second outgoing line 161, and the third signal line 162 are located in the first sub-display area D1; The second wiring layer also includes multiple fourth signal traces (not shown), which extend along the second direction X2 and are located in the second sub-display area D2; The third wiring layer also includes multiple fifth signal traces (not shown), which extend along the first direction X1 and are located in the second sub-display area D2; Furthermore, the fourth and fifth signal traces are coupled to their respective power signal lines VDD.

[0059] It should be noted that the fourth and fifth signal traces are set in the second sub-display area D2 in order to reduce the voltage drop generated during signal transmission in the display panel 100, so as to ensure the reliability of signal transmission in the display panel 100.

[0060] It should be noted that, in order to ensure the reliability of signal transmission of the display panel 100, the fourth signal trace and the fifth signal trace are coupled to the power signal line 122 respectively.

[0061] For details, please continue reading. Figure 7 In this embodiment of the invention, multiple second-fan outgoing traces 161 are switched to multiple first-fan outgoing traces 131 at position M1 via corresponding vias. Further, multiple first vias B are located at... Figure 7 At position M2, that is, at position M2, the first outgoing line 131 is switched to data line 121.

[0062] Specifically, the first sub-display area D1 includes a first area D11 and a second area D12, wherein multiple first fan outgoing lines 131 are located in the first area D11, and multiple second fan outgoing lines 161 are located in the second area D12.

[0063] Furthermore, such as Figure 7As shown, the display area S1 also includes a third sub-display area D3 adjacent to the first sub-display area D1. The third sub-display area D3 is a conventional display area. The third sub-display area D3 does not have signal traces such as the first outgoing line 131 and the second outgoing line 161, but it does have signal traces such as the data line 121, the signal connection line 111, and the power signal line 122.

[0064] Based on the foregoing, the present invention provides a display panel 100, which has an adjacent display area S1 and a border area S2, and includes at least a plurality of pixel driving units 110, a first wiring layer, and a second wiring layer. The plurality of pixel driving units 110 are located in the display area S1, and each pixel driving unit 110 includes at least a signal connection line 111. The first wiring layer is located in the display area S1 and includes at least a plurality of data lines 121 and a plurality of power signal lines 122. Each data line 121 and each power signal line 122 extends along a first direction X1 and is respectively coupled to the plurality of pixel driving units 110 arranged along the first direction X1. The second wiring layer is located in the display area S1 and includes at least a plurality of first fan-shaped traces located on the same straight line and extending along a second direction X2. Line 131 and first signal line 132, the first fan-out line 131 is used to lead the corresponding data line 121 to the frame area S2, the second direction X2 and the first direction X1 have an angle, wherein there is a gap A between each group of first fan-out lines 131 and first signal lines 132, and the signal connection line 111 has a first orthographic projection on the display panel 100, the data line 121 has a second orthographic projection on the display panel 100, the power signal line 122 has a third orthographic projection on the display panel 100, and the gap A has a fourth orthographic projection on the display panel. The display panel 100 provided by the present invention is designed so that the first or second or third orthographic projection covers the fourth orthographic projection, which effectively prevents the display panel 100 from generating display cloud patterns during the display process due to the difference in metal density.

[0065] Please see Figure 8 , Figure 8 A schematic diagram of the structure of a display device 500 provided according to an embodiment of the present invention is shown. The components of the embodiment of the present invention and their relative positions can be seen intuitively from the figure.

[0066] like Figure 8 As shown, the display device 500 includes a display panel 510, wherein the display panel 510 may be the display panel 100 as described in the above embodiments.

[0067] Please see Figure 9 , Figure 9This is a schematic diagram of the structure of a mobile terminal 400 provided according to an embodiment of the present invention. The above-mentioned display device 500 is applied to the mobile terminal 400, which can be a smartphone or a tablet computer, etc. The components of the present invention and their relative positions can be seen intuitively from the figure.

[0068] like Figure 9 As shown, the mobile terminal 400 includes a processor 401 and a memory 402. The processor 401 and the memory 402 are electrically connected.

[0069] The processor 401 is the control center of the mobile terminal 400. It connects various parts of the mobile terminal through various interfaces and lines. By running or loading applications stored in the memory 402 and calling data stored in the memory 402, it performs various functions of the mobile terminal and processes data, thereby monitoring the mobile terminal as a whole.

[0070] In addition to the embodiments described above, the present invention may have other implementations. All technical solutions formed by equivalent substitutions or equivalent replacements fall within the protection scope claimed by the present invention.

[0071] In summary, although the preferred embodiments of the present invention have been disclosed above, the above preferred embodiments are not intended to limit the present invention. Those skilled in the art can make various modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the scope defined in the claims.

Claims

1. A display panel, characterized in that, The display panel includes, at least: a display area and a border area arranged adjacent to each other. Multiple pixel driving units are located in the display area; A first wiring layer, located in the display area, includes at least a plurality of data lines extending along a first direction and respectively coupled to a plurality of pixel driving units arranged along the first direction; and, The second routing layer, located in the display area, includes at least multiple sets of first fan-out routing lines and first signal routing lines located on the same straight line and extending along the second direction. The first fan-out routing lines are used to lead the corresponding data lines to the border area. The second direction and the first direction have an angle between them. There is a gap between the first fan-out trace and the first signal trace in each group. In the display panel viewed from above, the gap is covered by a metal trace that is disposed on a different layer from the second trace layer.

2. The display panel according to claim 1, characterized in that, The metal traces include signal connection lines, which are formed in the pixel driver unit; In the display panel viewed from above, the signal connection line has a first orthographic projection on the display panel, and the gap has a fourth orthographic projection on the display panel, with the first orthographic projection covering the fourth orthographic projection.

3. The display panel according to claim 2, characterized in that, In the display panel viewed from above, the two sides of the signal connection line are respectively aligned with the ends of the first fan-out trace and the first signal trace near the gap.

4. The display panel according to claim 1, characterized in that, The metal traces include the data lines and power signal lines, which are formed in the first trace layer; In the display panel viewed from above, the data line has a second orthographic projection on the display panel, the power signal line has a third orthographic projection on the display panel, and the gap has a fourth orthographic projection on the display panel, with the second or third orthographic projection covering the fourth orthographic projection.

5. The display panel according to claim 2, characterized in that, The display panel also includes multiple second signal traces, each of which extends along the second direction and is coupled to multiple pixel driving units arranged along the second direction via multiple signal connection lines.

6. The display panel according to claim 5, characterized in that, The second signal trace includes at least a reference voltage line and a reset signal line.

7. The display panel according to claim 1, characterized in that, The first signal trace is coupled to the corresponding signal line that receives the DC signal.

8. The display panel according to claim 1, characterized in that, The display panel further includes multiple scan lines, each scan line extending along the second direction and coupled to multiple pixel driving units arranged along the second direction.

9. The display panel according to claim 1, characterized in that, The display panel also includes a source drive circuit and a third wiring layer, wherein: The source drive circuit is located in the frame area; The third routing layer is located in the display area and includes at least a plurality of second fan-out routing lines. Each second fan-out routing line extends along the first direction, and both ends of each second fan-out routing line are respectively coupled to the source drive circuit and the corresponding first fan-out routing line.

10. The display panel according to claim 9, characterized in that, The third routing layer also includes multiple third signal traces, each of which extends along the first direction and is coupled to a corresponding first signal trace.

11. The display panel according to claim 10, characterized in that, The second fan-out trace is located above the data line, and the third signal trace is located above the power signal line.

12. The display panel according to claim 11, characterized in that, The display area includes a first sub-display area and a second sub-display area arranged adjacent to each other, wherein: The first fan-out trace, the first signal trace, the second fan-out trace, and the third signal trace are located in the first sub-display area; The second routing layer also includes multiple fourth signal traces, which extend along the second direction and are located in the second sub-display area; The third wiring layer also includes multiple fifth signal traces, which extend along the first direction and are located in the second sub-display area; Furthermore, the fourth signal trace and the fifth signal trace are respectively coupled to the corresponding power signal trace.

13. A display device, characterized in that, It includes at least the display panel as described in any one of claims 1 to 12.

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