Quantum task execution method and system assisted by hardware equipment and storage medium

Abstract

The invention relates to the technical field of quantum computers, in particular to a quantum task execution method and system assisted by hardware equipment and a storage medium. Comprising the following steps: a hardware device receives an initial quantum circuit corresponding to a quantum calculation task sent by a software system and position information of a parameter-containing quantum logic gate contained in the initial quantum circuit; determining storage units for storing quantum bits in the initial quantum circuit in the hardware equipment and quantum logic gates stored in each storage unit; and when the hardware equipment receives an update value of a parameter sent by a software system, the initial quantum circuit is updated based on the storage unit and the position information, and the quantum calculation task is executed. By means of the mode, a software system does not need to compile the quantum circuit again, the quantum circuit compiling time is greatly shortened, multiple times of transmission of the quantum circuit are avoided, the data transmission efficiency is improved, and hardware equipment runs the quantum circuit at a higher speed.

Description

Technical Field

[0001] This invention relates to the field of quantum computer technology, and in particular to a hardware-assisted quantum task execution method, system, and storage medium. Background Technology

[0002] The execution speed of quantum processing units is often limited by classical hardware, especially when processing structurally equivalent quantum circuits. Each quantum circuit needs to be compiled and loaded into the hardware independently, leading to unnecessary time waste. Therefore, how to efficiently execute quantum circuits with the same physical pulse structure has become a challenge in the field of quantum computing. Summary of the Invention

[0003] This invention provides a hardware-assisted quantum task execution method and apparatus to solve the problem of unnecessary time waste caused by the need for quantum circuits to be independently compiled and loaded into hardware in the prior art.

[0004] This specification provides a hardware-assisted quantum task execution method, including:

[0005] The hardware device, in response to the initial quantum circuit of the corresponding quantum computing task sent by the software system and the location information of the parametric quantum logic gates contained in the initial quantum circuit, determines the storage unit in the hardware device where the qubits in the initial quantum circuit are located and the quantum logic gates stored in each storage unit. When the quantum logic gates include parametric quantum logic gates, the parameters of the quantum logic gates are marked by the location information.

[0006] When the hardware device receives the updated parameter value sent by the software system, it updates the initial quantum circuit based on the storage unit and the location information and executes the quantum computing task. The updated parameter value is obtained by the software system updating the parameters of the quantum logic gate used in the previous execution of the initial quantum circuit according to the execution result obtained by the hardware device in the previous execution of the initial quantum circuit.

[0007] Optionally, the software system sends the initial quantum circuit for the corresponding quantum computing task and the location information of the parametric quantum logic gates contained in the initial quantum circuit, including:

[0008] Construct the initial quantum circuit corresponding to the quantum computing task;

[0009] Determine the position information of each parameterized quantum logic gate in the initial quantum circuit;

[0010] Send the initial quantum circuit and the location information of the parametric quantum logic gates contained in the initial quantum circuit.

[0011] Optionally, the parameters of the quantum logic gates used when the hardware device executes the initial quantum circuit for the first time are preset.

[0012] Optionally, the software system updates the parameters of the quantum logic gates used in the previous execution of the initial quantum circuit based on the execution result obtained from the previous execution of the initial quantum circuit by the hardware device, including:

[0013] The software system updates the parameters of the quantum logic gates used in the previous execution of the initial quantum circuit according to a preset algorithm for implementing the quantum computing task.

[0014] Optionally, the storage units used to store the qubits in the initial quantum circuit in the hardware device are arranged in parallel within the FPGA of the hardware device to form a multi-parallel storage module.

[0015] Optionally, the multi-parallel storage module is a multi-parallel block random access memory.

[0016] This specification also provides a hardware-assisted quantum circuit execution system, including a software system and a hardware device, the system comprising:

[0017] The software system constructs the initial quantum circuit corresponding to the quantum computing task, records the position information of the parametric quantum logic gates contained in the initial quantum circuit, and sends the initial quantum circuit corresponding to the quantum computing task and the position information of the parametric quantum logic gates contained in the initial quantum circuit to the hardware device.

[0018] The hardware device determines the storage unit in the hardware device where the qubits in the initial quantum circuit are located and the quantum logic gates stored in each storage unit, based on the received initial quantum circuit of the corresponding quantum computing task and the location information of the parametric quantum logic gates contained in the initial quantum circuit. When the quantum logic gates include parametric quantum logic gates, the parameters of the quantum logic gates are marked by the location information.

[0019] When the hardware device receives the updated parameter value sent by the software system, it updates the initial quantum circuit based on the storage unit and the location information and executes the quantum computing task. The updated parameter value is obtained by the software system updating the parameters of the quantum logic gate used in the previous execution of the initial quantum circuit according to the execution result obtained by the hardware device in the previous execution of the initial quantum circuit.

[0020] Optionally, the storage units used to store the qubits in the initial quantum circuit in the hardware device are arranged in parallel within the FPGA of the hardware device to form a multi-parallel storage module.

[0021] An electronic device includes a memory and a processor, the memory storing computer instructions, and the processor being configured to execute the computer instructions to perform the method described above.

[0022] A storage medium storing computer instructions configured to execute the method described above at runtime.

[0023] The beneficial effects are as follows: The hardware device of this application, upon receiving the initial quantum circuit and the location information of the parametric quantum logic gates contained in the initial quantum circuit from the software system for the corresponding quantum computing task, determines the storage unit in the hardware device where the qubits in the initial quantum circuit are located, and the quantum logic gates stored in each storage unit. When the quantum logic gates include parametric quantum logic gates, the parameters of the quantum logic gates are marked using the location information. When the hardware device receives the updated parameter values ​​sent by the software system, it updates the initial quantum circuit based on the storage unit and the location information and executes the quantum computing task. The updated parameter values ​​are obtained by the software system updating the parameters of the quantum logic gates used in the previous execution of the initial quantum circuit based on the execution result obtained by the hardware device in the previous execution of the initial quantum circuit. Through this method, the software system does not need to recompile the quantum circuit; it only needs to send the updated parameter values ​​to the hardware device, greatly reducing the quantum circuit compilation time, avoiding multiple transmissions of the quantum circuit, improving data transmission efficiency, and enabling the hardware device to run the quantum circuit at a higher speed. Attached Figure Description

[0024] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0025] Figure 1 A flowchart illustrating a hardware-assisted quantum task execution method provided in this specification embodiment;

[0026] Figure 2 This is an initial quantum circuit structure diagram corresponding to the quantum computing task provided in the embodiments of this specification;

[0027] Figure 3 A schematic diagram of a hardware-assisted quantum task execution system provided in the embodiments of this specification;

[0028] Figure 4 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this specification;

[0029] Figure 5This is a schematic diagram of a computer-readable medium provided for embodiments of this specification. Detailed Implementation

[0030] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0031] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0032] It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps described in these embodiments do not limit the scope of the invention.

[0033] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the invention or its application or use.

[0034] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0035] In all the examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0036] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0037] Reference Figure 2 This specification provides a schematic diagram of a hardware-assisted quantum task execution method, comprising: S101: The hardware device, in response to the initial quantum circuit of the corresponding quantum computing task received from the software system and the location information of the parametric quantum logic gates contained in the initial quantum circuit, determines the storage unit in the hardware device for storing the qubits in the initial quantum circuit, and the quantum logic gates stored in each storage unit. When the quantum logic gates include parametric quantum logic gates, the parameters of the quantum logic gates are marked using the location information. S102: When the hardware device receives the updated parameter values ​​sent by the software system, it updates the initial quantum circuit based on the storage unit and the location information and executes the quantum computing task. The updated parameter values ​​are obtained by the software system updating the parameters of the quantum logic gates used in the previous execution of the initial quantum circuit based on the execution result obtained by the hardware device in the previous execution of the initial quantum circuit.

[0038] In one optional embodiment, the user first constructs an initial quantum circuit corresponding to the quantum computing task to be performed in the software system, so as to... Figure 2 The initial quantum circuit structure diagram shown is used as an example for illustration. This initial quantum circuit consists of quantum logic gates and qubits. After constructing the initial quantum circuit, it is necessary to determine the position information of each quantum logic gate in the initial quantum circuit, and to mark the parameters of the parameterized quantum logic gates in the quantum logic gates using the position information. For example, the position information of the quantum logic gates can be numbered and marked according to the order of the quantum circuit layers, such as... Figure 2 As shown, the position information of the quantum logic gates is 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10. Since the CZ gate is not a parametric quantum logic gate, it does not need to be marked. That is, the numbers 0, 1, 2, 3, 7, 8, 9, 10 are marked to facilitate the parameter update of the subsequent parametric quantum logic gates. It should be noted that the position information of the quantum logic gates is not limited to being determined according to the order of the quantum circuit layers; the quantum logic gates can also be numbered according to the order of the qubits. There is no restriction here. Then, the user control software system sends the initial quantum circuit and the position information of the parametric quantum logic gates contained in the initial quantum circuit. The process begins with the hardware device determining the storage units containing the qubits of the initial quantum circuit, the quantum logic gates stored in each unit, and executing the initial quantum circuit to obtain the execution result. This result is then fed back to the software system, which calculates the updated parameters of the parameterized quantum logic gates to be sent to the hardware system next. Finally, upon receiving the updated parameters from the software system, the hardware device updates the initial quantum circuit based on the storage units and location information and executes the quantum computing task, thus completing the quantum computing task. This method eliminates the need for the software system to recompile the quantum circuit; it only requires sending the updated parameter values ​​to the hardware device. This significantly reduces quantum circuit compilation time, avoids multiple transmissions of the quantum circuit, improves data transmission efficiency, and allows the hardware device to run the quantum circuit at higher speeds.

[0039] In one alternative embodiment, the software system may be an open-source quantum computing framework for constructing quantum circuits.

[0040] In one optional embodiment, the parameters of the quantum logic gate used when the hardware device executes the initial quantum circuit for the first time are preset. The specific parameters of the quantum logic gate can be customized according to actual needs to ensure the rationality of the parameter settings.

[0041] Optionally, updating the parameters of the quantum logic gate used in the previous execution of the initial quantum circuit based on the execution result obtained by the hardware device in the previous execution of the initial quantum circuit includes: the software system updating the parameters of the quantum logic gate used in the previous execution of the initial quantum circuit based on a preset algorithm for implementing the quantum computing task.

[0042] In one optional embodiment, since different quantum computing tasks employ different algorithms, and the initial quantum circuits constructed according to the quantum computing tasks are also different, when updating the parameters of the parameterized quantum logic gates in the initial quantum circuit, the software system updates the parameters of the quantum logic gates used in the previous execution of the initial quantum circuit according to a preset algorithm for implementing the quantum computing task. The preset algorithm corresponds to the quantum computing task to be executed. For example, when performing quantum-classical model optimization, the backpropagation algorithm is used to update the parameters of the parameterized quantum logic gates in the initial quantum circuit.

[0043] Optionally, the storage units used to store the qubits in the initial quantum circuit in the hardware device are arranged in parallel in the FPGA within the hardware device to form a multi-parallel storage module.

[0044] In one optional embodiment, each physical qubit has an independent storage unit, and the storage units are arranged in parallel in the FPGA within the hardware device to form a multi-parallel storage module. The storage unit is used to store the parameters of the quantum logic gates acting on the qubit, so that when the initial quantum circuit is executed, the parameters that need to be loaded onto the initial quantum circuit can be retrieved directly from the storage unit in parallel to complete the quantum computing task. The parallel arrangement of the storage units improves the loading efficiency of the parameters and improves the operating efficiency of the initial quantum circuit.

[0045] In one alternative embodiment, the hardware device can store the parameters of the parametric quantum logic gate in a dictionary manner. The parameters that need to be loaded onto the initial quantum circuit are loaded using the dictionary. For the parameters of the parametric quantum logic gate that have not changed, the dictionary method can avoid repeated parameter updates and reduce the consumption of computer resources.

[0046] In one optional embodiment, the multi-parallel storage module is a multi-parallel block random access memory, that is, the block RAM enables fast read and write operations on the parameters of the parameterized quantum logic gate. Moreover, the block RAM occupies less space and consumes less power compared to other memories, making it more suitable for processing quantum computing tasks.

[0047] In this application, the hardware device, based on the initial quantum circuit and the location information of the parametric quantum logic gates contained in the initial quantum circuit sent by the software system for the corresponding quantum computing task, determines the storage unit in the hardware device where the qubits in the initial quantum circuit are located, and the quantum logic gates stored in each storage unit. When the hardware device receives the updated parameter values ​​sent by the software system, it updates the initial quantum circuit based on the storage units and the location information and executes the quantum computing task. Through this method, the software system does not need to recompile the quantum circuit, greatly reducing the quantum circuit compilation time, avoiding multiple transmissions of the quantum circuit, improving data transmission efficiency, and enabling the hardware device to run the quantum circuit at a higher speed.

[0048] Reference Figure 3 This specification also provides a hardware-assisted quantum task execution system, including a software system and a hardware device. The system includes: the software system constructing an initial quantum circuit corresponding to a quantum computing task, recording the position information of the parametric quantum logic gates contained in the initial quantum circuit, and sending the initial quantum circuit and the position information of the parametric quantum logic gates contained in the initial quantum circuit to the hardware device; the hardware device, based on the received initial quantum circuit and the position information of the parametric quantum logic gates contained in the initial quantum computing task, determining the storage unit in the hardware device used to store the qubits in the initial quantum circuit, and the quantum logic gates stored in each storage unit, wherein when the quantum logic gates include parametric quantum logic gates, the parameters of the quantum logic gates are marked by the position information; when the hardware device receives the updated parameter values ​​sent by the software system, it updates the initial quantum circuit based on the storage unit and the position information and executes the quantum computing task, wherein the updated parameter values ​​are obtained by the software system updating the parameters of the quantum logic gates used in the previous execution of the initial quantum circuit according to the execution result obtained by the hardware device in the previous execution of the initial quantum circuit.

[0049] Optionally, the storage units used to store the qubits in the initial quantum circuit in the hardware device are arranged in parallel within the FPGA of the hardware device to form a multi-parallel storage module.

[0050] Regarding the system in the above embodiments, the process of performing each step has been described in detail in the embodiments of the method, and will not be elaborated here.

[0051] Based on the same inventive concept, embodiments of this specification also provide an electronic device.

[0052] The following describes embodiments of the electronic device of the present invention, which can be considered as specific implementations of the methods and apparatus embodiments of the present invention described above. Details described in the embodiments of the electronic device of the present invention should be considered as supplements to the methods or apparatus embodiments described above; details not disclosed in the embodiments of the electronic device of the present invention can be implemented with reference to the methods or apparatus embodiments described above.

[0053] Reference Figure 4 This is a schematic diagram of an electronic device provided as an embodiment of this specification. Refer to the following... Figure 4 The electronic device 300 according to this embodiment of the present invention will be described. Figure 4 The electronic device 300 shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of the present invention.

[0054] like Figure 4 As shown, the electronic device 300 is presented in the form of a general-purpose computing device. The components of the electronic device 300 may include, but are not limited to: at least one processing unit 310, at least one storage unit 320, a bus 330 connecting different device components (including storage unit 320 and processing unit 310), a display unit 340, etc.

[0055] The storage unit stores program code that can be executed by the processing unit 310, causing the processing unit 310 to perform the steps described in the processing method section of this specification according to various exemplary embodiments of the present invention. For example, the processing unit 310 can perform, for example... Figure 1 The steps are shown.

[0056] The storage unit 320 may include a readable medium in the form of a volatile storage unit, such as a random access memory unit (RAM) 3201 and / or a cache storage unit 3202, and may further include a read-only memory unit (ROM) 3203.

[0057] The storage unit 320 may also include a program / utility 3204 having a set (at least one) of program modules 3205, such program modules 3205 including but not limited to: operating devices, one or more application programs, other program modules and program data, each or some combination of these examples may include an implementation of a network environment.

[0058] Bus 330 can represent one or more of several types of bus structures, including a memory cell bus or memory cell controller, a peripheral bus, a graphics acceleration port, a processing unit, or a local bus using any of the various bus structures.

[0059] Electronic device 300 can also communicate with one or more external devices 400 (e.g., keyboard, pointing device, Bluetooth device, etc.), and with one or more devices that enable a user to interact with the electronic device 300, and / or with any device that enables the electronic device 300 to communicate with one or more other computing devices (e.g., router, modem, etc.). This communication can be performed via input / output (I / O) interface 350. Furthermore, electronic device 300 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) via network adapter 360. Network adapter 360 can communicate with other modules of electronic device 300 via bus 330. It should be understood that, although... Figure 4 As not shown, other hardware and / or software modules may be used in conjunction with electronic device 300, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID devices, tape drives, and data backup storage devices.

[0060] Through the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described in this invention can be implemented by software or by combining software with necessary hardware. Therefore, the technical solutions according to the embodiments of this invention can be embodied in the form of a software product, which can be stored in a computer-readable storage medium (such as a CD-ROM, USB flash drive, external hard drive, etc.) or on a network, including several instructions to cause a computing device (such as a personal computer, server, or network device, etc.) to execute the method described above according to this invention. When the computer instructions are executed by a data processing device, the computer-readable medium is able to implement the method described above, i.e., as follows: Figure 1 The method shown.

[0061] Reference Figure 5 This is a schematic diagram of a computer-readable medium provided for embodiments of this specification.

[0062] accomplish Figure 1The computer instructions of the method shown can be stored on one or more computer-readable media. A computer-readable medium can be a readable signal medium or a readable storage medium. A readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor device, or any combination thereof. More specific examples (a non-exhaustive list) of readable storage media include: an electrical connection having one or more wires, a portable disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0063] The computer-readable storage medium may include data signals propagated in baseband or as part of a carrier wave, carrying readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. The readable storage medium may also be any readable medium other than a readable storage medium, capable of transmitting, propagating, or transmitting a program for use by or in connection with an instruction execution device, apparatus, or apparatus. The program code contained on the readable storage medium may be transmitted using any suitable medium, including but not limited to wireless, wired, optical fiber, RF, etc., or any suitable combination thereof.

[0064] Program code for performing the operations of this invention can be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java and C++, and conventional procedural programming languages ​​such as C or similar languages. The program code can execute entirely on the user's computing device, partially on the user's device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0065] In summary, this invention can be implemented in hardware, or as software modules running on one or more processors, or a combination thereof. Those skilled in the art will understand that in practice, general-purpose data processing devices such as microprocessors or digital signal processors (DSPs) can be used to implement some or all of the functions of some or all of the components according to the embodiments of the invention. The invention can also be implemented as a device or apparatus program (e.g., a computer program and computer program product) for performing part or all of the methods described herein. Such programs implementing the invention can be stored on a computer-readable medium or can take the form of one or more signals. Such signals can be downloaded from an Internet website, provided on a carrier signal, or provided in any other form.

[0066] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the present invention is not inherently related to any specific computer, virtual device, or electronic device, and various general-purpose devices can also implement the present invention. The above descriptions are merely specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

[0067] The various embodiments in this specification are described in a progressive manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.

[0068] The above description is merely an embodiment of this application and is not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. A hardware-assisted quantum task execution method, characterized in that, include: The hardware device, in response to the initial quantum circuit of the corresponding quantum computing task sent by the software system and the location information of the parametric quantum logic gates contained in the initial quantum circuit, determines the storage unit in the hardware device where the qubits in the initial quantum circuit are located and the quantum logic gates stored in each storage unit. When the quantum logic gates include parametric quantum logic gates, the parameters of the quantum logic gates are marked by the location information. When the hardware device receives the updated parameter value sent by the software system, it updates the initial quantum circuit based on the storage unit and the location information and executes the quantum computing task. The updated parameter value is obtained by the software system updating the parameters of the quantum logic gate used in the previous execution of the initial quantum circuit according to the execution result obtained by the hardware device in the previous execution of the initial quantum circuit.

2. The method as described in claim 1, characterized in that, The software system sends the initial quantum circuit for the corresponding quantum computing task, along with the location information of the parametric quantum logic gates contained within the initial quantum circuit, including: Construct the initial quantum circuit corresponding to the quantum computing task; Determine the position information of each parameterized quantum logic gate in the initial quantum circuit; Send the initial quantum circuit and the location information of the parametric quantum logic gates contained in the initial quantum circuit.

3. The method as described in claim 1, characterized in that, The parameters of the quantum logic gates used when the hardware device executes the initial quantum circuit for the first time are preset.

4. The method as described in claim 1, characterized in that, The software system updates the parameters of the quantum logic gates used in the previous execution of the initial quantum circuit based on the execution result obtained from the previous execution of the initial quantum circuit by the hardware device, including: The software system updates the parameters of the quantum logic gates used in the previous execution of the initial quantum circuit according to a preset algorithm for implementing the quantum computing task.

5. The method as described in claim 1, characterized in that, In the hardware device, the storage units used to store the qubits in the initial quantum circuit are arranged in parallel within the FPGA of the hardware device to form a multi-parallel storage module.

6. The method as described in claim 5, characterized in that, The multi-parallel storage module is a multi-parallel block random access memory.

7. A hardware-assisted quantum circuit execution system, characterized in that, The system includes software systems and hardware devices, wherein the system includes: The software system constructs the initial quantum circuit corresponding to the quantum computing task, records the position information of the parametric quantum logic gates contained in the initial quantum circuit, and sends the initial quantum circuit corresponding to the quantum computing task and the position information of the parametric quantum logic gates contained in the initial quantum circuit to the hardware device. The hardware device determines the storage unit in the hardware device where the qubits in the initial quantum circuit are located and the quantum logic gates stored in each storage unit, based on the received initial quantum circuit of the corresponding quantum computing task and the location information of the parametric quantum logic gates contained in the initial quantum circuit. When the quantum logic gates include parametric quantum logic gates, the parameters of the quantum logic gates are marked by the location information. When the hardware device receives the updated parameter value sent by the software system, it updates the initial quantum circuit based on the storage unit and the location information and executes the quantum computing task. The updated parameter value is obtained by the software system updating the parameters of the quantum logic gate used in the previous execution of the initial quantum circuit according to the execution result obtained by the hardware device in the previous execution of the initial quantum circuit.

8. The system as described in claim 7, characterized in that, In the hardware device, the storage units used to store the qubits in the initial quantum circuit are arranged in parallel within the FPGA of the hardware device to form a multi-parallel storage module.

9. An electronic device, characterized in that, The method includes a memory and a processor, wherein the memory stores computer instructions and the processor is configured to execute the computer instructions to perform the method according to any one of claims 1 to 6.

10. A storage medium, characterized in that, The storage medium stores computer instructions that are configured to execute the method described in any one of claims 1 to 6 when run.

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