A method for suppressing fault fluctuations at the receiving end of a DC converter

Abstract

This application discloses a method for suppressing fault fluctuations at the receiving end of a DC converter. The method includes: acquiring three-phase AC voltage signals from an AC power grid to obtain the corresponding negative-sequence voltage and phasor amplitude; activating a first current-limiting control strategy when the negative-sequence voltage and phasor amplitude meet preset fault regulation constraints; determining a target adjustment range for the DC current command value based on the DC voltage corresponding to the three-phase AC voltage signals; and adjusting the DC current command value within the target adjustment range based on the first current-limiting control strategy to suppress fluctuations in the DC current command value. According to the embodiments of this application, by lowering the adjustment threshold according to the selected target adjustment range when a fault occurs, the DC current command value can be adjusted in advance, which can improve the active power transmission level during AC faults and suppress transient fluctuations in DC current and reactive power, providing a technical reference for the engineering application of hybrid commutation converters.

Description

Technical Field

[0001] This application belongs to the field of converter fault regulation technology, and particularly relates to a method for suppressing fault fluctuations at the receiving end of a DC converter. Background Technology

[0002] my country's energy resources are mainly concentrated in the Northwest, Southwest, and North China regions, while the load is mainly concentrated in the Southeast coastal areas, showing an inverse distribution. High-voltage direct current (HVDC) transmission technology has significant advantages such as long transmission distance, large capacity, and low power loss, making it a strategic technology for achieving large-scale energy allocation.

[0003] Conventional DC transmission based on line commutated converters (LCCs) uses semi-controlled thyristors, which cannot be controlled to turn off. They require a negative voltage applied across the AC grid to achieve natural turn-off. When faults such as voltage dips in the receiving-end grid occur, the thyristor turn-off angle is insufficient, leading to commutation failure and seriously threatening the safe and stable operation of the AC / DC grid. Hybrid commutated converters (HCCs), based on fully controlled RB-IGCTs, can completely resist commutation failure and possess better power characteristics. Unlike LCCs, HCCs do not experience commutation failure and still maintain a certain active power transmission capacity even under severe AC grid faults at the receiving end. However, HCCs can cause current and power fluctuations at the receiving end when AC grid faults occur. Summary of the Invention

[0004] This application provides a method for suppressing fault fluctuations at the receiving end of a DC converter, which can improve the active power transmission level during AC faults and suppress transient fluctuations in DC current and reactive power, providing a technical reference for the engineering application of hybrid commutation converters.

[0005] In a first aspect, embodiments of this application provide a method for suppressing fault fluctuations at the receiving end of a DC converter, comprising: acquiring three-phase AC voltage signals from an AC power grid, and processing the three-phase AC voltage signals to obtain corresponding negative-sequence voltages and phasor amplitudes of instantaneous voltages; activating a first current-limiting control strategy when the negative-sequence voltages and the phasor amplitudes satisfy preset fault regulation constraints; determining a target adjustment range for a DC current command value based on the DC voltage corresponding to the three-phase AC voltage signals, wherein the DC voltage is the voltage at the DC output terminal after processing the three-phase AC voltage signals through an inverter; and adjusting the DC current command value within the target adjustment range based on the first current-limiting control strategy to suppress fluctuations in the DC current command value.

[0006] In one possible implementation, the step of activating a first current-limiting control strategy when the negative sequence voltage and the phasor amplitude meet preset fault regulation constraints includes: determining a first negative sequence threshold based on the rated voltage value of the three-phase AC voltage signal; determining a first phasor threshold based on the change in the phasor amplitude per unit time; and activating the first current-limiting control strategy when the negative sequence voltage is greater than the first negative sequence threshold or the phasor amplitude is less than the first phasor threshold.

[0007] In one possible implementation, before activating the first current limiting control strategy, the method further includes: determining the receiving-end fault type based on the negative sequence voltage and the phasor amplitude; determining the receiving-end fault type as a three-phase asymmetrical fault when the negative sequence voltage is greater than the first negative sequence threshold; and determining the receiving-end fault type as a three-phase symmetrical fault when the phasor amplitude is less than the first phasor threshold.

[0008] In one possible implementation, determining the target adjustment range of the DC current command value based on the DC voltage corresponding to the three-phase AC voltage signal includes: determining the DC voltage change; determining that the DC voltage is in a recovery state when the DC voltage change is greater than zero; determining the target adjustment range of the DC current command value as an adjustment recovery range based on the recovery state; determining that the DC voltage is in a drop state when the DC voltage change is less than zero; and determining the target adjustment range of the DC current command value as an adjustment drop range based on the drop state. Specifically, when the DC current command value is at its maximum value, the minimum value of the DC voltage that satisfies the fault adjustment constraint is a first minimum value, and the minimum value of the DC voltage that does not satisfy the fault adjustment constraint is a second minimum value, wherein the first minimum value is less than the second minimum value.

[0009] In one possible implementation, adjusting the DC current command value within the target range based on the first current limiting control strategy includes: when the target adjustment range is an adjustment drop range, determining the relationship between the DC voltage and preset first high-voltage threshold, first low-voltage threshold, and second low-voltage threshold; when the DC voltage is greater than or equal to the first high-voltage threshold, determining the first current limiting control strategy as a first drop adjustment strategy; adjusting the DC current command value according to the first drop adjustment strategy to maintain a preset upper current threshold; when the DC voltage is less than the first high-voltage threshold and the DC voltage is greater than or equal to the first low-voltage threshold, determining the first current limiting control strategy as a second drop adjustment strategy; performing a first linear relationship adjustment on the DC current command value based on the second drop adjustment strategy; when the DC voltage is less than the first low-voltage threshold and the DC voltage is greater than or equal to the second low-voltage threshold, determining the first current limiting control strategy as a third drop adjustment strategy; and adjusting the DC current command value according to the third drop adjustment strategy to maintain a preset lower current threshold.

[0010] In one possible implementation, adjusting the DC current command value within the target range based on the first current limiting control strategy includes: when the target adjustment range is an adjustment recovery range, determining the relationship between the DC voltage and a preset first high-voltage threshold and a second low-voltage threshold; when the DC voltage is greater than or equal to the second low-voltage threshold and the DC voltage is less than the first high-voltage threshold, determining the first current limiting control strategy as a first recovery adjustment strategy; performing a second linear relationship adjustment on the DC current command value based on the first recovery adjustment strategy; when the DC voltage is greater than the first high-voltage threshold, determining the first current limiting control strategy as a second recovery adjustment strategy; and adjusting the DC current command value according to the second recovery adjustment strategy to maintain a current upper limit threshold.

[0011] In one possible implementation, the method further includes: activating a second current-limiting control strategy when the negative sequence voltage and the phasor amplitude meet preset fault recovery constraints; and adjusting the DC current command value according to the second control strategy so that the DC power is suppressed by fluctuations in the DC current command value.

[0012] In one possible implementation, the step of activating a second current-limiting control strategy when the negative-sequence voltage and the phasor amplitude meet preset fault recovery constraints includes: determining the receiving-end fault type as a three-phase fault recovery type when the negative-sequence voltage is less than a preset second negative-sequence threshold and the phasor amplitude is greater than a preset second phasor threshold, wherein the first negative-sequence threshold is greater than the second negative-sequence voltage and the first phasor threshold is less than the second phasor threshold; and activating a second current-limiting control strategy for the DC current command value based on the three-phase fault recovery type.

[0013] In one possible implementation, adjusting the DC current command value according to the second control strategy includes: when the DC voltage is greater than or equal to a preset second low-voltage threshold and the DC voltage is less than a preset first low-voltage threshold, adjusting the DC current command value according to the second current limiting control strategy to maintain a lower limit threshold for the DC current; when the DC voltage is greater than or equal to a preset first low-voltage threshold and the DC voltage is less than a preset second high-voltage threshold, performing a third linear relationship adjustment on the DC current command value based on the second current limiting control strategy; and when the DC voltage is greater than or equal to the second high-voltage threshold, adjusting the DC current command value according to the second current limiting control strategy to maintain an upper limit threshold for the DC current.

[0014] Secondly, embodiments of this application provide a receiving-end fault fluctuation suppression system for a DC converter. The system includes: a DC converter, a smoothing reactor, a converter, a rectifier, an inverter, and a controller MCU. The smoothing reactor is disposed between the DC converter and the converter. The controller MCU is connected to the DC converter, the smoothing reactor, the converter, the rectifier, and the inverter. The controller MCU is applied to the receiving-end fault fluctuation suppression method for the DC converter as described in any of the first aspects.

[0015] This application discloses a method for suppressing receiving-end fault fluctuations in a DC converter. The method involves acquiring three-phase AC voltage signals from the AC power grid and processing these signals to obtain the corresponding negative-sequence voltage and instantaneous voltage phasor amplitudes. When the negative-sequence voltage and phasor amplitudes meet preset fault regulation constraints, a first current-limiting control strategy is initiated. A target adjustment range for the DC current command value is determined based on the DC voltage corresponding to the three-phase AC voltage signals. The DC current command value within the target adjustment range is adjusted based on the first current-limiting control strategy to suppress fluctuations in the DC current command value. By lowering the adjustment threshold according to the selected target adjustment range during a fault, the DC current command value is adjusted in advance, improving the active power transmission level during AC faults while suppressing transient fluctuations in DC current and reactive power. This provides a technical reference for the engineering application of hybrid commutation converters. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a DC system topology diagram of a DC converter currently available in the technology; Figure 2 This is a UI characteristic curve chart under fault conditions provided by current technology; Figure 3 This is a UI characteristic curve of a voltage-dependent current command limiter currently available in the technology; Figure 4 This is a flowchart illustrating a method for suppressing fault fluctuations at the receiving end of a DC converter, as provided in an embodiment of this application. Figure 5 This is a schematic diagram of a process for initiating a first flow limiting control strategy provided in an embodiment of this application; Figure 6 This is a flowchart illustrating a method for determining a fault type, provided in an embodiment of this application. Figure 7 This is a schematic flowchart illustrating the process of determining a target adjustment range, provided in an embodiment of this application. Figure 8 This is a flowchart illustrating another method for suppressing fault fluctuations at the receiving end of a DC converter provided in this application embodiment; Figure 9 This is an improved UI characteristic curve of a voltage-dependent current command limiter provided in an embodiment of this application; Figure 10This is a graph illustrating the active power drop process provided in an embodiment of this application; Figure 11 This is a flowchart illustrating another method for suppressing fault fluctuations at the receiving end of a DC converter provided in this application embodiment; Figure 12 This is a DC current curve during the recovery process provided in an embodiment of this application; Figure 13 This is a graph of reactive power during the recovery process provided in an embodiment of this application; Figure 14 This is a flowchart illustrating another method for suppressing fault fluctuations at the receiving end of a DC converter provided in this application embodiment; Figure 15 This is a schematic diagram of a process for initiating a second flow limiting control strategy provided in an embodiment of this application; Figure 16 This is a flowchart illustrating a selection control strategy provided in an embodiment of this application; Figure 17 This is a flowchart illustrating yet another method for suppressing fault fluctuations at the receiving end of a DC converter, as provided in this application embodiment. Figure 18 This is a graph of another active power drop process provided in the embodiments of this application; Figure 19 This is a waveform diagram of the three-phase voltage during a three-phase symmetrical fault, provided in an embodiment of this application. Figure 20 This is a waveform diagram of three-phase voltage in a three-phase unbalanced fault provided in an embodiment of this application; Figure 21 This is a waveform diagram of DC voltage during a three-phase symmetrical fault, provided in an embodiment of this application. Figure 22 This is a waveform diagram of DC voltage in a three-phase unbalanced fault provided in an embodiment of this application; Figure 23 This is a waveform diagram of DC current in a three-phase symmetrical fault provided in an embodiment of this application; Figure 24 This is a waveform diagram of DC current in a three-phase unbalanced fault provided in an embodiment of this application; Figure 25 This is a waveform diagram of active power in a three-phase symmetrical fault provided in an embodiment of this application; Figure 26 This is a waveform diagram of active power in a three-phase asymmetrical fault provided in an embodiment of this application; Figure 27 This is a waveform diagram of reactive power during a three-phase symmetrical fault, provided in an embodiment of this application. Figure 28This is a waveform diagram of reactive power in a three-phase asymmetrical fault provided in an embodiment of this application; Figure 29 This is a schematic diagram of the structure of a receiving-end fault fluctuation suppression system for a DC converter provided in an embodiment of this application. Detailed Implementation

[0018] The features and exemplary embodiments of various aspects of this application will be described in detail below. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain this application and not to limit it. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples.

[0019] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0020] It should be noted that the acquisition, storage, use, and processing of data in this application embodiment all comply with the relevant provisions of national laws and regulations.

[0021] It should be noted that in the embodiments of this application, certain software, components, models and other existing solutions in the industry may be mentioned. These should be regarded as exemplary and are only intended to illustrate the feasibility of implementing the technical solution of this application. However, it does not mean that the applicant has used or necessarily used the solution.

[0022] A voltage-dependent current order limiter (VDCOL) is used in DC transmission systems to prevent commutation failure caused by a drop in DC-side voltage. Under normal operating conditions, the system maintains a certain DC current. When the DC-side voltage drops below a certain set threshold, the VDCOL control logic intervenes, limiting the DC current by adjusting the firing angles of the rectifier and inverter.

[0023] A conventional DC two-terminal system can be simplified into several parts: AC system I, rectifier-side converter transformer, rectifier, DC line, inverter, inverter-side converter transformer, and AC system II. A smoothing reactor is connected in series between the DC line and the output terminal of each converter pole, acting as a bridge between the DC voltages at both ends. Figure 1 This is a DC system topology diagram of a DC converter currently available in the technology. For example... Figure 1 As mentioned above, the commonly used control method for conventional DC transmission is constant turn-off angle control on the inverter side and constant current control on the rectifier side. Based on the coupling between the main circuit and the control circuit, the change in DC current during a fault is expressed by Equation 1: Formula 1 Among them, U dr U represents the DC voltage on the rectifier side. di L represents the DC voltage on the inverter side. d Indicates the inductance of the smoothing reactor. It represents the change in direct current.

[0024] Due to the inverter side's shut-off angle operation, and Figure 2 This is a UI characteristic curve graph under a fault state provided by current technology. According to... Figure 2 Give the DC voltage U during the fault. d and DC current I d The curves show that the DC voltage on the inverter side has a relationship according to Equation 2, and the DC voltage on the rectifier side has a relationship according to Equation 3: Formula 2 Formula 3 Where k represents the number of twelve-pulse converters, k tr k ti Xi and Xr represent the turns ratios of the converter transformers on the rectifier and inverter sides, respectively, and the reactance values ​​of the reactors on the rectifier and inverter sides, respectively. acr U aci These represent the effective values ​​of the AC bus line voltages on the rectifier side and the inverter side, respectively.

[0025] Figure 3 This is a UI characteristic curve of a voltage-dependent current command limiter currently available in the technology. Figure 3 The process of current regulation and control triggered by the voltage-dependent current command limiter VDCOL when an AC voltage fault occurs is given. As the rectifier-side constant current control takes effect, the firing angle will be increased, as expressed by Equation 4: Formula 4 Where, k p k iRepresents the proportional-integral coefficient, α represents the firing angle, and I dref This represents the DC current setting value, and α0 represents the initial firing angle.

[0026] And according to Figure 3 The schematic diagram shows the DC current setting value I. dref With DC voltage U di The relationship is expressed by Equation 5: Formula 5 Among them, U dhigh U dlow I dhigh I dlow These represent the upper and lower limits of DC voltage and the upper and lower limits of DC current command during the low-voltage current limiting (VDCOL) process, respectively.

[0027] Conventional DC transmission systems experience commutation failure and active power transmission interruption under severe AC faults at the receiving end, which is detrimental to system stability and economic operation. HCC (High-voltage Cylinder Capacitor) is fully capable of withstanding commutation failure, thus retaining a certain level of active power transmission capacity during faults. Furthermore, existing control systems are designed for LCC (Low-voltage Cylinder Capacitor), and some functions are not applicable to HCC, leading to negative consequences. The unipolar DC power is expressed by Equation 6: Formula 6 Among them, P di γ represents DC power, and γ represents the phase difference angle between DC voltage and DC current.

[0028] according to Figure 3 The provided VDCOL control current UI characteristic diagram shows that the DC voltage is the input and the DC current is the output. The inverter-side AC voltage U... aci Closely related to DC power, U aci By influencing the DC voltage, DC power is directly affected. The VDCOL current regulation process on the rectifier side affects the DC current setpoint, indirectly impacting active power. Due to the influence of VDCOL, U... aci With P di Different relationships are presented, and power values ​​at different stages are obtained based on Equation 6, specifically expressed by Equation 7: Formula 7 Reference equation 7 and Figure 3 Based on the magnitude of the AC voltage drop, it can be divided into three stages.

[0029] Phase 1: The AC voltage drops slightly, the DC voltage decreases slightly, the rectifier-side control loop does not enter the low-voltage current limiting loop, the DC current setpoint remains unchanged, the steady-state value of the DC current during the fault is basically the same as before the fault, and the active power transmitted by the system is linearly related to the AC voltage.

[0030] Phase 2: The AC voltage drops significantly, the DC voltage drops more dramatically, the VDCOL circuit on the rectifier side starts, the DC current setpoint decreases, and the system's output active power further decreases. Since the DC current setpoint is linearly related to the AC voltage, the system's output active power has a quadratic relationship with the AC voltage.

[0031] Phase 3: The AC voltage drop increases further, the DC voltage drop becomes even deeper, and the DC current command value I... dN Reaching the minimum value I dlow The DC current no longer decreases as the DC voltage decreases, and the active power transmitted by the system and the AC voltage return to a linear relationship, but the proportional coefficient is different from that in stage 1.

[0032] When the AC voltage drops to a certain level, the LCC experiences commutation failure, the inverter side is directly connected, the DC voltage is 0, and the transmitted active power drops directly to 0. The HCC, however, does not experience commutation failure and therefore retains active power transmission capability during the fault period compared to the LCC. However, according to... Figure 3 As can be seen from the provided structure and the rated active power at different stages provided by Equation 7, although the HCC does not fail to commutate during the AC voltage drop process, the AC voltage drop will cause fluctuations in output voltage, output current and output power, which will seriously affect the stability of the circuit.

[0033] To address the aforementioned technical problems, this application provides a method for suppressing receiving-end fault fluctuations in a DC converter. The method involves acquiring three-phase AC voltage signals from the AC power grid and processing these signals to obtain the corresponding negative-sequence voltage and instantaneous voltage phasor amplitudes. When the negative-sequence voltage and phasor amplitudes meet preset fault regulation constraints, a first current-limiting control strategy is initiated. A target adjustment range for the DC current command value is determined based on the DC voltage corresponding to the three-phase AC voltage signals. The DC current command value within the target adjustment range is adjusted based on the first current-limiting control strategy to suppress fluctuations in the DC current command value. By lowering the adjustment threshold according to the selected target adjustment range during a fault, the DC current command value is adjusted in advance, improving the active power transmission level during AC faults while suppressing transient fluctuations in DC current and reactive power, providing a technical reference for the engineering application of hybrid commutated converters. The receiving-end fault fluctuation suppression method for a DC converter provided in this application is described below.

[0034] Figure 4 This is a flowchart illustrating a method for suppressing fault fluctuations at the receiving end of a DC converter, as provided in an embodiment of this application. According to... Figure 4 The provided diagram illustrates the specific steps of the DC converter receiving-end fault fluctuation suppression method, including: S401~S404.

[0035] S401. Acquire the three-phase AC voltage signal in the AC power grid, and perform signal processing on the three-phase AC voltage signal to obtain the corresponding negative sequence voltage and instantaneous voltage phasor amplitude.

[0036] Since AC voltage faults are typically diagnosed in real-time and accurately by detecting the characteristics of the AC power grid, the three-phase AC voltage signals in the AC power grid are first acquired before adjusting the fault current. After obtaining the three-phase AC voltage signals, signal extraction is performed to extract the phasor amplitudes of the negative sequence voltage and the instantaneous voltage. These negative sequence voltages and phasor amplitudes are then used to determine whether a fault has occurred in the AC power grid.

[0037] S402. When the negative sequence voltage and phasor amplitude meet the preset fault regulation constraints, the first current limiting control strategy is activated.

[0038] The first current limiting control strategy is to control the current signal based on VDCOL, thereby adjusting the output power and changing the power fluctuation regulation strategy.

[0039] Using negative sequence voltage and phasor amplitude as the basis for determining whether a fault has occurred in the AC power grid, the negative sequence voltage and phasor amplitude are detected in real time. When the values ​​of negative sequence voltage and phasor amplitude meet the fault conditions, the first current limiting control strategy for fault adjustment is initiated according to the pre-specified constraints. This can quickly resolve the impact of fault on the AC and DC power grid signals and achieve the effect of suppressing power fluctuations.

[0040] S403. Determine the target adjustment range of the DC current command value based on the DC voltage corresponding to the three-phase AC voltage signal, where the DC voltage is the voltage at the DC output terminal corresponding to the three-phase AC voltage signal.

[0041] The target adjustment range is the range of voltage changes that can be regulated by adjusting the DC voltage via VDCOL. The DC current command value is the changed DC current value obtained by directly adjusting the DC voltage.

[0042] Furthermore, utilizing the first current-limiting control strategy, the VDCOL method is initiated. First, the voltage range of the DC voltage is determined. Different ranges reflect different fault states of the AC power grid. In the initial stage of a fault, the DC current is unaffected by the DC voltage. During the fault process, the DC voltage and DC current exhibit a linear relationship. In the later stage of a fault, once the DC voltage drops to a certain value, the DC current is no longer affected by the voltage. Therefore, based on the range of the DC voltage value, different DC current command values ​​are determined, providing reference data for the next step of adjusting the DC current operation through the VDCOL control strategy.

[0043] S404. Based on the first current limiting control strategy, the DC current command value within the target adjustment range is adjusted so that the DC power is suppressed by the fluctuation of the DC current command value.

[0044] Based on the range of DC voltage, the adjustment range of DC current command value is determined. The DC current command value is adjusted using the VDCOL method in the first current limiting control strategy to suppress faults caused by AC grid voltage drops, suppress the influence of DC current, reduce fluctuations in DC current, suppress fluctuations in output power, and improve system stability.

[0045] This application provides a method for suppressing fault fluctuations at the receiving end of a DC converter. It involves acquiring three-phase AC voltage signals from the AC power grid and processing these signals to obtain the corresponding negative-sequence voltage and instantaneous voltage phasor amplitudes. When the negative-sequence voltage and phasor amplitudes meet preset fault regulation constraints, a first current-limiting control strategy is initiated. A target adjustment range for the DC current command value is determined based on the DC voltage corresponding to the three-phase AC voltage signals. The DC current command value within the target adjustment range is adjusted based on the first current-limiting control strategy to suppress fluctuations in the DC current command value. By lowering the adjustment threshold according to the selected target adjustment range during a fault, the DC current command value is adjusted in advance, improving the active power transmission level during AC faults while suppressing transient fluctuations in DC current and reactive power. This provides a technical reference for the engineering application of hybrid commutation converters.

[0046] Figure 5 This is a schematic diagram of a process for initiating a first flow limiting control strategy provided in an embodiment of this application. Figure 5 This refers to the process of activating the first current limiting control strategy in step S402. Figure 5 Is Figure 4 The description is based on the corresponding embodiments. Figure 5 The provided diagram shows that the specific steps for activating the first current limiting control strategy include: S501~S503.

[0047] S501. Determine the first negative sequence threshold based on the rated voltage value of the three-phase AC voltage signal.

[0048] S502. Determine the first phasor threshold based on the change in phasor amplitude per unit time.

[0049] S503. When the negative sequence voltage is greater than the first negative sequence threshold, or the phasor amplitude is less than the first phasor threshold, the first current limiting control strategy is activated.

[0050] When a fault occurs in the power grid system, a significant characteristic is an increase in the negative-sequence voltage component. When the negative-sequence voltage component increases to a set value, the system exhibits commutation operation. The negative-sequence voltage component value is set as a first negative-sequence threshold. When the negative-sequence voltage exceeds this threshold, it indicates that the three AC voltage signals begin to drop. To suppress the DC voltage drop on the DC side caused by the AC-side power grid fault, the first current-limiting control strategy of VDCOL is activated. Similarly, when a fault occurs in the power grid system, the change in phasor amplitude also changes. Using phasor amplitude as a reference indicator for fault judgment, the change in phasor amplitude per unit time is set as a first phasor threshold. When the phasor amplitude is less than this threshold, it indicates a fault has occurred, and the first current-limiting control strategy is activated. Two judgment indicators are selected as reference conditions for detecting whether the system initiates fault regulation, and the current-limiting control is activated using the VDCOL method.

[0051] For example, when the negative sequence voltage increases to 7% of the rated voltage, the system begins to experience commutation failure. To improve detection reliability, a fault judgment threshold of 5% for negative sequence voltage is set; that is, when the negative sequence voltage exceeds 5% of the rated voltage, a fault is considered to have occurred. If the converter operates in HCC mode and has an active shutdown function, the VDCOL mode selection is set to 1. When the phasor amplitude drops by more than 8%, commutation failure will occur. To enhance fault detection tolerance, a fault judgment threshold of 7% for phasor amplitude is set; that is, when the phasor amplitude drops by more than 7%, a fault is considered to have occurred, and the VDCOL mode selection is set to 1.

[0052] This application embodiment collects the negative sequence voltage and phasor amplitude in the AC signal, and sets thresholds for the negative sequence voltage and phasor amplitude according to the state of HCC to determine whether the system has a fault, further determining the fault adjustment constraint conditions. By narrowing the range of the fault adjustment constraint conditions, the adjustment sensitivity is further improved, so that the DC voltage changes rapidly with the AC signal, further improving the suppression accuracy.

[0053] Figure 6 This is a flowchart illustrating a method for determining a fault type, as provided in an embodiment of this application. Figure 6 Is Figure 4 The description is based on the corresponding embodiments. Figure 6 The provided diagram shows the specific steps for determining the fault type, including S601~S603.

[0054] S601. Determine the receiving-end fault type based on the negative sequence voltage and phasor amplitude.

[0055] S602. When the negative sequence voltage is greater than the first negative sequence threshold, the receiving end fault type is determined to be a three-phase asymmetrical fault.

[0056] S603. When the phasor amplitude is less than the first phasor threshold, the receiving end fault type is determined to be a three-phase symmetrical fault.

[0057] The types of faults at the receiving end are mainly affected by symmetry and asymmetry, resulting in multiple types, including three-phase asymmetrical faults and three-phase symmetrical faults. Three-phase asymmetrical faults can further include single-phase asymmetrical faults and two-phase asymmetrical faults.

[0058] The type of fault can be further determined based on the negative sequence voltage and phasor amplitude. In addition to using negative sequence voltage and phasor amplitude to determine whether a fault has occurred, the type of fault can also be determined based on the magnitude of these two values. A negative sequence voltage greater than the first negative sequence threshold indicates a three-phase asymmetrical fault, while a phasor amplitude less than the first phasor threshold indicates a three-phase symmetrical fault.

[0059] This application further utilizes the magnitude of negative sequence voltage and phasor amplitude to determine the fault type, further distinguishing between asymmetrical and symmetrical faults, which helps to finely suppress fluctuation problems through different adjustment strategies.

[0060] Figure 7 This is a schematic flowchart illustrating the process of determining a target adjustment range, as provided in an embodiment of this application. Figure 7 This refers to the process of determining the target adjustment range in step S403. Figure 7 Is Figure 4 The description is based on the corresponding embodiments. Figure 7 The provided diagram shows that the steps for determining the target adjustment range specifically include: S701~S705.

[0061] S701. Determine the DC voltage change.

[0062] S702. When the change in DC voltage is greater than zero, determine that the DC voltage is in a recovery state.

[0063] S703, the target adjustment range for determining the DC current command value based on the recovery state is the adjustment recovery range.

[0064] During an AC fault, the DC voltage drops. By adjusting the DC current via VDCOL, rapid recovery can be achieved, suppressing further current drops.

[0065] To determine the specific stage of the current fault state, the DC voltage U di Analyzing the changes in DC voltage, when the change is greater than zero, it indicates that the current DC voltage is in an upward phase, thus determining the current adjustment phase as a recovery phase and confirming that the DC voltage is in a recovery state. During the determination of the current DC voltage's upward process, the relationship between DC voltage and DC current in Equation 5 is used to determine the adjustment range of the DC current command value, providing a reference voltage for further rapid recovery using VDCOL.

[0066] S704. When the change in DC voltage is less than zero, determine that the DC voltage is in a dropping state.

[0067] S705. The target adjustment range for determining the DC current command value based on the landing state is the adjustment landing range. Wherein, when the DC current command value is at its maximum value, the minimum value of the DC voltage that satisfies the fault adjustment constraint is the first minimum value, and the minimum value of the DC voltage that does not satisfy the fault adjustment constraint is the second minimum value. The first minimum value is less than the second minimum value.

[0068] When the change in DC voltage is less than zero, it indicates that the current DC voltage is in a decreasing phase, thus defining the current adjustment phase as a decreasing phase and the DC voltage as being in a dropping state. During the determination of the current DC voltage decrease, the relationship between DC voltage and DC current in Equation 5 is used to determine the adjustment range of the DC current command value, providing a reference voltage for further rapid fluctuation suppression using VDCOL. Furthermore, by adjusting the DC current command value, when the DC current command value is at its maximum, the minimum DC voltage is the first minimum value; the minimum DC voltage that does not meet the fault adjustment constraint conditions is the second minimum value. Since the first minimum value is less than the second minimum value, the threshold of DC voltage during the fault process is reduced through fault constraint judgment, thereby adjusting the DC current in advance and achieving system fluctuation suppression.

[0069] This application embodiment distinguishes between the drop state and the recovery state during a fault process by judging the change in DC voltage, thereby refining the control operation of DC current, further improving the adjustment accuracy, and realizing rapid suppression control of AC side power grid faults.

[0070] Figure 8 This is a flowchart illustrating another method for suppressing fault fluctuations at the receiving end of a DC converter provided in this application embodiment. Figure 8This refers to the process of adjusting the DC current command value in step S404. Figure 8 The description is based on the above embodiments. Figure 8 The provided diagram illustrates the steps of the DC converter receiving-end fault fluctuation suppression method, specifically including: S801~S807.

[0071] S801. When the target adjustment range is the adjustment drop range, determine the relationship between the DC voltage and the preset first high voltage threshold, first low voltage threshold and second low voltage threshold.

[0072] Based on the structure of Equation 5, the first high-voltage threshold is set as U. dhigh2 First low-voltage threshold U dlow1 and the second low-pressure threshold U dlow2 Based on the structure of Equation 5, the relationship between DC voltage and DC current during the descent process is adjusted to obtain Equation 8: Formula 8 According to DC voltage U di The range in which it is located is then used to determine the adjustment formula for the direct current.

[0073] S802. When the DC voltage is greater than or equal to the first high voltage threshold, the first current limiting control strategy is determined to be the first drop regulation strategy.

[0074] S803. Adjust the DC current command value according to the first landing adjustment strategy to maintain the preset current upper limit threshold.

[0075] According to the relationship given in Equation 8, when the DC voltage is greater than or equal to the first high voltage threshold U... dhigh2 In the case of the first landing adjustment strategy corresponding to Equation 8, I dhigh Adjust the DC current command value so that the current stage is in the early stage of the fault, the reduction of DC voltage will not lead to a reduction of DC current, and the active power output of HCC can be achieved.

[0076] S804. When the DC voltage is less than the first high voltage threshold and the DC voltage is greater than or equal to the first low voltage threshold, the first current limiting control strategy is determined to be the second drop regulation strategy.

[0077] S805, Based on the second drop adjustment strategy, the DC current command value is adjusted using the first linear relationship.

[0078] According to the relationship given in Equation 8, when the DC voltage is less than the first high voltage threshold U... dhigh2 And the DC voltage is greater than or equal to the first low voltage threshold U dlow1 In this case, according to the second landing adjustment strategy, the DC current command value I in Equation 8 refThe second relational adjustment in the equation means that the current stage is in the middle of the fault. The decrease in DC voltage leads to a decrease in DC current, which is linear, so as to achieve the active power output of HCC.

[0079] S806. When the DC voltage is less than the first low voltage threshold and the DC voltage is greater than or equal to the second low voltage threshold, the first current limiting control strategy is determined to be the third drop regulation strategy.

[0080] S807. Adjust the DC current command value according to the third drop adjustment strategy to maintain the preset lower current threshold.

[0081] According to the relationship given in Equation 8, when the DC voltage is less than the first low-voltage threshold U dlow1 And the DC voltage is greater than or equal to the second low voltage threshold U dlow2 In this case, according to the third landing adjustment strategy, Equation 8, I dlow The DC current command value is adjusted so that, in the later stages of a fault, a decrease in DC voltage will not lead to a decrease in DC current, and the DC current has already decreased to the lower limit. Then, by judging the relationship between DC voltage and the threshold, the DC current is adjusted in three stages to quickly suppress the impact of fault fluctuations on power.

[0082] In one possible example scenario, Figure 9 This is an improved UI characteristic curve of a voltage-dependent current command limiter provided in an embodiment of this application. Figure 10 This is a graph illustrating an active power drop process provided in an embodiment of this application. According to... Figure 9 and Figure 10 The provided diagram shows that when the DC voltage is greater than or equal to the first high-voltage threshold U dhigh2 Under these conditions, the DC current is kept at the normal current value I. dhigh ,correspond Figure 10 The active power in the equation has a linear relationship; when the DC voltage is less than the first high voltage threshold U... dhigh2 And the DC voltage is greater than or equal to the first low voltage threshold U dlow1 In this case, the DC current is linearly adjusted, corresponding to Figure 10 The active power in the curve follows a curve relationship. However, because the first high-voltage threshold is set smaller than the conventional threshold, the adjustment phase begins earlier, resulting in a slope of the active power curve greater than the quadratic relationship in the conventional adjustment process. When the DC voltage is less than the first low-voltage threshold U... dlow1 And the DC voltage is greater than or equal to the second low voltage threshold U dlow2 In this case, adjust according to the lower limit of the current system, corresponding to Figure 10 The active power in the circuit returns to a linear relationship, thus achieving the control of suppressing current drops.

[0083] This application embodiment reduces the threshold of DC voltage, which allows DC current regulation to be initiated in advance when a fault occurs. This not only regulates the DC current but also greatly increases the active power output, thereby suppressing active power fluctuations.

[0084] Figure 11 This is a flowchart illustrating another method for suppressing fault fluctuations at the receiving end of a DC converter, as provided in this application embodiment. Figure 11 This refers to the process of adjusting the DC current command value in step S404. Figure 11 The description is based on the above embodiments. Figure 11 The provided schematic diagram shows that the steps of the method for suppressing fault fluctuations at the receiving end of a DC converter specifically include: S1101~S1105.

[0085] S1101. When the target adjustment range is the adjustment recovery range, determine the relationship between the DC voltage and the preset first high voltage threshold and second low voltage threshold.

[0086] S1102. When the DC voltage is greater than or equal to the second low voltage threshold and the DC voltage is less than the first high voltage threshold, the first current limiting control strategy is determined to be the first recovery regulation strategy.

[0087] S1103. Based on the first recovery adjustment strategy, the DC current command value is adjusted using the second linear relationship.

[0088] S1104. When the DC voltage is greater than the first high voltage threshold, the first current limiting control strategy is determined to be the second recovery regulation strategy.

[0089] S1105. Adjust the DC current command value according to the second recovery adjustment strategy to maintain the upper limit threshold of the current.

[0090] During the DC voltage rise process, the process of adjusting the DC current value through VDCOL is the same as the process of adjusting the DC current during the DC voltage drop process; it is the reverse process of the drop process. Specifically, the adjustment process is the same as the DC current adjustment during the drop process, both following the set first high voltage threshold U. dhigh2 and the second low-pressure threshold U dlow2 The relationship is adjusted according to Equation 8, and the specific adjustment process will not be described here.

[0091] In one possible example scenario, Figure 12 This is a DC current curve during the recovery process provided in an embodiment of this application. Figure 13 This is a graph showing the reactive power during the recovery process provided in an embodiment of this application. According to... Figure 12 and Figure 13The provided schematic diagram shows that during the adjustment of the DC current command value, it is in the mode 1 process of the VDCOL method. During the recovery process, by differentiating itself from the conventional adjustment of the voltage threshold, this application reduces the voltage threshold and starts the adjustment process in advance, so that the DC current command value can quickly reach the set value during the drop or recovery process, thereby improving the adjustment efficiency. At the same time, compared with the conventional adjustment, the corresponding effect is also shorter than the control time of the conventional mode 0, and the corresponding output power also responds in advance, effectively improving the purpose of mitigating the long-term impact of reactive power on the DC side grid.

[0092] This application embodiment determines the adjustment range of the DC current command value based on the range of DC voltage during the recovery process, and adjusts according to the recovery to enable the DC current and power to recover quickly, thereby improving the efficiency of fault recovery.

[0093] Figure 14 This is a flowchart illustrating another method for suppressing fault fluctuations at the receiving end of a DC converter, as provided in an embodiment of this application. Figure 14 Is Figure 4 The description is based on the corresponding embodiments. Figure 14 The provided schematic diagram shows that the steps of the method for suppressing fault fluctuations at the receiving end of a DC converter specifically include: S1401~S1402.

[0094] S1401. If the negative sequence voltage and phasor amplitude meet the preset fault recovery constraints, the second current limiting control strategy is activated.

[0095] S1402. Adjust the DC current command value according to the second control strategy so that the DC power is suppressed by the fluctuation of the DC current command value.

[0096] Compared to fault adjustment constraints, fault recovery constraints are designed for the operational control process after fault recovery.

[0097] Using negative sequence voltage and phasor amplitude as the basis for determining whether a fault has occurred in the AC power grid, the negative sequence voltage and phasor amplitude are detected in real time. When the values ​​of negative sequence voltage and phasor amplitude meet the recovery conditions, VDCOL mode 0 regulation control is determined. The second current limiting control strategy for fault regulation is started according to the pre-specified fault recovery constraints. This can quickly resolve the fluctuation impact of the fault on the AC and DC power grid signals and achieve the effect of suppressing power fluctuations.

[0098] In the fault adjustment process, this application embodiment determines whether the fault has been cleared in real time based on the negative sequence voltage and phasor amplitude. If the fault is cleared, the fault recovery constraint condition is met, and the DC current command value is adjusted according to the adjustment method corresponding to mode 0 of VDCOL, so as to achieve the effect of suppressing the fluctuation of DC power by the DC current command value.

[0099] Figure 15 This is a schematic diagram of a process for initiating a second flow limiting control strategy provided in an embodiment of this application. Figure 15 This refers to the process of activating the second current limiting control strategy in step S1401. Figure 15 Is Figure 14 The description is based on the corresponding embodiments. Figure 15 The provided diagram shows that the specific steps for activating the second current limiting control strategy include: S1501~S1502.

[0100] S1501. When the negative sequence voltage is less than the preset second negative sequence threshold and the phasor amplitude is greater than the preset second phasor threshold, the receiving end fault type is determined to be a three-phase fault recovery type, the first negative sequence threshold is greater than the second negative sequence voltage, and the first phasor threshold is less than the second phasor threshold.

[0101] S1502, a second current limiting control strategy based on the DC current command value for starting the three-phase fault recovery type.

[0102] After the power grid system fault is recovered, the negative sequence voltage component value is set as the second negative sequence threshold to determine whether the fault regulation has ended. When the negative sequence voltage is less than the second negative sequence threshold, it indicates that the three-phase AC voltage signals have returned to normal operation, confirming that the three-phase symmetrical fault has been cleared, and the second current-limiting control strategy of VDCOL is activated. Similarly, when the power grid system fault is cleared, the change in phasor amplitude will also change accordingly. The change in phasor amplitude per unit time is set as the second phasor threshold. When the phasor amplitude is greater than the second phasor threshold, it indicates that the three-phase asymmetric fault has been cleared. Two judgment indicators are selected as reference conditions for detecting whether the system has reached the fault clearance condition, and the VDCOL method is used to activate suppression control.

[0103] For example, if the negative sequence voltage drops below 3% of the rated voltage, the fault is considered cleared, and the VDCOL mode selection is reset to 0. The state between VDCOL mode 1 and mode 0 is a dead zone. During the dead zone, the DC current regulation of mode 1 is still performed, effectively balancing sensitivity and disturbance rejection, and avoiding repeated switching near the threshold. When the phasor amplitude recovers to a value less than 4% of its previous decrease, the fault is considered cleared, and the VDCOL mode selection is reset to 0.

[0104] In one possible example scenario, Figure 16 This is a flowchart illustrating a selection control strategy provided in an embodiment of this application. Figure 16The provided diagram illustrates how, based on the negative-sequence voltage and phasor amplitude in the acquired AC signal, the relationship between these values ​​and threshold values ​​is determined. When the negative-sequence voltage exceeds 5% of the rated voltage or the phasor amplitude is less than 93%, it indicates a large change in the negative-sequence voltage, suggesting a fluctuating phase. The phasor amplitude decreases more rapidly, further suppressing the fluctuation. VDCOL mode 1 is activated, initiating rapid suppression control. This reduces the DC voltage threshold, achieving rapid suppression and lowering fluctuations in current, voltage, and power. When the negative-sequence voltage is less than 3% of the rated voltage and the phasor amplitude is greater than 96%, it indicates a small change in the negative-sequence voltage, suggesting a stable phase. The phasor amplitude decreases more slowly, further stabilizing the situation. VDCOL mode 0 is activated, releasing the fault regulation.

[0105] This application embodiment collects the negative sequence voltage and phasor amplitude in the AC signal, and sets thresholds for the negative sequence voltage and phasor amplitude according to the state of HCC to determine whether the system has reached the fault clearance, further determine the fault adjustment termination condition, improve the adjustment sensitivity, and make the DC voltage change rapidly with the change of AC signal, further improving the suppression accuracy.

[0106] Figure 17 This is a flowchart illustrating yet another method for suppressing fault fluctuations at the receiving end of a DC converter, as provided in this application embodiment. Figure 17 This refers to the process of adjusting the DC current command value in step S1402. Figure 17 Is Figure 14 The description is based on the corresponding embodiments. Figure 17 The provided schematic diagram shows that the steps of the DC converter receiving-end fault fluctuation suppression method specifically include: S1701~S1703.

[0107] S1701. When the DC voltage is greater than or equal to the preset second low voltage threshold, or when the DC voltage is less than the preset first low voltage threshold, the DC current command value is adjusted according to the second current limiting control strategy to maintain the DC current lower limit threshold.

[0108] S1702. When the DC voltage is greater than or equal to a preset first low-voltage threshold and the DC voltage is less than a preset second high-voltage threshold, the DC current command value is adjusted according to a third linear relationship based on the second current limiting control strategy.

[0109] S1703. When the DC voltage is greater than or equal to the second high voltage threshold, the DC current command value is adjusted according to the second current limiting control strategy to maintain the upper limit threshold of the DC current.

[0110] Based on the structure of Equation 5, the first high-voltage threshold is set as U. dhigh2 First low-voltage threshold U dlow1 Second low-pressure threshold Udlow2 The second high-voltage threshold is U dhigh1 Based on the structure of Equation 5, the relationship between DC voltage and DC current corresponding to Mode 0 is adjusted to obtain Equation 9: Formula 9 According to DC voltage U di The range in which it is located is then used to determine the adjustment formula for the direct current.

[0111] according to Figure 9 The provided diagram shows that after the fault is cleared, the system enters VDCOL control mode 0. According to Equation 9, when the DC voltage is greater than or equal to the preset second low-voltage threshold U... dlow2 And the DC voltage is less than the preset first low voltage threshold U dlow1 In this case, according to the second current limiting control strategy, the DC current lower limit threshold I in Equation 9 is... dlow Adjusting the DC current command value ensures that the DC current does not decrease upon DC voltage recovery, as the DC current has already decreased to the lower limit. This suppresses the impact of fault fluctuations on power. According to Equation 9, when the DC voltage is greater than or equal to the preset first low-voltage threshold U... dlow1 And the DC voltage is less than the preset second high voltage threshold U dhigh1 In the case of a DC current command value being adjusted according to the third linear relationship in Equation 9 of the second current limiting control strategy, the DC current command value is adjusted when the DC voltage is greater than or equal to the second high voltage threshold U. dhigh1 Under these conditions, the DC current upper limit threshold is maintained according to the DC current command value in Equation 9 corresponding to the second current limiting control strategy. Changes in DC voltage will not cause changes in DC current, thus achieving the active power output of HCC.

[0112] In one possible example scenario, Figure 18 This is a graph illustrating another active power drop process provided in an embodiment of this application. According to... Figure 18 The provided diagram illustrates that after a fault occurs, the AC voltage drops to a certain level, the LCC experiences commutation failure, the inverter side is directly connected, the DC voltage is 0, and the transmitted active power drops directly to 0. The HCC, however, does not experience commutation failure and therefore retains active power transmission capability during the fault period compared to the LCC. Different regulation modes are selected by adjusting the negative sequence voltage and phasor amplitude. In mode 1, the lower limit of the DC voltage U during the fault recovery period is reduced. dlowThe control system will generate a larger DC current command to suppress the initial drop in DC current during recovery, thereby suppressing reactive power slump. Compared to Mode 0, increasing the DC voltage regulation threshold ensures that the HCC maintains active power output during faults. Simultaneously, during fault regulation in Mode 1, as the DC voltage rises from the second high-voltage threshold to the first high-voltage threshold, the DC current command value can rapidly increase, improving recovery efficiency.

[0113] After a fault occurs, the control system reduces the sending-end voltage by increasing the rectifier-side firing angle, thereby limiting the DC current. However, due to the slow response speed of PI control, the DC current experiences a large peak in the early stages of the fault before gradually decreasing to a steady-state value. To improve this, a positive step-start strategy for the firing angle in the early stages of the fault can be introduced into the PI control, instantly increasing the integral output of the sending-end current controller, i.e., forcing the integrator output to refresh to a larger angle. During steady-state operation, the sending-end firing angle is approximately 15°. During deep faults in the receiving-end AC grid, extensive testing showed that a 70° jump in the sending-end firing angle effectively shortens the DC current rise time and reduces peak current and the resulting reactive power peak. Similarly, in the early stages of fault recovery, a lag in firing angle adjustment may cause the sending-end voltage to fall below the receiving-end voltage, leading to a current drop. To address this, the integral output of the sending-end current controller can be instantly decreased, forcing the integrator output to refresh to around the steady-state operating angle of 15°, accelerating the dynamic response in the early stages of recovery and improving the system recovery speed.

[0114] In one possible example scenario, Figure 19-28 These are waveform diagrams of various signals related to three-phase symmetrical faults and three-phase asymmetrical faults provided in the embodiments of this application. Compared to three-phase symmetrical faults and three-phase asymmetrical faults, DC voltage, DC current, active power, and reactive power are affected by fluctuations in the three-phase AC signals. The VDCOL control method, compared to conventional control, improves the waveform fluctuation assignments, further demonstrating that lowering the DC voltage adjustment threshold achieves the technical effect of suppressing signal fluctuations.

[0115] Figure 29 This is a schematic diagram of the receiving-end fault fluctuation suppression system of a DC converter provided in an embodiment of this application. According to... Figure 29 The provided schematic diagram shows that the receiving-end fault fluctuation suppression system 100 of the DC converter includes: a DC converter 10, a smoothing reactor 20, a converter 30, a rectifier 40, an inverter 50, and a controller MCU.

[0116] The smoothing reactor is installed between the DC-DC converter and the inverter. The controller MCU is connected to the DC-DC converter, the smoothing reactor, the inverter, the rectifier, and the inverter. The controller MCU is used in applications such as... Figure 4-28 The receiving-end fault fluctuation suppression method for any of the corresponding embodiments of the DC converter.

[0117] The receiving-end fault fluctuation suppression system of the DC converter provided in this embodiment can be as follows: Figure 29 The receiving-end fault fluctuation suppression system 100 of the DC converter shown can achieve Figures 1-28 For a detailed description of the technical effectiveness of the receiving-end fault fluctuation suppression method for the DC converter shown, please refer to [link / reference needed]. Figures 1-28 The corresponding explanation is concise and will not be elaborated upon here.

[0118] The above description is merely a specific implementation of this application. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, modules, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the protection scope of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the protection scope of this application.

Claims

1. A method for suppressing fault fluctuations at the receiving end of a DC converter, characterized in that, include: The three-phase AC voltage signal in the AC power grid is collected, and the three-phase AC voltage signal is processed to obtain the corresponding negative sequence voltage and instantaneous voltage phasor amplitude. If the negative sequence voltage and the phasor amplitude meet the preset fault regulation constraint conditions, the first current limiting control strategy is activated. The target adjustment range of the DC current command value is determined based on the DC voltage corresponding to the three-phase AC voltage signal, wherein the DC voltage is the voltage of the DC output terminal corresponding to the three-phase AC voltage signal; The DC current command value within the target adjustment range is adjusted based on the first current limiting control strategy so that the DC power is suppressed by the fluctuation of the DC current command value.

2. The method according to claim 1, characterized in that, When the negative sequence voltage and the phasor amplitude meet the preset fault regulation constraint conditions, the first current limiting control strategy is activated, including: The first negative sequence threshold is determined based on the rated voltage value of the three-phase AC voltage signal; The first phasor threshold is determined based on the change in the phasor amplitude per unit time. If the negative sequence voltage is greater than the first negative sequence threshold, or if the phasor amplitude is less than the first phasor threshold, the first current limiting control strategy is activated.

3. The method according to claim 2, characterized in that, Before initiating the first rate limiting control strategy, the method further includes: The receiving-end fault type is determined based on the negative sequence voltage and the phasor amplitude. If the negative sequence voltage is greater than the first negative sequence threshold, the receiving end fault type is determined to be a three-phase asymmetrical fault. If the phasor amplitude is less than the first phasor threshold, the receiving end fault type is determined to be a three-phase symmetrical fault.

4. The method according to claim 1, characterized in that, The determination of the target adjustment range of the DC current command value based on the DC voltage corresponding to the three-phase AC voltage signal includes: Determine the amount of DC voltage change; If the change in DC voltage is greater than zero, it is determined that the DC voltage is in a recovery state. Based on the recovery state, the target adjustment range of the DC current command value is determined as the adjustment recovery range; If the change in DC voltage is less than zero, it is determined that the DC voltage is in a dropping state. The target adjustment range of the DC current command value is determined based on the landing state as the adjustment landing range. When the DC current command value is at its maximum value, the minimum value of the DC voltage that satisfies the fault adjustment constraint is the first minimum value, and the minimum value of the DC voltage that does not satisfy the fault adjustment constraint is the second minimum value. The first minimum value is less than the second minimum value.

5. The method according to claim 4, characterized in that, The adjustment of the DC current command value within the target range based on the first current limiting control strategy includes: When the target adjustment range is the adjustment drop range, determine the relationship between the DC voltage and the preset first high voltage threshold, first low voltage threshold, and second low voltage threshold; When the DC voltage is greater than or equal to the first high voltage threshold, the first current limiting control strategy is determined to be the first drop regulation strategy. The DC current command value is adjusted according to the first landing adjustment strategy to maintain the preset upper current threshold. When the DC voltage is less than the first high voltage threshold and the DC voltage is greater than or equal to the first low voltage threshold, the first current limiting control strategy is determined to be the second drop regulation strategy. Based on the second drop adjustment strategy, the DC current command value is adjusted using a first linear relationship; When the DC voltage is less than the first low voltage threshold and the DC voltage is greater than or equal to the second low voltage threshold, the first current limiting control strategy is determined to be the third drop regulation strategy. The DC current command value is adjusted according to the third drop adjustment strategy to maintain the preset lower current threshold.

6. The method according to claim 4, characterized in that, The adjustment of the DC current command value within the target range based on the first current limiting control strategy includes: When the target adjustment range is the adjustment recovery range, determine the relationship between the DC voltage and the preset first high voltage threshold and second low voltage threshold; When the DC voltage is greater than or equal to the second low-voltage threshold and the DC voltage is less than the first high-voltage threshold, the first current limiting control strategy is determined to be the first recovery regulation strategy. Based on the first recovery adjustment strategy, the DC current command value is adjusted using a second linear relationship; When the DC voltage is greater than the first high voltage threshold, the first current limiting control strategy is determined to be the second recovery regulation strategy; The DC current command value is adjusted according to the second recovery adjustment strategy to maintain the upper limit threshold of the current.

7. The method according to claim 2, characterized in that, The method further includes: If the negative sequence voltage and the phasor amplitude meet the preset fault recovery constraint conditions, the second current limiting control strategy is activated. The DC current command value is adjusted according to the second control strategy so that the DC power is suppressed by the fluctuation of the DC current command value.

8. The method according to claim 7, characterized in that, When the negative sequence voltage and the phasor amplitude meet the preset fault recovery constraint conditions, the second current limiting control strategy is activated, including: When the negative sequence voltage is less than a preset second negative sequence threshold and the phasor amplitude is greater than a preset second phasor threshold, the receiving end fault type is determined to be a three-phase fault recovery type, where the first negative sequence threshold is greater than the second negative sequence voltage and the first phasor threshold is less than the second phasor threshold. The second current-limiting control strategy is initiated based on the three-phase fault recovery type to activate the DC current command value.

9. The method according to claim 8, characterized in that, The adjustment of the DC current command value according to the second control strategy includes: When the DC voltage is greater than or equal to a preset second low voltage threshold, and when the DC voltage is less than a preset first low voltage threshold, the DC current command value is adjusted according to the second current limiting control strategy to maintain the DC current lower limit threshold. When the DC voltage is greater than or equal to a preset first low-voltage threshold and the DC voltage is less than a preset second high-voltage threshold, a third linear relationship adjustment is performed on the DC current command value based on the second current limiting control strategy. When the DC voltage is greater than or equal to the second high voltage threshold, the DC current command value is adjusted according to the second current limiting control strategy to maintain the upper limit threshold of the DC current.

10. A receiving-end fault fluctuation suppression system for a DC converter, characterized in that, The system includes: a DC converter, a smoothing reactor, a converter, a rectifier, an inverter, and a controller MCU; The smoothing reactor is disposed between the DC converter and the inverter. The controller MCU is connected to the DC converter, the smoothing reactor, the inverter, the rectifier, and the inverter. The controller MCU is applied to the receiving-end fault fluctuation suppression method of the DC converter as described in any one of claims 1-9.

Images