Message processing method and device, electronic equipment and storage medium
By generating and storing message descriptors with consecutive cached addresses, the problem of low cache management efficiency in network chips is solved, achieving efficient message processing and multi-connection support.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- PURPLE MOUNTAIN LAB
- Filing Date
- 2026-02-11
- Publication Date
- 2026-05-26
Smart Images
Figure CN122093353A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of data transmission technology, and in particular to a message processing method, apparatus, electronic device, and storage medium. Background Technology
[0002] In existing network chip packet processing architectures, after storing the packet payload, the system typically directly records and manages the multiple physical addresses that correspond to it in the cache, which may be scattered across different locations. When it is necessary to send, retransmit, or release a packet, the processing logic must directly manipulate these raw, discrete address information.
[0003] This management approach, which directly relies on the underlying physical address, requires frequent lookups, combinations, and tracking of multiple scattered addresses for each packet scheduling operation, resulting in low cache management efficiency. In high-speed, multi-connection applications, the massive number of accesses to discrete addresses becomes a major bottleneck in system performance, severely restricting packet processing efficiency.
[0004] It is evident that the message processing methods in related technologies suffer from both low cache management efficiency and low message processing efficiency. Summary of the Invention
[0005] This invention provides a message processing method, apparatus, electronic device, and storage medium to address the shortcomings of existing technologies in terms of low cache management efficiency and low message processing efficiency, thereby improving both cache management efficiency and message processing efficiency.
[0006] This invention provides a message processing method, comprising the following steps: obtaining the message payload of a target message; storing the message payload in a packet buffer according to a preset storage unit, and recording the cache address of the message payload in the packet buffer; generating a message descriptor for the target message based on a plurality of consecutive cache addresses stored in the target message; storing the message descriptor in a descriptor cache, and associating the descriptor address of the message descriptor in the descriptor cache with the window information of the connection corresponding to the target message; in response to receiving a scheduling command for the target message, obtaining the descriptor address corresponding to the target message from the window information; reading the message descriptor from the descriptor cache based on the descriptor address; and processing the message payload stored in the packet buffer based on the plurality of cache addresses contained in the message descriptor.
[0007] According to a message processing method provided by the present invention, generating a message descriptor for the target message based on a plurality of consecutive cache addresses into which the target message is stored includes: determining the number of clock ticks required to delay reading the target message from the packet cache; determining a fixed number of cache addresses included in the message descriptor based on the number of clock ticks; selecting a fixed number of consecutive cache addresses corresponding to the target message from the recorded cache addresses; and constructing a message descriptor for the target message based on the consecutive cache addresses.
[0008] According to a message processing method provided by the present invention, the step of storing the message descriptor in a descriptor cache and associating the descriptor address of the message descriptor in the descriptor cache with the window information of the connection corresponding to the target message includes: writing the message descriptor into the descriptor cache and obtaining the descriptor address of the message descriptor in the descriptor cache; determining a shared storage unit for storing the window information of the target message and an address segment within the shared storage unit based on the connection identifier corresponding to the target message, wherein the window information of multiple connections corresponding to the target message is stored in different address segments of the same shared storage unit; and associating the sequence number information of the target message and the descriptor address with the address segment.
[0009] According to a message processing method provided by the present invention, the step of obtaining the descriptor address corresponding to the target message from the window information in response to receiving a scheduling command for the target message includes: determining the connection identifier and message sequence number to which the target message belongs based on the received scheduling command for the target message; locating the address segment storing the window information of the target message based on the connection identifier; and querying the descriptor address associated with the message sequence number in the window information of the address segment.
[0010] According to a message processing method provided by the present invention, the scheduling command includes at least one of the following: a normal transmission scheduling command and a retransmission message scheduling command; after responding to receiving the scheduling command of the target message, the method further includes: temporarily storing the normal transmission scheduling command and / or the retransmission message scheduling command in corresponding command queues respectively; arbitrating and scheduling commands from different command queues according to a preset priority strategy to select a target scheduling command, wherein the priority of the retransmission message scheduling command is higher than that of the normal transmission scheduling command; when the target scheduling command is a retransmission message scheduling command, verifying whether the normal transmission scheduling command of the target message corresponding to the retransmission message scheduling command has completed its first transmission, and if not, filtering the retransmission message scheduling command.
[0011] According to a message processing method provided by the present invention, the method further includes: in response to receiving a release command for the target message, after confirming that the target message has been correctly received by the peer, releasing the corresponding storage unit in the packet cache according to the cache address of the target message.
[0012] The present invention also provides a message processing apparatus, comprising the following modules: an acquisition module for acquiring the message payload of a target message; a recording module for storing the message payload into a packet cache according to a preset storage unit, and recording the cache address of the message payload in the packet cache; a generation module for generating a message descriptor of the target message based on a plurality of consecutive cache addresses stored in the target message; an association module for storing the message descriptor into a descriptor cache, and associating the descriptor address of the message descriptor in the descriptor cache with the window information corresponding to the target message; a response module for acquiring the descriptor address corresponding to the target message from the window information in response to receiving a scheduling command for the target message; a reading module for reading the message descriptor from the descriptor cache based on the descriptor address; and a processing module for processing the message payload stored in the packet cache based on a plurality of cache addresses contained in the message descriptor.
[0013] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the message processing method described above.
[0014] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the message processing method as described above.
[0015] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the message processing method as described above.
[0016] The message processing method, apparatus, electronic device, and storage medium provided by this invention first acquire and store the message payload, recording its cache address to provide a data foundation for subsequent operations. Second, message descriptors are generated based on consecutive cache addresses, enabling centralized management of data storage locations. Then, the descriptors are stored in a dedicated cache and associated with the connection's window information, allowing for rapid descriptor location. When a scheduling command is received, the descriptor address can be directly obtained from the window information, and the descriptor can be read accordingly. Finally, using the cache address in the descriptor, the message payload in the packet cache can be accurately located and processed. By separating and associating the message payload, message descriptor, and window information, the access path is optimized, improving cache management efficiency and message processing efficiency. Attached Figure Description
[0017] To more clearly illustrate the technical solutions in this invention or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced one by one below. Obviously, the accompanying drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0018] Figure 1 This is a flowchart illustrating the message processing method provided by the present invention.
[0019] Figure 2 This is a component structure diagram of the message processing method provided by the present invention.
[0020] Figure 3 This is a schematic diagram of the message processing device provided by the present invention.
[0021] Figure 4 This is a schematic diagram of the physical structure of the electronic device provided by the present invention. Detailed Implementation
[0022] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.
[0023] In the implementation design of many transmission protocols, message caching and retransmission techniques are very important design aspects. Regardless of the transmission protocol, it is necessary to carefully consider how to cache and transmit messages. In most cases, the application layer requires the transmission protocol to support retransmission. For example, the traditional UDP transmission protocol does not support retransmission, so when applying this transmission protocol, retransmission needs to be implemented at another layer, or in certain specific scenarios, the reliability of transmission does not need to be considered.
[0024] Specifically, the implementation of this design usually consumes a large amount of storage resources and has a direct and significant impact on the bandwidth performance that the transmission protocol can achieve. In particular, when the system needs to support a multi-connection transmission protocol, the packet caching design needs to consider minimizing storage resource consumption while achieving performance.
[0025] A relatively simple design approach is to divide storage resources evenly according to the number of supported connections. The advantage of this approach is that the specific implementation design is simple and the packet buffer management is simple. However, the disadvantages are also obvious. First, when a large number of connections need to be supported, the storage resources consumed will be very large. Second, the scalability of the connections is very poor, and it is basically impossible to expand the number of connections because the storage resources for each connection are fixed.
[0026] Of course, caching can also be implemented using system-side storage resources. In this case, storage resources will not become a bottleneck, but the performance will often be much worse because the latency of accessing system-side storage is often very high, which directly affects message processing efficiency.
[0027] This invention implements a message processing method that can improve cache management efficiency and message processing efficiency while ensuring low storage resource consumption and supporting multi-connection scalability.
[0028] This invention is applied to chips or programmable devices such as Field Programmable Gate Arrays (FPGAs), and the chips or FPGAs are then made into board products. These boards are deployed in general-purpose servers, and multiple boards can communicate with each other through the design of this invention.
[0029] refer to Figure 1 , Figure 1 This is a flowchart illustrating the message processing method provided by the present invention.
[0030] Step 101: Obtain the payload of the target message.
[0031] In this embodiment of the invention, the message payload refers to the actual data content that needs to be transmitted in the target message, that is, the main body after stripping away the protocol header and other control information.
[0032] For example, in a data packet based on the TCP / IP protocol stack, the packet payload is the actual data payload delivered by the application layer. The chip extracts the packet payload from the received target packet to prepare for subsequent caching and processing.
[0033] Step 102: Store the message payload into the packet cache according to the preset storage unit, and record the cache address of the message payload in the packet cache.
[0034] In this embodiment of the invention, the preset storage unit is directly related to the bit width of the internal data bus of the chip, and the storage unit defines the minimum data block size to be written to the packet buffer each time. For example, if the data bus bit width is 512 bits (i.e., 64 bytes), then the storage unit is 64 bytes. The packet buffer is a storage area used to store the packet payload.
[0035] In practice, the chip divides the message payload into 64-byte units and stores them sequentially in the packet buffer. Each time a unit of data is stored, its physical location within the packet buffer, i.e., its buffer address, is recorded simultaneously.
[0036] For example, a 192-byte packet payload will be divided into three 64-byte storage units and stored in the packet cache at addresses 0x1000, 0x1040, and 0x1080 respectively (assuming each address is 64 bytes apart), while recording these three consecutive cache addresses.
[0037] Step 103: Generate a message descriptor for the target message based on the multiple consecutive cache addresses where the target message is stored.
[0038] A message descriptor is a data structure used to describe the key metadata information of a message. In this embodiment of the invention, the chip integrates multiple consecutive cache addresses belonging to the same target message as the core content for generating the message descriptor.
[0039] For example, the message descriptor will contain the starting address 0x1000 (and also 0x1040, 0x1080, etc., based on the starting address to determine the number of clock ticks required to read the target message from the packet buffer) and information to indicate data continuity (such as quantity or ending address), thus fully describing the distribution of the message payload in the packet buffer.
[0040] Step 104: Store the message descriptor in the descriptor cache, and associate the stored message descriptor address in the descriptor cache with the window information of the connection corresponding to the target message.
[0041] In this embodiment of the invention, the descriptor cache is a storage area used to store message descriptors. The chip stores the generated message descriptors into the descriptor cache and obtains their location information in this cache, i.e., the descriptor address.
[0042] Window information is a data structure used to manage the transmission status of each connection. It is stored in a memory area associated with the connection corresponding to the target packet (such as a dedicated SRAM (Static Random-Access Memory)). The chip associates the obtained descriptor address with the connection information to which the target packet belongs and stores it in the window information corresponding to that connection. This constructs an index chain of connection window information (descriptor address), descriptor cache (packet descriptor), and packet cache (packet payload).
[0043] Step 105: In response to receiving the scheduling command for the target message, obtain the descriptor address corresponding to the target message from the window information.
[0044] In this embodiment of the invention, the scheduling command is an instruction that triggers the sending or retransmission of a certain message.
[0045] When the chip receives a scheduling command (e.g., a normal transmission command or a retransmission command) for a target message, it locates the corresponding window information storage area based on the connection identifier to which the target message belongs, and finds the previously stored descriptor address corresponding to the target message from there.
[0046] Step 106: Read the packet descriptor from the descriptor cache based on the descriptor address.
[0047] In this embodiment of the invention, the chip uses the acquired descriptor address as addressing information to directly access the descriptor cache, thereby accurately reading the previously stored message descriptor containing key information of the target message.
[0048] Step 107: Process the packet payload stored in the packet cache based on the multiple cache addresses contained in the packet descriptor.
[0049] In this embodiment of the invention, the chip parses and reads the message descriptor and extracts a series of consecutive cache addresses (such as 0x1000, 0x1040, 0x1080) recorded therein.
[0050] Subsequently, the chip reads the packet payload data of all storage units from the packet cache in sequence according to multiple consecutive cache addresses, and performs subsequent packet assembly, encapsulation protocol header and other sending processing, or directly triggers retransmission operation in retransmission scenarios.
[0051] In this embodiment of the invention, firstly, the message payload is acquired and stored, and its cache address is recorded, providing a data foundation for subsequent operations. Secondly, message descriptors are generated based on consecutive cache addresses, achieving centralized management of data storage locations. Then, the descriptors are stored in a dedicated cache and associated with the connection's window information, enabling rapid descriptor location. When a scheduling command is received, the descriptor address can be directly obtained from the window information, and the descriptor can be read accordingly. Finally, using the cache address in the descriptor, the message payload in the packet cache can be accurately located and processed. By separating and associating the message payload, message descriptor, and window information, the access path is optimized, and cache management efficiency and message processing efficiency are improved.
[0052] refer to Figure 2 , Figure 2 This is a component structure diagram of the message processing method provided by the present invention. The "Packet PayloadBuffer" stores the content of data packets to be sent or received. Multiple data blocks are pointed to the "DESC Buffer" in the middle by arrows, indicating that the description information of the data packets is written to the descriptor buffer for subsequent processing. The "DESC Buffer" is connected to multiple "Window RAMs" on the right, indicating that the information in the descriptor buffer is used to manage the data segments stored in the window RAMs. Multiple window RAMs are connected by dashed lines, indicating the existence of multiple window memory areas for sliding window management of data. The "Packet Send CMD," "Packet Replay CMD," and "Packet Release CMD" below together constitute a set of control commands. They are connected by a vertical line and point to all window RAMs, indicating that these commands are used to control the sending, retransmission, and release operations of data packets in the window RAMs, achieving unified management of the data packet lifecycle. Using these main components, the multi-connection retransmission method of the present invention can be implemented. The specific implementation method and main process are described in more detail below.
[0053] According to a message processing method provided by the present invention, a message descriptor for a target message is generated based on a plurality of consecutive cache addresses into which the target message is stored, comprising: Determine the number of clock ticks required to read the target packet from the packet buffer; The fixed number of cached addresses contained in the message descriptor is determined based on the number of clock ticks. Select a fixed number of consecutive cache addresses corresponding to the target packet from the recorded cache addresses; Construct the message descriptor for the target message based on consecutive cached addresses.
[0054] In this embodiment of the invention, the payload portion of the message is stored in the packet buffer. The storage granularity of the buffer is the bit width of the data bus. That is, if the data bus bit width is 512 bits, the storage granularity is 64 bits per address. If the data bus bit width is 1024 bits, the storage granularity is 128 bits per address.
[0055] At each clock tick, a unit of packet payload is stored, and the corresponding buffer address at the time of storage is recorded. After a certain number of units of packet payload have been stored, the buffer addresses recorded for these packet payloads are used as message descriptors (i.e., Figure 2 Part of the information in the DESC Buffer is recorded in the DESC (i.e., the Packet Descriptor), along with the message length, calculated CRC, calculated checksum, and other information, to form a complete packet descriptor.
[0056] It should be noted that only the initial cache address of each target packet is recorded in the packet descriptor, because the entire packet payload cache can be read out through a linked list based on the starting information of each packet payload.
[0057] Here, the packet payload buffer is mainly used to store the payload portion of data packets to be sent or received. The packet payload refers to the actual application layer data carried in the data packet, excluding headers and other information.
[0058] In some embodiments, clock ticks are the basic unit for measuring the latency of a data read operation, directly reflecting the time required to completely store the message payload into the packet buffer. The chip determines a fixed number of buffer addresses that need to be included in the message descriptor based on the acquired clock tick count. The chip selects a fixed number of consecutive buffer addresses from all recorded buffer addresses belonging to the target message. These addresses are recorded sequentially when the message payload is stored in the packet buffer in storage units. Based on the selected consecutive buffer addresses, the chip constructs the message descriptor for the target message.
[0059] In some embodiments, as long as the message descriptor exists in the buffer, the packet can be managed for normal transmission and retransmission. Once the packet is correctly received by the other end, the message descriptor can be released from the buffer. If the condition requiring retransmission is triggered, the packet will be read from the buffer and retransmitted based on the message descriptor.
[0060] Through the embodiments of the present invention, the fixed number of cached addresses in the message descriptor is dynamically determined by the clock tick count, ensuring that the address information is aligned with the actual storage and simplifying the address management logic; at the same time, the descriptor is constructed based on consecutive cached addresses, which improves storage access efficiency and hardware processing consistency, and helps to reduce resource overhead and increase message processing throughput.
[0061] According to a message processing method provided by the present invention, a message descriptor is stored in a descriptor cache, and the descriptor address of the message descriptor in the descriptor cache is associated with the window information of the connection corresponding to the target message, including: Write the message descriptor to the descriptor cache and obtain the descriptor address of the message descriptor in the descriptor cache; Based on the connection identifier corresponding to the target message, determine the shared storage unit and the address range within the shared storage unit for storing the window information of the target message. The window information of multiple connections corresponding to the target message is stored in different address ranges of the same shared storage unit. Based on the address range, the sequence number information and descriptor address of the target message are associated and stored.
[0062] In this embodiment of the invention, the descriptor cache corresponds to the window information of each connection, i.e. Figure 2 The window is designed within WindowRAM. The reason for designing the window is that, for any transmission protocol, the resources of the receiving end are necessarily limited. Therefore, it is necessary to limit the number of messages sent for each connection, that is, at most one window's worth of messages can be sent at a time. Once the receiving end confirms that it has received these packets or some packets, the window will gradually increase in size, and then it can continue to send.
[0063] The window information primarily stores the address of the message descriptor in the buffer and the packet sequence number. As mentioned earlier, the message descriptor is the identity information of each packet. Once this information is found, the packet can be completely retrieved from the packet buffer and sent, which is the basis for retransmission. When storing the message descriptor in the descriptor buffer, the buffer address of the descriptor buffer is also stored in WindowRAM (window information).
[0064] Multiple connection window information can be stored and managed on the same SRAM. This design has two main advantages: First, it greatly benefits timing during placement and routing, because if the SRAM is fragmented into very small pieces, timing will be very unfriendly. Second, it can reduce the area. Each SRAM generates some additional logic, so reducing the number of SRAMs can reduce the area occupied by this additional logic.
[0065] Segment management can be performed based on the connection ID. If 256 connections are to be supported, the ID can be divided into two segments, totaling 8 bits. 4 bits of the ID are used to select which SRAM to use, that is, a total of 16 SRAMs. The remaining 4 bits are used to select which SRAM segment address to use. In other words, each SRAM is divided into 16 address segments, and each address segment is used as a window information cache for each connection. That is, each SRAM supports window information for 16 connections.
[0066] In some embodiments, the chip performs the operation of writing a message descriptor to the descriptor cache, and then obtains the specific location information of the message descriptor in the descriptor cache, i.e., the descriptor address. The descriptor cache is a storage area specifically used to store all message descriptors, and the descriptor address is the key information that uniquely identifies and locates a specific message descriptor in the cache.
[0067] The chip determines the storage location of the window information based on the connection identifier corresponding to the target message. The connection identifier is a unique identifier that distinguishes different data connections. To achieve efficient management of multiple connections, this invention centrally stores the window information of multiple connections (e.g., 256 connections) in the same shared memory unit, which is typically implemented by an SRAM chip. The chip further determines which shared memory unit to use, and within that shared memory unit, which specific address range to store the window information of the current target message, based on the connection identifier.
[0068] Specifically, the binary bits of the connection identifier are divided into two parts: the high-order bits are used to select a specific shared memory cell, and the low-order bits are used to select a specific address range within that selected shared memory cell. For example, for an 8-bit connection identifier, the high 4 bits can be used to select one of the 16 shared SRAMs, and then the low 4 bits can be used to select a segment from the 16 preset address ranges of that SRAM. This address range is dedicated to window information management for that connection. This design effectively reduces the total number of SRAM resources, which is beneficial for chip area optimization and timing convergence.
[0069] After determining the shared memory unit and specific address range where the target window information is located, the chip associates and stores the sequence number information of the target message with the previously obtained descriptor address based on this address range. The message sequence number information is used to identify the order of messages, and it is written into the window information together with the descriptor address, thereby establishing a mapping relationship between the connection, message sequence number, and message descriptor address.
[0070] Through the embodiments of the present invention, the dedicated address segment in the shared storage unit is accurately located by the connection identifier, and the message sequence number and descriptor address are efficiently associated, realizing compact storage and fast indexing of multi-connection window information; global lookup and redundant allocation are avoided, significantly improving storage resource utilization, reducing access latency, and supporting efficient message scheduling and retransmission management under high-concurrency connections.
[0071] According to a message processing method provided by the present invention, in response to receiving a scheduling command for a target message, the method obtains the descriptor address corresponding to the target message from window information, including: Based on the received scheduling command for the target message, determine the connection identifier and message sequence number to which the target message belongs; Based on the connection identifier, locate the address range where the window information of the target message is stored; In the address segment window information, query the descriptor address associated with the message sequence number.
[0072] In this embodiment of the invention, based on the received scheduling command for a target message, the connection identifier to which the target message belongs and its corresponding sequence number are determined. The scheduling command is an instruction that triggers processing of a specific message, and may originate from a normal transmission process or a retransmission mechanism (such as timeout retransmission or selective retransmission). This command includes at least the connection identifier to which the target message belongs and sequence number information used to uniquely identify the message. The connection identifier indicates the data connection to which the message belongs, while the sequence number uniquely identifies the message within that connection.
[0073] Based on the determined connection identifier, the address segment storing the window information related to the target message is precisely located. As described in the previous implementation, the window information of multiple connections is integrated and stored in a shared memory unit (such as an SRAM). The chip selects the corresponding shared memory unit based on specific bits (e.g., the higher bits) of the connection identifier, and then locates a fixed-size address segment dedicated to this connection within the shared memory unit based on the remaining bits (e.g., the lower bits) of the connection identifier.
[0074] Within the window information of the located specific address range, the descriptor address associated with the sequence number of the target packet is queried. The window information maintains a data structure that maps the sequence number of each packet to the address of its corresponding packet descriptor in the descriptor cache. By querying this data structure and using the sequence number as the index key, the chip can quickly retrieve and obtain the descriptor address that precisely matches that sequence number.
[0075] Through the embodiments of the present invention, the corresponding descriptor address in the window information can be quickly located by using a two-level index of connection identifier and message sequence number, thereby achieving efficient mapping from scheduling commands to specific message descriptors; by utilizing a pre-organized shared storage structure, traversal lookup is avoided, scheduling latency is significantly reduced, and the real-time performance and throughput of message processing in high-concurrency scenarios are improved.
[0076] According to a message processing method provided by the present invention, the scheduling command includes at least one of the following: a normal transmission scheduling command and a retransmission message scheduling command; Following the dispatch command received in response to the target message, the method further includes: Normal sending scheduling commands and / or retransmission message scheduling commands are temporarily stored in their respective command queues; Commands from different command queues are arbitrated and scheduled according to a preset priority strategy to select the target scheduling command. Among them, the priority of retransmission message scheduling command is higher than that of normal transmission scheduling command. When the target scheduling command is a retransmission message scheduling command, verify whether the normal transmission scheduling command of the target message corresponding to the retransmission message scheduling command has been completed for the first time. If not, filter the retransmission message scheduling command.
[0077] In this embodiment of the invention, the scheduling of message descriptors is divided into normal transmission scheduling and retransmission message scheduling. When sending normal messages, each connection has the same weight, so a round-robin (RR) scheduling method is used for scheduling.
[0078] It's important to note that each connection has a minimum scheduling interval design. For a single connection, excessive scheduling wastes bandwidth. Since small packets (single-shot packets) are relatively rare in most applications, scheduling a message descriptor at regular intervals is sufficient to achieve line-rate packet transmission performance. The normal packet transmission scheduling command is cached in a FIFO (First In, First Out) and then scheduled again with two other commands to initiate the message descriptor retrieval operation.
[0079] There are two main scenarios in which retransmissions occur: First, a timeout occurs, meaning the packet sent by the connection is lost along the path to the receiver, or the acknowledgment returned by the receiver after receiving the packet is also lost along the path. If the sending side does not receive acknowledgment from the receiving end after a certain time, a retransmission command is generated. Second, selective retransmission occurs, where the receiving side sends a bitmap indicating which packets were not received, and the sending side generates a retransmission command based on this information. Retransmission packets have a higher scheduling priority than normal packets. Therefore, when a connection is in a retransmission state, the DESC of retransmission packets is prioritized. The scheduling command for retransmission packets is also temporarily stored in a FIFO.
[0080] The message descriptor buffer also has a release process. This is initiated after receiving the acknowledgment information returned by the receiving side. After the release command is generated, the message descriptor is temporarily stored in the FIFO.
[0081] The three FIFOs that temporarily store DESC read commands will undergo another round-robin (RR) to schedule a command. Based on this command, the address of DESC is first retrieved from the window information cache. It's important to note that after normal packet send commands and retransmission commands are scheduled, a filtering process is performed to ensure that retransmission packets have already been sent; otherwise, they are filtered out. This is because the normal packet send path may be blocked for some reason, preventing command scheduling. After a period of time, a timeout occurs, requiring a retransmission and generating a retransmission command. This retransmission command is prioritized and retrieved from the command FIFO. Since this packet hasn't been sent yet, it shouldn't be retransmitted and therefore needs to be filtered out.
[0082] In some embodiments, scheduling commands are mainly divided into two categories: normal transmission scheduling commands and retransmission message scheduling commands. Normal transmission scheduling commands are used to trigger the process of sending the initial message payload; while retransmission message scheduling commands are generated when a message transmission anomaly is detected (such as failure to receive an acknowledgment after timeout or receiving a selective retransmission request from the receiving side), and are used to trigger the retransmission of a specific message.
[0083] After the chip responds to the scheduling command received from the target message, the system temporarily stores these commands in the corresponding command queues according to their type. Specifically, normal transmission scheduling commands are temporarily stored in a dedicated command queue (such as a FIFO memory), while retransmission message scheduling commands are temporarily stored in another independent command queue. This method of separate queuing and temporary storage is beneficial for isolating and managing commands of different priorities, avoiding mutual blocking.
[0084] Arbitration scheduling is performed on scheduling commands from different command queues according to a preset priority strategy. This strategy explicitly stipulates that retransmission message scheduling commands have a higher priority than normal transmission scheduling commands. The arbitrator (e.g., a polling arbitration logic unit) continuously monitors the status of each command queue and selects a target scheduling command for subsequent processing based on this priority strategy. As long as the retransmission command queue is not empty, the arbitrator will prioritize selecting a command from it, thereby ensuring that retransmission requests are responded to in a timely manner and guaranteeing the reliability of transmission.
[0085] When the target scheduling command selected by the arbitration is a retransmission message scheduling command, the system initiates a verification process. The core of this process is to verify whether the target message corresponding to this retransmission message scheduling command has already completed its initial transmission. Verification can be based on checking the message's status flag in the window information or confirming whether its descriptor has changed from the "pending transmission" state to the "transmitted" state. If the verification finds that the target message has not yet completed its initial transmission (for example, its normal transmission command may be delayed due to path congestion), then the current retransmission message scheduling command is filtered out, i.e., the retransmission operation is abandoned. This design effectively prevents the "premature retransmission" problem caused by internal system timing or congestion, avoiding bandwidth waste and potential logical errors.
[0086] By differentiating between normal transmission and retransmission scheduling commands and assigning higher priority to retransmission commands, critical messages are quickly retransmitted, improving transmission reliability. At the same time, a pre-retransmission verification mechanism is introduced to avoid erroneous retransmission of messages that have not been sent for the first time, reducing invalid operations and resource waste, and improving scheduling accuracy and system efficiency.
[0087] According to a message processing method provided by the present invention, the method further includes: In response to receiving a release command for the target packet, after confirming that the target packet has been correctly received by the peer, the corresponding storage unit in the packet cache is released according to the cache address of the target packet.
[0088] In this embodiment of the invention, after obtaining the address information of the message descriptor from the window information, the descriptor information of the target message is read from the cache address of the message descriptor according to the address. Then, based on this information, the message payload can be read from the message cache, and then the packet can be assembled and sent. Alternatively, the cache can be released from the message cache based on this information.
[0089] In this embodiment of the invention, the temporarily stored release command will compete for scheduling with normal transmission scheduling commands and retransmission message scheduling commands according to a preset arbitration strategy (such as a polling mechanism). Once the release command is selected as the target command by the arbitrator, subsequent steps similar to those for scheduling commands are executed: based on the connection identifier and sequence number of the target message, the descriptor address of the message is retrieved from its corresponding window information. Based on this descriptor address, the message descriptor of the target message is read from the descriptor cache. This descriptor contains the key information required for the release operation, namely, the total cache address occupied by the target message payload in the packet cache.
[0090] After successfully acquiring the message descriptor, the chip locates the respective storage units in the packet cache that store the target message payload based on the multiple consecutive cache addresses recorded in the descriptor. Subsequently, the chip performs a cache release operation on these specific storage units, marking them as idle so that they can be overwritten and reused by subsequent new message payload data.
[0091] Through the embodiments of the present invention, dynamic allocation and timely reclamation of storage resources are realized, avoiding unlimited cache occupation, thereby ensuring efficient recycling of system cache resources while supporting continuous transmission of large-scale data across multiple connections.
[0092] Before normal communication begins, a static configuration is performed on both communicating parties. This mainly includes connection information at both ends to support multiple connections, and it's necessary to distinguish the packet buffer, DESC buffer, and other information corresponding to different connections. Some initialization is also required, such as setting internal data table structures, initial packet sequence numbers, initial acknowledgment numbers, and other initial values.
[0093] After configuring the above key information, both parties can begin normal communication. There is no primary or secondary distinction in communication; either party can initiate packet sending and receiving operations simultaneously.
[0094] Once a packet is received from the other end, an acknowledgment message needs to be returned.
[0095] During normal communication between the two parties, a physical channel failure can be fabricated, causing the sender to enter a retransmission state. At this time, it can be observed by querying the registers that retransmitted packets are being received on the receiving side, and the sending side can also observe retransmission interruption information such as the number of retransmissions.
[0096] In this embodiment of the invention, the message cache is split into two parts for management: message payload and message descriptor. The message payload is the main content of the message that the transmission protocol needs to encapsulate before sending it out. The message descriptor describes some basic characteristics of the message, mainly including the address of the message in the cache, the length of the payload, the connection ID of the message, the sequence number of the message, etc., which can be regarded as the main identity information of the message.
[0097] Managing the descriptor window information of multiple connections by storing it in a single SRAM and designing the SRAM as a single-port type saves resources and plays a very important role in the overall timing convergence.
[0098] By designing the descriptor window as a ring structure and combining it with bitmap information, accurate retransmission of packets can be achieved.
[0099] The message processing apparatus provided by the present invention is described below. The message processing apparatus described below can be referred to in correspondence with the message processing method described above.
[0100] refer to Figure 3 , Figure 3 This is a schematic diagram of the message processing device provided by the present invention.
[0101] The acquisition module 301 is used to acquire the payload of the target message; The recording module 302 is used to store the message payload into the packet buffer according to a preset storage unit, and record the cache address of the message payload in the packet buffer. The generation module 303 is used to generate a message descriptor for the target message based on multiple consecutive cache addresses where the target message is stored. The association module 304 is used to store the message descriptor in the descriptor cache and associate the stored message descriptor address in the descriptor cache with the window information of the connection corresponding to the target message. The response module 305 is used to obtain the descriptor address corresponding to the target message from the window information in response to the scheduling command received from the target message; The read module 306 is used to read the packet descriptor from the descriptor cache based on the descriptor address; The processing module 307 is used to process the packet payload stored in the packet cache based on multiple cache addresses contained in the packet descriptor.
[0102] According to a message processing apparatus provided by the present invention, the aforementioned generation module is specifically configured to: determine the number of clock ticks required for the delay when reading a target message from a packet buffer; determine a fixed number of buffer addresses contained in the message descriptor based on the number of clock ticks; select a fixed number of consecutive buffer addresses corresponding to the target message from the recorded buffer addresses; and construct a message descriptor for the target message based on the consecutive buffer addresses.
[0103] According to a message processing apparatus provided by the present invention, the aforementioned association module is specifically configured to write a message descriptor into a descriptor cache and obtain the descriptor address of the message descriptor in the descriptor cache; determine a shared storage unit for storing window information of the target message and an address segment within the shared storage unit based on the connection identifier corresponding to the target message, wherein the window information of multiple connections corresponding to the target message is stored in different address segments of the same shared storage unit; and associate the sequence number information and descriptor address of the target message based on the address segments.
[0104] According to a message processing apparatus provided by the present invention, the above-mentioned response module is specifically used to: determine the connection identifier and message sequence number to which the target message belongs based on the scheduling command received for the target message; locate the address segment storing the window information of the target message based on the connection identifier; and query the descriptor address associated with the message sequence number in the window information of the address segment.
[0105] According to a message processing apparatus provided by the present invention, the scheduling command includes at least one of the following: a normal transmission scheduling command and a retransmission message scheduling command; after receiving a scheduling command for a target message, the message processing apparatus is further configured to temporarily store the normal transmission scheduling command and / or the retransmission message scheduling command in corresponding command queues respectively; to arbitrate and schedule commands from different command queues according to a preset priority strategy, and select a target scheduling command, wherein the retransmission message scheduling command has a higher priority than the normal transmission scheduling command; when the target scheduling command is a retransmission message scheduling command, to verify whether the normal transmission scheduling command for the target message corresponding to the retransmission message scheduling command has completed its first transmission, and if not, to filter the retransmission message scheduling command.
[0106] According to a message processing apparatus provided by the present invention, the message processing apparatus is further configured to, in response to receiving a release command for a target message, release the corresponding storage unit in the packet cache according to the cache address of the target message after confirming that the target message has been correctly received by the peer.
[0107] Specifically, the message processing apparatus provided by the present invention can implement all the method steps implemented in the above message processing method embodiments and can achieve the same technical effect. Here, the parts that are the same as those in the method embodiments and the beneficial effects will not be described in detail.
[0108] Figure 4 This is a schematic diagram of the physical structure of the electronic device provided by the present invention, such as... Figure 4 As shown, the electronic device may include: a processor 410, a communications interface 420, a memory 430, and a communications bus 440, wherein the processor 410, the communications interface 420, and the memory 430 communicate with each other through the communications bus 440. The processor 410 can call logical instructions in the memory 430 to execute a message processing method, which includes: obtaining the message payload of a target message; storing the message payload into a packet buffer according to a preset storage unit and recording the buffer address of the message payload in the packet buffer; generating a message descriptor of the target message based on multiple consecutive buffer addresses stored in the target message; storing the message descriptor into a descriptor buffer and associating the descriptor address of the message descriptor in the descriptor buffer with the window information of the connection corresponding to the target message; in response to receiving a scheduling command for the target message, obtaining the descriptor address corresponding to the target message from the window information; reading the message descriptor from the descriptor buffer based on the descriptor address; and processing the message payload stored in the packet buffer based on the multiple buffer addresses contained in the message descriptor.
[0109] Furthermore, the logical instructions in the aforementioned memory 430 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, essentially, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0110] On the other hand, the present invention also provides a computer program product, which includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the message processing methods provided by the above methods. The method includes: obtaining the message payload of a target message; storing the message payload in a packet buffer according to a preset storage unit and recording the buffer address of the message payload in the packet buffer; generating a message descriptor of the target message based on multiple consecutive buffer addresses stored in the target message; storing the message descriptor in a descriptor buffer and associating the stored message descriptor address in the descriptor buffer with the window information of the connection corresponding to the target message; in response to receiving a scheduling command for the target message, obtaining the descriptor address corresponding to the target message from the window information; reading the message descriptor from the descriptor buffer based on the descriptor address; and processing the message payload stored in the packet buffer based on the multiple buffer addresses contained in the message descriptor.
[0111] In another aspect, the present invention also provides a non-transitory computer-readable storage medium storing a computer program thereon. When executed by a processor, the computer program implements the message processing methods provided by the above methods. The method includes: obtaining the message payload of a target message; storing the message payload into a packet buffer according to a preset storage unit and recording the buffer address of the message payload in the packet buffer; generating a message descriptor of the target message based on a plurality of consecutive buffer addresses stored in the target message; storing the message descriptor into a descriptor buffer and associating the descriptor address of the message descriptor in the descriptor buffer with the window information of the connection corresponding to the target message; in response to receiving a scheduling command for the target message, obtaining the descriptor address corresponding to the target message from the window information; reading the message descriptor from the descriptor buffer based on the descriptor address; and processing the message payload stored in the packet buffer based on the plurality of buffer addresses contained in the message descriptor.
[0112] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.
[0113] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.
[0114] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A message processing method, characterized in that, Applied to chips, including: Obtain the payload of the target message; The message payload is stored in the packet cache according to the preset storage unit, and the cache address of the message payload in the packet cache is recorded. Based on the consecutive cache addresses where the target message is stored, a message descriptor for the target message is generated; The message descriptor is stored in the descriptor cache, and the descriptor address of the message descriptor in the descriptor cache is associated with the window information of the connection corresponding to the target message. In response to receiving the scheduling command for the target message, the descriptor address corresponding to the target message is obtained from the window information; Based on the descriptor address, the message descriptor is read from the descriptor cache; Based on the multiple cache addresses contained in the message descriptor, the message payload stored in the packet cache is processed.
2. The message processing method according to claim 1, characterized in that, The step of generating a message descriptor for the target message based on a series of consecutive cache addresses into which the target message is stored includes: Determine the number of clock ticks required to delay reading the target message from the packet buffer; Based on the clock tick count, a fixed number of cache addresses contained in the message descriptor are determined; Select a fixed number of consecutive cache addresses corresponding to the target message from the recorded cache addresses; Based on the consecutive cached addresses, construct the message descriptor of the target message.
3. The message processing method according to claim 1, characterized in that, The step of storing the message descriptor in the descriptor cache and associating the descriptor address of the message descriptor in the descriptor cache with the window information of the connection corresponding to the target message includes: Write the message descriptor into the descriptor cache and obtain the descriptor address of the message descriptor in the descriptor cache; Based on the connection identifier corresponding to the target message, a shared storage unit for storing the window information of the target message and an address segment within the shared storage unit are determined, wherein the window information of multiple connections corresponding to the target message is stored in different address segments of the same shared storage unit; Based on the address range, the sequence number information of the target message and the descriptor address are associated and stored.
4. The message processing method according to claim 3, characterized in that, The step of responding to a scheduling command received from the target message by obtaining the descriptor address corresponding to the target message from the window information includes: Based on the received scheduling command for the target message, determine the connection identifier and message sequence number to which the target message belongs; Based on the connection identifier, locate the address range where the window information of the target message is stored; In the window information of the address segment, query the descriptor address associated with the message sequence number.
5. The message processing method according to claim 1, characterized in that, The scheduling command includes at least one of the following: a normal transmission scheduling command and a retransmission message scheduling command; Following the scheduling command received in response to the target message, the method further includes: The normal transmission scheduling command and / or the retransmission message scheduling command are temporarily stored in their respective command queues. Arbitration scheduling is performed on commands from different command queues according to a preset priority strategy to select a target scheduling command, wherein the priority of the retransmission message scheduling command is higher than that of the normal transmission scheduling command. When the target scheduling command is a retransmission message scheduling command, verify whether the normal transmission scheduling command of the target message corresponding to the retransmission message scheduling command has been completed for the first time. If it has not been completed, filter the retransmission message scheduling command.
6. The message processing method according to claim 1, characterized in that, The method further includes: In response to receiving the release command of the target packet, after confirming that the target packet has been correctly received by the peer, the corresponding storage unit in the packet cache is released according to the cache address of the target packet.
7. A message processing apparatus, characterized in that, include: The acquisition module is used to acquire the payload of the target message; The recording module is used to store the message payload into the packet cache according to a preset storage unit, and record the cache address of the message payload in the packet cache. The generation module is used to generate a message descriptor for the target message based on a series of consecutive cache addresses into which the target message is stored. The association module is used to store the message descriptor in the descriptor cache and, in the window information of the connection corresponding to the target message, associate and store the descriptor address of the message descriptor in the descriptor cache; The response module is used to obtain the descriptor address corresponding to the target message from the window information in response to the receiving scheduling command of the target message; A read module is configured to read the packet descriptor from the descriptor cache based on the descriptor address; The processing module is used to process the packet payload stored in the packet cache based on the multiple cache addresses contained in the packet descriptor.
8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that, When the processor executes the computer program, it implements the message processing method as described in any one of claims 1 to 6.
9. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the message processing method as described in any one of claims 1 to 6.
10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the message processing method as described in any one of claims 1 to 6.