Address allocation method and control method of two-wire system and two-wire system lamp body system

Abstract

The invention provides an address allocation method for a two-wire system. The address allocation method comprises the following steps: step S1, equipment modules which are not allocated with addresses in equipment modules send identification signals comprising identifiers to a main control module; s2, the main control module sends an address code signal to the equipment module after receiving the independent first identification signal in the current round; s3, the equipment module compares the identifier in the received address code signal with the identifier of the equipment module, if the identifier is consistent with the identifier of the equipment module, an address code in the address code signal is stored, and a confirmation signal is sent; s4, after receiving the confirmation signal, the main control module sends a next round of starting signal to the equipment module; and S5, after the equipment module receives a next round of start signal, the steps S1 to S4 are executed. According to the address allocation method of the two-wire system, automatic allocation can be effectively achieved, manual intervention is not needed, and the production efficiency and the use convenience are improved; the invention further provides a control method of the two-wire system and the two-wire system lamp body system.

Description

Technical Field

[0001] This invention relates to the field of two-wire systems, and in particular to address allocation methods, control methods, and two-wire lamp systems. Background Technology

[0002] A two-wire system typically consists of a positive power wire and a negative power wire connected to the entire system; for example, a two-wire lamp system.

[0003] Existing LED systems typically employ the following methods to achieve control:

[0004] (1) It is implemented according to the 512 series protocol. However, the bulbs are connected in series in this scheme. If one bulb has a problem, all the bulbs after it will fail. It is impossible to communicate through the protocol to achieve control.

[0005] (2) Two-line carrier parallel connection method: LED light strings mostly adopt a parallel structure, with all bulbs sharing two power lines. The controller sends commands through power line carrier or on / off encoding. However, since the bulbs are connected in parallel, it is impossible to distinguish their individual identities, making it difficult to achieve complex effects such as flowing or chasing. Traditional solutions, such as pre-programming addresses or using DIP switches, are costly and inflexible. Summary of the Invention

[0006] To overcome the shortcomings of existing technologies, this invention provides an address allocation method for a two-wire system, which can effectively solve the automatic allocation of address codes in a two-wire system without manual intervention, greatly improving production efficiency and ease of use; this invention also provides a control method for a two-wire system and a two-wire lamp body system.

[0007] To achieve the above objectives, the present invention employs the following technical solution:

[0008] A method for address allocation in a two-wire system, the two-wire system including a main control module and at least one device module, the main control module being provided with a power line group for outputting electrical energy, the power line group including a first power line and a second power line, the device module being connected in parallel between the first power line and the second power line;

[0009] The method includes the following steps:

[0010] Step S1: The device modules that have not been assigned an address send an identification signal, including their own unique identifier, to the main control module through the power line group;

[0011] Step S2: After receiving the first independent identification signal in this round, the main control module sends an address code signal to the device module through the power line group. The address code signal includes the identifier in the first independent identification signal received in this round and a unique address code.

[0012] Step S3: The device module receives the address code signal through the power line group and compares the identifier in the received address code signal with its own identifier. If the comparison is consistent, the address code in the address code signal is saved and a confirmation signal is sent to the main control module through the power line group.

[0013] Step S4: After receiving the confirmation signal through the power line group, the main control module sends the next round start signal to the device module through the power line group;

[0014] Step S5: After receiving the next round start signal through the power line group, the device module executes steps S1 to S4.

[0015] Typically, the first power line and the second power line are the positive power line and the negative power line, respectively.

[0016] The unique identifier of the device module itself can be understood as follows: at least among the device modules that have not been assigned an address in this round, the identifier of any one of the device modules is different from the identifiers of other device modules;

[0017] The fact that the main control module receives an independent identification signal in this round can be understood as: the main control module receives only one identification signal at the same time, which is considered an independent identification signal; the fact that the main control module receives the first independent identification signal in this round can be understood as: the main control module receives only one identification signal for the first time in this round, and if multiple are received at the same time, they are not considered as independent identification signals.

[0018] By adopting the above technical solution, the address allocation method of the two-wire system is made more reasonable. In the method, the device module can automatically report its own existence to the main control module, thereby facilitating the main control module to issue address codes to the device module.

[0019] The above solution can effectively solve the automatic allocation of address codes in a two-wire system without manual intervention, which greatly improves production efficiency and ease of use; and it has high communication reliability, can avoid signal collisions, and improves the addressing success rate.

[0020] Typically, after receiving an acknowledgment signal, the main control module increments the address code counter by 1 to ensure the uniqueness of the address code.

[0021] Further, step S1 includes:

[0022] Step S1.1: The device modules without assigned addresses in the device modules determine the corresponding delay time based on the electrical parameters of their own nodes;

[0023] Step S1.2: After delaying its corresponding delay time, the device module in the device module that has not been assigned an address sends an identification signal including its own unique identifier to the main control module through the power line group.

[0024] With the above technical solution, the electrical parameters of each node of the power line group are different, so the delay time determined based on the electrical parameters of the node is also different. That is, the time node at which each device module sends the identification signal to the main control module through the power line group is also different, thereby greatly reducing or avoiding the simultaneous arrival of identification signals sent by multiple device modules to the main control module, ensuring the stable and reliable operation of the address allocation method of the two-wire system.

[0025] The above solution links the physical location of the device module to the delay time, which in turn is linked to the address code. This direct link between the physical location and address code is more logical and facilitates subsequent control of each device module by the main control module.

[0026] Furthermore, the electrical parameters include at least one of voltage, current, and phase.

[0027] By adopting the above technical solution, the address allocation method of the two-wire system becomes more reasonable, and the operation becomes more stable and reliable; preferably, the electrical parameters include voltage.

[0028] Further, step S1.1 includes:

[0029] Step S1.1.1: The controller outputs a preset voltage value to the device module through the power supply line group. Specifically, the preset voltage value is 12V.

[0030] Step S1.1.2: Perform the first operation and the second operation, wherein the execution order of the first operation and the second operation is not limited;

[0031] The first operation includes: switching the device module without an assigned address in the device module to the load mode, and collecting the voltage value of the node where it is located in the load mode to obtain the voltage value of the device module in the load mode;

[0032] The second operation includes: switching the device module without an assigned address in the device module to an idle mode, and collecting the voltage value of the node where it is located in the idle mode to obtain the voltage value of the device module in the idle mode;

[0033] Step S1.1.3: Each device module in the device module that has not been assigned an address obtains the voltage difference ΔV between the voltage value in the no-load mode and the voltage value in the load mode based on its voltage value in the load mode and the voltage value in the no-load mode.

[0034] Step S1.1.4: The device module without an assigned address in the device module obtains the corresponding delay time based on the voltage difference ΔV between the voltage value in the no-load mode and the voltage value in the load mode.

[0035] In the above scheme, the electrical parameters include voltage.

[0036] By adopting the above technical solution, the address allocation method of the two-wire system becomes more reasonable. The voltage difference ΔV between the voltage value of the device module in the no-load mode and the voltage value in the load mode can represent the distance between the device module and the main control module. Generally, the smaller the voltage difference ΔV between the voltage value of the device module in the no-load mode and the voltage value in the load mode, the closer the device module is to the main control module. The above technical solution also makes the acquisition of the delay time of the device module more reasonable.

[0037] Further, in step S1.1.4, the formula for calculating the corresponding delay time based on the voltage difference ΔV between the voltage value in the no-load mode and the voltage value in the load mode is as follows:

[0038] T delay =k×ΔV or T delay =k×ΔV+ random

[0039] In the formula, T delay ΔV is the delay time; k is the coefficient; ΔV is the voltage difference between the voltage value in no-load mode and the voltage value in load mode; random is a random number.

[0040] The coefficient k is configured such that the delay time of the device module without an allocated address in the device module is less than or does not exceed the maximum delay time;

[0041] The device module includes a device control unit for executing control logic, which reads the ADC value at its floating terminal as the random number.

[0042] By adopting the above technical solution, the obtained delay time becomes more reasonable. Generally, if the device modules are located at different nodes on the power line group, the voltage difference ΔV of the device modules will also be different. In this case, T can be used. delay The delay time can be calculated as k × ΔV, or T can be used instead. delay=k×ΔV+ random; If multiple device modules are located at the same node on the power line group, the device modules may have the same voltage difference ΔV. In this case, T can be used. delay =k×ΔV+ random to calculate the delay time, and by superimposing random numbers, the delay times of device modules with the same voltage difference ΔV are staggered;

[0043] Of course, due to factors such as acquisition errors, the voltage difference ΔV obtained by device modules at different node locations may be the same or not significantly different. Therefore, it is preferable to use T. delay The delay time is calculated as k×ΔV + random.

[0044] Furthermore, in the above scheme, the setting of the coefficient k makes the calculation of the delay time more reasonable, ensuring that the delay time is less than or does not exceed the maximum delay time, thus avoiding excessively long delay times that would affect the efficiency of address code allocation; specifically, the maximum delay time is 2 seconds.

[0045] The acquisition of the random number is more reasonable. The voltage on the floating end of the device control unit is not stable and will change due to factors such as thermal noise, flickering noise and external electromagnetic radiation interference, making the random number more random.

[0046] Furthermore, in the first operation, each device module in the device module that has not been assigned an address collects the voltage value of its node in the load mode according to a preset number of collections, and calculates the average value of the collected voltage values, and uses the calculated average value as the voltage value of the device module in the load mode.

[0047] By adopting the above technical solution, since multiple data acquisitions are performed and the average value of the acquired voltage values ​​is calculated to obtain the voltage value of the device module in load mode, transient noise can be effectively eliminated, making the acquisition of the voltage value of the device module in load mode more accurate and reasonable. In addition, in the above technical solution, the average value calculation can be performed by adding multiple voltage values ​​and dividing by the number of additions, or by removing the highest and lowest values ​​and then adding multiple voltage values ​​and dividing by the number of additions, or other existing average value calculation methods.

[0048] Specifically, the preset number of data collections is set to 10.

[0049] Furthermore, in the second operation, each device module in the device module that has not been assigned an address collects the voltage value of its node in the no-load mode according to a preset number of collections, and calculates the average value of the collected voltage values, and uses the calculated average value as the voltage value of the device module in the no-load mode.

[0050] By adopting the above technical solution, since multiple data acquisitions are performed and the average value of the acquired voltage values ​​is calculated to obtain the voltage value of the device module in no-load mode, transient noise can be effectively eliminated, making the acquisition of the voltage value of the device module in no-load mode more accurate and reasonable. In addition, in the above technical solution, the average value calculation can be performed by adding multiple voltage values ​​and dividing by the number of additions, or by removing the highest and lowest values ​​and then adding multiple voltage values ​​and dividing by the number of additions, or other existing average value calculation methods.

[0051] Specifically, the preset number of data collections is set to 10.

[0052] Furthermore, the above technical solution ensures that the voltage value of the device module in no-load mode and the voltage value of the device module in load mode are obtained under essentially the same conditions. This makes the voltage difference ΔV between the voltage value of the device module in no-load mode and the voltage value in load mode more accurate and reasonable, ensuring that the voltage difference can better reflect the location of the node where the device module is located.

[0053] Furthermore, in the first operation, each device module in the device module that has not been assigned an address collects the voltage value of its node in the load mode after its load has stabilized.

[0054] Specifically, after each device module without an assigned address switches to load mode, a preset first time delay indicates that its load is stable.

[0055] By adopting the above technical solution, the first operation is more reasonable. Since the device module only collects data after its load has stabilized, the transient impact after switching can be avoided, ensuring the accuracy and reliability of the data collected by the device module.

[0056] Furthermore, the method of using a delay to indicate that it has entered a stable state is simple, reasonable, and reliable; specifically, the first time is 100ms.

[0057] Furthermore, in the second operation, each device module in the device module that has not been assigned an address collects the voltage value of its node in the no-load mode after its no-load stability.

[0058] Specifically, after each device module without an assigned address switches to idle mode, a preset second time is elapsed to indicate that its load-bearing capacity is stable.

[0059] By adopting the above technical solution, the second operation becomes more reasonable. Since the device module only collects data after it has stabilized under no-load conditions, the transient impact after switching can be avoided, ensuring the accuracy and reliability of the data collected by the device module.

[0060] Furthermore, the method of using a delay to indicate that it has entered a stable state is simple, reasonable, and reliable; specifically, the second time is 100ms.

[0061] Furthermore, the device module connecting its load resistor indicates that the device module is in load mode, and the device module disconnecting its load resistor indicates that the device module is in no-load mode.

[0062] By adopting the above technical solution, the load mode and no-load mode of the device module are made more reasonable.

[0063] Furthermore, in one or more of steps S1.1.3, S1.1.4, and S1.2, the device module is in a power-saving mode, and the power-saving module of the device module includes: turning off the load and / or light source in the device module, and keeping the timer circuit for timing and the monitoring circuit for monitoring the power line group in the device module working.

[0064] By adopting the above technical solution, the address allocation method of the two-wire system becomes more reasonable. In one or more of steps S1.1.3, S1.1.4, and S1.2, the device module is in a power-saving module, where only the timer circuit and the listening circuit remain operational to ensure their necessary functions in these steps. Other functional circuits are turned off, which saves power. Preferably, the device module is in a power-saving module in all three steps of S1.1.3, S1.1.4, and S1.2.

[0065] Further, in step S1, before sending its identification signal, each device module in the device module that has not been assigned an address detects whether the power line group is in an idle state. If the power line group is in an idle state, the device module sends its identification signal through the power line group. If the power line group is in an occupied state, the device module abandons sending its identification signal in this round.

[0066] By adopting the above technical solution, the address allocation method of the two-wire system becomes more reasonable. Before sending the identification signal, the device module will detect whether the power line group is in an idle state to determine whether to send the identification signal. This can avoid interference or even conflict with the signal transmitted in the power line group, ensuring the cleanliness of the signal transmitted in the power line group and guaranteeing the reliability and success rate of signal transmission.

[0067] Furthermore, the method also includes: the main control module determining whether address allocation is complete, whether the total address allocation time exceeds the preset total time, or whether a termination command is manually input.

[0068] By adopting the above technical solution, the address allocation method of the two-wire system becomes more reasonable. The above technical solution can automatically determine whether address allocation needs to be terminated without human intervention, making it more intelligent and automated.

[0069] Of course, users can also intervene manually by entering a termination command to manually end the address allocation.

[0070] Furthermore, if the main control module does not receive any identification signal within the preset maximum waiting time after sending the next round start signal, the main control module determines that the address allocation is complete.

[0071] Alternatively, if the main control module does not receive any identification signal within the preset maximum waiting time after sending the next round start signal, the main control module will send the next round start signal again and perform the above operation according to the preset number of rounds. If the main control module does not receive any identification signal for several consecutive rounds, the main control module will determine that the address allocation is complete.

[0072] By adopting the above technical solution, the main control module's judgment on whether address allocation is complete is more reasonable and reliable;

[0073] Preferably, after the main control module sends the start signal for the next round, if it does not receive any identification signal within a preset maximum waiting time, the main control module sends the start signal for the next round again and performs the above operation according to a preset number of rounds. When the main control module does not receive any identification signal for multiple consecutive rounds, the main control module determines that the address allocation is complete. The above method of determining whether the address allocation is complete is more reasonable and reliable. Since the device module may abandon sending the identification signal in this round because the power line group is occupied, the above operation is performed in multiple rounds so that the device module can continue to send the identification signal in the next round if it abandons the current round because the power line group is occupied. The above method can avoid the situation where the device module is not allocated an address code because the power line group is occupied as much as possible.

[0074] Furthermore, the main control module sends signals to the device module through the power line group and using power line carrier communication, and / or square wave signal modulation, and / or on / off control.

[0075] The device module sends signals to the device module through the power line group and using power line carrier communication and / or square wave signal modulation.

[0076] By adopting the above technical solution, the communication between the main control module and the device module becomes more reasonable;

[0077] Power line carrier communication can be understood as: modulating the signal to be transmitted onto a high-frequency carrier and transmitting it via the power line group;

[0078] Square wave signal modulation can be understood as: encoding and transmitting signals by changing the waveform of the voltage or current on the power line group, for example, generating a square wave pulse sequence with a specific frequency or duty cycle;

[0079] The on / off control method can be understood as follows: by performing on and off operations on the power supply circuit of the power line group according to a preset timing and number of times, a specific on / off mode is formed to encode and transmit signals;

[0080] Of course, if the main control module has a certain signal transmission capability, then it has a corresponding signal transmission function circuit, and the device module has a corresponding signal analysis function circuit; if the device module has a certain signal transmission capability, then it has a corresponding signal transmission function circuit, and the main control module has a corresponding signal analysis function circuit; for example, if the main control module has power line carrier communication capability, then the main control module has a signal coupling circuit, and the device module has a carrier signal demodulation circuit, and so on.

[0081] Furthermore, the unique identifier of the device module itself includes its own UID. Specifically, the device module includes a device control unit for executing control logic, and the UID of the device module is the UID of the device control unit; the device control unit adopts a control chip.

[0082] By adopting the above technical solution, the unique identifier of the device module itself becomes more reasonable. The UID can be understood as follows: each device control unit is assigned a unique serial number by the manufacturer during its production and manufacturing. This serial number is generally globally unique, similar to the "ID number" or "fingerprint" of the device control unit. Moreover, the UID cannot be changed during the life cycle of the device control unit, thus ensuring that each device module has an unchangeable unique identity.

[0083] Furthermore, the device module has a component capable of emitting light. In step S3, the device module whose identifier in the address code signal matches its own identifier emits light of a preset color.

[0084] By adopting the above technical solution, the address allocation method of the two-wire system becomes more reasonable. Since the device module whose identifier matches its own identifier in the address code signal emits light of a preset color, that is, the device module emits light of a preset color after being assigned an address code, the user can intuitively observe whether the device module has been assigned an address, which makes it easier for the user to understand the progress of address allocation.

[0085] Specifically, the default color is green, which is more intuitive for users.

[0086] Furthermore, in steps S3 and S4, the confirmation signal includes a confirmation code, which includes at least one of the device module's own identifier that matches the identifier in the address code signal and a preset ACK.

[0087] By adopting the above technical solution, the confirmation signal becomes more reasonable; preferably, the confirmation code needs to be short.

[0088] Furthermore, in steps S4 and S5, the main control module adopts an on / off control method to connect and disconnect the power supply circuit of the power line group according to a preset next round signal frequency and next round signal count, so as to send the next round signal to the device module.

[0089] By adopting the above technical solution, the setting of the next round signal is more reasonable, and the next round signal should be clearly distinguishable from other signals to avoid misjudgment;

[0090] Specifically, the next round of signals is delivered once every 50ms, and the number of times the next round of signals is delivered is 5.

[0091] A control method for a two-wire system, the two-wire system including a main control module and at least one device module, the main control module being provided with a power line group for outputting electrical energy, the power line group including a first power line and a second power line, the device module being connected in parallel between the first power line and the second power line;

[0092] The method includes: an address allocation mode and a normal working mode;

[0093] When it enters the address allocation mode, it adopts the address allocation method of the two-wire system described above;

[0094] When it enters normal operating mode, the main control module responds to user operation and / or internal control program to generate a control signal including target address and control instruction, and sends it to the device module through the power line group; after receiving the control signal, the device module compares the target address in the control signal with its own address code. If the comparison matches, the control instruction in the control signal is executed.

[0095] By adopting the above technical solution, the control method of the two-wire system is made more reasonable. Since its address allocation mode adopts the address allocation method of the two-wire system, it is possible to allocate address codes to each device module in the two-wire system, making address code allocation more convenient and faster; and it enables complex control of each device module in the two-wire system, thereby realizing complex functions; the above technical solution is flexible in use.

[0096] A two-wire lamp system includes a main control module and at least one lamp module. The main control module is equipped with a power line group for outputting electrical energy. The power line group includes a first power line and a second power line. The lamp module is connected in parallel between the first power line and the second power line. The two-wire lamp system adopts the address allocation method of the two-wire system described above, and the lamp module is a device module in the address allocation method of the two-wire system; or it adopts the control method of the two-wire system described above, and the lamp module is a device module in the control method of the two-wire system.

[0097] By adopting the above technical solution, the two-wire lamp body system becomes more reasonable. Because it employs a two-wire system address allocation method or a two-wire system control method, the two-wire lamp body system can allocate address codes to each lamp module under a two-wire system, making address code allocation more convenient and faster. This allows the two-wire lamp body system to achieve complex functional effects such as flowing lines and chasing patterns. Furthermore, the above technical solution makes the cost of the two-wire lamp body system lower and easier to use.

[0098] Compared with the prior art, the present invention has the following beneficial effects:

[0099] (1) The address allocation method of the two-wire system of the present invention can effectively solve the automatic allocation of address codes in the two-wire system without manual intervention, greatly improving production efficiency and ease of use, and is more flexible.

[0100] (2) In the address allocation method of the two-wire system of the present invention, the address code obtained by the device module corresponds to its physical address, which facilitates subsequent control.

[0101] (3) The address allocation method, control method and two-wire lamp body system of the present invention are reasonably designed; compared with the original scheme using the serial 512 protocol, it can reduce the number of wires required from 3 to 2, which can reduce costs and has a simple structure. Attached Figure Description

[0102] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0103] Figure 1 This is a schematic diagram of the structure of the two-wire system or two-wire lamp body system in this invention;

[0104] Figure 2 This is a flowchart illustrating the address allocation method for a two-wire system in this invention.

[0105] Figure 3 This is a flowchart illustrating step S1 of the address allocation method for a two-wire system in this invention.

[0106] Figure 4 This is a flowchart illustrating step S1.1 of the address allocation method for a two-wire system in this invention.

[0107] The component names corresponding to the various labels in the figure are: 1. Main control module; 2. Equipment module; 3. Power cord group; 301. First power cord; 302. Second power cord; 4. Lamp body module. Detailed Implementation

[0108] The present application will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0109] The following specific examples illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. This application can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application. It should be noted that, in the absence of conflict, the following embodiments and features in the embodiments can be combined with each other. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0110] It should be noted that various aspects of embodiments within the scope of the appended claims are described below. It will be apparent that the aspects described herein can be embodied in a wide variety of forms, and any particular structure and / or function described herein is merely illustrative. Based on this application, those skilled in the art will understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number and aspects set forth herein can be used to implement the device and / or practice the method. Additionally, this device and / or method can be implemented using structures and / or functionalities other than one or more of the aspects set forth herein.

[0111] It should also be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of this application. The drawings only show the components related to this application and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0112] Additionally, specific details are provided in the following description to facilitate a thorough understanding of the examples. However, those skilled in the art will understand that practice can be carried out without these specific details.

[0113] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0114] The technical solutions provided by the various embodiments of this application are described below with reference to the accompanying drawings.

[0115] See Figures 1 to 4 The present invention provides an address allocation method for a two-wire system. The two-wire system includes a main control module 1 and at least one device module 2. The main control module 1 is provided with a power line group 3 for outputting electrical energy. The power line group 3 includes a first power line 301 and a second power line 302. The device module 2 is connected in parallel between the first power line 301 and the second power line 302.

[0116] The method includes the following steps:

[0117] Step S1: The device module 2 that has not been assigned an address sends an identification signal including its own unique identifier to the main control module 1 through the power line group 3;

[0118] Step S2: After receiving the first independent identification signal in this round, the main control module 1 sends an address code signal to the device module 2 through the power line group 3. The address code signal includes the identifier in the first independent identification signal received in this round and a unique address code.

[0119] Step S3: The device module 2 receives the address code signal through the power line group 3, and compares the identifier in the received address code signal with its own identifier. If the comparison is consistent, the address code in the address code signal is saved, and an acknowledgment signal is sent to the main control module 1 through the power line group 3.

[0120] Step S4: After receiving the confirmation signal through the power line group 3, the main control module 1 sends the next round start signal to the device module 2 through the power line group 3.

[0121] Step S5: After receiving the next round start signal through the power line group 3, the device module 2 executes steps S1 to S4.

[0122] Typically, the first power line 301 and the second power line 302 are the positive power line and the negative power line, respectively.

[0123] The unique identifier of the device module 2 can be understood as follows: at least among the device modules 2 that have not been assigned an address in this round, the identifier of any one of the device modules 2 is different from the identifier of the other device modules 2.

[0124] The fact that the main control module 1 receives an independent identification signal in this round can be understood as: the main control module 1 receives only one identification signal at the same time, which is an independent identification signal; the fact that the main control module 1 receives the first independent identification signal in this round can be understood as: the main control module 1 receives only one identification signal for the first time in this round, and if multiple are received at the same time, they are not considered as independent identification signals.

[0125] By adopting the above technical solution, the address allocation method of the two-wire system is made more reasonable. In the method, the device module 2 can automatically report its own existence to the main control module 1, so that the main control module 1 can send the address code to the device module 2.

[0126] The above solution can effectively solve the automatic allocation of address codes in a two-wire system without manual intervention, which greatly improves production efficiency and ease of use; and it has high communication reliability, can avoid signal collisions, and improves the addressing success rate.

[0127] Typically, after receiving an acknowledgment signal, the main control module 1 increments the address code counter by 1 to ensure the uniqueness of the address code.

[0128] Further, step S1 includes:

[0129] Step S1.1: The device module 2 without an assigned address in the device module 2 determines the corresponding delay time based on the electrical parameters of its own node;

[0130] Step S1.2: After delaying its corresponding delay time, the device module 2 without an assigned address sends an identification signal including its own unique identifier to the main control module 1 through the power line group 3.

[0131] Using the above technical solution, the electrical parameters of each node of the power line group 3 are different, so the delay time determined based on the electrical parameters of the nodes is also different. That is, the time node when each device module 2 sends the identification signal to the main control module 1 through the power line group 3 is also different, thereby greatly reducing or avoiding the simultaneous arrival of identification signals sent by multiple device modules 2 to the main control module 1, and ensuring the stable and reliable operation of the address allocation method of the two-wire system.

[0132] The above solution links the physical location of device module 2 to the delay time, which in turn is linked to the address code. This more rational approach, whereby the physical location of device module 2 is directly linked to the address code, facilitates subsequent control of each device module 2 by the main control module 1.

[0133] Furthermore, the electrical parameters include at least one of voltage, current, and phase.

[0134] By adopting the above technical solution, the address allocation method of the two-wire system becomes more reasonable, and the operation becomes more stable and reliable; preferably, the electrical parameters include voltage.

[0135] Further, step S1.1 includes:

[0136] Step S1.1.1: The controller outputs a preset voltage value to the device module 2 through the power line group 3. Specifically, the preset voltage value is 12V.

[0137] Step S1.1.2: Perform the first operation and the second operation, wherein the execution order of the first operation and the second operation is not limited;

[0138] The first operation includes: switching the unassigned address device module 2 in the device module 2 to the load mode, and collecting the voltage value of the node where it is located in the load mode to obtain the voltage value of the device module 2 in the load mode;

[0139] The second operation includes: switching the unassigned address device module 2 in the device module 2 to an idle mode, and collecting the voltage value of its node in the idle mode to obtain the voltage value of the device module 2 in the idle mode;

[0140] Step S1.1.3: Each device module 2 in the device module 2 that has not been assigned an address obtains the voltage difference ΔV between the voltage value in the no-load mode and the voltage value in the load mode based on its voltage value in the load mode and the voltage value in the no-load mode.

[0141] Step S1.1.4: The device module 2 without an assigned address in the device module 2 obtains the corresponding delay time based on the voltage difference ΔV between the voltage value in the no-load mode and the voltage value in the load mode.

[0142] In the above scheme, the electrical parameters include voltage.

[0143] By adopting the above technical solution, the address allocation method of the two-wire system becomes more reasonable. The voltage difference ΔV between the voltage value of device module 2 in the no-load mode and the voltage value in the load mode can represent the distance between device module 2 and the main control module 1. Generally, the smaller the voltage difference ΔV between the voltage value of device module 2 in the no-load mode and the voltage value in the load mode, the closer the device module 2 is to the main control module 1. The above technical solution makes the acquisition of the delay time of device module 2 more reasonable.

[0144] Further, in step S1.1.4, the formula for calculating the corresponding delay time based on the voltage difference ΔV between the voltage value in the no-load mode and the voltage value in the load mode is as follows:

[0145] T delay =k×ΔV or T delay =k×ΔV+ random

[0146] In the formula, T delay ΔV is the delay time; k is the coefficient; ΔV is the voltage difference between the voltage value in no-load mode and the voltage value in load mode; random is a random number.

[0147] The coefficient k is configured such that the delay time of the unallocated address device module 2 in the device module 2 is less than or does not exceed the maximum delay time;

[0148] The device module 2 includes a device control unit for executing control logic, which reads the ADC value at its floating terminal as the random number random.

[0149] By adopting the above technical solution, the obtained delay time is more reasonable. Generally, if the device modules 2 are all located at different node positions on the power line group 3, the voltage difference ΔV of the device modules 2 will also be different. In this case, T can be used. delay The delay time can be calculated as k × ΔV, or T can be used instead. delay =k×ΔV+ random; If multiple device modules 2 are located at the same node position on the power line group 3, then the device modules 2 may have the same voltage difference ΔV. In this case, T can be used. delay =k×ΔV+ random to calculate the delay time, and by superimposing random numbers, the delay times of device modules 2 with the same voltage difference ΔV are staggered;

[0150] Of course, due to factors such as acquisition errors, the voltage difference ΔV obtained by device modules 2 at different node locations may be the same or not significantly different. Therefore, it is preferable to use T. delay The delay time is calculated as k×ΔV + random.

[0151] Furthermore, in the above scheme, the setting of the coefficient k makes the calculation of the delay time more reasonable, ensuring that the delay time is less than or does not exceed the maximum delay time, thus avoiding excessively long delay times that would affect the efficiency of address code allocation; specifically, the maximum delay time is 2 seconds.

[0152] The acquisition of the random number is more reasonable. The voltage on the floating end of the device control unit is not stable and will change due to factors such as thermal noise, flickering noise and external electromagnetic radiation interference, making the random number more random.

[0153] Furthermore, in the first operation, each device module 2 without an assigned address in the device module 2 collects the voltage value of its node in the load mode according to a preset number of collections, and calculates the average value of the collected multiple voltage values, and uses the calculated average value as the voltage value of the device module 2 in the load mode.

[0154] By adopting the above technical solution, since multiple data acquisitions are performed and the average value of the acquired voltage values ​​is calculated to obtain the voltage value of the device module 2 in the load mode, transient noise can be effectively eliminated, making the acquisition of the voltage value of the device module 2 in the load mode more accurate and reasonable. In addition, in the above technical solution, the average value calculation can be performed by adding multiple voltage values ​​and dividing by the number of additions, or by removing the highest and lowest values ​​and then adding multiple voltage values ​​and dividing by the number of additions, or other existing average value calculation methods.

[0155] Specifically, the preset number of data collections is set to 10.

[0156] Furthermore, in the second operation, each device module 2 without an assigned address collects the voltage value of its node in no-load mode according to a preset number of collections, and calculates the average value of the collected voltage values, and uses the calculated average value as the voltage value of the device module 2 in no-load mode.

[0157] By adopting the above technical solution, since multiple data acquisitions are performed and the average value of the acquired voltage values ​​is calculated to obtain the voltage value of the device module 2 in the no-load mode, transient noise can be effectively eliminated, making the acquisition of the voltage value of the device module 2 in the no-load mode more accurate and reasonable. In addition, in the above technical solution, the average value calculation can be performed by adding multiple voltage values ​​and dividing by the number of additions, or by removing the highest and lowest values ​​and then adding multiple voltage values ​​and dividing by the number of additions, or other existing average value calculation methods.

[0158] Specifically, the preset number of data collections is set to 10.

[0159] Furthermore, the above technical solution ensures that the voltage value of the device module 2 in the no-load mode and the voltage value of the device module 2 in the load mode are obtained under essentially the same conditions. This makes the voltage difference ΔV between the voltage value of the device module 2 in the no-load mode and the voltage value in the load mode more accurate and reasonable, ensuring that the voltage difference can better reflect the location of the node where the device module 2 is located.

[0160] Furthermore, in the first operation, each device module 2 without an assigned address in the device module 2 collects the voltage value of its node in the load mode after its load is stabilized.

[0161] Specifically, after each device module 2 without an assigned address switches to load mode, a preset first time delay indicates that its load is stable.

[0162] The above technical solution makes the first operation more reasonable. Since the device module 2 only collects data after its load has stabilized, it can avoid the transient impact after switching and ensure the accuracy and reliability of the data collected by the device module 2.

[0163] Furthermore, the method of using a delay to indicate that it has entered a stable state is simple, reasonable, and reliable; specifically, the first time is 100ms.

[0164] Furthermore, in the second operation, each device module 2 without an assigned address in the device module 2 collects the voltage value of its node in the no-load mode after its no-load stability.

[0165] Specifically, after each device module 2 without an assigned address switches to the idle mode, a preset second time is elapsed to indicate that its load-bearing capacity is stable.

[0166] By adopting the above technical solution, the second operation is made more reasonable. Since the device module 2 only collects data after it has stabilized under no-load conditions, the transient impact after switching can be avoided, ensuring the accuracy and reliability of the data collected by the device module 2.

[0167] Furthermore, the method of using a delay to indicate that it has entered a stable state is simple, reasonable, and reliable; specifically, the second time is 100ms.

[0168] Furthermore, when the device module 2 connects its load resistor to the operating state, it indicates that the device module 2 is in a load mode; when the device module 2 disconnects its load resistor, it indicates that the device module 2 is in an unloaded state.

[0169] By adopting the above technical solution, the load mode and no-load mode of the device module 2 are made more reasonable.

[0170] Furthermore, in one or more of steps S1.1.3, S1.1.4, and S1.2, the device module 2 is in a power-saving mode, and the power-saving module of the device module 2 includes: turning off the load and / or light source in the device module 2, and keeping the timer circuit for timing and the monitoring circuit for monitoring the power line group 3 in the device module 2 working.

[0171] By adopting the above technical solution, the address allocation method of the two-wire system becomes more reasonable. In one or more of steps S1.1.3, S1.1.4, and S1.2, the device module 2 is in a power-saving module, where only the timer circuit and the listening circuit remain operational to ensure its necessary functions in these steps. Other functional circuits are turned off, which saves power. Preferably, in steps S1.1.3, S1.1.4, and S1.2, the device module 2 is in a power-saving module.

[0172] Further, in step S1, before sending its identification signal, each device module 2 that has not been assigned an address in the device module 2 checks whether the power line group 3 is in an idle state. If the power line group 3 is in an idle state, the device module 2 sends its identification signal through the power line group 3. If the power line group 3 is in an occupied state, the device module 2 abandons sending its identification signal in this round.

[0173] By adopting the above technical solution, the address allocation method of the two-wire system is more reasonable. Before sending the identification signal, the device module 2 will detect whether the power line group 3 is in an idle state to determine whether to send the identification signal. This can avoid interference or even conflict with the signal transmitted in the power line group 3, ensuring the cleanliness of the signal transmitted in the power line group 3, and ensuring the reliability and success rate of signal transmission.

[0174] Furthermore, the method also includes: the main control module 1 determining whether address allocation is complete, whether the total address allocation time exceeds the preset total time, or whether a manual end command is input.

[0175] By adopting the above technical solution, the address allocation method of the two-wire system becomes more reasonable. The above technical solution can automatically determine whether address allocation needs to be terminated without human intervention, making it more intelligent and automated.

[0176] Of course, users can also intervene manually by entering a termination command to manually end the address allocation.

[0177] Furthermore, if the main control module 1 does not receive any identification signal within the preset maximum waiting time after sending the next round start signal, then the main control module 1 determines that the address allocation is complete.

[0178] Alternatively, if the main control module 1 does not receive any identification signal within the preset maximum waiting time after sending the next round start signal, the main control module 1 will send the next round start signal again and perform the above operation according to the preset number of rounds. If the main control module 1 does not receive any identification signal for several consecutive rounds, the main control module 1 will determine that the address allocation is complete.

[0179] By adopting the above technical solution, the main control module 1's judgment on whether address allocation is complete is more reasonable and reliable;

[0180] Preferably, after the main control module 1 sends the start signal for the next round, if it does not receive any identification signal within the preset maximum waiting time, the main control module 1 sends the start signal for the next round again and performs the above operation according to the preset number of rounds. When the main control module 1 does not receive any identification signal for multiple consecutive rounds, the main control module 1 determines that the address allocation is complete. The above method of determining whether the address allocation is complete is more reasonable and reliable. Since the device module 2 may give up sending the identification signal in this round because the power line group 3 is in an occupied state, the above operation is performed in multiple rounds so that the device module 2 can continue to send the identification signal in the next round if it gives up in this round because the power line group 3 is in an occupied state. The above method can avoid the situation where the device module 2 is not allocated an address code because the power line group 3 is in an occupied state as much as possible.

[0181] Furthermore, the main control module 1 sends signals to the device module 2 through the power line group 3 and using power line carrier communication, and / or square wave signal modulation, and / or on / off control.

[0182] The device module 2 sends signals to the device module 2 through the power line group 3 and using power line carrier communication and / or square wave signal modulation.

[0183] By adopting the above technical solution, the communication between the main control module 1 and the device module 2 becomes more reasonable;

[0184] Power line carrier communication can be understood as: modulating the signal to be transmitted onto a high-frequency carrier and transmitting it via the power line group 3;

[0185] The square wave signal modulation method can be understood as: encoding and transmitting signals by changing the waveform of the voltage or current on the power line group 3, for example, generating a square wave pulse sequence with a specific frequency or duty cycle;

[0186] The on / off control method can be understood as follows: by performing on and off operations on the power supply circuit of the power line group 3 according to a preset timing and number of times, a specific on / off mode is formed to encode and transmit signals;

[0187] Of course, if the main control module 1 has a certain signal transmission capability, then it has a corresponding signal transmission function circuit, and the device module 2 has a corresponding signal analysis function circuit; if the device module 2 has a certain signal transmission capability, then it has a corresponding signal transmission function circuit, and the main control module 1 has a corresponding signal analysis function circuit; for example, if the main control module 1 has power line carrier communication capability, then the main control module 1 has a signal coupling circuit, and the device module 2 has a carrier signal demodulation circuit, and so on.

[0188] Furthermore, the unique identifier of the device module 2 includes its own UID. Specifically, the device module 2 includes a device control unit for executing control logic, and the UID of the device module 2 is the UID of the device control unit; the device control unit uses a control chip.

[0189] By adopting the above technical solution, the unique identifier of the device module 2 is made more reasonable. The UID can be understood as: each device control unit is assigned a unique serial number by the manufacturer during its production and manufacturing. This serial number is generally globally unique, similar to the "ID number" or "fingerprint" of the device control unit. Moreover, the UID cannot be changed during the life cycle of the device control unit, thus ensuring that each device module 2 has an unchangeable unique identity.

[0190] Furthermore, the device module 2 has a component capable of emitting light. In step S3, the device module 2, whose identifier in the address code signal matches its own identifier, emits light of a preset color.

[0191] By adopting the above technical solution, the address allocation method of the two-wire system becomes more reasonable. Since the device module 2 whose identifier matches its own identifier in the address code signal emits light of a preset color, that is, the device module 2 emits light of a preset color after being assigned an address code, the user can intuitively observe whether the device module 2 has been assigned an address, which makes it easier for the user to understand the progress of address allocation.

[0192] Specifically, the default color is green, which is more intuitive for users.

[0193] Furthermore, in steps S3 and S4, the confirmation signal includes a confirmation code, which includes at least one of the device module 2's own identifier that matches the identifier in the address code signal and a preset ACK.

[0194] By adopting the above technical solution, the confirmation signal becomes more reasonable; preferably, the confirmation code needs to be short.

[0195] Furthermore, in steps S4 and S5, the main control module 1 adopts an on / off control method to connect and disconnect the power supply circuit of the power line group 3 according to the preset next round signal frequency and the next round signal number, so as to send the next round signal to the device module 2.

[0196] By adopting the above technical solution, the setting of the next round signal is more reasonable, and the next round signal should be clearly distinguishable from other signals to avoid misjudgment;

[0197] Specifically, the next round of signals is delivered once every 50ms, and the number of times the next round of signals is delivered is 5.

[0198] See Figures 1 to 4 A control method for a two-wire system, the two-wire system including a main control module 1 and at least one device module 2, the main control module 1 being provided with a power line group 3 for outputting electrical energy, the power line group 3 including a first power line 301 and a second power line 302, the device module 2 being connected in parallel between the first power line 301 and the second power line 302.

[0199] The method includes: an address allocation mode and a normal working mode;

[0200] When it enters the address allocation mode, it adopts the address allocation method of the two-wire system described above;

[0201] When it enters normal operating mode, the main control module 1 responds to user operation and / or internal control program to generate a control signal including target address and control instruction, and sends it to the device module 2 through the power line group 3; after receiving the control signal, the device module 2 compares the target address in the control signal with its own address code. If the comparison is consistent, the control instruction in the control signal is executed.

[0202] By adopting the above technical solution, the control method of the two-wire system is made more reasonable. Since its address allocation mode adopts the address allocation method of the two-wire system, it is possible to allocate address codes to each of the device modules 2 in the two-wire system, making address code allocation more convenient and faster; and it enables complex control of each of the device modules 2 in the two-wire system, thereby realizing complex functions; the above technical solution is flexible in use.

[0203] See Figures 1 to 4A two-wire lamp system includes a main control module 1 and at least one lamp module 4. The main control module 1 is provided with a power line group 3 for outputting electrical energy. The power line group 3 includes a first power line 301 and a second power line 302. The lamp module 4 is connected in parallel between the first power line 301 and the second power line 302. The two-wire lamp system adopts the address allocation method of the above-mentioned two-wire system, and the lamp module 4 is the device module 2 in the address allocation method of the two-wire system; or adopts the control method of the above-mentioned two-wire system, and the lamp module 4 is the device module 2 in the control method of the two-wire system.

[0204] By adopting the above technical solution, the two-wire lamp body system becomes more reasonable. Because it employs a two-wire system address allocation method or a two-wire system control method, the two-wire lamp body system can allocate address codes to each of the lamp body modules 4 under a two-wire system, making address code allocation more convenient and faster. This allows the two-wire lamp body system to achieve complex functional effects such as flowing lines and chasing patterns. Furthermore, the above technical solution makes the cost of the two-wire lamp body system lower and easier to use.

[0205] The same or similar parts between the various embodiments in this specification can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments.

[0206] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be defined by the scope of the claims.

Claims

1. An address allocation method for a two-wire system, characterized in that: The two-wire system includes a main control module (1) and at least one device module (2). The main control module (1) is provided with a power line group (3) for outputting electrical energy. The power line group (3) includes a first power line (301) and a second power line (302). The device module (2) is connected in parallel between the first power line (301) and the second power line (302). The method includes the following steps: Step S1: The device module (2) without an assigned address sends an identification signal including its own unique identifier to the main control module (1) through the power line group (3); Step S2: After receiving the first independent identification signal in this round, the main control module (1) sends an address code signal to the device module (2) through the power line group (3). The address code signal includes the identifier in the first independent identification signal received in this round and a unique address code. Step S3: The device module (2) receives the address code signal through the power line group (3) and compares the identifier in the received address code signal with its own identifier. If the comparison is consistent, the address code in the address code signal is saved and a confirmation signal is sent to the main control module (1) through the power line group (3). Step S4: After receiving the confirmation signal through the power line group (3), the main control module (1) sends the next round start signal to the device module (2) through the power line group (3); Step S5: After receiving the next round start signal through the power line group (3), the device module (2) executes steps S1 to S4.

2. The address allocation method for a two-wire system according to claim 1, characterized in that: Step S1 includes: Step S1.1: The device module (2) without an assigned address in the device module (2) determines the corresponding delay time based on the electrical parameters of its own node; Step S1.2: After delaying its corresponding delay time, the device module (2) that has not been assigned an address sends an identification signal including its own unique identifier to the main control module (1) through the power line group (3).

3. The address allocation method for a two-wire system according to claim 2, characterized in that: The electrical parameters include at least one of voltage, current, and phase; Step S1.1 includes: Step S1.1.1: The controller outputs a preset voltage value to the device module (2) through the power line group (3); Step S1.1.2: Perform the first operation and the second operation, wherein the execution order of the first operation and the second operation is not limited; The first operation includes: the device module (2) without an assigned address in the device module (2) switches to load mode and collects the voltage value of the node where it is located in load mode to obtain the voltage value of the device module (2) in load mode; The second operation includes: the device module (2) in the device module (2) that has not been assigned an address is switched to an idle mode, and the voltage value of the node where it is located is collected in the idle mode to obtain the voltage value of the device module (2) in the idle mode; Step S1.1.3: Each device module (2) without an assigned address obtains the voltage difference ΔV between the voltage value in the no-load mode and the voltage value in the load mode based on its voltage value in the load mode and the voltage value in the no-load mode. Step S1.1.4: The device module (2) without an assigned address obtains the corresponding delay time based on the voltage difference ΔV between the voltage value in the no-load mode and the voltage value in the load mode.

4. The address allocation method for a two-wire system according to claim 3, characterized in that: In step S1.1.4, the formula for calculating the corresponding delay time based on the voltage difference ΔV between the voltage value in no-load mode and the voltage value in load mode is as follows: T delay =k×ΔV or T delay =k×ΔV+ random In the formula, T delay ΔV is the delay time; k is the coefficient; ΔV is the voltage difference between the voltage value in no-load mode and the voltage value in load mode; random is a random number. The coefficient k is configured such that the delay time of the device module (2) without an allocated address in the device module (2) is less than or does not exceed the maximum delay time; The device module (2) includes a device control unit for performing control logic, which reads the ADC value at its floating end as the random number random.

5. The address allocation method for a two-wire system according to claim 3, characterized in that: In the first operation, each device module (2) without an assigned address collects the voltage value of its node in load mode according to a preset number of collections, and calculates the average value of the collected voltage values, and uses the calculated average value as the voltage value of the device module (2) in load mode. In the second operation, each device module (2) without an assigned address collects the voltage value of its node in no-load mode according to a preset number of collections, and calculates the average value of the collected voltage values, and uses the calculated average value as the voltage value of the device module (2) in no-load mode. In the first operation, each device module (2) without an assigned address in the device module (2) collects the voltage value of its node in the load mode after its load is stabilized; After each device module (2) without an assigned address switches to load mode, a preset first time delay indicates that its load is stable. In the second operation, each device module (2) without an assigned address in the device module (2) collects the voltage value of its node in the no-load mode after its no-load stability; After each device module (2) without an assigned address switches to the no-load mode, a preset second time delay indicates that its load-bearing stability is achieved. The device module (2) is in load mode when its load resistor is connected to the working state, and it is in no-load mode when its load resistor is disconnected. In one or more of steps S1.1.3, S1.1.4, and S1.2, the device module (2) is in a power-saving mode. The power-saving module of the device module (2) includes: turning off the load and / or light source in the device module (2), and keeping the timer circuit for timing and the monitoring circuit for monitoring the power line group (3) in the device module (2) working.

6. The address allocation method for a two-wire system according to claim 1, characterized in that: In step S1, before sending its identification signal, each device module (2) without an assigned address in the device module (2) detects whether the power line group (3) is in an idle state. If the power line group (3) is in an idle state, the device module (2) sends its identification signal through the power line group (3). If the power line group (3) is in an occupied state, the device module (2) abandons sending its identification signal in this round.

7. The address allocation method for a two-wire system according to any one of claims 1 to 6, characterized in that: The method further includes: the main control module (1) determines whether the address allocation is completed, or whether the total address allocation time exceeds the preset total time, or whether a manual end command is input. If so, the address allocation is terminated. If the main control module (1) does not receive any identification signal within the preset maximum waiting time after sending the next round start signal, then the main control module (1) determines that the address allocation is complete. Alternatively, if the main control module (1) does not receive any identification signal within the preset maximum waiting time after sending the next round start signal, the main control module (1) will send the next round start signal again and perform the above operation according to the preset number of rounds. When the main control module (1) does not receive any identification signal for several consecutive rounds, the main control module (1) will determine that the address allocation is complete.

8. The address allocation method for a two-wire system according to any one of claims 1 to 6, characterized in that: The main control module (1) sends signals to the device module (2) through the power line group (3) and using power line carrier communication, and / or square wave signal modulation, and / or on / off control. The device module (2) sends signals to the device module (2) through the power line group (3) and using power line carrier communication and / or square wave signal modulation. The unique identifier of the device module (2) includes its own UID; The device module (2) has a component that can emit light. In step S3, the device module (2) whose identifier in the address code signal matches its own identifier emits light of a preset color. In steps S3 and S4, the confirmation signal includes a confirmation code, which includes at least one of the device module (2) whose identifier matches its own identifier in the address code signal and a preset ACK. In steps S4 and S5, the main control module (1) adopts an on / off control method to connect and disconnect the power supply circuit of the power line group (3) according to the preset next round signal frequency and the next round signal number, so as to send the next round signal to the device module (2).

9. A control method for a two-wire system, characterized in that: The two-wire system includes a main control module (1) and at least one device module (2). The main control module (1) is provided with a power line group (3) for outputting electrical energy. The power line group (3) includes a first power line (301) and a second power line (302). The device module (2) is connected in parallel between the first power line (301) and the second power line (302). The method includes: an address allocation mode and a normal working mode; When it enters the address allocation mode, it adopts the address allocation method of the two-wire system as described in any one of claims 1 to 8; When it enters normal working mode, the main control module (1) responds to user operation and / or internal control program to generate a control signal including target address and control instruction, and sends it to the device module (2) through the power line group (3); after receiving the control signal, the device module (2) compares the target address in the control signal with its own address code. If the comparison is consistent, the control instruction in the control signal is executed.

10. A two-wire lamp body system, comprising a main control module (1) and at least one lamp body module (4), wherein the main control module (1) is provided with a power line group (3) for outputting electrical energy, the power line group (3) comprising a first power line (301) and a second power line (302), and the lamp body module (4) is connected in parallel between the first power line (301) and the second power line (302); the two-wire lamp body system adopts the address allocation method of the two-wire system according to any one of claims 1 to 8, wherein the lamp body module (4) is the device module (2) in the address allocation method of the two-wire system; or adopts the control method of the two-wire system according to claim 9, wherein the lamp body module (4) is the device module (2) in the control method of the two-wire system.

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