A multi-station product parallel test method and system based on multi-single-chip machine linkage
By linking multiple microcontrollers and communicating via a high-speed bus, the system achieves synchronization and collaboration between workstations in a multi-station testing system, solving the problems of test consistency and abnormal response in existing technologies, and improving test efficiency and quality.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHENZHEN ZHONGRUAN XINDA ELECTRONICS
- Filing Date
- 2026-04-23
- Publication Date
- 2026-05-29
AI Technical Summary
In existing multi-station parallel testing systems, each station is highly isolated in terms of mechanical action, test timing, and anomaly handling, lacking real-time hardware-level linkage and low-level communication coordination, resulting in missed tests, invalid tests, wasted throughput, and test result deviations.
By linking multiple microcontrollers, using carrier board linkage positioning, high-speed bus communication, and real-time system status tables, synchronous and collaborative testing between workstations is achieved. This includes synchronous triggering commands, real-time status information sharing, and collaborative error prevention mechanisms to ensure test consistency and abnormal response.
Significantly reduces the risk of missed and incorrect tests, improves single-cycle throughput, shortens idle waiting time, enhances test repeatability and yield, and enables real-time synchronization and collaborative decision-making for multi-station testing.
Smart Images

Figure CN122109691A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of testing technology, and in particular to a method and system for parallel testing of multi-station products based on the linkage of multiple microcontrollers. Background Technology
[0002] Multi-station parallel testing systems have become standard equipment for production line testing and control. Typical applications include: functional circuit board testing in mass production, interface and communication verification of modular machines, multi-point performance screening of battery packs / motors, and barcode recognition and factory inspection on the production line. In these scenarios, to balance production capacity and traceability, carrier boards / fixtures are often used to carry multiple test items, and dedicated testing devices are arranged at each station to achieve parallel testing and batch tracking of a large number of products.
[0003] Current technologies typically involve placing multiple products simultaneously on a carrier board and fixture, with each corresponding microcontroller independently performing data acquisition and testing. A host computer is responsible for issuing unified trigger commands and aggregating the data. While this approach achieves parallelism in form, it has significant shortcomings in terms of "inter-station collaboration": each station is highly isolated in terms of mechanical actions, test timing, and anomaly handling, lacking real-time hardware-level linkage and underlying communication coordination. The consequences are as follows: if a station experiences a scanning failure or functional malfunction, other stations typically cannot immediately detect and coordinate a pause or adjustment, resulting in missed or invalid tests; waiting and idle time between stations leads to wasted throughput; and inconsistent crimping / clamping forces and positioning at different stations result in test result deviations and decreased reliability.
[0004] Therefore, from the perspective of improving detection consistency, abnormal response and overall capacity, existing technologies still have key issues that need to be addressed in achieving true workstation collaboration and linkage. Summary of the Invention
[0005] The purpose of this invention is to provide a multi-station product parallel testing method based on the linkage of multiple microcontrollers, thereby solving the above-mentioned technical problems.
[0006] To achieve this objective, the present invention adopts the following technical solution: A method for parallel testing of multi-station products based on the linkage of multiple microcontrollers includes the following steps: The carrier board carrying multiple products to be tested is moved to the initial test position for multi-station coordinated positioning. The host computer sends a synchronous trigger command to the barcode scanners of all stations to identify the identity information of each product in parallel and assign test tasks to the microcontrollers of the corresponding stations based on the identification results. The coordinated positioning is achieved by driving the pressure plates of all stations to press down synchronously through a common air source, so that each product and the fixture are electrically connected. The synchronous trigger command includes a forced synchronization timestamp. After the test tasks are assigned, the microcontrollers at each workstation execute parallel pipeline tests according to the assigned tasks via the communication bus. During the test, the test progress and status information of each workstation are synchronized in real time to form a globally shared system status table. If the test status flag in the status information uploaded by any workstation is abnormal, the host computer broadcasts a pause command to all workstations via the communication bus and highlights the number and abnormal code of the abnormal workstation in the system status table. After each workstation completes its test, the test results of all workstations are centrally collected by the host computer, and collaborative error prevention judgment is performed in conjunction with the identity information to generate a batch test report.
[0007] Optionally, after generating the batch test report, the process further includes: The products on all workstations are released synchronously through the linkage clamping mechanism, and the rotating workstation platform is controlled to rotate the carrier plate to the next test batch, so as to reset the system and prepare for retesting.
[0008] Optionally, the parallel pipeline test includes: The testing process is divided into several different testing phases; Control all workstations to execute the same test phase synchronously; Once the current testing phase is completed, control all workstations to synchronously switch to the next testing phase.
[0009] Optionally, the collaborative error prevention judgment includes: if the identity information recognition of any workstation fails, the host computer will stop the assignment of test tasks to all workstations; And / or, during the testing process, if any workstation reports a test abnormality via the communication bus, the host computer will control all workstations to suspend testing.
[0010] Optionally, the communication bus is a CAN bus or an RS-485 bus; the microcontrollers at each workstation share trigger signals and status information through the communication bus, and can broadcast stop commands.
[0011] Optionally, the step of moving the carrier board carrying multiple products to be tested to the initial test position, performing multi-station coordinated positioning, and sending synchronous trigger commands to the barcode scanners at all stations via the host computer to identify the identity information of each product in parallel includes: A carrier plate carrying multiple products to be tested is installed on a circular conveyor platform and moved as a whole by a servo motor until the products at all stations are initially aligned with the corresponding test fixture probes. After the initial alignment, the linkage clamping mechanism is activated, and the pressure plates of all stations are driven to press down synchronously through a common air source, so that electrical connection is established between each product and the fixture, and the linkage positioning of multiple stations is completed. After the linkage positioning is completed, the host computer broadcasts a unified synchronization trigger command to the barcode scanners of all workstations through the communication bus. The synchronization trigger command includes a forced synchronization timestamp. Upon receiving the synchronization trigger command, the barcode scanners at each workstation start up in parallel within the same test cycle, collect the identification information on their respective products, and feed back the identification results to the host computer in real time.
[0012] Optionally, the process of assigning test tasks to the corresponding microcontrollers at the workstations based on the recognition results specifically includes: The host computer summarizes the identification results of all workstations and executes the error prevention logic: if all identifications are successful, it calls and assigns the corresponding test task to the microcontroller of its workstation based on the identification information of each product from the preset test scheme library; if any identification fails, the process is stopped and an alarm is triggered.
[0013] Optionally, the step of synchronizing the test progress and status information of each workstation in real time during the test to form a globally shared system status table specifically includes: Define a unified data structure for the test progress and status information of each workstation. The data structure shall include at least the workstation number, the current test stage identifier, the test status flag, and the exception code. When the microcontroller at each workstation completes a test phase or detects a state change, it encapsulates the current state information according to the unified data structure and actively uploads it to the host computer via the communication bus. After receiving the status information uploaded by any workstation, the host computer immediately updates the entry for the corresponding workstation in the global system status table maintained in memory. If the test status flag in the status information uploaded by any workstation is abnormal, the host computer broadcasts a pause command to all workstations through the communication bus and highlights the abnormal workstation's number and abnormal code in the system status table.
[0014] This invention also provides a parallel testing system for implementing the multi-station product parallel testing method based on multi-microcontroller linkage as described above. The parallel testing system includes: A circular conveyor platform, with carrier plates for carrying multiple products to be tested set along its conveying path; The linkage clamping mechanism is used to clamp the products to be tested at multiple stations at one time. The host computer is used to send synchronous trigger commands, allocate test tasks, centrally summarize test results, perform collaborative error prevention judgments, and generate batch test reports. A communication bus is used to connect the host computer with all the workstation microcontrollers.
[0015] Compared with existing technologies, this invention has the following advantages: The method combines carrier board linkage with multi-microcontroller communication based on a high-speed bus, enabling parallel workstations to achieve synchronization and interconnection in both physical actions and information flow, thereby significantly reducing the risk of missed and incorrect tests, improving single-cycle throughput, and shortening idle waiting time; Real-time shared system status table and collaborative error-proofing mechanism improve the consistency of abnormal response—an abnormality can be immediately broadcast and trigger the linkage of the entire system, preventing subsequent workstations from continuing invalid testing; Unified clamping / pressing linkage and modular carrier board design ensure the consistency of contact force and position, improving test repeatability and yield; In addition, through dynamic task allocation and segmented parallel pipeline, it can balance support for multiple product specifications and cost efficiency, realizing real-time synchronization, collaborative decision-making, and fault linkage of multi-workstation testing, thereby significantly improving efficiency while ensuring test quality. Attached Figure Description
[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0017] The structures, proportions, sizes, etc., shown in the accompanying drawings of this specification are only for the purpose of assisting those skilled in the art in understanding and reading the content disclosed in the specification, and are not intended to limit the conditions under which the present invention can be implemented. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in the proportions, or adjustments to the size, without affecting the effects and objectives that the present invention can produce, should still fall within the scope of the technical content disclosed in the present invention.
[0018] Figure 1 This is a schematic diagram of the carrier board structure of the parallel testing system in this embodiment two; Figure 2 This is a schematic diagram of the linkage clamping mechanism of the parallel testing system in this embodiment two; Figure 3 This is a schematic diagram of the linkage clamping mechanism and the product under test in the parallel testing system of this embodiment 2. Detailed Implementation
[0019] To make the objectives, features, and advantages of this invention more apparent and understandable, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described below are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.
[0020] In the description of this invention, it should be understood that the terms "upper," "lower," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. It should be noted that when a component is considered to be "connected" to another component, it can be directly connected to the other component or there may be a component positioned centrally in the connection.
[0021] The technical solution of the present invention will be further described below with reference to the accompanying drawings and specific embodiments.
[0022] This invention provides a method for parallel testing of multi-station products based on the linkage of multiple microcontrollers, comprising the following steps: S1, the carrier board carrying multiple products under test is moved to the initial test position for multi-station coordinated positioning. The host computer sends a synchronous trigger command to the barcode scanners at all stations, simultaneously identifying the identity information of each product and assigning test tasks to the corresponding microcontrollers at each station based on the identification results. Coordinated positioning involves synchronously pressing down the pressure plates at all stations using a common air source, establishing an electrical connection between each product and the fixture; the synchronous trigger command includes a forced synchronization timestamp.
[0023] It should be noted that the carrier plate carries several products to be tested and is installed on a circular conveyor platform or a rotary workstation platform. The carrier plate is moved to the initial test position by a servo motor or stepper motor. When the carrier plate is in place, the positioning pin, guide column and positioning groove cooperate to mechanically position it, and the photoelectric switch or proximity sensor returns a positioning confirmation signal to the host computer.
[0024] After receiving the positioning confirmation, the host computer first issues a linkage clamping command to synchronously press the pressure plates of each station with the shared cylinder or linkage mechanism, establishing reliable electrical / mechanical contact. Then, the host computer broadcasts a unified synchronization trigger command to the barcode scanners of all stations through the communication bus. This trigger command may include a forced synchronization timestamp to ensure that each barcode scanner starts in parallel and collects barcode / QR code / UID and other identity information within the same test cycle.
[0025] Each barcode scanner returns the identification result to the corresponding microcontroller according to the established protocol, and the microcontroller then reports it to the host computer. The host computer summarizes all identification results and assigns specific test tasks (including test items, thresholds, timeouts, etc.) to each product according to the pre-established product type-test plan mapping table. If any station fails to identify the product, a retry is triggered or the process is terminated and an alarm is triggered according to the error prevention rules.
[0026] S2, after the test tasks are assigned, the microcontrollers at each workstation execute parallel pipeline tests according to the assigned tasks via the communication bus. During the test, the test progress and status information of each workstation are synchronized in real time to form a globally shared system status table. If the test status flag in the status information uploaded by any workstation is abnormal, the host computer broadcasts a pause command to all workstations via the communication bus and highlights the abnormal workstation's number and abnormal code in the system status table.
[0027] It should be noted that after the host computer sends the test task to the microcontrollers at each workstation, each microcontroller starts its local test program in parallel according to the received scheme. The test process is divided into several stages (such as open and short circuit pre-test, functional measurement, communication link test, image detection, etc.), and is executed locally in a pipelined sequence or time-series multiplexing to improve resource utilization.
[0028] Each workstation encapsulates status information according to a unified data structure (example fields include: workstation number, product ID, current test stage identifier, test status flag, exception code, timestamp, etc.). Upon completion of each test stage or when a status change occurs, the status packet is actively uploaded to the host computer via a communication bus (e.g., CAN, RS-485, or industrial Ethernet).
[0029] The host computer maintains a real-time updated global system status table in memory for timing coordination and decision-making. The communication protocol includes heartbeat detection, ACK confirmation, and timeout retransmission mechanisms. When the host computer detects an anomaly or timeout at a certain workstation in the system status table, it can immediately broadcast a pause or abort command via the bus, triggering all workstations to enter a safe stop test or queue for retesting, ensuring consistency and data integrity.
[0030] S3, after each workstation completes the test, centrally summarizes the test results of all workstations through the host computer, and performs collaborative error prevention judgment in combination with identity information to generate a batch test report.
[0031] When the system status table shows that all workstations in this batch have completed their assigned testing tasks or entered the termination state, the host computer initiates a summary process: the test data from each workstation are associated and merged according to the product ID, and collaborative error prevention judgment rules are executed (e.g., verifying the correspondence between the barcode ID and the test item, comparing the consistency of different workstations for the same measurement item, and determining the logical relationship between interdependent test items, etc.).
[0032] If the product is identified as abnormal or inconsistent with the data, the host computer will mark it as "retest" or "rework" according to the preset strategy, and record the abnormal code, suggested handling action and priority in the batch report; if the product is deemed to be qualified, the report will record the qualified status and various details.
[0033] S4, through the linkage clamping mechanism, synchronously releases the products on all stations and controls the rotating station platform to rotate the carrier plate to the next test batch, so as to reset the system and prepare for retesting.
[0034] After the batch test report is generated and confirmed, the host computer sends a synchronous release command to the linkage clamping mechanism, causing the clamping mechanism, which uses coaxial mechanical linkages or a common cylinder, to release the pressure plates of all stations at once. The release action is confirmed by limit switches or displacement sensors and transmitted back to the host computer to ensure that all fixtures are in the release position. After the release is confirmed, the host computer drives the rotating station platform or conveying mechanism to rotate / shift the carrier plate to the loading or unloading position of the next batch at a preset angle or step distance. The rotation process is ensured by positioning blocks and photoelectric detection points to ensure positioning accuracy. After the shift is completed and confirmed by the positioning sensor, the system performs a reset self-test (including clamping reset, communication self-test, and barcode scanning self-test), and enters the barcode scanning and test preparation stage of the next cycle after the self-test is passed.
[0035] The working principle of this invention is as follows: The method combines carrier board linkage with multi-microcontroller communication based on a high-speed bus to achieve synchronization and interconnection of parallel workstations in terms of physical actions and information flow, thereby significantly reducing the risk of missed and incorrect tests, improving single-cycle throughput, and shortening idle waiting time; the real-time shared system status table and collaborative error-proofing mechanism improve the consistency of abnormal response—an abnormality can be immediately broadcast and trigger the linkage of the entire system to avoid subsequent workstations from continuing invalid testing; the unified clamping / pressing linkage and modular carrier board design ensure the consistency of contact force and position, improving test repeatability and yield; in addition, through dynamic task allocation and segmented parallel pipeline, it can take into account both supporting multi-specification products and cost efficiency, realizing real-time synchronization, collaborative decision-making, and fault linkage of multi-workstation testing, thereby greatly improving efficiency while ensuring test quality.
[0036] In this embodiment, the parallel pipeline test includes: The testing process is divided into several different testing phases; Control all workstations to execute the same test phase synchronously; Once the current testing phase is completed, control all workstations to synchronously switch to the next testing phase.
[0037] It should be noted that the host computer sends a synchronization command or timestamp trigger signal to each workstation to enter a certain stage through the communication bus. After the start, each workstation executes the test subroutine of that stage in parallel locally. When a single workstation completes the current stage, it reports the completion status to the host computer. When the host computer receives completion confirmation from all workstations or when the preset minimum number of ready positions is met and the timeout condition does not trigger an exception, it issues a "switch to the next stage" command. All workstations switch uniformly and start executing the next stage, thereby realizing the synchronous execution of the same test stage and the overall switching between stages.
[0038] In this embodiment, the collaborative error prevention judgment includes: if the identity information recognition of any workstation fails, the host computer will stop the assignment of test tasks to all workstations; And / or, during the testing process, if any workstation reports a test abnormality via the communication bus, the host computer will control all workstations to suspend testing.
[0039] Moving the carrier plate to the initial test position is achieved by a rotating workstation platform or a circular conveyor line; linkage positioning is achieved by a linkage clamping mechanism that clamps all products on all workstations at once.
[0040] It should be noted that the host computer broadcasts synchronous QR code scanning triggers; if the identification of any workstation fails, the host computer will immediately suspend the assignment of this test task and issue an alarm according to the collaborative error prevention rules; similarly, if any workstation reports a test abnormality through the communication bus during the test, the host computer will immediately broadcast a pause or stop command, triggering all workstations to enter the pause / safety reset process, thereby realizing unified error prevention and abnormal linkage processing based on mechanical linkage and communication linkage.
[0041] As an optional solution in this embodiment, the communication bus is a CAN bus or an RS-485 bus; the microcontrollers at each workstation share trigger signals and status information through the communication bus, and can broadcast stop commands. Each workstation shares trigger signals and test status through a unified message format, and the host computer can issue stop / pause commands through broadcast frames.
[0042] In this embodiment, step S1 specifically includes: S11: The carrier board carrying multiple products to be tested is installed on the circular conveyor platform, and the entire board is moved by a servo motor until the products at all stations are initially aligned with the corresponding test fixture probes.
[0043] It should be noted that the carrier plate is installed into the fixture slot of the circular conveyor platform, and the carrier plate is moved to the initial test position by a transmission mechanism (gear, synchronous belt, or roller) driven by a servo motor or stepper motor. During the movement of the carrier plate, the host computer determines whether the carrier plate has reached the predetermined position by reading the position feedback from the servo encoder or the photoelectric / proximity sensor signal located next to each station.
[0044] S12, after initial alignment, activate the linkage clamping mechanism, drive the pressure plates of all stations to press down synchronously through a common air source, establish an electrical connection between each product and the fixture, and complete the linkage positioning of multiple stations.
[0045] After initial alignment confirmation, the host computer issues a linkage clamping command to activate the linkage clamping mechanism. This mechanism uses a multi-branch cylinder driven by a single common air source or a common air source driven by mechanical linkages / gears, causing the pressure plates at all stations to press down simultaneously and at a uniform speed. During the clamping process, the pressure in the common air path is monitored by pressure sensors or force sensors, and the actual pressing position of each pressure plate is fed back by the limit switches or displacement sensors at each station. The host computer determines whether the clamping is in place based on this feedback and records the clamping force value or the time of arrival.
[0046] The system is considered to have completed linkage positioning and is allowed to proceed to subsequent test steps only when the clamping signals of all stations are consistent with the preset pressure / stroke range. If the clamping of a station is abnormal (such as the foot not contacting or insufficient pressure), the system will stop and prompt for maintenance or retry according to the abnormal handling procedure.
[0047] S13, after the linkage positioning is completed, the host computer broadcasts a unified synchronization trigger command to the barcode scanners of all workstations through the communication bus. The synchronization trigger command includes a forced synchronization timestamp.
[0048] After the linkage positioning is confirmed, the host computer broadcasts a unified synchronization trigger command to all barcode scanners at all workstations via the communication bus. This synchronization trigger command includes a timestamp field for forced synchronization and the current test cycle number. Upon receiving the command, the barcode scanner starts data acquisition within the same test cycle according to the timestamp or cycle number.
[0049] The host computer and each barcode scanner / microcontroller employ a periodic time synchronization or pre-start synchronization mechanism (such as performing time synchronization once upon power-on or every cycle) to ensure timestamp alignment and reduce acquisition errors caused by node clock drift. The trigger command also carries a minimum timeout parameter and the number of retries, allowing the barcode scanning node to retry locally or report an error when recognition fails.
[0050] S14: After receiving the synchronization trigger command, the barcode scanners at each workstation start in parallel within the same test cycle, collect the identification information on their respective products, and feed back the recognition results to the host computer in real time.
[0051] It should be noted that after receiving the synchronization trigger command containing the timestamp, the barcode scanners at each workstation will start collecting barcode / QR code / UID and other identification information in parallel within the same test cycle. The collected identification results are sent by the scanner to the microcontroller of the corresponding workstation according to a predetermined protocol (such as a message format containing workstation ID, product ID, timestamp and identification confidence level), and the microcontroller will immediately report to the host computer through the communication bus.
[0052] Preferably, the communication message includes the identification confidence level or image quality index so that the host computer can determine whether a local retry is needed or a backup identification strategy should be adopted. If the local retry still fails, the microcontroller will report the failure status and error code to the host computer after a limited number of attempts for unified processing.
[0053] S15, the host computer summarizes the identification results of all workstations and executes the error prevention logic: if all identifications are successful, the corresponding test task is called from the preset test plan library and assigned to the microcontroller of its workstation according to the identification information of each product; if any identification fails, the process is stopped and an alarm is triggered.
[0054] It should be noted that the error prevention logic is as follows: It checks whether the identification of all workstations is successful and whether the product ID corresponds to the carrier board position. If all identifications pass, the host computer retrieves the corresponding test plan (including test items, sequence, threshold, and timeout settings) from the pre-configured test plan library based on the identity information of each product, and sends the corresponding test task to the microcontroller at its workstation to start subsequent tests. If any workstation fails to identify or the ID does not match, the host computer will terminate the current test task allocation, issue an alarm according to the preset strategy, and record the failed workstation and error code (which can trigger on-site alarms, interface prompts, or automatic rollback to the retry process), and mark this carrier board as an abnormal batch for manual intervention or rework.
[0055] In this embodiment, the testing progress and status information of each workstation are synchronized in real time during the testing process to form a globally shared system status table, specifically including: S21 defines a unified data structure for the test progress and status information of each workstation. The data structure includes at least the workstation number, the current test stage identifier, the test status flag, and the exception code.
[0056] To ensure the readability and parsability of the status information of each workstation, a unified data structure is used to define the test progress and status information of each workstation. This structure is used to associate the carrier board position with the specific product, the current test stage identifier (such as stage number or stage name), the test status flag (e.g., running, completed, waiting, abnormal, timeout, etc.), and the exception code (used to refine the exception type).
[0057] S22: When the microcontroller at each workstation completes a test phase or detects a state change, it encapsulates the current state information according to a unified data structure and actively uploads it to the host computer via the communication bus.
[0058] It should be noted that when the microcontroller at each workstation completes a test phase or detects a status change (including anomalies, timeouts, or partial retryes), it encapsulates the current status into a status message according to a defined unified data structure and actively uploads it to the host computer via the communication bus. The status message should include a message sequence number and a timestamp, and important anomalies should be given a higher sending priority. Communication adopts an acknowledgment and retransmission strategy. If no ACK is received from the host computer within the predetermined timeout period, the microcontroller will retransmit according to the preset number of retransmissions or record the failure information in the local log for subsequent diagnosis.
[0059] S23, after receiving the status information uploaded by any workstation, the host computer immediately updates the entry for the corresponding workstation in the global system status table maintained in memory; It should be noted that after receiving a status message uploaded from any workstation, the host computer atomically updates the global system status table in memory according to the workstation number or product identifier. This status table maintains the current entry for each workstation in tabular form and also retains historical records for traceability and statistics. The update process includes verifying message integrity, comparing sequence numbers to handle out-of-order or duplicate messages, and writing the latest timestamp to the entry. For critical anomalies and completion events, the host computer also persists the corresponding data to a local database or log file to ensure traceability capabilities after power failure.
[0060] S24. If the test status flag in the status information uploaded by any workstation is abnormal, the host computer will broadcast a pause command to all workstations through the communication bus and highlight the abnormal workstation number and abnormal code in the system status table.
[0061] When the host computer detects that the test status flag in the status message uploaded by any workstation is "abnormal" or "timeout", it will immediately highlight the entry of that workstation in the system status table with an abnormal color or symbol, and record the abnormal code and the time of occurrence. At the same time, the host computer will broadcast a pause or stop command to all workstations through the communication bus, requiring each microcontroller to enter a safe stop test or wait state.
[0062] Example 2: Combination Figures 1 to 3 As shown, the present invention also provides a parallel testing system for implementing the multi-station product parallel testing method based on multi-microcontroller linkage as described in Embodiment 1. The parallel testing system includes: A circular conveyor platform, with a carrier plate 100 for carrying multiple products 101 to be tested set along its conveying path; The linkage clamping mechanism 200 is used to clamp multiple products 101 to be tested at one time. Each station of the linkage clamping mechanism 200 is equipped with a positioning component, which includes a common cylinder 201 and a pressure plate 202. Figure 2 It can be seen that the carrier plate 100 of this solution is equipped with four test stations, and the common cylinder 201 of each station is driven by a common air source; combined with Figure 3 The diagram shows the linkage clamping mechanism 200 positioning the product under test 101, where the light-colored part represents the product under test 101 at the four stations.
[0063] The host computer is used to send synchronous trigger commands, allocate test tasks, centrally summarize test results, perform collaborative error prevention judgments, and generate batch test reports. The communication bus is used to connect the host computer with the microcontrollers at all workstations.
[0064] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A method for parallel testing of multi-station products based on the linkage of multiple microcontrollers, characterized in that, Includes the following steps: The carrier board carrying multiple products to be tested is moved to the initial test position for multi-station coordinated positioning. The host computer sends a synchronous trigger command to the barcode scanners of all stations to identify the identity information of each product in parallel and assign test tasks to the microcontrollers of the corresponding stations based on the identification results. The coordinated positioning is achieved by driving the pressure plates of all stations to press down synchronously through a common air source, so that each product and the fixture are electrically connected. The synchronous trigger command includes a forced synchronization timestamp. After the test tasks are assigned, the microcontrollers at each workstation execute parallel pipeline tests according to the assigned tasks via the communication bus. During the test, the test progress and status information of each workstation are synchronized in real time to form a globally shared system status table. If the test status flag in the status information uploaded by any workstation is abnormal, the host computer broadcasts a pause command to all workstations via the communication bus and highlights the number and abnormal code of the abnormal workstation in the system status table. After each workstation completes its test, the test results of all workstations are centrally collected by the host computer, and collaborative error prevention judgment is performed in conjunction with the identity information to generate a batch test report.
2. The multi-station parallel testing method for products based on multi-microcontroller linkage according to claim 1, characterized in that, The process of generating the batch test report also includes: The products on all workstations are released synchronously through the linkage clamping mechanism, and the rotating workstation platform is controlled to rotate the carrier plate to the next test batch, so as to reset the system and prepare for retesting.
3. The multi-station parallel testing method for products based on multi-microcontroller linkage according to claim 1 or 2, characterized in that, The parallel pipeline test includes: The testing process is divided into several different testing phases; Control all workstations to execute the same test phase synchronously; Once the current testing phase is completed, control all workstations to synchronously switch to the next testing phase.
4. The multi-station parallel testing method for products based on multi-microcontroller linkage according to claim 1, characterized in that, The collaborative error prevention judgment includes: if the identity information recognition of any workstation fails, the host computer will stop the test task allocation for all workstations; And / or, during the testing process, if any workstation reports a test abnormality via the communication bus, the host computer will control all workstations to suspend testing.
5. The multi-station product parallel testing method based on multi-microcontroller linkage according to claim 1, characterized in that, The communication bus is a CAN bus or an RS-485 bus; the microcontrollers at each workstation share trigger signals and status information through the communication bus, and can broadcast stop commands.
6. The multi-station product parallel testing method based on multi-microcontroller linkage according to claim 1, characterized in that, The process involves moving a carrier board carrying multiple products to be tested to the initial test position, performing multi-station coordinated positioning, and sending synchronous trigger commands from the host computer to the barcode scanners at all stations to identify the identity information of each product in parallel. Specifically, this includes: A carrier plate carrying multiple products to be tested is installed on a circular conveyor platform and moved as a whole by a servo motor until the products at all stations are initially aligned with the corresponding test fixture probes. After the initial alignment, the linkage clamping mechanism is activated, and the pressure plates of all stations are driven to press down synchronously through a common air source, so that electrical connection is established between each product and the fixture, and the linkage positioning of multiple stations is completed. After the linkage positioning is completed, the host computer broadcasts a unified synchronization trigger command to the barcode scanners of all workstations through the communication bus. The synchronization trigger command includes a forced synchronization timestamp. Upon receiving the synchronization trigger command, the barcode scanners at each workstation start up in parallel within the same test cycle, collect the identification information on their respective products, and feed back the identification results to the host computer in real time.
7. The multi-station parallel testing method for products based on multi-microcontroller linkage according to claim 6, characterized in that, The process of assigning test tasks to the corresponding workstations based on the recognition results is as follows: The host computer summarizes the identification results of all workstations and executes the error prevention logic: if all identifications are successful, it calls and assigns the corresponding test task to the microcontroller of its workstation based on the identification information of each product from the preset test scheme library; if any identification fails, the process is stopped and an alarm is triggered.
8. The multi-station product parallel testing method based on multi-microcontroller linkage according to claim 1, characterized in that, The process of synchronizing the test progress and status information of each workstation in real time during the test to form a globally shared system status table specifically includes: Define a unified data structure for the test progress and status information of each workstation. The data structure shall include at least the workstation number, the current test stage identifier, the test status flag, and the exception code. When the microcontroller at each workstation completes a test phase or detects a state change, it encapsulates the current state information according to the unified data structure and actively uploads it to the host computer via the communication bus. Upon receiving the status information uploaded by any workstation, the host computer immediately updates the entry for the corresponding workstation in the global system status table maintained in memory.
9. A parallel testing system, characterized in that, For implementing the multi-station product parallel testing method based on multi-microcontroller linkage as described in any one of claims 1 to 8, the parallel testing system includes: A circular conveyor platform, with carrier plates for carrying multiple products to be tested set along its conveying path; The linkage clamping mechanism is used to clamp the products to be tested at multiple stations at one time. The host computer is used to send synchronous trigger commands, allocate test tasks, centrally summarize test results, perform collaborative error prevention judgments, and generate batch test reports. A communication bus is used to connect the host computer with all the workstation microcontrollers.
Citation Information
Patent Citations
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US5081654A