Digital current control device and control method

Abstract

The embodiment of the present application relates to a kind of digital current control device and control method, the device includes duty cycle calculation module, PWM period control module and PWM signal generation module;The PWM period control module is connected to the input end of the duty cycle calculation module, and is configured to generate period error correction signal based on the period error value of PWM signal;The duty cycle calculation module is configured to generate rising edge signal based on first signal, and generate falling edge signal based on second signal;The PWM signal generation module is connected to the output end of the duty cycle calculation module, and is configured to generate PWM signal based on the rising edge signal and falling edge signal.The technical scheme provided by the present application is based on the error value of the integral of sampling current and target current in a PWM period, and sampling current changes between high current threshold and low current threshold, and high current threshold is dynamically adjusted, with high control precision and stable operation.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of current control technology, and in particular to a digital current control device and control method. Background Technology

[0002] In many modern electronic systems, such as automotive electronics, motor drives, and precision instruments, precise measurement and control of current are required. This is mainly achieved by performing time integration on the measured current signal to obtain a control signal related to the current magnitude, which controls the on and off times of the switch in the branch containing the measured current, thereby achieving precise control of the system.

[0003] Figure 1 The diagram shows a schematic of the circuit structure of a current control circuit in the prior art. Figure 1 The diagram illustrates a current control circuit used to measure and control the load current in an electrical load (e.g., an inductive load L). A sampling resistor Rs can be added to the circuit of the inductive load L to feed the sampled voltage signal Vs back to the current sense amplifier AMP. The current sense amplifier AMP outputs an analog sampled current signal. If the analog sampled current directly enters the current regulator, the current regulator is implemented using analog circuitry. If the analog sampled current is converted into a digital sampled current signal by an analog-to-digital converter (AD), the current regulator is implemented using digital circuitry. Based on the sampled current and the set current, the current regulator outputs a control signal Ds. The control signal Ds is used to control the pulse-width modulation (PWM) generator to generate a PWM signal with an adjustable duty cycle, controlling the on (high level) and off (low level) time of the switch S in the branch containing the inductive load L, thereby controlling the magnitude of the load current.

[0004] In existing technologies, if an analog current regulation scheme is used, the sampled current and the set current are integrated over time, and then the two integration results are compared to generate a PWM signal. However, analog circuits have high manufacturing requirements, the integrator requires a large area, and the circuit has mismatches that need to be adjusted. If a digital current regulation scheme is used, the rising and falling branches of the sampled current are integrated over time, and then the integration results are added together and averaged to obtain the average current for one PWM cycle, until the average current equals the set current. However, in this current regulation scheme, when current overshoot occurs, in order to ensure that the average current equals the set current, the minimum current needs to lag. This lag will cause the system to be unstable when there are rapid changes. Therefore, additional regulation circuits are needed to ensure the stability of the system, making the scheme more complex. Summary of the Invention

[0005] Based on the above-mentioned situation of the prior art, the purpose of the embodiments of the present invention is to provide a digital current control device and control method that can realize dynamic adjustment and rapid response of current.

[0006] To achieve the above objectives, according to one aspect of the present invention, a digital current control device is provided, including a duty cycle calculation module, a PWM period control module, and a PWM signal generation module; The PWM period control module is connected to the input of the duty cycle calculation module and is configured to generate a period error correction signal based on the period error value of the PWM signal. The duty cycle calculation module is configured to generate a rising edge signal based on a first signal and a falling edge signal based on a second signal. The PWM signal generation module is connected to the output of the duty cycle calculation module and is configured to generate a PWM signal based on the rising edge signal and the falling edge signal. The first signal is generated based on the error integral value between the current sampled current value and the current period target current value, and the second signal is generated based on the comparison value between the current sampled current value and the high current threshold. The high current threshold is generated based on the period error correction signal, the initial high current threshold, and the current period target current value.

[0007] Furthermore, the duty cycle calculation module includes an inner loop control unit; The inner loop control unit is configured to integrate the error between the current sampled current value and the target current value of the current period in each PWM signal cycle to obtain the error integral value, and generate the first signal when the error integral value is 0.

[0008] Furthermore, the duty cycle calculation module also includes an outer ring control unit; The outer loop control unit is configured to correct the target current value of the previous cycle based on historical data to obtain the corrected target current value, which is then used as the target current value of the current cycle.

[0009] Furthermore, the outer loop control unit includes an error integration correction circuit and a target current correction circuit; The error integral correction circuit is configured to perform a first correction on the cumulative error value when the cumulative error value between the target current value of the previous period and the current sampled current value in a preset N historical periods exceeds a preset error threshold, thereby obtaining a correction error value. The target current correction circuit is connected to the output of the error integral correction circuit and is configured to perform a second correction on the target current value of the previous cycle to obtain the target current value of the current cycle.

[0010] Furthermore, the inner loop control unit is also configured to generate the first signal when the current sampled current value is less than or equal to a low current threshold, and to generate the second signal when the current sampled current value is greater than or equal to a high current threshold.

[0011] Furthermore, the PWM period control module is also configured to perform a variable gain multiplication operation on the period error value of the PWM signal to obtain the period error correction signal; The period error value of the PWM signal is obtained based on the current PWM signal period and the target PWM signal period.

[0012] Furthermore, the inner loop control unit also includes a threshold integration circuit; The threshold integration circuit is configured to obtain a current summation threshold based on the initial high current threshold and the period error correction signal; The high current threshold is the sum of the current summation threshold and the target current value for the current period.

[0013] Furthermore, the inner loop control unit also includes a rising edge generation circuit and a falling edge generation circuit; The rising edge generating circuit is configured to generate the rising edge signal based on the first signal; The falling edge generating circuit is configured to generate the falling edge signal based on the second signal.

[0014] According to another aspect of the present invention, a digital current control method is also provided, the method comprising: A period error correction signal is generated based on the period error value of the PWM signal, and the period error correction signal is used to generate a high current threshold. A first signal is generated based on the integral of the error between the current sampled current value and the target current value of the current period; a second signal is generated based on the comparison between the current sampled current value and the high current threshold; a rising edge signal is generated based on the first signal; and a falling edge signal is generated based on the second signal. A PWM signal is generated based on the rising edge signal and the falling edge signal.

[0015] Furthermore, the method also includes: The first signal is generated based on the comparison between the current sampled current value and the low current threshold.

[0016] In summary, the embodiments of the present invention provide a digital current control device and control method. The device includes a duty cycle calculation module, a PWM cycle control module, and a PWM signal generation module. The PWM cycle control module is connected to the input terminal of the duty cycle calculation module and is configured to generate a cycle error correction signal based on the cycle error value of the PWM signal. The duty cycle calculation module is configured to generate a rising edge signal based on a first signal and a falling edge signal based on a second signal. The PWM signal generation module is connected to the output terminal of the duty cycle calculation module and is configured to generate a PWM signal based on the rising edge signal and the falling edge signal. The technical solution provided by the present invention integrates the error value between the sampled current and the target current based on one PWM cycle. The sampled current varies between a high current threshold and a low current threshold. The high current threshold is dynamically adjusted in real time within the control device, while the low current threshold is configured digitally through a programmable method. The current threshold directly limits the magnitude of the current ripple, enabling not only dynamic adjustment but also fast response. The control device employs dual-loop control, resulting in higher control accuracy and greater system stability. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the circuit structure of a current control circuit in the prior art; Figure 2 This is a schematic diagram of the overall structure of the digital current control device provided in the embodiments of the present invention; Figure 3 This is a timing diagram of the digital current control device generating the PWM signal in an embodiment of the present invention; Figure 4 This is a flowchart of the digital current control method provided in the embodiments of the present invention. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific embodiments and the accompanying drawings. It should be understood that these descriptions are merely exemplary and not intended to limit the scope of the invention. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concept of the invention.

[0019] It should be noted that, unless otherwise defined, the technical or scientific terms used in one or more embodiments of the present invention should have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms "first," "second," and similar terms used in one or more embodiments of the present invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the element or object listed following the word and its equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect.

[0020] The technical solution of the present invention will now be described in detail with reference to the accompanying drawings. An embodiment of the present invention provides a digital current control device. Figure 2 The diagram shows an overall structural schematic of the digital current control device according to an embodiment of the present invention, as shown below. Figure 2 As shown, the control device includes a duty cycle calculation module, a PWM period control module, and a PWM signal generation module. The PWM period control module, connected to the input of the duty cycle calculation module, is configured to generate a period error correction signal based on the period error value of the PWM signal. The duty cycle calculation module is configured to generate a rising edge signal based on a first signal and a falling edge signal based on a second signal. The PWM signal generation module, connected to the output of the duty cycle calculation module, is configured to generate a PWM signal based on the rising and falling edge signals. The following is combined with... Figure 2 Each of the above modules will be explained separately.

[0021] The duty cycle calculation module is configured to generate a rising edge signal based on a first signal and a falling edge signal based on a second signal. The first signal is generated based on the integral of the error between the current sampled current value and the target current value for the current period, and the second signal is generated based on a comparison between the current sampled current value and a high current threshold. In this embodiment of the invention, the first signal is generated based on the integral of the error between the current sampled current value and the target current value for the current period, and then a rising edge signal is generated based on the first signal; the second signal is generated based on the comparison between the current sampled current value and the high current threshold, and then a falling edge signal is generated based on the second signal.

[0022] According to certain optional implementations, the duty cycle calculation module includes an inner loop control unit configured to integrate the error between the current sampled current value and the target current value of the current period within each PWM signal cycle to obtain an integral error value, and generate a first signal when the integral error value is 0. The inner loop control unit is further configured to generate the first signal when the current sampled current value is less than or equal to a low current threshold, and to generate a second signal when the current sampled current value is greater than or equal to a high current threshold. The inner loop control unit may also include a rising edge generation circuit and a falling edge generation circuit, the rising edge generation circuit being configured to generate a rising edge signal based on the first signal, and the falling edge generation circuit being configured to generate a falling edge signal based on the second signal.

[0023] Figure 3 The figure shows a timing diagram of the digital current control device generating a PWM signal in an embodiment of the present invention, as shown below. Figure 3 As shown, current integral control is based on one PWM signal cycle. The "cycle" in the current cycle target current value refers to the PWM signal cycle. In this embodiment, the current sampled current value i(t) is a digital quantity. When the control device is working, after the power-on conditions are met, the PWM signal is at a high level. The control device starts to integrate the error between the current sampled current value i(t) and the current cycle target current value Iset to obtain the error integral value ICC. When the current sampled current value i(t) is greater than or equal to the high current threshold Ith, the PWM signal changes from high to low, i.e., a falling edge is triggered. For example, it can be achieved through... Figure 2 Comparator 2 compares the current sampled current value i(t) with the high current threshold Ith. When the current sampled current value i(t) is greater than or equal to the high current threshold Ith, it outputs a second signal B to the falling edge generation circuit. The falling edge generation circuit generates a falling edge signal Nedge based on the second signal B and outputs it to the PWM signal generation module. At this time, the error between the current sampled current value i(t) and the current period target current value Iset is integrated. When the error integral value ICC reaches 0, the PWM signal changes from low to high, triggering a rising edge (e.g., ...). Figure 3 The second rising edge of the PWM signal (at which point a new PWM cycle begins). For example, in... Figure 2 In the process, the error value Ei between the current sampled current value i(t) and the current period target current value Iset is calculated, and the error value Ei is input to the integrator to obtain the error integral value ICC. When the error integral value ICC is 0, the first signal A is output. When the current sampled current value i(t) is less than or equal to the low current threshold Itl, the control device automatically triggers the limiting condition, and the PWM signal changes from low to high, that is, triggering the rising edge (e.g., ...). Figure 3The first rising edge of the PWM signal marks the start of a new PWM cycle. Simultaneously, the error integral value ICC is cleared, and the integration of the error between the current sampled current value i(t) and the target current value Iset for the current cycle begins anew. For example, this can be achieved through... Figure 2 Comparator 1 compares the current sampled current value i(t) with the low current threshold Itl. When the current sampled current value i(t) is less than or equal to the low current threshold Itl, it outputs a first signal A. The low current threshold Itl is programmable digitally configurable, for example, through a register. That is, in this embodiment of the invention, the first signal A can be output based on the integral value of the error between the current sampled current value and the target current value of the current period, or based on the comparison result between the current sampled current value and the low current threshold, thereby generating a PWM rising edge signal. For example, the outputs of the integrator and comparator 1 are connected to an OR gate circuit, the first signal A is output through the OR gate circuit, and the output of the OR gate circuit is connected to a rising edge generation circuit. The rising edge generation circuit generates a rising edge signal Pedge based on the first signal A and outputs it to the PWM signal generation module.

[0024] According to the above embodiments of the present invention, the period of the PWM signal is determined by a current threshold and the integral value of the error between the current sampled current value and the target current value of the current period. Specifically, the on-time (i.e., high-level) of the PWM signal is determined by a high current threshold; the larger the high current threshold, the longer the on-time (i.e., high-level) of the PWM signal. The off-time (i.e., low-level) of the PWM signal, which is also the start time of a new PWM cycle, is determined by the integral value of the error between the current sampled current value and the target current value of the current period. When the integral value of the error is 0, the PWM signal is turned off, generating a rising edge of the PWM signal. However, since current sampling is discrete sampling, the integrator may encounter conditions where the integral is not zero. Setting only the above off-time condition may cause the device to malfunction. Therefore, the off-time (i.e., low-level) of the PWM is limited by setting a low current threshold. Even if the integral value of the error cannot reach the condition of zero for a long time, when the current sampled current value drops to the low current threshold, the limiting condition is automatically triggered, triggering the rising edge of the PWM signal, restarting a new PWM cycle, and clearing the integral value of the error to zero. Through the above technical solutions, the embodiments of the present invention can achieve precise control of current while avoiding the "lockdown" state of the device caused by the discreteness and delay of digital sampling, thereby improving the operational stability of the entire device.

[0025] According to some optional implementations, the duty cycle calculation module further includes an outer loop control unit configured to correct the target current value of the previous cycle based on historical data, obtaining a corrected target current value as the target current value for the current cycle. The duty cycle calculation module in this embodiment can employ dual-loop control, with the outer loop control unit calculating the cumulative error of the PWM signal over multiple cycles, and the inner loop control unit calculating the error of the PWM signal in the current cycle, thereby enabling more precise current regulation. Figure 2 As shown, the outer loop control unit includes, for example, an error integration correction circuit and a target current correction circuit. The error integration correction circuit is configured to perform a first correction on the cumulative error value Es of the current period's target current value Iset` and the current sampled current value i(t) over a preset N historical periods when the cumulative error Es exceeds a preset error threshold, obtaining a corrected error value Es`, where N is a positive integer as needed. The target current correction circuit is connected to the output of the error integration correction circuit and is configured to perform a second correction on the previous period's target current value Iset`, obtaining the current period's target current value Iset. The error threshold can be set based on experience and actual needs. After correction, the current target current value Iset and the current sampled current value i(t) continue to undergo error integration processing, the process being the same as that of the inner loop control unit described above. The outer loop control unit calculates the error between the previous period's target current value and the current sampled current value, and accumulates the errors over multiple periods to obtain a cumulative error value. When the cumulative error value is large (i.e., exceeds the preset error threshold), the error integration correction circuit corrects the cumulative error value. The target current value Iset` of the previous cycle and the target current value Iset of the current cycle can be stored in the same register. The current value before correction by the target current correction circuit is defined as the target current value Iset` of the previous cycle, and the current value after correction by the target current correction circuit is defined as the target current value Iset of the current cycle. The error integration correction circuit can use a shift circuit to perform a division operation of powers of 2 by right shifting. After the cumulative error value is corrected by the error integration correction circuit, the correction error value is obtained. Then, the target current correction circuit corrects the target current value of the previous cycle, that is, it adds or subtracts the above correction error value from the target current value of the previous cycle. The target current correction circuit can use an adder to add or subtract the above correction error value from the target current value of the previous cycle, so that the final sampled current value is close to the target current value of the current cycle.

[0026] The PWM cycle control module is configured to generate a cycle error correction signal based on the cycle error value of the PWM signal. The cycle error value of the PWM signal can be obtained based on the current PWM signal cycle and the target PWM signal cycle. In this embodiment of the invention, the aforementioned high current threshold is generated based on the cycle error correction signal, an initial high current threshold, and the target current value of the current cycle. The PWM cycle control module generates the cycle error correction signal by performing a variable gain multiplication operation on the cycle error value between the current PWM signal cycle and the target PWM signal cycle, and outputs it to the duty cycle calculation module. The duty cycle calculation module applies the cycle error correction signal to the initial high current threshold in an integral manner, and adds the resulting current summation threshold to the target current value of the current cycle to obtain the high current threshold. In the initial state, the initial high current threshold Ith0 is set to set the initial conduction time of the PWM signal. After the target PWM signal cycle is set, the initial high current threshold Ith0 can be adjusted to ensure that the device always operates within the target PWM signal cycle. For example, a multiplier with a programmable gain Ki can be used to adjust the period error value. A period detection circuit monitors the current PWM signal period and compares it with the target PWM signal period to obtain the period error value. The period error value of the PWM signal is multiplied by the gain Ki to obtain the period error correction signal. Then, the period error correction signal is integrated in each PWM cycle until the current PWM signal period matches the target PWM signal period. Figure 2 As shown, the PWM period control module includes a period detection circuit. This circuit detects the current PWM signal period T based on the synchronization signal 'sync', performs error processing between the current PWM signal period T and the target PWM signal period T0 to obtain a period error value Et. This period error value Et is then used to generate a period error correction signal Et' through a variable gain multiplication operation. For example, multiplying the period error value Et by the gain Ki yields the period error correction signal Et', which is then output to the duty cycle calculation module. The period detection circuit can be implemented using a counter, counting the current PWM signal period T based on the synchronization signal 'sync'.

[0027] According to certain optional implementations, the inner loop control unit further includes a threshold integration circuit configured to obtain a current summation threshold based on an initial high current threshold and a period error correction signal output by the aforementioned PWM period control module. The high current threshold is the sum of the current summation threshold and the target current value for the current period. This threshold integration circuit can be implemented using registers and adders. Figure 2As shown, the initial high current threshold Ith0 is stored in a register. The aforementioned period error correction signal Et` is added to the initial high current threshold Ith0 via an adder, and the resulting current summation threshold is stored in the register again. Simultaneously, this current summation threshold is added to the corrected current target current value Iset of the current period to obtain the high current threshold Ith. Thus, the duty cycle calculation module applies the period error correction signal Et` to the initial high current threshold Ith0 in an integral manner, and the resulting current summation threshold is added to the current target current value Iset of the current period to obtain the high current threshold.

[0028] The PWM signal generation module is configured to generate PWM signals based on rising and falling edge signals. For example... Figure 2 As shown, the PWM signal generation module receives the rising edge signal Pdege and the falling edge signal Nedge output by the duty cycle calculation module to generate a PWM signal.

[0029] The present invention also provides a digital current control method, which can be used in the digital current control device provided in the above embodiments of the present invention. Figure 4 The flowchart of this digital current control method is shown in the figure. Figure 4 As shown, the method includes the following steps: S402. Generate a period error correction signal based on the period error value of the PWM signal. This period error correction signal is used to generate a high current threshold.

[0030] S404. Generate a first signal based on the error integral value between the current sampled current value and the current period target current value, and generate a second signal based on the comparison value between the current sampled current value and the high current threshold; generate a rising edge signal based on the first signal, and generate a falling edge signal based on the second signal.

[0031] S406. Generate a PWM signal based on the rising edge signal and the falling edge signal.

[0032] According to some optional embodiments, the method further includes the step of: S408. Generate a first signal based on the comparison between the current sampled current value and the low current threshold.

[0033] The specific implementation of each step of the digital current control method in this embodiment of the present invention is the same as the functional implementation of each module of the digital current control device in the above embodiments of the present invention, and its repeated description will be omitted here.

[0034] In summary, the embodiments of the present invention relate to a digital current control device and control method. The device includes a duty cycle calculation module, a PWM cycle control module, and a PWM signal generation module. The PWM cycle control module is connected to the input terminal of the duty cycle calculation module and is configured to generate a cycle error correction signal based on the cycle error value of the PWM signal. The duty cycle calculation module is configured to generate a rising edge signal based on a first signal and a falling edge signal based on a second signal. The PWM signal generation module is connected to the output terminal of the duty cycle calculation module and is configured to generate a PWM signal based on the rising edge signal and the falling edge signal. The technical solution provided by the present invention integrates the error value between the sampled current and the target current based on one PWM cycle. The sampled current varies between a high current threshold and a low current threshold. The high current threshold is dynamically adjusted in real time within the control device, while the low current threshold is configured digitally through a programmable method. The current threshold directly limits the magnitude of the current ripple, enabling not only dynamic adjustment but also fast response. The control device employs dual-loop control, resulting in higher control accuracy and greater system stability.

[0035] It should be understood that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of the invention (including the claims) is limited to these examples; within the framework of the invention, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of one or more embodiments of the invention as described above, which are not provided in the details for the sake of brevity. The specific embodiments of the invention described above are merely illustrative or explanatory of the principles of the invention and do not constitute a limitation of the invention. Therefore, any modifications, equivalent substitutions, improvements, etc., made without departing from the spirit and scope of the invention should be included within the protection scope of the invention. Furthermore, the appended claims are intended to cover all variations and modifications falling within the scope and boundaries of the appended claims, or equivalent forms of such scope and boundaries.

Claims

1. A digital current control device, characterized in that, It includes a duty cycle calculation module, a PWM cycle control module, and a PWM signal generation module; The PWM period control module is connected to the input of the duty cycle calculation module and is configured to generate a period error correction signal based on the period error value of the PWM signal. The duty cycle calculation module is configured to generate a rising edge signal based on a first signal and a falling edge signal based on a second signal. The PWM signal generation module is connected to the output of the duty cycle calculation module and is configured to generate a PWM signal based on the rising edge signal and the falling edge signal. The first signal is generated based on the error integral value between the current sampled current value and the current period target current value, and the second signal is generated based on the comparison value between the current sampled current value and the high current threshold. The high current threshold is generated based on the period error correction signal, the initial high current threshold, and the current period target current value.

2. The apparatus according to claim 1, characterized in that, The duty cycle calculation module includes an inner loop control unit; The inner loop control unit is configured to integrate the error between the current sampled current value and the target current value of the current period in each PWM signal cycle to obtain the error integral value, and generate the first signal when the error integral value is 0.

3. The apparatus according to claim 2, characterized in that, The duty cycle calculation module also includes an outer ring control unit; The outer loop control unit is configured to correct the target current value of the previous cycle based on historical data to obtain the corrected target current value, which is then used as the target current value of the current cycle.

4. The apparatus according to claim 3, characterized in that, The outer loop control unit includes an error integration correction circuit and a target current correction circuit; The error integral correction circuit is configured to perform a first correction on the cumulative error value when the cumulative error value between the target current value of the previous period and the current sampled current value in a preset N historical periods exceeds a preset error threshold, thereby obtaining a correction error value. The target current correction circuit is connected to the output of the error integral correction circuit and is configured to perform a second correction on the target current value of the previous cycle to obtain the target current value of the current cycle.

5. The apparatus according to claim 2, characterized in that, The inner loop control unit is further configured to generate the first signal when the current sampled current value is less than or equal to a low current threshold, and to generate the second signal when the current sampled current value is greater than or equal to a high current threshold.

6. The apparatus according to claim 5, characterized in that, The PWM period control module is further configured to perform a variable gain multiplication operation on the period error value of the PWM signal to obtain the period error correction signal; The period error value of the PWM signal is obtained based on the current PWM signal period and the target PWM signal period.

7. The apparatus according to claim 6, characterized in that, The inner loop control unit also includes a threshold integration circuit; The threshold integration circuit is configured to obtain a current summation threshold based on the initial high current threshold and the period error correction signal; The high current threshold is the sum of the current summation threshold and the target current value for the current period.

8. The apparatus according to any one of claims 2-7, characterized in that, The inner loop control unit also includes a rising edge generation circuit and a falling edge generation circuit; The rising edge generating circuit is configured to generate the rising edge signal based on the first signal; The falling edge generating circuit is configured to generate the falling edge signal based on the second signal.

9. A digital current control method, characterized in that, The method includes: A period error correction signal is generated based on the period error value of the PWM signal, and the period error correction signal is used to generate a high current threshold. A first signal is generated based on the integral of the error between the current sampled current value and the target current value of the current period; a second signal is generated based on the comparison between the current sampled current value and the high current threshold; a rising edge signal is generated based on the first signal; and a falling edge signal is generated based on the second signal. A PWM signal is generated based on the rising edge signal and the falling edge signal.

10. The method according to claim 9, characterized in that, The method further includes: The first signal is generated based on the comparison between the current sampled current value and the low current threshold.

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