AI natural language interaction-based nvme command issuing method, device and equipment

Abstract

The application relates to the technical field of storage device control, and particularly relates to an NVMe command issuing method and device based on AI natural language interaction and equipment, wherein a natural language instruction of a user is received, semantic understanding and command mapping are carried out by using a large language model integrated with an NVMe command knowledge base, a command frame conforming to an NVMe protocol is generated, then protocol compliance and device capability matching verification are carried out on the command frame, after the verification, protocol conversion and priority scheduling are carried out according to the command type, and the command frame is issued to an NVMe device through a PCIe bus, in the execution process or after the execution, a result returned by the device is received, the result is converted into readable feedback through a natural language generation accelerator, and the user can adjust command parameters based on the feedback in real time, so that a closed-loop interaction is formed. The application solves the technical problems of strong professional dependence, rigid interaction, high error rate and disconnection with a device state of the existing NVMe command issuing technology, and significantly improves operation efficiency and system reliability.

Description

Technical Field

[0001] This invention relates to the field of storage device control technology, and in particular to an NVMe command issuance method, apparatus, and device based on AI natural language interaction. Background Technology

[0002] NVMe (NVM Express), as the mainstream interface protocol for high-performance solid-state storage devices, relies heavily on the issuance of commands (including IO and Admin commands) for device management, data read / write, and performance debugging. Currently, NVMe command issuance primarily depends on the following two technical solutions: Programming interface-driven solution: Developers need to manually construct complete command frames (including Opcode, CDW0~CDW15 fields, etc.) by calling the NVMe SDK, PCIe driver API, etc., and strictly adhere to the bus transmission timing. This solution requires users to have in-depth knowledge of the NVMe protocol, PCIe bus, and underlying hardware, with a very high technical threshold, and is mainly used in deep development scenarios such as storage servers.

[0003] Manual operation tool solution: Operations or testing personnel use NVMe command-line tools (CLI) or graphical management software to issue commands by entering standardized parameters or selecting fixed menus. While this solution reduces some coding requirements, operation still relies on accurate memorization of parameter formats and interface guidance, and cannot flexibly respond to complex and personalized testing or management needs.

[0004] However, existing technical solutions have significant drawbacks: High dependence on professional expertise: Non-technical personnel find it difficult to operate independently, which limits the application of NVMe devices in a wider range of operation and maintenance and consumer-grade scenarios.

[0005] Poor interactive flexibility: It only supports fixed-format input, cannot understand natural language descriptions such as "write 512KB of data to LBA 100-200 with a latency of less than 5ms", and does not support dynamic adjustment of command parameters in multi-turn dialogues.

[0006] High error rate and high risk of commands: Manual input is prone to format or boundary errors, and programmatic calls are prone to missing field dependencies, which may lead to command execution failure or even trigger device firmware abnormalities.

[0007] Disconnected from device status: The device's real-time load, health status, and other information cannot be perceived before the command is issued, which can easily lead to command timeouts, sudden performance drops, or hardware damage.

[0008] Multi-device adaptation is cumbersome: When heterogeneous NVMe devices coexist, it is necessary to manually adapt their command support lists and parameter constraints one by one, which is inefficient and prone to errors.

[0009] The results are not intuitive: the execution results are output in binary queue entries or raw log format, which requires specialized tools to parse and is not conducive to quick understanding. Summary of the Invention

[0010] In view of this, the purpose of this invention is to propose a solution to the problem of xx...

[0011] To achieve the above objectives, this invention provides an NVMe command delivery method based on AI natural language interaction, comprising the following steps: S1. Receive natural language commands input by the user; S2. Based on a large language model that integrates an NVMe command knowledge base, perform semantic understanding on the natural language instructions and map them into NVMe command types and corresponding command parameters; S3. Generate a command frame conforming to the NVMe protocol format based on the command type and corresponding command parameters obtained from the mapping. S4. Perform multi-dimensional verification on the command frame. The multi-dimensional verification includes at least: compliance verification based on the NVMe protocol specification and device capability matching verification based on the target NVMe device identification information. S5. Perform protocol conversion and priority scheduling on the verified command frames according to the command type, and then issue the command. S6. Receive the command execution results from the target NVMe device, parse them, and convert them into natural language to provide feedback to the user.

[0012] Preferably, in step S2, the large language model is a model fine-tuned by the NVMe protocol command set, and mapping it to NVMe command types and corresponding command parameters includes: Extract the operation intent, object, and constraints from the natural language command, and match them with the command opcode, address parameters, length parameters, and characteristic values ​​in the NVMe command knowledge base to output a structured set of command parameters.

[0013] Preferably, in step S4, the compliance verification includes: Real-time logical verification is performed on the opcode value range, parameter dependencies, and data length boundaries in the command frame. The device capability matching verification includes: querying the Identify controller data structure of the target NVMe device (either pre-stored or acquired in real time) to determine whether the opcode and extended features in the command frame are supported by the device.

[0014] Preferably, in step S4, if multi-dimensional verification fails, a descriptive natural language error reason is generated based on a predefined error code mapping table and returned to the user.

[0015] Preferably, in step S5, the command type includes Admin commands and IO commands.

[0016] Preferably, in step S5, the protocol conversion includes: Adapt the Admin command to a PCIe transaction layer packet format without data payload, and adapt the IO command to a format that requires a matching Data Out or Data In transaction layer packet.

[0017] Preferably, in step S5, the priority scheduling includes: assigning a higher transmission priority to the Admin command than to the IO command to ensure that it is executed first.

[0018] Preferably, before the result feedback in step S6, the method further includes: Extract key performance data and device status parameters from the command execution results; The extracted key performance data and device status parameters are converted into natural language feedback text that users can understand. During the execution process from the issuance of the command to the generation of feedback, the system receives user adjustment requests based on natural language feedback. In response to the instruction adjustment request, the relevant parameters in the command frame are dynamically updated, and a re-verification and reissue process for the updated command frame is triggered.

[0019] The present invention also provides an NVMe command delivery device based on AI natural language interaction, comprising: The AI ​​dialogue understanding and command mapping circuit is used to receive user natural language commands and, through a fine-tuning large language model chip integrating an NVMe command knowledge base and a semantic feature extraction circuit, map the commands into NVMe command types and core parameters, and store them in the command parameter mapping register. A multi-dimensional command verification hardware acceleration circuit, connected to the command parameter mapping register, includes a protocol compliance verifier, a device capability query cache, and an error code mapping table, used to perform protocol compliance verification and device capability matching verification on the generated command frame; The IO / Admin command general adapter circuit, connected to the multi-dimensional command verification hardware acceleration circuit, includes a command type recognizer, a dual-mode protocol conversion unit, and a priority arbitrator, used to perform protocol format conversion and transmission priority scheduling according to the command type, and output data packets conforming to the PCIe bus format; The hardware interface circuit is connected to the IO / Admin command general adapter circuit and is used to send the data packet to the target NVMe device; A two-way interactive feedback circuit is connected to the hardware interface circuit and the AI ​​dialogue understanding and command mapping circuit, respectively, including a result parsing FIFO cache, a natural language generation accelerator and a real-time interactive triggering circuit; The result parsing FIFO cache is used to temporarily store the execution results returned by the device; The natural language generation accelerator is used to convert the parsed key data into natural language feedback. The real-time interaction triggering circuit is used to receive the user's natural language adjustment request during command execution, and trigger the AI ​​dialogue understanding and command mapping circuit and subsequent circuits to update the command parameters and reissue them.

[0020] The present invention also provides an electronic device, including a processor for executing stored program instructions to implement the above-described NVMe command issuance method based on AI natural language interaction.

[0021] The beneficial effects of this invention are: 1. This invention greatly reduces the operational threshold. Users do not need to master the complex details of the NVMe protocol or programming knowledge. They can issue commands and manage devices through everyday natural language (such as voice or text), enabling non-technical personnel to operate NVMe devices efficiently and significantly expanding their application scenarios.

[0022] 2. This invention can understand and execute natural language instructions with complex constraints, and supports dynamic adjustment of command parameters (such as modifying data length and target address) in a natural language dialogue manner based on real-time feedback during command execution. This achieves true two-way, multi-turn intelligent interaction and meets the personalized needs of testing, debugging and other scenarios.

[0023] 3. This invention uses a hardware-accelerated multi-dimensional verification circuit (including protocol compliance verification and device capability matching) to intercept illegal or unsupported commands within microseconds, eliminating parameter errors at the source and increasing the command execution success rate to over 99.9%. This effectively avoids device anomalies or data risks caused by command misuse and significantly improves the reliability and security of command issuance.

[0024] 4. This invention distinguishes between Admin and IO commands and combines this with real-time device status to ensure that critical management commands are executed first. Simultaneously, it verifies device capabilities before command generation, avoiding the issuance of inappropriate commands under high bus load or unsupported conditions, thus guaranteeing overall system performance and stability.

[0025] 5. This invention can automatically identify and adapt to NVMe devices from different manufacturers and with different protocol versions without manual intervention, achieving 100% compatibility with NVMe 2.0 and above standard commands, and greatly improving management efficiency in multi-device environments.

[0026] 6. This invention utilizes a natural language generation accelerator to convert binary execution results into user-readable text or voice feedback in real time, making command execution results clear at a glance and greatly improving the efficiency of operation and maintenance debugging and equipment monitoring. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only for this invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 This is a schematic diagram of the NVMe command issuance method according to an embodiment of the present invention; Figure 2 This is a schematic diagram of the NVMe command issuing device architecture according to an embodiment of the present invention. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific embodiments.

[0030] It should be noted that, unless otherwise defined, the technical or scientific terms used in this invention should have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms "first," "second," and similar terms used in this invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0031] like Figure 1 As shown in the embodiments of this specification, an NVMe command issuance method based on AI natural language interaction is provided, including the following steps: S1, the AI ​​dialogue interaction layer receives user commands via natural language / voice input; This command can be entered via text or voice to express operational requirements for the NVMe device, such as "query device temperature" or "write 1GB of test data to logical block addresses LBA 500 to 1000 with a latency of less than 5ms".

[0032] S2. The command parsing and verification layer is based on a large language model that integrates an NVMe command knowledge base. It performs semantic understanding on the natural language instructions and maps them to NVMe command types and corresponding command parameters. Specifically, this step is implemented through an AI dialogue understanding and command mapping circuit. The core of this circuit is a large language model chip specifically fine-tuned for the NVMe protocol command set. Internally, it integrates an NVMe command knowledge base storage unit, storing the opcodes, parameter definitions, and type mapping relationships of standard commands. The semantic feature extraction circuit first extracts the operation intent, operation object, and performance or conditional constraints from the natural language instructions. Subsequently, the fine-tuned large language model matches the extracted features with the knowledge base, outputting a structured set of command parameters, which is temporarily stored in the command parameter mapping register. For example, "Query device temperature" is mapped to the Admin command type, with opcode 0x02 (Get Features) and feature ID 0x02 (Temperature).

[0033] S3, the command parsing and verification layer generates candidate NVMe command frames that conform to the NVMe protocol format based on the command type and corresponding command parameters obtained from the mapping. The command frame contains control fields such as CDW0 to CDW15 as defined by the NVMe standard. For IO commands (such as write commands), it also reserves information such as data buffer pointers to ensure that the frame structure fully complies with the NVM Express 2.0 or later version protocol specifications.

[0034] S4. Perform multi-dimensional verification on the command frame. The multi-dimensional verification includes at least: compliance verification based on the NVMe protocol specification and device capability matching verification based on the target NVMe device identification information. This step verifies the execution of the hardware acceleration circuit through multi-dimensional command verification, mainly including two aspects of verification: NVMe protocol specification compliance verification: A protocol compliance verifier implemented through hardware logic gates performs real-time, high-speed logical verification of the opcode value range, parameter dependencies, and data length boundaries in command frames. For example, it verifies whether a write command is configured with a valid data length and buffer address.

[0035] Device capability matching verification based on target NVMe device identification information: By querying the device capability query cache (which contains pre-stored or dynamically updated Identify controller data structures from the target device), it is determined whether the opcode and extended features in the current command frame are supported by the specific device.

[0036] If any of the above verifications fails, i.e. the verification is invalid, the binary error code is converted into a descriptive natural language reason such as "write length exceeds the device's maximum supported value" through the error code mapping table, and directly fed back to the user, thereby intercepting the error before the command is issued.

[0037] As one implementation method, after reporting the cause of the error, the user is further asked whether they want to make adjustments. If the user adjusts the command requirements, the process returns to step S1 and the user's input command requirements are read again.

[0038] S5. Perform protocol conversion and priority scheduling on the verified command frames according to the command type, and then issue the command. This step is completed by the IO / Admin command generic adapter circuit: First, the command type recognizer distinguishes between Admin commands and IO commands based on the Opcode field in the command frame.

[0039] Next, protocol conversion is performed: the dual-mode protocol conversion unit converts the NVMe command frame into a TLP format recognizable by the PCIe bus, based on the command type. Specifically, the Admin command is adapted to a TLP format without data payload, while the IO command is adapted to a format requiring a Data Out or Data In TLP to transmit read and write data.

[0040] Then, priority scheduling is performed: the priority arbiter assigns a transmission priority to Admin commands that is much higher than that of IO commands (e.g., 5 times), ensuring that critical commands such as device management and status queries can be executed with priority and are not affected by high-concurrency IO traffic.

[0041] Finally, the processed data packet is sent to the target NVMe device via a hardware interface circuit (such as PCIe PHY).

[0042] S6. Receive the command execution results from the target NVMe device, parse them, and convert them into natural language to provide feedback to the user.

[0043] In one implementation, the completion queue entries and data returned by the device are first temporarily stored in a result parsing FIFO cache. The result parsing circuit extracts key execution data from this cache, such as command status codes, actual read / write speeds, device temperature, and remaining lifetime percentage. Subsequently, a natural language generation accelerator quickly converts this key data into user-friendly natural language text or voice feedback, such as "Write command executed successfully, time taken 20ms, write speed 25.6MB / s" or "Device temperature 45℃, remaining lifetime 98%".

[0044] Furthermore, during the execution process after the command is issued but before the final feedback, the real-time interactive trigger circuit continuously listens for user input. If the user issues an adjustment command such as "change the amount of data to be written to 2GB" based on intermediate feedback or their own needs, the circuit will immediately trigger the system to interrupt the current process, send the new natural language command to the AI ​​dialogue understanding layer, and start a new round of parameter mapping, verification, and issuance, thereby achieving true dynamic, two-way, and closed-loop interaction.

[0045] As one implementation method, this method adds a state awareness and decision-making step before generating the command frame in step S3, specifically including: Obtain real-time performance data and persistent media health status data of the target NVMe device; Based on real-time performance data and health status data, predict the impact of the operation corresponding to the natural language command on device performance or lifespan. If the predicted impact exceeds a preset threshold, the command parameters obtained from the mapping will be automatically optimized, or a natural language prompt containing operation suggestions will be generated for user confirmation. The optimizations include adjusting the logical block address range, operation queue, or data protection mode.

[0046] Real-time performance and health data include at least: controller operating temperature, NAND chip programming / erase counts, read interference count, write amplification factor, and PCIe link layer error count; predictions are based on a pre-trained NVMe device degradation model.

[0047] By invoking Admin commands such as Get Log Page and Get Features, real-time telemetry data of the target NVMe device is continuously collected, including but not limited to: controller temperature, media unit status of each NAND channel, data unit writes, and correctable error count of the PCIe link. This data is fed into a pre-trained lightweight machine learning model. By learning the degradation patterns of a large number of NVMe devices, this model can predict the impact of specific workloads on the device's remaining lifespan and immediate performance, generate instruction modification suggestions, and regenerate command frames based on user selections.

[0048] For example, when a user issues the command "Continuously write 200GB of test files to namespace 1," the AI ​​executes this step after mapping the Write command parameters. Assume the current device reports that the Media Wear Indicator is already at 80%, and predicts that this write will cause the indicator to exceed the 85% warning threshold. In this case, the engine will not issue a direct command, but instead generates a suggestion for the user through a two-way interactive feedback circuit: "The current device wear is high; directly writing 200GB may accelerate aging. Suggestions: (a) Split the data to the lower-wear namespace 3; (b) Enable streaming write mode to reduce write amplification. Please select." If the user selects (a), the AI ​​will automatically change the Namespace Identifier field in the command from 1 to 3 and regenerate the command frame. This process is implemented through hardware-accelerated state query caching and decision logic circuitry, with decision latency in the microsecond range, ensuring real-time interaction.

[0049] Example 2: like Figure 2 As shown, this embodiment provides an NVMe command intelligent delivery device based on AI natural language interaction, used to implement the delivery method provided in Embodiment 1. The device includes: The circuit includes an AI dialogue understanding and command mapping circuit, a multi-dimensional command verification hardware acceleration circuit, an IO / Admin command universal adaptation circuit, a hardware interface circuit, and a two-way interactive feedback circuit.

[0050] The AI ​​dialogue understanding and command mapping circuit is used to perform the initial conversion from natural language to NVMe protocol parameters. Specifically, it includes: The fine-tuned large language model chip integrates an NVMe command knowledge base storage unit, which stores the command opcodes, parameter definitions, and type mapping relationships of the NVMe protocol. This chip performs semantic understanding of the input natural language based on a pre-trained model.

[0051] Semantic feature extraction circuit: Its input end receives the user's natural language (text or speech converted) instructions and is responsible for extracting the key semantic features in the instructions.

[0052] Command parameter mapping register: Connected to the output of the large language model chip, it is used to receive and temporarily store the set of structured command parameters output after the model understands them, including core parameters such as command type (IO / Admin), opcode, LBA address, and data length.

[0053] A multi-dimensional command verification hardware acceleration circuit is connected to the command parameter mapping register to perform high-speed, reliable validity verification before the command is issued. Specifically, it includes: Protocol compliance verifier: Implemented by hardware logic gate circuits, it receives parameters from the mapped register and is used to verify in real time whether the fields of the generated command frame conform to the NVMe protocol specifications, such as the opcode range, the dependency relationship between parameters (such as the need to configure the data buffer address for write commands), and the data length boundary.

[0054] Device Capability Query Cache: Used to pre-store or cache target device capability information obtained through the NVMe Identify command.

[0055] Device capability matching circuit: Query the cache to determine whether the opcode and extended features of the command to be issued are supported by the current target NVMe device.

[0056] Error code mapping table: Connects the output of the verifier and the matching circuit. When verification fails, it converts the generated hardware error code into a descriptive natural language reason (such as "write length exceeds the device's maximum supported value") for direct feedback.

[0057] The IO / Admin command general adapter circuit connects to the output of the verification circuit and is responsible for processing the verified NVMe command frames into a format suitable for bus transmission. Specifically, this includes: Command type identifier: Distinguishes between IO commands and Admin commands based on the opcode field in the command frame.

[0058] Dual-mode protocol conversion unit: Based on the identification results, it converts Admin commands and IO commands into the transaction layer data packet format of the PCIe bus. Specifically, it adapts Admin commands to TLP without data payload and IO commands to the format that requires a matching Data Out or Data In TLP.

[0059] Priority Arbiter: Based on the command type identification result, assign a higher transmission priority to Admin commands than to IO commands (e.g., set to 5 times the priority of IO commands) to ensure that device management commands are scheduled for execution with priority.

[0060] The hardware interface circuit connects to the adapter circuit to achieve physical layer connection. Its core consists of a PCIe physical layer circuit and an NVMe controller interface circuit, which is used to convert the processed data packets into electrical signals and send them to the target NVMe device through the PCIe bus, while also supporting physical connection management such as hot-plugging.

[0061] The bidirectional interactive feedback circuit is connected to both the hardware interface circuit and the AI ​​dialogue understanding circuit, forming an interactive closed loop. Specifically, it includes: Result Analysis FIFO Cache: Its input is connected to the hardware interface circuit and is used to temporarily store the completion queue entries returned by the NVMe device and the read data.

[0062] Natural Language Generation Accelerator: Its input is connected to the output of the FIFO buffer. Through dedicated hardware acceleration logic, it converts key information extracted by the result parsing circuit (such as execution status, read / write speed, and device temperature) into user-readable natural language text feedback.

[0063] Real-time interactive triggering circuit: Its control end receives new natural language adjustment instructions (such as "change the data length to 2GB") input by the user during command execution, and its output end is connected to the AI ​​dialogue understanding and command mapping circuit and the verification circuit to trigger the dynamic update and re-verification of the original command parameters.

[0064] In one implementation, the present invention adds a diagnostic and self-healing control circuit to the bidirectional interactive feedback circuit. This circuit is activated when the error status code (Status Field) returned by the NVMe controller is non-zero, or when the user actively inquires "why the device is slowing down".

[0065] The execution steps include: Automatically obtain detailed error logs and health status logs of the target NVMe device; Based on the NVMe protocol knowledge base and fault tree model, the logs are analyzed to determine the root cause of the error; Generate a self-healing command sequence targeting the root cause, the self-healing command sequence consisting of at least one NVMeAdmin command; The output includes a natural language description of the root cause analysis results and the self-healing solution, and the self-healing command sequence is automatically executed after user confirmation.

[0066] The self-healing command sequence includes: Use the Get Log Page command to retrieve a specific error message log page; Use the Media Unit Status command to locate the media problem unit; Use the Set Features command to set the number of automatic retries or disable error cells; Use the Sanitize or Format NVM commands to securely erase and rebuild a specified namespace after data backup.

[0067] For example, the following commands can be issued sequentially: Get Log Page (to retrieve Error Information Log and SMART / Health Information Log) and Identify (to confirm controller characteristics). These logs are then sent to the fault tree analysis module (implemented by hardware logic and microcode), which embeds common fault-symptom mapping relationships in the NVMe protocol.

[0068] Suppose analysis reveals a surge in Media Errors entries in the Health Information Log, and the Error Information Log indicates that errors primarily occur within a specific logical block address range. The diagnostic circuitry determines the root cause to be "local NAND media instability." Immediately afterward, a self-healing command sequence generator begins operation. It generates a suggested solution: "Media instability detected in LBA range X. Data migration and bad block marking recommended. Execute?" If the user confirms, the device will automatically and sequentially execute the following command sequence: 1) Read valid data from the affected LBA via host software and temporarily store it; 2) Issue a Set Features command to temporarily disable the Autonomous Power State Transition feature to prevent power-saving state interference with repair; 3) Issue a Media Unit Status command to confirm the problematic unit; 4) Issue a Deallocate command or a vendor-specific Bad Block Management command to demap or mark the problematic unit. The status of the entire process is fed back to the user in real time via a natural language generation accelerator. This integrates in-depth diagnostics, root cause analysis, repair solution generation, and one-click automated execution.

[0069] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed in this application can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0070] In the embodiments provided in this application, it should be understood that the disclosed devices / terminal equipment and methods can be implemented in other ways. For example, the device / terminal equipment embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual coupling or direct coupling or communication connection may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0071] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0072] If the integrated module / unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content included in the computer-readable medium can be appropriately added or removed according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electrical carrier signals and telecommunication signals.

[0073] The implementation of all or part of the processes in the methods of the above embodiments can also be accomplished by a computer program product. When the computer program product is run on a terminal device, the terminal device can implement the steps in the various method embodiments described above.

[0074] The embodiments described above are only used to illustrate the technical solutions of this application, and are not intended to limit it. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A method for issuing NVMe commands based on AI natural language interaction, characterized in that, The method includes the following steps: S1. Receive natural language commands input by the user; S2. Based on a large language model that integrates an NVMe command knowledge base, perform semantic understanding on the natural language instructions and map them into NVMe command types and corresponding command parameters; S3. Generate a command frame conforming to the NVMe protocol format based on the command type and corresponding command parameters obtained from the mapping. S4. Perform multi-dimensional verification on the command frame. The multi-dimensional verification includes at least: compliance verification based on the NVMe protocol specification and device capability matching verification based on the target NVMe device identification information. S5. Perform protocol conversion and priority scheduling on the verified command frames according to the command type, and then issue the command. S6. Receive the command execution results from the target NVMe device, parse them, and convert them into natural language to provide feedback to the user.

2. The NVMe command issuance method based on AI natural language interaction according to claim 1, characterized in that, In step S2, the large language model is a model fine-tuned by the NVMe protocol command set, and mapping it to NVMe command types and corresponding command parameters includes: Extract the operation intent, object, and constraints from the natural language command, and match them with the command opcode, address parameters, length parameters, and characteristic values ​​in the NVMe command knowledge base to output a structured set of command parameters.

3. The NVMe command issuance method based on AI natural language interaction according to claim 2, characterized in that, In step S4, the compliance verification includes: Real-time logical verification is performed on the opcode value range, parameter dependencies, and data length boundaries in the command frame. The device capability matching verification includes: querying the Identify controller data structure of the target NVMe device (either pre-stored or acquired in real time) to determine whether the opcode and extended features in the command frame are supported by the device.

4. The NVMe command issuance method based on AI natural language interaction according to claim 1, characterized in that, In step S4, if multi-dimensional verification fails, a descriptive natural language error reason is generated based on a predefined error code mapping table and returned to the user.

5. The NVMe command issuance method based on AI natural language interaction according to claim 1, characterized in that, In step S5, the command types include Admin commands and IO commands.

6. The NVMe command issuance method based on AI natural language interaction according to claim 5, characterized in that, In step S5, the protocol conversion includes: Adapt the Admin command to a PCIe transaction layer packet format without data payload, and adapt the IO command to a format that requires a matching Data Out or Data In transaction layer packet.

7. The NVMe command issuance method based on AI natural language interaction according to claim 5, characterized in that, In step S5, the priority scheduling includes: assigning a higher transmission priority to the Admin command than to the IO command to ensure that it is executed first.

8. The NVMe command issuance method based on AI natural language interaction according to claim 1, characterized in that, Before the result feedback in step S6, the method further includes: Extract key performance data and device status parameters from the command execution results; The extracted key performance data and device status parameters are converted into natural language feedback text that users can understand. During the execution process from the issuance of the command to the generation of feedback, the system receives user adjustment requests based on natural language feedback. In response to the instruction adjustment request, the relevant parameters in the command frame are dynamically updated, and a re-verification and reissue process for the updated command frame is triggered.

9. An NVMe command issuing device based on AI natural language interaction, characterized in that, include: The AI ​​dialogue understanding and command mapping circuit is used to receive user natural language commands and, through a fine-tuning large language model chip integrating an NVMe command knowledge base and a semantic feature extraction circuit, map the commands into NVMe command types and core parameters, and store them in the command parameter mapping register. A multi-dimensional command verification hardware acceleration circuit, connected to the command parameter mapping register, includes a protocol compliance verifier, a device capability query cache, and an error code mapping table, used to perform protocol compliance verification and device capability matching verification on the generated command frame; The IO / Admin command general adapter circuit, connected to the multi-dimensional command verification hardware acceleration circuit, includes a command type recognizer, a dual-mode protocol conversion unit, and a priority arbitrator, used to perform protocol format conversion and transmission priority scheduling according to the command type, and output data packets conforming to the PCIe bus format; The hardware interface circuit is connected to the IO / Admin command general adapter circuit and is used to send the data packet to the target NVMe device; A two-way interactive feedback circuit is connected to the hardware interface circuit and the AI ​​dialogue understanding and command mapping circuit, respectively, including a result parsing FIFO cache, a natural language generation accelerator and a real-time interactive triggering circuit; The result parsing FIFO cache is used to temporarily store the execution results returned by the device; The natural language generation accelerator is used to convert the parsed key data into natural language feedback. The real-time interaction triggering circuit is used to receive the user's natural language adjustment request during command execution, and trigger the AI ​​dialogue understanding and command mapping circuit and subsequent circuits to update the command parameters and reissue them.

10. An electronic device, characterized in that, Includes a processor for executing stored program instructions to implement the NVMe command delivery method based on AI natural language interaction as described in any one of claims 1 to 8.

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