Satellite baseband system data-oriented anti-radiation storage method, device, equipment and storage medium

Abstract

Embodiments of the present application provide a kind of satellite baseband system data-oriented anti-radiation storage method, device, equipment and storage medium, the method comprises: the original data of satellite baseband system is segmented;For each data frame obtained by segmentation, the check digit and redundancy symbol corresponding to current data frame are generated, the current data frame and its corresponding check digit are combined, the first combined data frame of combination is stored to first preset data area and second preset data area, redundancy symbol is stored to preset check area;Read and determine whether the first combined data frame is passed through check;If not, determine the error type corresponding to current first combined data frame and its corresponding error correction algorithm, and based on the combined data frame and redundancy symbol stored in second preset data area and preset check area, current data frame is recovered according to error correction algorithm, through triple redundancy storage structure and multidimensional error correction mechanism, data integrity is continuously protected under radiation interference environment.

Description

Technical Field

[0001] This application relates to the field of satellite communication system technology, and more specifically, to a radiation-resistant storage method, apparatus, device, and storage medium for satellite baseband system data. Background Technology

[0002] Traditional satellite systems typically employ a single error correction code or hardware hardening to address the problem of critical data in baseband software being flipped and rewritten due to cosmic radiation.

[0003] However, due to the complexity of the radiation environment, the cumulative effect of soft errors, and the sensitivity of critical data, the particle flux and energy distribution vary greatly in different orbital regions. Static solutions are difficult to cover the entire scenario, and residual errors that are not corrected in time will accumulate in multiple read and write operations, eventually leading to data logic collapse. Once core data such as modulation parameters and protocol stack configurations of the baseband software are damaged, it will directly cause communication link interruption. Single error correction codes or hardware hardening methods have the following drawbacks: First, the error correction capability is insufficient: conventional error correction codes can only correct single-bit and short burst errors, while multi-bit flips and persistent soft errors caused by cosmic rays are beyond their error correction range. Second, static protection mechanism: hardware hardening cannot dynamically adapt to the spatiotemporal changes in radiation intensity. When encountering high-energy particle bursts such as solar flares, fixed threshold parameters are prone to failure. Third, there is no data health monitoring: the lack of real-time statistics on the error rate of storage units makes it impossible to predict potential risks and adjust protection strategies in a timely manner. Summary of the Invention

[0004] This application provides a radiation-resistant storage method, apparatus, device, and storage medium for satellite baseband system data.

[0005] The first aspect of this application provides a radiation-resistant storage method for satellite baseband system data, comprising: Receive raw data from the satellite baseband system, segment the raw data, and obtain multiple data frames; For each data frame, generate the check bit and redundancy symbol corresponding to the current data frame, combine the current data frame and its corresponding check bit to obtain the first combined data frame, store the first combined data frame in the first preset data area and the second preset data area, and store the redundancy symbol in the preset check area. Read the first combined data frame from the first preset data area and determine whether the read first combined data frame passes the verification. If the current first combined data frame fails the verification, determine the error type and the corresponding error correction algorithm of the current first combined data frame, and restore the current data frame according to the error correction algorithm based on the combined data frames and redundant symbols stored in the second preset data area and the preset verification area respectively.

[0006] In an optional embodiment of this application, generating the check bit corresponding to the current data frame includes: If the current data frame is a binary data frame, shift the current data frame left by N bits, where N is the length of the parity bit; Divide the left-shifted data frame by the binary value corresponding to the generator polynomial, and perform MN cyclic shifts and XOR operations, where M is the bit length of the left-shifted data frame, and the first preset generator polynomial is related to N: If the high-order bit of the left-shifted data frame is 1, then the data frame is XORed with the binary value of the generator polynomial after shifting left by 1 bit. If the high-order bit of the left-shifted data frame is 0, then the data frame is shifted left. Obtain the checksum corresponding to the current data frame. The generation of redundant symbols corresponding to the current data frame includes: If the current data frame is a binary data frame, convert the current data frame into an L-ary data frame corresponding to the redundant symbols, where L-ary is not binary; The L-ary data frame is converted into a polynomial, multiplied by a second preset generator polynomial, to generate a redundant symbol corresponding to the current data frame. The second preset generator polynomial is related to the bit length of the redundant symbol.

[0007] In an optional embodiment of this application, determining whether the first combined data frame passed the verification includes: Determine the remainder obtained by dividing the first combined data frame read by the first preset generator polynomial; If the remainder is 0, it is determined that the first combined data frame read passes the verification. If the remainder is not 0, it is determined that the first combined data frame read has failed the verification.

[0008] In an optional embodiment of this application, storing redundant symbols in a preset verification area includes: The redundant symbols are combined with the L-ary data frame to obtain the second combined data frame; The second combined data frame is stored in the preset verification area.

[0009] In an optional embodiment of this application, determining the error type and its corresponding error correction algorithm corresponding to the current first combined data frame includes: Determine whether the adjoint expression satisfies s1 3 = s3, where s1 is the first combined data frame read at the first preset generator polynomial root. The value of s3 is the first combined data frame read at the first preset generator polynomial root. The value; In the conjunctive equation, s1 is satisfied. 3 In the case of = s3, the error type corresponding to the current first combined data frame is determined to be a single bit error, and the error correction algorithm is to locate the error position and invert it; When the adjoint expression does not satisfy s1 3 In the case of = s3, the error type corresponding to the current first combined data frame is determined to be a multi-bit error, and the error correction algorithm is to recover the data using the redundant symbols in the check area; If the number of erroneous positions in a multi-bit error exceeds a preset number, the error correction algorithm deletes the current first combined data frame.

[0010] In an optional embodiment of this application, the step of restoring the current data frame based on the combined data frame and redundant symbols stored in the second preset data area and the preset verification area respectively, according to the error correction algorithm, includes: When the error correction algorithm locates the error position and inverts it, the error position is determined as follows: And invert the binary value at the error position; When the error correction algorithm uses redundant symbols in the check area to recover data, redundant symbols are read from the preset check area. The read redundant symbols are used to construct a receiving polynomial. The remainder obtained by dividing the receiving polynomial by the second preset generator polynomial is the adjoint expression. The adjoint expression is then substituted into the expression. In the middle, solve the error location polynomial and error value polynomial Based on and Determine the error location and error value, and repair the original data based on the error location and error value using Galois domain operations; If the error correction algorithm deletes the current first group of data frames, the latest valid copy in the second preset data area is selected to overwrite the first preset data area.

[0011] In an optional embodiment of this application, the method further includes: According to a preset time interval, monitor whether the bit error rate of the raw data in the same area exceeds the first preset threshold, and monitor whether the number of error correction failures of the raw data in the same area exceeds the second preset threshold. If the bit error rate of the raw data in the same area exceeds the first preset threshold, or if the number of error correction failures of the raw data in the same area exceeds the second preset threshold, the current area is determined to be a radiation hotspot area. The redundancy level of the raw data for radiation hotspot areas is increased, the preset data time interval is shortened, and the error correction algorithm is switched.

[0012] A second aspect of this application provides a radiation-resistant storage device for satellite baseband system data, comprising: The segmentation module is used to receive raw data from the satellite baseband system, segment the raw data, and obtain multiple data frames. The generation module is used to generate a check bit and a redundancy symbol corresponding to the current data frame for each data frame, combine the current data frame and its corresponding check bit to obtain a first combined data frame, store the first combined data frame in a first preset data area and a second preset data area, and store the redundancy symbol in a preset check area. The verification module is used to read the first combined data frame from the first preset data area and determine whether the read first combined data frame passes the verification. The recovery module is used to determine the error type and corresponding error correction algorithm of the current first combined data frame when the current first combined data frame fails the verification, and to recover the current data frame based on the combined data frames and redundant symbols stored in the second preset data area and the preset verification area respectively, according to the error correction algorithm.

[0013] A third aspect of this application provides a computer device, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the steps of any of the above-mentioned radiation-resistant storage methods for satellite baseband system data.

[0014] A fourth aspect of the embodiments of this application provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the radiation-resistant storage method for satellite baseband system data as described above.

[0015] Compared with the prior art, the technical solutions provided in this application have at least some or all of the following advantages: The radiation-resistant storage method for satellite baseband system data described in this application receives raw data from the satellite baseband system, segments the raw data to obtain multiple data frames; for each data frame, generates a check bit and a redundancy symbol corresponding to the current data frame, combines the current data frame and its corresponding check bit to obtain a first combined data frame, stores the first combined data frame in a first preset data area and a second preset data area, and stores the redundancy symbol in a preset check area; reads the first combined data frame in the first preset data area and determines whether the read first combined data frame passes the check; if the current first combined data frame fails the check, determines the error type corresponding to the current first combined data frame and its corresponding error correction algorithm, and restores the current data frame according to the error correction algorithm based on the combined data frame and redundancy symbol stored in the second preset data area and the preset check area respectively. Through the triple redundancy storage structure of the first preset data area, the second preset data area, and the preset check area, as well as the multi-dimensional error correction mechanism, the integrity of critical data is continuously protected in the radiation interference environment, avoiding problems such as system deadlock, communication link interruption, or high bit error rate caused by data errors, and significantly improving the radiation resistance and operational stability of the satellite baseband system. Attached Figure Description

[0016] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 A flowchart illustrating a radiation-resistant storage method for satellite baseband system data provided in one embodiment of this application; Figure 2 A flowchart illustrating a radiation-resistant storage method for satellite baseband system data provided in another embodiment of this application; Figure 3 This application provides a system architecture for implementing a radiation-resistant storage method for satellite baseband system data, as one embodiment of the present application. Figure 4 A schematic diagram of a radiation-resistant storage device for satellite baseband system data provided in one embodiment of this application; Figure 5 This is a schematic diagram of a computer device structure provided in one embodiment of this application. Detailed Implementation

[0017] In the process of developing this application, the inventors discovered that current radiation-resistant storage methods for satellite baseband system data are poor in terms of error correction capability, dynamic adaptation to spatiotemporal changes in radiation intensity, and versatility.

[0018] To address the aforementioned issues, this application provides a radiation-resistant storage method, apparatus, computer equipment, and storage medium for satellite baseband system data, thereby improving the error correction capability and dynamic adaptability to spatiotemporal variations in radiation intensity and versatility of radiation-resistant storage for satellite baseband system data.

[0019] The solutions in this application embodiment can be implemented using various computer languages, such as the object-oriented programming language Java and the interpreted scripting language JavaScript.

[0020] To make the technical solutions and advantages of the embodiments of this application clearer, the exemplary embodiments of this application will be described in further detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not an exhaustive list of all embodiments. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other.

[0021] Please see Figure 1 and Figure 2 The radiation-resistant storage method for satellite baseband system data provided in this application includes the following steps S100~S400: S100 receives raw data from the satellite baseband system, segments the raw data, and obtains multiple data frames; S200: For each data frame, generate the check bit and redundancy symbol corresponding to the current data frame, combine the current data frame and its corresponding check bit to obtain the first combined data frame, store the first combined data frame in the first preset data area and the second preset data area, and store the redundancy symbol in the preset check area. S300: Read the first combined data frame from the first preset data area and determine whether the first combined data frame has passed the verification. S400: If the current first combined data frame fails the verification, determine the error type and the corresponding error correction algorithm of the current first combined data frame, and restore the current data frame according to the error correction algorithm based on the combined data frames and redundant symbols stored in the second preset data area and the preset verification area respectively.

[0022] In an optional embodiment of this application, the check bit in step S200 is generated by BCH encoding. The check bit in step S200 is a BCH check bit. BCH encoding is a cyclic error correction code proposed by RC Bose, DK Ray-Chaudhuri and A. Hocquenghem. It belongs to linear block codes with multiple error correction capabilities over a finite field.

[0023] In an optional embodiment of this application, the data for the satellite baseband system may be the modulation parameters of the satellite baseband system (such as QPSK (Quadrature Phase Shift Keying) symbol rate of 2.4 Msps and roll-off factor of 0.35), stored in binary format, which is 32 bits.

[0024] In an optional embodiment of this application, the segmentation of the original data to obtain multiple data frames includes: Given that the original data of the satellite baseband system is 10110001011011001100101011010110, the original data is divided into two data frames, each 16 bits, resulting in frame 1 being 1011000101101100 and frame 2 being 1100101011010110.

[0025] The radiation-resistant storage method for satellite baseband system data in this application can be achieved through, for example... Figure 3 The system architecture shown includes a storage layer and a control layer. The storage layer comprises a primary data area (Data Block A, the first preset data area), a mirror backup area (Data Block B, the second preset data area), and a parity block (preset parity area), forming three replicas. Each data frame is appended with a timestamp and version number. The parity block stores BCH check bits and RS redundancy symbols (error correction codes based on the Galois domain). The control layer includes an error correction engine, a health monitoring module, and a parameter adjuster. The error correction engine integrates a BCH codec, an RS codec, and a CRC (Cyclic Redundancy Check) module. The health monitoring module periodically scans storage units, calculating the bit error rate (BER) and error correction trigger frequency. The parameter adjuster dynamically configures parameters such as redundancy level (1:3 → 1:5) and refresh cycle (10ms → 5ms) based on the monitoring results.

[0026] This application addresses the problem of data flipping and rewriting of critical baseband software data in satellite communication systems due to cosmic radiation. By employing a triple-redundant storage structure, a multi-dimensional error correction mechanism, and a dynamic parameter adjustment strategy, it continuously protects the integrity of critical data under radiation interference environments, avoiding problems such as system crashes, communication link interruptions, or high bit error rates caused by data errors, and significantly improving the radiation resistance and operational stability of satellite baseband systems.

[0027] In an optional embodiment of this application, step S200, generating the check bit corresponding to the current data frame, includes: If the current data frame is a binary data frame, shift the current data frame left by N bits, where N is the length of the parity bit; Divide the left-shifted data frame by the binary value corresponding to the generator polynomial, and perform MN cyclic shifts and XOR operations, where M is the bit length of the left-shifted data frame, and the first preset generator polynomial is related to N: If the high-order bit of the left-shifted data frame is 1, then the data frame is XORed with the binary value of the generator polynomial after shifting left by 1 bit. If the high-order bit of the left-shifted data frame is 0, then the data frame is shifted left. Obtain the checksum corresponding to the current data frame. The generation of redundant symbols corresponding to the current data frame includes: If the current data frame is a binary data frame, convert the current data frame into an L-ary data frame corresponding to the redundant symbols, where L-ary is not binary; The L-ary data frame is converted into a polynomial, multiplied by a second preset generator polynomial, to generate a redundant symbol corresponding to the current data frame. The second preset generator polynomial is related to the bit length of the redundant symbol.

[0028] In an optional embodiment of this application, BCH(20,16) encoding can be used, generating the polynomial as follows: (Corresponding to binary 10011); Encoding data frame 1 (1011000101101100): Left-shift the data by 4 bits (checksum length 4 bits): 10110001011011000000; Divide the left-shifted data 10110001011011000000 by the generator polynomial 10011, and perform 16 shift-XOR operations. The final result is a 4-bit remainder (checksum) 1010, which is appended to the original data to form a 20-bit codeword: 10110001011011001010.

[0029] In an optional embodiment of this application, the check area can use RS(31,16) code to add 15 symbols of redundancy (such as hexadecimal values ​​like 3A7D) to each frame, generating RS redundant symbols.

[0030] The radiation-resistant storage method for satellite baseband system data in this application generates a check bit and a redundancy symbol corresponding to the current data frame. By combining the current data frame and its corresponding check bit, a first combined data frame is obtained. The first combined data frame is stored in a first preset data area and a second preset data area, and the redundancy symbol is stored in a preset check area. A three-copy structure of primary and backup data blocks + check blocks is adopted. Version backtracking is achieved by combining timestamp marking, realizing the elastic expansion design of primary and backup data blocks + check blocks, and supporting the improvement of redundancy level as needed.

[0031] In an optional embodiment of this application, step S300, determining whether the first combined data frame passed the verification, includes: Determine the remainder obtained by dividing the first combined data frame read by the first preset generator polynomial; If the remainder is 0, it is determined that the first combined data frame read passes the verification. If the remainder is not 0, it is determined that the first combined data frame read has failed the verification.

[0032] In an optional embodiment of this application, the codeword of data frame 1 is read as 10110001011011001010, but after transmission it becomes 11010001011011001010 (the 2nd and 3rd bits are flipped). Using a generator polynomial... The remainder after receiving the codeword is non-zero (e.g., in syntactic codewords). The verification was deemed to have failed.

[0033] The radiation-resistant storage method for satellite baseband system data in this application determines whether the current first combined data frame passes the verification, and if the current first combined data frame fails the verification, determines the error type and its corresponding error correction algorithm for the current first combined data frame, thereby achieving multi-mode error correction switching and automatically matching the optimal error correction algorithm according to the severity of the error, thus improving error tolerance efficiency.

[0034] In an optional embodiment of this application, step S200, storing redundant symbols in a preset verification area, includes: The redundant symbols are combined with the L-ary data frame to obtain the second combined data frame; The second combined data frame is stored in the preset verification area.

[0035] The radiation-resistant storage method for satellite baseband system data in this application stores the first combined data frame in the first preset data area and the second preset data area, and stores the redundant symbols in the preset verification area. It adopts a three-copy structure of primary and backup data blocks + verification blocks, and combines timestamp marking to realize version backtracking, realizes the elastic expansion design of primary and backup data blocks + verification blocks, and supports the improvement of redundancy level as needed.

[0036] In an optional embodiment of this application, step S400, determining the error type and its corresponding error correction algorithm corresponding to the current first combined data frame, includes: Determine whether the adjoint expression satisfies s1 3 = s3, where s1 is the first combined data frame read at the first preset generator polynomial root. The value of s3 is the first combined data frame read at the first preset generator polynomial root. The value; In the conjunctive equation, s1 is satisfied. 3In the case of = s3, the error type corresponding to the current first combined data frame is determined to be a single bit error, and the error correction algorithm is to locate the error position and invert it; When the adjoint expression does not satisfy s1 3 In the case of = s3, the error type corresponding to the current first combined data frame is determined to be a multi-bit error, and the error correction algorithm is to recover the data using the redundant symbols in the check area; If the number of erroneous positions in a multi-bit error exceeds a preset number, the error correction algorithm deletes the current first combined data frame.

[0037] In an optional embodiment of this application, the correspondence between error type classification and error correction algorithm is shown in Table 1 below.

[0038] Table 1

[0039] The radiation-resistant storage method for satellite baseband system data in this application determines the error type and corresponding error correction algorithm of the current first combined data frame when the current first combined data frame fails the verification, realizes multi-mode error correction switching, and automatically matches the optimal error correction algorithm according to the severity of the error, thereby improving the error tolerance efficiency.

[0040] In an optional embodiment of this application, step S400, which involves restoring the current data frame based on the combined data frame and redundant symbols stored in the second preset data area and the preset verification area respectively, according to an error correction algorithm, includes: When the error correction algorithm locates the error position and inverts it, the error position is determined as follows: And invert the binary value at the error position; When the error correction algorithm uses redundant symbols in the check area to recover data, redundant symbols are read from the preset check area. The read redundant symbols are used to construct a receiving polynomial. The remainder obtained by dividing the receiving polynomial by the second preset generator polynomial is the adjoint expression. The adjoint expression is then substituted into the expression. In this paper, the error location polynomial is solved using the Berlekamp-Massey algorithm (an iterative algorithm for solving the shortest generator polynomial of a linear feedback shift register). and error value polynomial Based on and Determine the error location and error value, and repair the original data based on the error location and error value using Galois domain operations; If the error correction algorithm deletes the current first group of data frames, the latest valid copy in the second preset data area is selected to overwrite the first preset data area.

[0041] In an optional embodiment of this application, in the BCH direct repair of single-bit errors, the syntactic equations s1 and s3 are calculated, if... The error location is .exist In this case, the error bit is in the 5th bit, which is then inverted to fix it.

[0042] In an optional embodiment of this application, the step of repairing the original data using Galois domain operations based on the error location and the specific value of the error includes: Error-Locating Polynomial The root corresponds to the location where the error occurred, and the error location is completed by polynomial root-finding operations on the Galois field. Using error value polynomials and error positioning polynomial The derivative is used to determine the error value; Based on the error location information and error value, the original data is recovered through matrix inverse operation or polynomial interpolation.

[0043] The radiation-resistant storage method for satellite baseband system data in this application restores the current data frame according to the error correction algorithm, realizes a multi-dimensional error correction strategy, and can automatically switch between BCH code / RS code / CRC+ backup and recovery mechanism according to the error type (single bit / multiple bit / continuous error).

[0044] In an optional embodiment of this application, the method further includes: According to a preset time interval, monitor whether the bit error rate of the raw data in the same area exceeds the first preset threshold, and monitor whether the number of error correction failures of the raw data in the same area exceeds the second preset threshold. If the bit error rate of the raw data in the same area exceeds the first preset threshold, or if the number of error correction failures of the raw data in the same area exceeds the second preset threshold, the current area is determined to be a radiation hotspot area. The redundancy level of the raw data for radiation hotspot areas is increased, the preset data time interval is shortened, and the error correction algorithm is switched.

[0045] In an optional embodiment of this application, the following metric is calculated every 5 minutes: whether the bit error rate (BER) exceeds a threshold 1e. -5 If so, an alarm will be triggered; Error correction attempts: if three consecutive error correction failures occur, the area is identified as a radiation hotspot. For radiation hotspot areas, the following actions will be taken: increase redundancy level (add a new check block); shorten the data refresh cycle (from 10ms to 5ms); switch the error correction algorithm (BCH→RS+CRC joint error correction).

[0046] In an optional embodiment of this application, the method further includes: when a key parameter (such as modulation order or frequency compensation value) is detected to be inconsistent in two consecutive verifications: freezing the current configuration and rolling back to the previous stable version; starting the system self-test program and marking the faulty storage unit as disabled.

[0047] In an optional embodiment of this application, after receiving the raw data from the satellite baseband system, the method further includes: The DPDK data plane module receives network data packets from the network card's transceiver queue, stores the network data packets in the MBUF memory pool, and sends the network data packets to the coroutine scheduling module. Here, DPDK is the data plane development kit, and MBUF is the core structure in DPDK used to encapsulate network data packets. The network data packets are received using a coroutine scheduling module, and the network data packets are preprocessed based on an event loop to generate corresponding files; The task of writing the file is added to the task queue using the task dispatch module, and the task is distributed to the target file cache shard by the load balancer according to the system load. The file caching module uses the target file cache fragments of the fragmented cache area to receive and cache the data fragments of the file write task, and the file reorderer uses the offset information to reorder the data fragments; The asynchronous I / O module is used to submit the reordered data to the storage device interface asynchronously and write it to the underlying storage device. The reordered data is then used as the original data to be segmented into multiple data frames. The monitoring and scheduling module obtains the system resource status through the performance monitor, and the dynamic expansion controller adjusts the coroutine scheduling strategy or load balancing strategy according to the status.

[0048] In an optional embodiment of this application, the network interface card (NIC) transceiver queue is used for high-speed packet reception and transmission from the NIC, and the MBUF memory pool is used to manage the data packet buffer and for lock-free allocation and release of data packet memory.

[0049] In an optional embodiment of this application, the preprocessing of network packets based on the event loop is achieved through the following steps: The coroutine manager creates or wakes up the processing coroutines corresponding to network packets and executes the coroutine logic in the event loop to perform protocol parsing, file ID parsing, and offset calculation on the network packets. The coroutine manager is used to manage the life cycle of coroutines and realize cooperative scheduling, while the event loop is used to drive the execution of coroutines and realize I / O or event-driven logic.

[0050] In an optional embodiment of this application, the task queue is used to store file writing tasks to be processed, and the load balancer is used to select the optimal execution path based on CPU, memory, and I / O pressure.

[0051] In an optional embodiment of this application, the fragmented buffer is used to provide independent cache space for different data fragments of a file, and the file reassembler is used to reassemble the data fragments into a complete file data stream according to the file offset.

[0052] In an optional embodiment of this application, the asynchronous submission of the reordered data to the storage device interface is implemented through an asynchronous write engine, wherein the asynchronous write engine is used to implement batch asynchronous writes using an asynchronous I / O model and an asynchronous I / O interface, and the storage device interface is used to interact with the storage device.

[0053] In an optional embodiment of this application, adjusting the coroutine scheduling strategy or load balancing strategy according to the state includes: Adjust the task queue weight, coroutine concurrency, or cache shard count according to the state. The performance monitor is used to monitor CPU, queue length, number of coroutines, and I / O pressure in real time. The dynamic expansion controller is used to dynamically adjust the amount of system resources or scheduling strategy based on the monitoring indicators.

[0054] In an optional embodiment of this application, the method further includes: The data frames recovered using the error correction algorithm are identified. The identification tasks of multiple recovered data frames are used to generate an inference task set. Load balancing of the multiple data frame identification tasks is achieved through the following steps: Obtain the set of inference tasks and the number of computing units. The set of inference tasks includes multiple inference tasks. Determine the total computing power of all inference tasks in the set of inference tasks and the maximum computing power of a single task based on the set of inference tasks. Based on the total computation of all inference tasks, the maximum computation of a single task, and the number of computing units, a binary search iterative algorithm is used to determine the maximum allocation capacity threshold of computing units and the inference tasks allocated to each computing unit corresponding to the maximum allocation capacity threshold. The assigned inference tasks are sent to each computing unit, enabling each computing unit to execute the assigned inference tasks and output the inference results.

[0055] In an optional embodiment of this application, the step of determining the maximum allocation capacity threshold for each computing unit and the inference task allocated to each computing unit based on the total computational amount of all inference tasks, the maximum computational amount of a single task, and the number of computing units, using a binary search iterative algorithm, includes: Step 1: Initialize the binary search boundary based on the total computation of all inference tasks, the maximum computation of a single task, and the number of computational units n. Step 2: Determine the current intermediate allocation capacity of the computing unit based on the initialized binary search boundary, verify whether the current intermediate allocation capacity can complete the partitioning of the inference task set using n subsets, and divide the inference task set into multiple inference task subsets; Step 3: Adjust the binary search boundary based on the verification results. If the adjusted binary search boundary meets the preset conditions, use the current intermediate allocation capacity as the maximum allocation capacity threshold, and use multiple inference task subsets as the inference tasks allocated to each computing unit corresponding to the maximum allocation capacity threshold. If the adjusted binary search boundary does not meet the preset conditions, use the adjusted binary search boundary as the initial binary search boundary and re-execute Step 2.

[0056] In an optional embodiment of this application, the binary search boundary is initialized based on the total computation of all inference tasks, the maximum computation of a single task, and the number of computational units n, using the following expression:

[0057]

[0058] in, The lower realm The upper bound is n, where n is the number of computational units. The total computational cost for all reasoning tasks. This represents the maximum computational cost for a single task.

[0059] In an optional embodiment of this application, the current intermediate allocation capacity of the computing unit is determined based on the initialized binary search boundary using the following expression:

[0060] in, Allocate capacity in the intermediate stage of the t-th iteration of the computation unit. This is the lower bound for the (t-1)th iteration. It is the upper bound of the (t-1)th iteration.

[0061] In an optional embodiment of this application, the step of verifying whether the current intermediate allocation capacity is divided into n subsets to complete the partitioning of the inference task set, and dividing the inference task set into multiple inference task subsets, includes: Rearrange all reasoning tasks S in descending order of element size to obtain S'={s1',s2',...,sm'}, satisfying s1'≥s2'... ≥sm'; Initialize the empty subset collection Bins = []. The following steps are used to pack elements in descending order: For each si', iterate through the created subsets B∈Bins and check whether sum(B) + si'≤Ct is satisfied; If the first subset B that satisfies the condition is found, add si' to B; If no subset that meets the conditions is found, create a new subset Bnew = {si'} and add it to the set Bins; The number of subsets is calculated as bin_count = |Bins|, which is the number of subsets required under the current intermediate allocation capacity Ct. If bin_count ≤ n, the verification passes; otherwise, the verification fails, where n is the number of computational units.

[0062] In an optional embodiment of this application, adjusting the binary search boundary based on the verification result includes: If bin_count≤n, then update the upper bound Ut = Ct, where bin_count is the number of subsets of inference tasks, n is the number of computation units, Ut is the upper bound, and Ct is the current intermediate allocation capacity; If bin_count > n, then update the lower bound Lt = Ct, where Lt is the lower bound.

[0063] In an optional embodiment of this application, the preset condition is: Ut == Lt or the number of iterations reaches the preset parameter k, where Ut is the upper bound and Lt is the lower bound.

[0064] This application provides a three-level dynamic redundant storage architecture with a closed-loop quality monitoring system: real-time statistics of indicators such as bit error rate and number of error corrections, dynamically adjusting redundancy level, refresh frequency, and error correction algorithm parameters; closed-loop parameter optimization, based on an adaptive adjustment mechanism of real-time bit error statistics to cope with dynamic changes in the radiation environment; and a version rollback function: enabling rapid rollback of data anomalies through timestamp comparison to ensure minimal system interruption. Through a three-level collaborative mechanism of "redundant storage - dynamic error correction - real-time optimization," radiation protection is achieved.

[0065] It should be understood that although the steps in the flowchart are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order constraint on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the diagram may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the sub-steps or stages of other steps.

[0066] Please see Figure 4 One embodiment of this application provides a radiation-resistant storage device 400 for satellite baseband system data, comprising: The segmentation module 410 is used to receive raw data from the satellite baseband system, segment the raw data, and obtain multiple data frames. The generation module 420 is used to generate a check bit and a redundancy symbol corresponding to the current data frame for each data frame, combine the current data frame and its corresponding check bit to obtain a first combined data frame, store the first combined data frame in a first preset data area and a second preset data area, and store the redundancy symbol in a preset check area. Verification module 430 is used to read the first combined data frame of the first preset data area and determine whether the read first combined data frame passes the verification. The recovery module 440 is used to determine the error type and its corresponding error correction algorithm of the current first combined data frame when the current first combined data frame fails the verification, and to recover the current data frame based on the combined data frame and redundant symbols stored in the second preset data area and the preset verification area respectively, according to the error correction algorithm.

[0067] Specific limitations regarding the aforementioned device 400 can be found in the above description of the radiation-resistant storage method for satellite baseband system data, and will not be repeated here. Each module in the aforementioned device 400 can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0068] In one embodiment, a computer device is provided, the internal structure of which can be as follows: Figure 5As shown. The computer device includes a processor, memory, network interface, and database connected via a system bus. The processor provides computing and control capabilities. The memory includes a non-volatile storage medium and internal memory. The non-volatile storage medium stores an operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The database stores data. The network interface communicates with external terminals via a network connection. When the computer program is executed by the processor, it implements the radiation-resistant storage method for satellite baseband system data described above. It includes: a memory and a processor; the memory stores a computer program; and the processor executes the computer program to implement any step of the radiation-resistant storage method for satellite baseband system data described above.

[0069] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, can perform any of the steps in the radiation-resistant storage method for satellite baseband system data described above.

[0070] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0071] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0072] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0073] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0074] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.

[0075] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A radiation-resistant storage method for satellite baseband system data, characterized in that, include: Receive raw data from the satellite baseband system, segment the raw data, and obtain multiple data frames; For each data frame, generate the check bit and redundancy symbol corresponding to the current data frame, combine the current data frame and its corresponding check bit to obtain the first combined data frame, store the first combined data frame in the first preset data area and the second preset data area, and store the redundancy symbol in the preset check area. Read the first combined data frame from the first preset data area and determine whether the read first combined data frame passes the verification. If the current first combined data frame fails the verification, determine the error type and the corresponding error correction algorithm of the current first combined data frame, and restore the current data frame according to the error correction algorithm based on the combined data frames and redundant symbols stored in the second preset data area and the preset verification area respectively.

2. The method according to claim 1, characterized in that, The step of generating the checksum corresponding to the current data frame includes: If the current data frame is a binary data frame, shift the current data frame left by N bits, where N is the length of the parity bit; Divide the left-shifted data frame by the binary value corresponding to the generator polynomial, and perform MN cyclic shifts and XOR operations, where M is the bit length of the left-shifted data frame, and the first preset generator polynomial is related to N: If the high-order bit of the left-shifted data frame is 1, then the data frame is XORed with the binary value of the generator polynomial after shifting left by 1 bit. If the high-order bit of the left-shifted data frame is 0, then the data frame is shifted left. Obtain the checksum corresponding to the current data frame. The generation of redundant symbols corresponding to the current data frame includes: If the current data frame is a binary data frame, convert the current data frame into an L-ary data frame corresponding to the redundant symbols, where L-ary is not binary; The L-ary data frame is converted into a polynomial, multiplied by a second preset generator polynomial, to generate a redundant symbol corresponding to the current data frame. The second preset generator polynomial is related to the bit length of the redundant symbol.

3. The method according to claim 2, characterized in that, Determining whether the first combined data frame read passes the verification includes: Determine the remainder obtained by dividing the first combined data frame read by the first preset generator polynomial; If the remainder is 0, it is determined that the first combined data frame read passes the verification. If the remainder is not 0, it is determined that the first combined data frame read has failed the verification.

4. The method according to claim 2, characterized in that, The step of storing redundant symbols in a preset verification area includes: The redundant symbols are combined with the L-ary data frame to obtain the second combined data frame; The second combined data frame is stored in the preset verification area.

5. The method according to claim 1, characterized in that, The step of determining the error type and corresponding error correction algorithm of the current first combined data frame includes: Determine whether the adjoint satisfies s1 3 = s3, where s1 is the first combined data frame read at the first preset generator polynomial root. The value of s3 is the first combined data frame read at the first preset generator polynomial root. The value; In the conjunctive equation, s1 is satisfied. 3 In the case of = s3, the error type corresponding to the current first combined data frame is determined to be a single bit error, and the error correction algorithm is to locate the error position and invert it; When the adjoint expression does not satisfy s1 3 In the case of = s3, the error type corresponding to the current first combined data frame is determined to be a multi-bit error, and the error correction algorithm is to recover the data using the redundant symbols in the check area; If the number of erroneous positions in a multi-bit error exceeds a preset number, the error correction algorithm deletes the current first combined data frame.

6. The method according to claim 5, characterized in that, The combined data frame and redundant symbols stored in the second preset data area and the preset verification area, respectively, are used to recover the current data frame according to the error correction algorithm, including: When the error correction algorithm locates the error position and inverts it, the error position is determined as follows: And invert the binary value at the error position; When the error correction algorithm uses redundant symbols in the check area to recover data, redundant symbols are read from the preset check area. The read redundant symbols are used to construct a receiving polynomial. The remainder obtained by dividing the receiving polynomial by the second preset generator polynomial is the adjoint expression. The adjoint expression is then substituted into the expression. In the middle, solve the error location polynomial and error value polynomial Based on and Determine the error location and error value, and repair the original data based on the error location and error value using Galois domain operations; If the error correction algorithm deletes the current first group of data frames, the latest valid copy in the second preset data area is selected to overwrite the first preset data area.

7. The method according to claim 1, characterized in that, The method further includes: According to a preset time interval, monitor whether the bit error rate of the raw data in the same area exceeds the first preset threshold, and monitor whether the number of error correction failures of the raw data in the same area exceeds the second preset threshold. If the bit error rate of the raw data in the same area exceeds the first preset threshold, or if the number of error correction failures of the raw data in the same area exceeds the second preset threshold, the current area is determined to be a radiation hotspot area. The redundancy level of the raw data for radiation hotspot areas is increased, the preset data time interval is shortened, and the error correction algorithm is switched.

8. A radiation-resistant storage device for satellite baseband system data, characterized in that, include: The segmentation module is used to receive raw data from the satellite baseband system, segment the raw data, and obtain multiple data frames. The generation module is used to generate a check bit and a redundancy symbol corresponding to the current data frame for each data frame, combine the current data frame and its corresponding check bit to obtain a first combined data frame, store the first combined data frame in a first preset data area and a second preset data area, and store the redundancy symbol in a preset check area. The verification module is used to read the first combined data frame from the first preset data area and determine whether the read first combined data frame passes the verification. The recovery module is used to determine the error type and corresponding error correction algorithm of the current first combined data frame when the current first combined data frame fails the verification, and to recover the current data frame based on the combined data frames and redundant symbols stored in the second preset data area and the preset verification area respectively, according to the error correction algorithm.

9. A computer device, comprising: A memory and a processor, the memory storing a computer program, the processor executing the computer program to implement the steps of the radiation-resistant storage method for satellite baseband system data as described in any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the radiation-resistant storage method for satellite baseband system data as described in any one of claims 1 to 7.

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