A data read-write method and device of a flash memory device, an apparatus, and a medium

Abstract

The application discloses a data read-write method and device of a flash memory device, equipment and a medium. The method comprises the following steps: acquiring real-time working parameters and application scene information of the flash memory device, and calculating a reliability representation vector according to the real-time working parameters; determining a tolerance boundary vector according to the application scene information, and calculating a reliability state index according to the reliability representation vector and the tolerance boundary vector; calculating error correction capability evaluation information according to the reliability state index and a current error correction coding parameter, adjusting the current error correction coding parameter according to the error correction capability evaluation information to obtain a target error correction coding parameter; performing error correction coding on to-be-written data of the flash memory device according to the target error correction coding parameter to obtain coded data, and writing the coded data into the flash memory device. The technical scheme realizes dynamic self-adaptive adjustment of the error correction coding parameter, and improves the reliability and efficiency of data read-write.

Description

Technical Field

[0001] This application belongs to the field of electronic digital data processing technology, specifically relating to a data read / write method, apparatus, device, and medium for a flash memory device. Background Technology

[0002] Flash memory devices are widely used in consumer electronics, industrial control, and enterprise-level storage due to their advantages such as high read / write speeds, low power consumption, and strong shock resistance. However, under complex operating environments such as high temperatures, high-frequency access, or chip wear caused by long-term use, flash memory devices are prone to physical phenomena such as threshold voltage drift and charge leakage, which can lead to bit errors and affect the accuracy of data read and write operations.

[0003] Currently, flash memory devices primarily employ fixed error correction coding methods for data encoding. However, fixed error correction coding methods struggle to adapt to complex and ever-changing working environments and conditions, leading to insufficient adaptability during actual operation and consequently affecting the stability and reliability of data read and write operations. Summary of the Invention

[0004] This application provides a data read / write method, apparatus, device, and medium for a flash memory device, with the aim of achieving dynamic adaptive adjustment of error correction coding parameters to improve the reliability and efficiency of data read / write.

[0005] In a first aspect, embodiments of this application provide a data read / write method for a flash memory device, the method comprising:

[0006] In response to a write data request, the system obtains the real-time operating parameters of the flash memory device and application scenario information, and calculates a reliability characterization vector based on the real-time operating parameters; wherein, the real-time operating parameters include the number of rereads;

[0007] The tolerance boundary vector is determined based on the application scenario information, and the reliability status index is calculated based on the reliability characterization vector and the tolerance boundary vector.

[0008] The error correction capability assessment information is calculated based on the reliability status index and the current error correction coding parameters, and the current error correction coding parameters are adjusted based on the error correction capability assessment information to obtain the target error correction coding parameters;

[0009] The data to be written to the flash memory device is subjected to error correction encoding according to the target error correction encoding parameters to obtain encoded data, and the encoded data is written to the flash memory device.

[0010] In response to a read data request, the encoded data is decoded according to the target error correction coding parameters to obtain readable data.

[0011] Furthermore, the current error correction coding parameters include codeword length, number of parity bits, and number of decoding iterations;

[0012] Accordingly, the step of calculating the error correction capability assessment information based on the reliability status index and the current error correction coding parameters includes:

[0013] The basic number of error-correctable bits is calculated based on the number of parity bits, the decoding capability gain coefficient is determined based on the number of decoding iterations, and the basic number of error-correctable bits is multiplied by the decoding capability gain coefficient to obtain the maximum number of error-correctable bits.

[0014] The target number of error-correctable bits is determined based on the reliability status index, and the difference between the maximum number of error-correctable bits and the target number of error-correctable bits is calculated as error correction capability assessment information.

[0015] Furthermore, determining the target number of error-correctable bits based on the reliability status index includes:

[0016] The initial number of error-correctable bits is determined based on the reliability status index and the codeword length.

[0017] Obtain the decoding failure rate of the flash memory device in the most recent preset number of read operations, and determine the corresponding target correction coefficient based on the decoding failure rate;

[0018] The target number of error-correctable bits is obtained by multiplying the initial number of error-correctable bits by the target correction coefficient.

[0019] Furthermore, determining the corresponding target correction coefficient based on the decoding failure rate includes:

[0020] Obtain the historical decoding failure event sequence of the flash memory device, and count the number of flash memory pages successfully written between two adjacent decoding failure events based on the historical decoding failure event sequence;

[0021] Calculate the ratio of the standard deviation to the mean of the number of flash memory pages;

[0022] Obtain the preset basic correction coefficient corresponding to the decoding failure rate, and multiply the preset basic correction coefficient by the ratio to obtain the target correction coefficient corresponding to the decoding failure rate.

[0023] Furthermore, adjusting the current error correction coding parameters based on the error correction capability assessment information to obtain the target error correction coding parameters includes:

[0024] If the error correction capability assessment information is lower than the first threshold, the number of parity bits in the current error correction coding parameters is increased by a first preset adjustment step size, and the codeword length in the current error correction coding parameters is decreased by a second preset adjustment step size.

[0025] If the error correction capability assessment information is higher than the second threshold, the number of parity bits in the current error correction coding parameters is reduced by the first preset adjustment step size, and the codeword length in the current error correction coding parameters is increased by the second preset adjustment step size, wherein the first threshold is less than the second threshold.

[0026] Recalculate the error correction capability assessment information corresponding to the current error correction coding parameters, and repeat the above steps until the difference in the adjustment result of the error correction capability assessment information is less than the preset convergence threshold, and obtain the target error correction coding parameters.

[0027] Furthermore, the step of calculating the reliability status index based on the reliability characterization vector and the tolerance boundary vector includes:

[0028] Calculate the ratio of each corresponding component between the reliability characterization vector and the tolerance boundary vector;

[0029] Determine the largest corresponding component ratio among all corresponding component ratios, calculate the difference between the largest corresponding component ratio and a preset benchmark value, and determine the reliability status index based on the difference.

[0030] Furthermore, determining the reliability status index based on the difference includes:

[0031] Obtain the current programming and erasure cycle interval of the flash memory device, and calculate the average reread rate growth rate of the flash memory device within the current programming and erasure cycle interval;

[0032] Multiplying the difference by the average reread rate growth rate yields the reliability status index.

[0033] Secondly, embodiments of this application provide a data read / write apparatus for a flash memory device, the apparatus comprising:

[0034] The characterization vector acquisition module is used to respond to a write data request, acquire the real-time operating parameters of the flash memory device and application scenario information, and calculate the reliability characterization vector based on the real-time operating parameters; wherein, the real-time operating parameters include the number of rereads;

[0035] The reliability state determination module is used to determine the tolerance boundary vector based on the application scenario information, and to calculate the reliability state index based on the reliability characterization vector and the tolerance boundary vector.

[0036] The target parameter determination module is used to calculate error correction capability assessment information based on the reliability status index and the current error correction coding parameters, and adjust the current error correction coding parameters based on the error correction capability assessment information to obtain the target error correction coding parameters.

[0037] The error correction coding writing module is used to perform error correction coding on the data to be written to the flash memory device according to the target error correction coding parameters, obtain coded data, and write the coded data to the flash memory device;

[0038] The data decoding and reading module is used to respond to a data read request by decoding the encoded data according to the target error correction encoding parameters to obtain readable data.

[0039] Furthermore, the current error correction coding parameters include codeword length, number of parity bits, and number of decoding iterations;

[0040] Accordingly, the target parameter determination module is specifically used for:

[0041] The basic number of error-correctable bits is calculated based on the number of parity bits, the decoding capability gain coefficient is determined based on the number of decoding iterations, and the basic number of error-correctable bits is multiplied by the decoding capability gain coefficient to obtain the maximum number of error-correctable bits.

[0042] The target number of error-correctable bits is determined based on the reliability status index, and the difference between the maximum number of error-correctable bits and the target number of error-correctable bits is calculated as error correction capability assessment information.

[0043] Furthermore, the target parameter determination module is specifically used for:

[0044] The initial number of error-correctable bits is determined based on the reliability status index and the codeword length.

[0045] Obtain the decoding failure rate of the flash memory device in the most recent preset number of read operations, and determine the corresponding target correction coefficient based on the decoding failure rate;

[0046] The target number of error-correctable bits is obtained by multiplying the initial number of error-correctable bits by the target correction coefficient.

[0047] Furthermore, the target parameter determination module is specifically used for:

[0048] Obtain the historical decoding failure event sequence of the flash memory device, and count the number of flash memory pages successfully written between two adjacent decoding failure events based on the historical decoding failure event sequence;

[0049] Calculate the ratio of the standard deviation to the mean of the number of flash memory pages;

[0050] Obtain the preset basic correction coefficient corresponding to the decoding failure rate, and multiply the preset basic correction coefficient by the ratio to obtain the target correction coefficient corresponding to the decoding failure rate.

[0051] Furthermore, the target parameter determination module is specifically used for:

[0052] If the error correction capability assessment information is lower than the first threshold, the number of parity bits in the current error correction coding parameters is increased by a first preset adjustment step size, and the codeword length in the current error correction coding parameters is decreased by a second preset adjustment step size.

[0053] If the error correction capability assessment information is higher than the second threshold, the number of parity bits in the current error correction coding parameters is reduced by the first preset adjustment step size, and the codeword length in the current error correction coding parameters is increased by the second preset adjustment step size, wherein the first threshold is less than the second threshold.

[0054] Recalculate the error correction capability assessment information corresponding to the current error correction coding parameters, and repeat the above steps until the difference in the adjustment result of the error correction capability assessment information is less than the preset convergence threshold, and obtain the target error correction coding parameters.

[0055] Furthermore, the reliable state determination module is specifically used for:

[0056] Calculate the ratio of each corresponding component between the reliability characterization vector and the tolerance boundary vector;

[0057] Determine the largest corresponding component ratio among all corresponding component ratios, calculate the difference between the largest corresponding component ratio and a preset benchmark value, and determine the reliability status index based on the difference.

[0058] Furthermore, the reliable state determination module is specifically used for:

[0059] Obtain the current programming and erasure cycle interval of the flash memory device, and calculate the average reread rate growth rate of the flash memory device within the current programming and erasure cycle interval;

[0060] Multiplying the difference by the average reread rate growth rate yields the reliability status index.

[0061] Thirdly, embodiments of this application provide an electronic device including a processor, a memory, and a program or instructions stored in the memory and executable on the processor, wherein the program or instructions, when executed by the processor, implement the method described in the first aspect.

[0062] Fourthly, embodiments of this application provide a readable storage medium on which a program or instructions are stored, which, when executed by a processor, implement the method described in the first aspect.

[0063] In this embodiment, in response to a write data request, real-time operating parameters and application scenario information of the flash memory device are obtained, and a reliability characterization vector is calculated based on the real-time operating parameters; wherein, the real-time operating parameters include the number of rereads; a tolerance boundary vector is determined based on the application scenario information, and a reliability status index is calculated based on the reliability characterization vector and the tolerance boundary vector; error correction capability evaluation information is calculated based on the reliability status index and the current error correction coding parameters, and the current error correction coding parameters are adjusted based on the error correction capability evaluation information to obtain target error correction coding parameters; error correction coding is performed on the data to be written to the flash memory device according to the target error correction coding parameters to obtain encoded data, and the encoded data is written to the flash memory device; in response to a read data request, the encoded data is decoded according to the target error correction coding parameters to obtain readable data. The above-described flash memory device data read / write method achieves dynamic adaptive adjustment of error correction coding parameters, improving the reliability and efficiency of data read / write. Attached Figure Description

[0064] Figure 1 This is a schematic flowchart of a data read / write method for a flash memory device provided in an embodiment of this application;

[0065] Figure 2 This is a flowchart illustrating another data read / write method for a flash memory device provided in an embodiment of this application;

[0066] Figure 3 This is a flowchart illustrating another data read / write method for a flash memory device provided in an embodiment of this application;

[0067] Figure 4 This is a schematic diagram of the structure of a data read / write device for a flash memory device provided in an embodiment of this application;

[0068] Figure 5 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0069] To make the objectives, technical solutions, and advantages of this application clearer, specific embodiments of this application will be described in further detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are merely for explaining this application and not for limiting it. It should also be noted that, for ease of description, only the parts relevant to this application are shown in the drawings, not all of them. Before discussing exemplary embodiments in more detail, it should be mentioned that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although the flowcharts describe operations (or steps) as sequential processes, many of these operations can be performed in parallel, concurrently, or simultaneously. Furthermore, the order of the operations can be rearranged. The process can be terminated when its operation is completed, but may also have additional steps not included in the drawings. The process can correspond to a method, function, procedure, subroutine, subprogram, etc.

[0070] The technical solutions of the embodiments of this application will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application are within the scope of protection of this application.

[0071] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0072] The data read / write method, apparatus, device, and medium of the flash memory device provided in this application will be described in detail below with reference to the accompanying drawings and through specific embodiments and application scenarios.

[0073] First, this application is applicable to scenarios requiring a dynamic balance between data storage reliability and read / write efficiency in flash memory devices. Based on the aforementioned use case, it is understood that the implementing entity of this application can be a flash memory device.

[0074] Flash memory devices can refer to various hardware devices and related modules that use flash memory chips as the core storage medium and rely on flash memory technology to realize data storage and reading / writing. They are the carriers for the practical application of flash memory technology, and no further restrictions are imposed here.

[0075] Figure 1 This is a schematic flowchart illustrating a data read / write method for a flash memory device provided in an embodiment of this application. Figure 1 As shown, the specific steps include the following:

[0076] S101, in response to a write data request, obtain the real-time operating parameters of the flash memory device and application scenario information, and calculate a reliability characterization vector based on the real-time operating parameters; wherein, the real-time operating parameters include the number of rereads.

[0077] The write data request can be sent by an upper-layer application, system kernel, or external device, and is an instruction information packet used to trigger the writing of data to the flash memory device.

[0078] In one embodiment, in response to a write data request, an interrupt signal can be triggered to start the write data process when a write data instruction is received from an upper-layer application.

[0079] Real-time operating parameters can be key parameters reflecting the current operating status and wear of the flash memory device, including the number of read re-runs, flash memory device temperature, and the degree of wear. Specifically, the number of read re-runs can be the total number of repeated read operations performed within a preset time window before the current write request is triggered due to data verification failures or read errors.

[0080] The application scenario information can refer to the application scenario type or level of the flash memory device, such as consumer-grade, industrial-grade, and enterprise-grade.

[0081] In one embodiment, the real-time operating parameters and application scenario information of the flash memory device can be obtained by reading the recorded real-time operating parameters through the SMART (Self-Monitoring, Analysis and Reporting Technology) interface of the flash memory device, reading the preset scenario configuration file in the flash memory device or receiving the scenario identifier transmitted by the upper layer application, and parsing to obtain the application scenario information.

[0082] The reliability characterization vector can be a vector of standardized parameters in multiple dimensions, with each dimension corresponding to a real-time operating parameter.

[0083] In one embodiment, the reliability characterization vector can be calculated based on real-time operating parameters by mapping each real-time operating parameter to a uniform numerical range, multiplying each real-time operating parameter by its corresponding preset influence weight, and concatenating the multiplication results to obtain the reliability characterization vector. For example, if the real-time operating parameters only include the number of read repetitions, the corresponding preset influence weight can be 1; if the real-time operating parameters include the number of read repetitions, flash memory device temperature, and flash memory device wear level, the corresponding preset influence weights can be 0.5, 0.3, and 0.2, respectively.

[0084] S102, determine the tolerance boundary vector based on the application scenario information, and calculate the reliability status index based on the reliability characterization vector and the tolerance boundary vector.

[0085] Among them, the tolerance boundary vector can be a vector composed of tolerance thresholds of each real-time working parameter dimension, which is preset based on application scenario information.

[0086] In one embodiment, the method for determining the tolerance boundary vector based on application scenario information can be to pre-construct a mapping relationship between application scenario information and tolerance boundary vectors, and then query this mapping relationship using the current application scenario information as the query condition to obtain the corresponding tolerance boundary vector. For example, the reliability characterization vector and the tolerance boundary vector only include one dimension: the number of rereads. The mapping relationship between application scenario information and tolerance boundary vector can be as follows: if the application scenario information is enterprise-level, the corresponding tolerance boundary vector is [0.15]; if the application scenario information is industrial-level, the corresponding tolerance boundary vector is [0.3]; if the application scenario information is consumer-level, the corresponding tolerance boundary vector is [0.6].

[0087] Among them, the reliability status index can be a quantitative value that reflects the degree to which the current reliability level of the flash memory device matches the bottom line of the scenario tolerance.

[0088] In one embodiment, the reliability status index can be calculated based on the reliability characterization vector and the tolerance boundary vector by subtracting the tolerance boundary vector from the reliability characterization vector to obtain a deviation vector, and then summing the specific values ​​of each real-time operating parameter dimension in the deviation vector to obtain the reliability status index.

[0089] S103, calculate error correction capability assessment information based on the reliability status index and the current error correction coding parameters, and adjust the current error correction coding parameters based on the error correction capability assessment information to obtain the target error correction coding parameters.

[0090] Among them, the error correction coding parameters can be the core configuration parameters used for data error correction coding, and can include the coding algorithm type. Accordingly, the current error correction coding parameters can be the error correction coding parameters used in the previous read / write operation on the flash memory device; the target error correction coding parameters can be the error correction coding parameters dynamically adjusted according to the current reliability status indicators.

[0091] Among them, the error correction capability assessment information can be an assessment result that characterizes the degree to which the current error correction coding parameters are adapted to the current reliability status of the flash memory device.

[0092] In one embodiment, the method for calculating the error correction capability assessment information based on the reliability status index and the current error correction coding parameters can be as follows: when the reliability status index is a positive value and the coding algorithm type in the current error correction coding parameters is LDPC, the error correction capability assessment information is determined to be 1; when the reliability status index is a negative value and the coding algorithm type in the current error correction coding parameters is LDPC+RAID2, the error correction capability assessment information is determined to be 2; and in other cases, the error correction capability assessment information is determined to be 3.

[0093] Among them, LDPC (Low-Density Parity-Check Code) can be a linear error correction code based on a sparse parity matrix; RAID2 (Redundant Array of Independent Disks Level 2) can be a RAID technology based on Hamming codes; LDPC+RAID2 can be a hybrid error correction scheme that combines LDPC and RAID2 technologies, using LDPC to correct basic random and burst errors, and then using the Hamming parity mechanism of RAID2 to provide additional bit-level error location and correction capabilities.

[0094] In one embodiment, the method of adjusting the current error correction coding parameters based on the error correction capability assessment information to obtain the target error correction coding parameters can be as follows: if the error correction capability assessment information is 1, the coding algorithm type in the current error correction coding parameters is adjusted to LDPC+RAID2 to obtain the target error correction coding parameters; if the error correction capability assessment information is 2, the coding algorithm type in the current error correction coding parameters is adjusted to LDPC to obtain the target error correction coding parameters; if the error correction capability assessment information is 3, the current error correction coding parameters are directly determined as the target error correction coding parameters.

[0095] S104, perform error correction encoding on the data to be written to the flash memory device according to the target error correction encoding parameters to obtain encoded data, and write the encoded data to the flash memory device.

[0096] The data to be written can be the original data carried in the write data request; the encoded data can be the integrated data containing the original data and redundant error correction information after the original data has been processed by the target error correction coding parameters.

[0097] In one embodiment, the method of performing error correction encoding on the data to be written in the flash memory device according to the target error correction encoding parameters to obtain encoded data can be as follows: if the flash memory device is equipped with a hardware encoding module, the target error correction encoding parameters and the data block to be written are passed to the hardware encoding module, and the error correction encoding is completed in parallel by the hardware encoding module; otherwise, a preset error correction encoding algorithm library is called to encode the data block to be written one by one according to the target error correction encoding parameters to generate an encoded data block containing redundant information.

[0098] In one embodiment, the method of writing encoded data to a flash memory device can be to determine the physical storage block corresponding to the encoded data based on the logical address mapping table of the flash memory device, and then write the encoded data to the corresponding physical storage block.

[0099] S105, in response to the read data request, the encoded data is decoded according to the target error correction coding parameters to obtain readable data.

[0100] Among them, the read data request can be an instruction sent by an upper-layer application, system kernel or external device to obtain data at a specified address, which is used to trigger the data read process of the flash memory device.

[0101] Among them, readable data can be the original data after the encoded data has been decoded, redundant error correction information has been removed, and errors have been corrected. Its format is consistent with the data to be written and can be directly called by the upper layer application.

[0102] In one embodiment, in response to a read data request, the encoded data is decoded according to the target error correction coding parameters to obtain readable data. This can be achieved by parsing the logical address in the read data request, querying the corresponding physical storage block through the logical address mapping table of the flash memory device, and calling the corresponding decoding algorithm according to the target error correction coding parameters to decode the stored data in the physical storage block to obtain readable data.

[0103] In this embodiment, in response to a write data request, real-time operating parameters and application scenario information of the flash memory device are obtained, and a reliability characterization vector is calculated based on the real-time operating parameters; wherein, the real-time operating parameters include the number of rereads; a tolerance boundary vector is determined based on the application scenario information, and a reliability status index is calculated based on the reliability characterization vector and the tolerance boundary vector; error correction capability evaluation information is calculated based on the reliability status index and the current error correction coding parameters, and the current error correction coding parameters are adjusted based on the error correction capability evaluation information to obtain target error correction coding parameters; error correction coding is performed on the data to be written to the flash memory device according to the target error correction coding parameters to obtain encoded data, and the encoded data is written to the flash memory device; in response to a read data request, the encoded data is decoded according to the target error correction coding parameters to obtain readable data. The above-described data read and write operation of the flash memory device achieves dynamic adaptive adjustment of the error correction coding parameters, improving the reliability and efficiency of data read and write.

[0104] Figure 2 This is a flowchart illustrating another data read / write method for a flash memory device provided in an embodiment of this application. Figure 2 As shown, the specific steps include the following:

[0105] S201, in response to a write data request, obtain the real-time operating parameters of the flash memory device and application scenario information, and calculate a reliability characterization vector based on the real-time operating parameters; wherein, the real-time operating parameters include the number of rereads.

[0106] S202, determine the tolerance boundary vector based on the application scenario information, and calculate the reliability status index based on the reliability characterization vector and the tolerance boundary vector.

[0107] S203, calculate the basic number of error-correctable bits based on the number of parity bits, determine the decoding capability gain coefficient based on the number of decoding iterations, and multiply the basic number of error-correctable bits by the decoding capability gain coefficient to obtain the maximum number of error-correctable bits.

[0108] The current error correction coding parameters can include codeword length, number of parity bits, and number of decoding iterations. Specifically, codeword length can be the total number of bits of the original data and parity data in a single error correction coding process; the number of parity bits can be the number of redundant bits added to implement the error correction function; and the number of decoding iterations can be the maximum number of times the parity algorithm is executed during the decoding process.

[0109] Among them, the number of error-correctable bits can be the upper limit of the number of error bits that the error correction coding scheme can accurately identify and correct. Correspondingly, the basic number of error-correctable bits can be the theoretical upper limit of error correction capability determined only by the number of parity bits; the maximum number of error-correctable bits can be the maximum error correction capability that can actually be achieved after combining the number of parity bits and the number of decoding iterations; and the target number of error-correctable bits can be the minimum error correction capability required to ensure the reliability of data read and write based on the current reliability status of the flash memory device.

[0110] In one embodiment, the basic number of correctable bits can be calculated by multiplying the number of check bits by a preset error correction ratio coefficient. The preset error correction ratio coefficient can be a fixed constant based on the hardware characteristics of the flash memory device and the general error rate, and its value can range from 0.3 to 0.5.

[0111] Among them, the decoding capability gain coefficient can be a quantitative coefficient that characterizes the effect of the number of decoding iterations on the improvement of error correction capability.

[0112] In one embodiment, the method of determining the decoding capability gain coefficient based on the number of decoding iterations can be achieved by pre-setting the correspondence between the number of decoding iterations and the decoding capability gain coefficient. For example, when the number of decoding iterations is less than or equal to 50, the corresponding decoding capability gain coefficient is 1.0; when the number of decoding iterations is greater than 50 and less than or equal to 100, the corresponding decoding capability gain coefficient is 1.3; when the number of decoding iterations is greater than 100 and less than or equal to 150, the corresponding decoding capability gain coefficient is 1.6; and when the number of decoding iterations is greater than 150, the corresponding decoding capability gain coefficient is 1.9.

[0113] In one embodiment, the method of multiplying the basic number of error-correctable bits by the decoding capability gain coefficient to obtain the maximum number of error-correctable bits can be achieved by directly multiplying the basic number of error-correctable bits by the decoding capability gain coefficient and then rounding the result to obtain the maximum number of error-correctable bits.

[0114] S204, determine the target number of error-correctable bits based on the reliability status index, and calculate the difference between the maximum number of error-correctable bits and the target number of error-correctable bits as error correction capability evaluation information.

[0115] In one embodiment, the method for determining the target number of error-correctable bits based on the reliability status index can be as follows: When the reliability status index is positive, multiply the preset baseline number of error-correctable bits by a preset gain coefficient and add 1 to the result to obtain the target number of error-correctable bits. When the reliability status index is negative, multiply the preset baseline number of error-correctable bits by a preset attenuation coefficient and subtract 1 from the result to obtain the target number of error-correctable bits. When the reliability status index is 0, the preset baseline number of error-correctable bits is directly determined as the target number of error-correctable bits. The preset baseline number of error-correctable bits can be a baseline error-correcting capability value preset based on the hardware specifications and normal operating error rate of the flash memory device, such as 32 bits. The preset gain coefficient can be a quantization coefficient used to amplify the baseline error-correcting capability, such as 2.0. The preset attenuation coefficient can be a quantization coefficient used to moderately reduce the baseline error-correcting capability, such as 1.0.

[0116] In one embodiment, determining the target number of error-correctable bits based on the reliability status index includes: determining an initial number of error-correctable bits based on the reliability status index and the codeword length; obtaining the decoding failure rate of the flash memory device in the most recent preset number of read operations, and determining a corresponding target correction coefficient based on the decoding failure rate; and multiplying the initial number of error-correctable bits by the target correction coefficient to obtain the target number of error-correctable bits.

[0117] The initial number of error-correctable bits can be a reference value for error correction capability that is initially derived based on the current encoding specifications and reliability status of the flash memory device.

[0118] In one embodiment, the method for determining the initial number of error-correctable bits based on the reliability status index and the codeword length can be by adding 1 to the reliability status index and multiplying the result by the codeword length to obtain the initial number of error-correctable bits.

[0119] The decoding failure rate of the flash memory device in the most recent preset number of read operations can be the proportion of the number of times the flash memory device failed to decode in the most recent preset number of read operations out of the preset number of operations.

[0120] In one embodiment, the decoding failure rate of a flash memory device in the most recent preset number of read operations can be obtained by reading the operation log of the flash memory device, counting the number of decoding failures in the most recent preset number of read operations, dividing the number of decoding failures by the preset number and multiplying by 100% to obtain the decoding failure rate.

[0121] Among them, the target correction coefficient can be an error correction capability calibration coefficient that is dynamically adjusted based on the decoding failure rate.

[0122] In one embodiment, the method of determining the corresponding target correction coefficient based on the decoding failure rate can be to pre-build a correspondence between the decoding failure rate and the target correction coefficient. For example, if the decoding failure rate is less than or equal to 1%, the corresponding target correction coefficient is 0.9; if the decoding failure rate is greater than 1% and less than or equal to 3%, the corresponding target correction coefficient is 1.1; if the decoding failure rate is greater than 3% and less than or equal to 5%, the corresponding target correction coefficient is 1.3; and if the decoding failure rate is greater than 5%, the corresponding target correction coefficient is 1.5.

[0123] In one embodiment, determining the corresponding target correction coefficient based on the decoding failure rate includes: acquiring a historical decoding failure event sequence of the flash memory device, and counting the number of flash memory pages successfully written between two adjacent decoding failure events based on the historical decoding failure event sequence; calculating the ratio of the standard deviation to the average value of the number of flash memory pages; acquiring a preset basic correction coefficient corresponding to the decoding failure rate, and multiplying the preset basic correction coefficient by the ratio to obtain the target correction coefficient corresponding to the decoding failure rate.

[0124] The historical decoding failure event sequence of the flash memory device can be an event list formed by sorting all decoding failure events in the flash memory device in chronological order within the most recent preset time window or the most recent preset number of operations.

[0125] In one embodiment, the historical decoding failure event sequence of a flash memory device can be obtained by reading the fault log storage module of the flash memory device to obtain the historical decoding failure event sequence stored therein.

[0126] The number of flash pages successfully written between two adjacent decoding failure events can be the total number of flash pages successfully written by the flash device during the period between the i-th decoding failure event and the (i+1)-th decoding failure event in the historical decoding failure event sequence.

[0127] In one embodiment, the method of counting the number of flash pages successfully written between two adjacent decoding failure events based on the historical decoding failure event sequence can be achieved by traversing the historical decoding failure event sequence, extracting the timestamps of two adjacent decoding failure events, counting the write operation logs of the flash device within the time interval of the two timestamps, and accumulating the number of flash pages successfully written.

[0128] In one embodiment, the ratio of the standard deviation to the average of the number of flash pages can be calculated by statistically analyzing the average and standard deviation of the number of flash pages between all adjacent decoding failure events, and then dividing the standard deviation by the average.

[0129] Among them, the preset basic correction coefficient can be the basic error correction capability calibration coefficient preset based on the decoding failure rate.

[0130] In one embodiment, the method for obtaining the preset basic correction coefficient corresponding to the decoding failure rate can be to pre-build a correspondence between the decoding failure rate and the preset basic correction coefficient. For example, if the decoding failure rate is less than or equal to 1%, the corresponding preset basic correction coefficient is 0.9; if the decoding failure rate is greater than 1% and less than or equal to 3%, the corresponding preset basic correction coefficient is 1.1; if the decoding failure rate is greater than 3% and less than or equal to 5%, the corresponding preset basic correction coefficient is 1.3; and if the decoding failure rate is greater than 5%, the corresponding preset basic correction coefficient is 1.5.

[0131] In one embodiment, the method of multiplying the preset basic correction coefficient by the ratio to obtain the target correction coefficient corresponding to the decoding failure rate can be achieved by multiplying the preset basic correction coefficient by the ratio and rounding the result to one decimal place.

[0132] The advantage of this scheme is that by combining the discrete characteristics of decoding failure rate and decoding failure event interval, it considers both the overall error risk and the pattern of sudden failures, making the correction coefficient more consistent with the actual failure scenario.

[0133] In one embodiment, the method of multiplying the initial number of error-correctable bits by the target correction coefficient to obtain the target number of error-correctable bits can be achieved by directly multiplying the initial number of error-correctable bits by the target correction coefficient and then rounding down to obtain the target number of error-correctable bits.

[0134] The advantage of this approach is that it dynamically calibrates error correction capabilities by combining recent actual decoding failure rates, thus avoiding inaccurate adaptation caused by deviations in a single metric.

[0135] In one embodiment, the method of calculating the difference between the maximum number of error-correctable bits and the target number of error-correctable bits as error-correcting capability assessment information can be achieved by directly subtracting the target number of error-correctable bits from the maximum number of error-correctable bits.

[0136] Understandably, a positive value for the error correction capability assessment indicates that the current error correction capability is redundant, and the larger the value, the more redundant it is; a negative value for the error correction capability assessment indicates that the current error correction capability is insufficient, and the smaller the value, the larger the gap; a value of 0 for the error correction capability assessment indicates that the error correction capability is perfectly matched with the requirements.

[0137] S205, the current error correction coding parameters are adjusted according to the error correction capability evaluation information to obtain the target error correction coding parameters; wherein, the current error correction coding parameters include codeword length, number of parity bits, and number of decoding iterations.

[0138] In one embodiment, adjusting the current error correction coding parameters based on error correction capability assessment information to obtain the target error correction coding parameters can be achieved by multiplying the error correction capability assessment information by a preset adjustment coefficient, adding the multiplication result to 1 to obtain a parameter adjustment factor, multiplying the number of parity bits and the number of decoding iterations in the current error correction coding parameters by the parameter adjustment factor and rounding to obtain the number of parity bits and the number of decoding iterations in the target error correction coding parameters, multiplying the codeword length in the current error correction coding parameters by the parameter adjustment factor to obtain a reference codeword length, and determining the codeword length supported by the flash memory device that is closest to the reference codeword length as the codeword length in the target error correction coding parameters. The preset adjustment coefficient can be a fixed constant used to quantify the influence of the error correction capability assessment information on parameter adjustment, such as 0.07.

[0139] In one embodiment, adjusting the current error correction coding parameters based on the error correction capability assessment information to obtain target error correction coding parameters includes: when the error correction capability assessment information is lower than a first threshold, increasing the number of parity bits in the current error correction coding parameters by a first preset adjustment step size, and decreasing the codeword length in the current error correction coding parameters by a second preset adjustment step size; when the error correction capability assessment information is higher than a second threshold, decreasing the number of parity bits in the current error correction coding parameters by the first preset adjustment step size, and increasing the codeword length in the current error correction coding parameters by the second preset adjustment step size, wherein the first threshold is less than the second threshold; recalculating the error correction capability assessment information corresponding to the current error correction coding parameters, and repeating the above steps until the difference in the adjustment results of the error correction capability assessment information is less than a preset convergence threshold, thereby obtaining the target error correction coding parameters.

[0140] The first threshold can be a preset threshold for insufficient error correction capability, such as -8 bits; the second threshold can be a preset threshold for redundancy in error correction capability, such as 8 bits. Understandably, the first threshold should be less than the second threshold.

[0141] The first preset adjustment step size can be a fixed adjustment range of the preset number of check bits, such as 16 bits; the second preset adjustment step size can be a fixed adjustment range of the preset codeword length, such as 256 bits.

[0142] If the error correction capability assessment information is lower than the first threshold, it indicates that the current error correction capability is seriously insufficient and cannot meet the target number of error-correctable bits. Therefore, the number of parity bits in the current error correction coding parameters can be increased according to the first preset adjustment step size, and the codeword length in the current error correction coding parameters can be decreased according to the second preset adjustment step size.

[0143] If the error correction capability assessment information is higher than the second threshold, it indicates that the current error correction capability is excessively redundant, resulting in wasted storage and efficiency. Therefore, the number of parity bits in the current error correction coding parameters can be reduced according to the first preset adjustment step size, and the codeword length in the current error correction coding parameters can be increased according to the second preset adjustment step size.

[0144] Among them, the difference in the adjustment result of the error correction capability assessment information can be the absolute value of the difference between the newly calculated error correction capability assessment information and the previous error correction capability assessment information after two adjacent iterations.

[0145] The preset convergence threshold can be a critical value for determining whether the iterative adjustment has reached the target accuracy, such as 2 bits.

[0146] If the difference in the adjustment result of the error correction capability assessment information is less than the preset convergence threshold, it means that the current error correction capability is basically matched with the target requirement and no further adjustment is needed. Therefore, the iterative adjustment process can be terminated to obtain the target error correction coding parameters.

[0147] The advantage of this approach is that it accurately approximates the target error correction requirements through threshold judgment and iterative convergence mechanism.

[0148] S206, perform error correction encoding on the data to be written to the flash memory device according to the target error correction encoding parameters to obtain encoded data, and write the encoded data into the flash memory device.

[0149] S207, in response to the read data request, the encoded data is decoded according to the target error correction coding parameters to obtain readable data.

[0150] The advantage of this approach is that it allows for the quantification of redundancy or gaps in error correction capabilities, providing a precise basis for adaptive adjustments and avoiding resource waste or insufficient error correction.

[0151] Figure 3 This is a flowchart illustrating another data read / write method for a flash memory device provided in an embodiment of this application. For example... Figure 3 As shown, the specific steps include the following:

[0152] S301, in response to a write data request, obtain the real-time operating parameters of the flash memory device and application scenario information, and calculate a reliability characterization vector based on the real-time operating parameters; wherein, the real-time operating parameters include the number of rereads.

[0153] S302, determine the tolerance boundary vector based on the application scenario information.

[0154] S303, calculate the ratio of each corresponding component between the reliability characterization vector and the tolerance boundary vector.

[0155] The corresponding component ratio can be the ratio of the component values ​​of the same real-time operating parameter dimension in the reliability characterization vector to the tolerance boundary vector.

[0156] In one embodiment, the ratio of each corresponding component between the reliability characterization vector and the tolerance boundary vector can be calculated by using the ratio of the i-th dimension component of the reliability characterization vector to the i-th dimension component of the tolerance boundary vector for the i-th real-time operating parameter dimension as the corresponding component ratio.

[0157] S304, determine the largest corresponding component ratio among the corresponding component ratios, calculate the difference between the largest corresponding component ratio and the preset benchmark value, and determine the reliability status index based on the difference.

[0158] The maximum corresponding component ratio can be the maximum value among all corresponding component ratios.

[0159] The preset benchmark value can be a fixed constant preset to define whether the reliability meets the standard, such as 1.0.

[0160] In one embodiment, the method for calculating the difference between the maximum corresponding component ratio and the preset reference value can be to directly subtract the preset reference value from the maximum corresponding component ratio to obtain the corresponding difference.

[0161] In one embodiment, the method of determining the reliability status index based on the difference can be to directly determine the difference as the reliability status index.

[0162] In one embodiment, determining the reliability status index based on the difference includes: obtaining the current programming and erasure cycle interval of the flash memory device, and calculating the average reread count growth rate of the flash memory device within the current programming and erasure cycle interval; multiplying the difference by the average reread count growth rate to obtain the reliability status index.

[0163] In one embodiment, the current programming and erasing cycle interval of the flash memory device can be obtained by reading the cumulative number of programming and erasing operations recorded by the flash memory device's lifecycle management module, and determining the programming and erasing cycle interval to which the cumulative number of programming and erasing operations belongs as the current programming and erasing cycle interval. The programming and erasing cycle interval can be divided into 0-1000 times, 1001-3000 times, 3001-5000 times, and 5001-8000 times.

[0164] The average reread rate growth rate can be the average change in the number of rereads per unit of program erase within the current program erase cycle interval.

[0165] In one embodiment, the method for calculating the average reread rate growth rate of a flash memory device within the current programming and erasing cycle interval can be as follows: record the number of rereads at the beginning of the current programming and erasing cycle interval and the number of rereads at the current moment, calculate the difference between the two, and then divide the difference by the difference in the number of programming and erasing cycles between the beginning and the current moment to obtain the average reread rate growth rate.

[0166] In one embodiment, the reliability status index is obtained by multiplying the difference by the average reread rate growth rate. This can be achieved by directly performing a multiplication operation on the difference and the average reread rate growth rate, and using the product as the reliability status index.

[0167] The advantage of this approach is that by introducing programmable erase cycle intervals and the average reread rate growth rate, the reliability status indicators can comprehensively reflect the current degree of deviation and the accelerated aging trend of the device, avoiding misjudgments caused by differences in the reread rate growth rate at different aging stages, thereby more accurately assessing the actual reliability risk of flash memory devices.

[0168] S305, calculate error correction capability assessment information based on the reliability status index and the current error correction coding parameters, and adjust the current error correction coding parameters based on the error correction capability assessment information to obtain the target error correction coding parameters.

[0169] S306, perform error correction encoding on the data to be written to the flash memory device according to the target error correction encoding parameters to obtain encoded data, and write the encoded data into the flash memory device.

[0170] S307, in response to the read data request, the encoded data is decoded according to the target error correction coding parameters to obtain readable data.

[0171] The advantage of this approach is that it can sensitively capture the most severe deviations of flash memory devices across various real-time operating parameter dimensions, thereby more accurately reflecting current reliability risks and providing a more reliable basis for subsequent adaptive adjustments to error correction coding parameters.

[0172] Figure 4 This is a schematic diagram of the structure of a data read / write device for a flash memory device provided in an embodiment of this application. Figure 4 As shown, the device includes:

[0173] The characterization vector acquisition module 410 is used to acquire the real-time operating parameters of the flash memory device and application scenario information in response to a write data request, and calculate the reliability characterization vector based on the real-time operating parameters; wherein, the real-time operating parameters include the number of rereads;

[0174] The reliability state determination module 420 is used to determine the tolerance boundary vector based on the application scenario information, and to calculate the reliability state index based on the reliability characterization vector and the tolerance boundary vector.

[0175] The target parameter determination module 430 is used to calculate error correction capability evaluation information based on the reliability status index and the current error correction coding parameters, and adjust the current error correction coding parameters based on the error correction capability evaluation information to obtain the target error correction coding parameters.

[0176] Error correction coding writing module 440 is used to perform error correction coding on the data to be written to the flash memory device according to the target error correction coding parameters, obtain coded data, and write the coded data to the flash memory device;

[0177] The data decoding and reading module 450 is used to respond to a data read request and decode the encoded data according to the target error correction encoding parameters to obtain readable data.

[0178] Furthermore, the current error correction coding parameters include codeword length, number of parity bits, and number of decoding iterations;

[0179] Accordingly, the target parameter determination module 430 is specifically used for:

[0180] The basic number of error-correctable bits is calculated based on the number of parity bits, the decoding capability gain coefficient is determined based on the number of decoding iterations, and the basic number of error-correctable bits is multiplied by the decoding capability gain coefficient to obtain the maximum number of error-correctable bits.

[0181] The target number of error-correctable bits is determined based on the reliability status index, and the difference between the maximum number of error-correctable bits and the target number of error-correctable bits is calculated as error correction capability assessment information.

[0182] Furthermore, the target parameter determination module 430 is specifically used for:

[0183] The initial number of error-correctable bits is determined based on the reliability status index and the codeword length.

[0184] Obtain the decoding failure rate of the flash memory device in the most recent preset number of read operations, and determine the corresponding target correction coefficient based on the decoding failure rate;

[0185] The target number of error-correctable bits is obtained by multiplying the initial number of error-correctable bits by the target correction coefficient.

[0186] Furthermore, the target parameter determination module 430 is specifically used for:

[0187] Obtain the historical decoding failure event sequence of the flash memory device, and count the number of flash memory pages successfully written between two adjacent decoding failure events based on the historical decoding failure event sequence;

[0188] Calculate the ratio of the standard deviation to the mean of the number of flash memory pages;

[0189] Obtain the preset basic correction coefficient corresponding to the decoding failure rate, and multiply the preset basic correction coefficient by the ratio to obtain the target correction coefficient corresponding to the decoding failure rate.

[0190] Furthermore, the target parameter determination module 430 is specifically used for:

[0191] If the error correction capability assessment information is lower than the first threshold, the number of parity bits in the current error correction coding parameters is increased by a first preset adjustment step size, and the codeword length in the current error correction coding parameters is decreased by a second preset adjustment step size.

[0192] If the error correction capability assessment information is higher than the second threshold, the number of parity bits in the current error correction coding parameters is reduced by the first preset adjustment step size, and the codeword length in the current error correction coding parameters is increased by the second preset adjustment step size, wherein the first threshold is less than the second threshold.

[0193] Recalculate the error correction capability assessment information corresponding to the current error correction coding parameters, and repeat the above steps until the difference in the adjustment result of the error correction capability assessment information is less than the preset convergence threshold, and obtain the target error correction coding parameters.

[0194] Furthermore, the reliable state determination module 420 is specifically used for:

[0195] Calculate the ratio of each corresponding component between the reliability characterization vector and the tolerance boundary vector;

[0196] Determine the largest corresponding component ratio among all corresponding component ratios, calculate the difference between the largest corresponding component ratio and a preset benchmark value, and determine the reliability status index based on the difference.

[0197] Furthermore, the reliable state determination module 420 is specifically used for:

[0198] Obtain the current programming and erasure cycle interval of the flash memory device, and calculate the average reread rate growth rate of the flash memory device within the current programming and erasure cycle interval;

[0199] Multiplying the difference by the average reread rate growth rate yields the reliability status index.

[0200] In this embodiment, a characterization vector acquisition module is used to acquire real-time operating parameters of the flash memory device and application scenario information in response to a write data request, and calculate a reliability characterization vector based on the real-time operating parameters; wherein, the real-time operating parameters include the number of rereads; a reliability state determination module is used to determine a tolerance boundary vector based on the application scenario information, and calculate a reliability state index based on the reliability characterization vector and the tolerance boundary vector; a target parameter determination module is used to calculate error correction capability evaluation information based on the reliability state index and the current error correction coding parameters, and adjust the current error correction coding parameters based on the error correction capability evaluation information to obtain target error correction coding parameters; an error correction coding writing module is used to perform error correction coding on the data to be written to the flash memory device according to the target error correction coding parameters to obtain encoded data, and write the encoded data to the flash memory device; a data decoding and reading module is used to decode the encoded data according to the target error correction coding parameters in response to a read data request to obtain readable data. The above-described flash memory device data read / write device achieves dynamic adaptive adjustment of error correction coding parameters, improving the reliability and efficiency of data read / write.

[0201] The data read / write device for the flash memory device in this application embodiment can be a device, or it can be a component, integrated circuit, or chip in a terminal. The device can be a mobile electronic device or a non-mobile electronic device. For example, mobile electronic devices can be mobile phones, tablets, laptops, PDAs, in-vehicle electronic devices, wearable devices, ultra-mobile personal computers (UMPCs), netbooks, or personal digital assistants (PDAs), etc., while non-mobile electronic devices can be servers, network attached storage (NAS), personal computers (PCs), televisions (TVs), ATMs, or self-service machines, etc. This application embodiment does not impose specific limitations.

[0202] The data read / write device for the flash memory device in this application embodiment can be a device with an operating system. This operating system can be Android, iOS, or other possible operating systems; this application embodiment does not specifically limit the specific operating system used.

[0203] The data read / write device for the flash memory provided in this application can implement the various processes implemented in the above embodiments. To avoid repetition, these processes will not be described again here.

[0204] Figure 5This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. For example... Figure 5 As shown, this application embodiment also provides an electronic device 500, including a processor 501, a memory 502, and a program or instructions stored in the memory 502 and executable on the processor 501. When the program or instructions are executed by the processor 501, they implement the various processes of the above-described flash memory device data read / write embodiments and achieve the same technical effects. To avoid repetition, they will not be described again here.

[0205] It should be noted that the electronic devices in the embodiments of this application include the mobile electronic devices and non-mobile electronic devices described above.

[0206] This application also provides a readable storage medium storing a program or instructions. When the program or instructions are executed by a processor, they implement the various processes of the above-described flash memory device data read / write embodiments and achieve the same technical effects. To avoid repetition, they will not be described again here.

[0207] The processor is the processor in the electronic device described in the above embodiments. The readable storage medium includes computer-readable storage media, such as computer read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk.

[0208] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0209] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a computer software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0210] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

[0211] The above description is merely a preferred embodiment and the technical principles employed in this application. This application is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions that can be made by those skilled in the art will not depart from the scope of protection of this application. Therefore, although this application has been described in detail through the above embodiments, this application is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of this application, the scope of which is determined by the scope of the claims.

Claims

1. A data read / write method for a flash memory device, characterized in that, The method includes: In response to a write data request, the system obtains the real-time operating parameters of the flash memory device and application scenario information, and calculates a reliability characterization vector based on the real-time operating parameters; wherein, the real-time operating parameters include the number of rereads; The tolerance boundary vector is determined based on the application scenario information, and the reliability status index is calculated based on the reliability characterization vector and the tolerance boundary vector. Error correction capability assessment information is calculated based on the reliability status index and the current error correction coding parameters, and the current error correction coding parameters are adjusted based on the error correction capability assessment information to obtain the target error correction coding parameters; wherein, the current error correction coding parameters include codeword length, number of parity bits, and number of decoding iterations; The step of calculating the error correction capability assessment information based on the reliability status index and the current error correction coding parameters includes: calculating the basic number of error-correctable bits based on the number of parity bits; determining the decoding capability gain coefficient based on the number of decoding iterations; multiplying the basic number of error-correctable bits by the decoding capability gain coefficient to obtain the maximum number of error-correctable bits; determining the target number of error-correctable bits based on the reliability status index; and calculating the difference between the maximum number of error-correctable bits and the target number of error-correctable bits as the error correction capability assessment information. The step of adjusting the current error correction coding parameters according to the error correction capability assessment information to obtain target error correction coding parameters includes: when the error correction capability assessment information is lower than a first threshold, increasing the number of parity bits in the current error correction coding parameters by a first preset adjustment step size, and decreasing the codeword length in the current error correction coding parameters by a second preset adjustment step size; when the error correction capability assessment information is higher than a second threshold, decreasing the number of parity bits in the current error correction coding parameters by the first preset adjustment step size, and increasing the codeword length in the current error correction coding parameters by the second preset adjustment step size, wherein the first threshold is less than the second threshold; recalculating the error correction capability assessment information corresponding to the current error correction coding parameters, and repeating the process until the difference in the adjustment results of the error correction capability assessment information is less than a preset convergence threshold, thereby obtaining the target error correction coding parameters; The data to be written to the flash memory device is subjected to error correction encoding according to the target error correction encoding parameters to obtain encoded data, and the encoded data is written to the flash memory device. In response to a read data request, the encoded data is decoded according to the target error correction coding parameters to obtain readable data.

2. The data read / write method for a flash memory device according to claim 1, characterized in that, Determining the target number of error-correctable bits based on the reliability status index includes: The initial number of error-correctable bits is determined based on the reliability status index and the codeword length. Obtain the decoding failure rate of the flash memory device in the most recent preset number of read operations, and determine the corresponding target correction coefficient based on the decoding failure rate; The target number of error-correctable bits is obtained by multiplying the initial number of error-correctable bits by the target correction coefficient.

3. The data read / write method for a flash memory device according to claim 2, characterized in that, The step of determining the corresponding target correction coefficient based on the decoding failure rate includes: Obtain the historical decoding failure event sequence of the flash memory device, and count the number of flash memory pages successfully written between two adjacent decoding failure events based on the historical decoding failure event sequence; Calculate the ratio of the standard deviation to the mean of the number of flash memory pages; Obtain the preset basic correction coefficient corresponding to the decoding failure rate, and multiply the preset basic correction coefficient by the ratio to obtain the target correction coefficient corresponding to the decoding failure rate.

4. The data read / write method for a flash memory device according to any one of claims 1-3, characterized in that, The step of calculating the reliability status index based on the reliability characterization vector and the tolerance boundary vector includes: Calculate the ratio of each corresponding component between the reliability characterization vector and the tolerance boundary vector; Determine the largest corresponding component ratio among all corresponding component ratios, calculate the difference between the largest corresponding component ratio and a preset benchmark value, and determine the reliability status index based on the difference.

5. The data read / write method for a flash memory device according to claim 4, characterized in that, The step of determining the reliability status index based on the difference includes: Obtain the current programming and erasure cycle interval of the flash memory device, and calculate the average reread rate growth rate of the flash memory device within the current programming and erasure cycle interval; Multiplying the difference by the average reread rate growth rate yields the reliability status index.

6. A data read / write device for a flash memory device, characterized in that, The device includes: The characterization vector acquisition module is used to respond to a write data request, acquire the real-time operating parameters of the flash memory device and application scenario information, and calculate the reliability characterization vector based on the real-time operating parameters; wherein, the real-time operating parameters include the number of rereads; The reliability state determination module is used to determine the tolerance boundary vector based on the application scenario information, and to calculate the reliability state index based on the reliability characterization vector and the tolerance boundary vector. The target parameter determination module is used to calculate error correction capability evaluation information based on the reliability status index and the current error correction coding parameters, and adjust the current error correction coding parameters according to the error correction capability evaluation information to obtain target error correction coding parameters; wherein, the current error correction coding parameters include codeword length, number of parity bits, and number of decoding iterations; The target parameter determination module is specifically used for: calculating the basic number of error-correctable bits based on the number of parity bits; determining the decoding capability gain coefficient based on the number of decoding iterations; multiplying the basic number of error-correctable bits by the decoding capability gain coefficient to obtain the maximum number of error-correctable bits; determining the target number of error-correctable bits based on the reliability status index; and calculating the difference between the maximum number of error-correctable bits and the target number of error-correctable bits as error correction capability evaluation information. The target parameter determination module is specifically configured to: when the error correction capability assessment information is lower than a first threshold, increase the number of parity bits in the current error correction coding parameter by a first preset adjustment step size, and decrease the codeword length in the current error correction coding parameter by a second preset adjustment step size; when the error correction capability assessment information is higher than a second threshold, decrease the number of parity bits in the current error correction coding parameter by the first preset adjustment step size, and increase the codeword length in the current error correction coding parameter by the second preset adjustment step size, wherein the first threshold is less than the second threshold; recalculate the error correction capability assessment information corresponding to the current error correction coding parameter, and repeat the process until the difference in the adjustment results of the error correction capability assessment information is less than a preset convergence threshold, thereby obtaining the target error correction coding parameter; The error correction coding writing module is used to perform error correction coding on the data to be written to the flash memory device according to the target error correction coding parameters, obtain coded data, and write the coded data to the flash memory device; The data decoding and reading module is used to respond to a data read request by decoding the encoded data according to the target error correction encoding parameters to obtain readable data.

7. An electronic device, characterized in that, It includes a processor, a memory, and a program or instructions stored in the memory and executable on the processor, wherein when the program or instructions are executed by the processor, they implement the data read / write method of the flash memory device as described in any one of claims 1-5.

8. A readable storage medium, characterized in that, The readable storage medium stores a program or instructions, which, when executed by a processor, implement the data read / write method of the flash memory device as described in any one of claims 1-5.

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