Pixel circuit, driving method thereof and display panel

Abstract

The application discloses a pixel circuit and a driving method thereof and a display panel, relates to the display field, and comprises a driving transistor TD, a first node connected to the source electrode of the driving transistor TD, a second node connected to the gate electrode of the driving transistor TD, and a third node connected to the drain electrode of the driving transistor TD; a first switch transistor, a voltage input end one connected to the source electrode of the first switch transistor; a second switch transistor, the third node connected to the source electrode of the second switch transistor, and the gate electrode of the driving transistor connected to the drain electrode of the second switch transistor; a third switch transistor, a power supply voltage end connected to the source electrode of the third switch transistor, the first node connected to the drain electrode of the third switch transistor, and a control signal end three connected to the gate electrode of the third switch transistor; a storage capacitor, connected between the first node and the second node; an organic light emitting diode OLED, the third node connected to the anode of the organic light emitting diode OLED, and a low-level voltage end connected to the cathode of the organic light emitting diode OLED, and the driving method of the pixel circuit is disclosed. The circuit is simple in structure, the threshold voltage is accurately compensated by introducing a substrate bias effect coefficient a, and the display uniformity is significantly improved.

Description

Technical Field

[0001] This invention belongs to the field of pixel circuits, and particularly relates to a pixel circuit and its driving method, and a display panel. Background Technology

[0002] Organic light-emitting diodes (OLEDs) have been widely used in the flat panel display field due to their advantages such as self-illumination, fast response speed, high contrast, and low power consumption. In particular, MicroOLED micro-display technology has important application prospects in fields such as near-eye display, virtual reality, and augmented reality.

[0003] In OLED display panels, the design of the pixel circuit directly affects the display effect. Traditional pixel circuits typically employ a 2T1C structure. However, with the increasing demands for display resolution and image quality, the non-uniformity of the threshold voltage of the driving transistors and its drift over time and temperature have become increasingly prominent, leading to problems such as uneven display brightness and image retention. To address this issue, the industry has proposed various threshold voltage compensation circuits, such as 5T2C and 6T2C structures. However, these circuits are complex in structure and have a large number of transistors, which is not conducive to improving pixel density and reducing costs.

[0004] Furthermore, most existing compensation circuits do not consider the substrate bias effect of the driving transistor. The substrate bias effect refers to the phenomenon that changes in the source potential of the driving transistor affect its threshold voltage; this effect cannot be ignored in high-precision analog circuits. Ignoring the substrate bias effect will lead to a decrease in compensation accuracy and affect display uniformity.

[0005] Therefore, the present invention provides a pixel circuit and driving method, and a display panel. Summary of the Invention

[0006] The purpose of this invention is to solve the problems in the prior art, and to propose a pixel circuit comprising: The driving transistor TD has its source connected to the first node, its gate connected to the second node, and its drain connected to the third node. The first switching transistor M1 has its source connected to voltage input terminal 1, its drain connected to the second node or the third node, and its gate connected to control signal terminal 1 SW1. The second switching transistor M2 has its source connected to the third node, its drain connected to the gate of the driving transistor TD, and its gate connected to the control signal terminal SW2. The third switching transistor M3 has its source connected to the power supply voltage terminal VDD, its drain connected to the first node, and its gate connected to the control signal terminal SW3. A storage capacitor C is connected between the first node and the second node; An organic light-emitting diode (OLED) has its anode connected to a third node and its cathode connected to a low-level voltage terminal VSS.

[0007] In the pixel circuit described above, the drain of the first switching transistor M1 is connected to the second node. The pixel circuit also includes a fourth switching transistor M4. The source of the fourth switching transistor M4 is connected to the voltage input terminal two for inputting the initialization voltage Vini, its drain is connected to the third node, and its gate is connected to the control signal terminal four SW4.

[0008] In the pixel circuit described above, the drain of the first switching transistor M1 is connected to the third node, and the pixel circuit also includes a fifth switching transistor M5. The source of the fifth switching transistor M5 is connected to the third node, and its drain is connected to the anode of the organic light-emitting diode OLED. The gate of the fifth switching transistor M5 is connected to the control signal terminal SW5.

[0009] In the pixel circuit described above, the drain of the first switching transistor M1 is connected to the second node. The pixel circuit also includes a sixth switching transistor M6, the source of which is connected to the third node, the drain of which is connected to the anode of the organic light-emitting diode OLED, and the gate of which is connected to the control signal terminal SW6.

[0010] Secondly, the present invention discloses a driving method for a pixel circuit, employing the aforementioned pixel circuit, the method comprising sequentially executing the following stages: Initialization phase: Turn on the first switching transistor M1 and the second switching transistor M2, turn off the third switching transistor M3, and provide an initialization voltage to the source of the first switching transistor M1, causing the driving transistor to discharge in diode connection mode until its source voltage meets the first voltage condition, which is set as follows: Vs-Vini=a*(VDD-Vs)+|Vth| Where Vs is the source voltage of the driving transistor, Vini is the initialization voltage, a is the substrate bias effect coefficient, |Vth| is the absolute value of the threshold voltage of the driving transistor, and VDD is the power supply voltage. Data writing and compensation stage: The voltage supplied to the source of the first switching transistor M1 is switched to the data voltage Vdate, causing the gate voltage of the driving transistor TD to jump, and after coupling through the storage capacitor C to cause a change in its source voltage, it is discharged again until the second voltage condition is met: Vs-Vdata=a*(VDD-Vs)+|Vth| Light emission stage: The third switching transistor is turned on, and the first switching transistor M1 and the second switching transistor M2 are turned off; the organic light-emitting diode OLED is driven by the driving transistor TD.

[0011] In the above driving method, in the pixel circuit, the drain of the first switching transistor M1 is connected to the second node, and the step of switching the voltage supplied to the source of the first switching transistor M1 to Vdate specifically includes: turning on the first switching transistor M1 and turning off the second switching transistor M2 and the third switching transistor M3.

[0012] In the above driving method, in the pixel circuit, the drain of the first switching transistor M1 is connected to the third node, and the step of switching the voltage supplied to the source of the first switching transistor M1 to the data voltage Vdate specifically includes: turning on the first switching transistor and the second switching transistor M2, and turning off the third switching transistor M3.

[0013] Thirdly, the present invention provides a second method for driving a pixel circuit, the method comprising the following stages executed sequentially: Initialization phase: Turn on the first switching transistor M1, the second switching transistor M2 and the fourth switching transistor M4, and turn off the third switching transistor M3; provide an initialization voltage to the gate of the driving transistor TD through the first switching transistor M1, and provide the initialization voltage to the anode of the organic light-emitting diode OLED through the fourth switching transistor M4, so that the driving transistor TD discharges; Data writing and compensation stage: Turn on the first switching transistor M1 and the fourth switching transistor M4, and turn off the second switching transistor M2 and the third switching transistor M3; switch the voltage supplied to the source of the first switching transistor M1 to the data voltage, and write and compensate the gate voltage of the driving transistor TD; Light emission stage: The third switching transistor M3 and the fourth switching transistor M4 are turned on, and the first switching transistor M1 and the second switching transistor M2 are turned off; the organic light-emitting diode OLED is driven by the driving transistor TD.

[0014] Fourthly, the present invention provides a third method for driving a pixel circuit, the method comprising the following stages executed sequentially: Initialization phase: Turn on the first switching transistor M1, the second switching transistor M2 and the fifth switching transistor M5, and turn off the third switching transistor M3; provide an initialization voltage to the source of the first switching transistor M1, so that the driving transistor TD discharges in diode connection mode; Data writing and compensation stage: Turn on the first switching transistor M1 and the second switching transistor M2, and turn off the third switching transistor M3 and the fifth switching transistor M5; switch the voltage supplied to the source of the first switching transistor M1 to the data voltage, write it directly to the drain node of the driving transistor TD, and complete the compensation through circuit coupling; Light emission stage: The third switching transistor M3 and the fifth switching transistor M5 are turned on, and the first switching transistor M1 and the second switching transistor M2 are turned off; the organic light-emitting diode (OLED) is driven to emit light by the driving transistor TD.

[0015] Fifthly, the present invention provides a fourth method for driving a pixel circuit, the method comprising the following stages executed sequentially: Initialization phase: Turn on the first switching transistor M1, the second switching transistor M2 and the sixth switching transistor M6, and turn off the third switching transistor M3; provide an initialization voltage to the source of the first switching transistor M1, so that the driving transistor TD discharges in diode connection mode; Data writing and compensation stage: Turn on the first switching transistor M1 and the second switching transistor M2, and turn off the third switching transistor M3 and the sixth switching transistor M6; switch the voltage supplied to the source of the first switching transistor M1 to the data voltage, and write and compensate the gate voltage of the driving transistor TD; Light emission stage: The third switching transistor M3 and the sixth switching transistor M6 are turned on, and the first switching transistor M1 and the second switching transistor M2 are turned off; the organic light-emitting diode (OLED) is driven to emit light by the driving transistor TD.

[0016] In the aforementioned driving methods, during the initialization phase, the driving transistor TD is connected in diode mode by turning on the second switching transistor M2 connected between the gate and drain of the driving transistor TD.

[0017] In the aforementioned driving methods, during the data writing and compensation phase, in the step of writing data voltage to the gate of the driving transistor, the connection relationship across the storage capacitor C remains unchanged, so that the source voltage of the driving transistor TD changes synchronously with its gate voltage.

[0018] In a sixth aspect, the present invention discloses a display panel comprising the aforementioned pixel circuitry.

[0019] The beneficial effects of this invention are as follows: In this invention, the basic circuit adopts a 4T1C structure, achieving complete threshold voltage compensation functionality through only one driving transistor TD, three switching transistors M1-M3, and a storage capacitor C. This architecture achieves this through transistor function multiplexing: the second switching transistor M2 connects the driving transistor TD in diode mode during initialization to extract the threshold voltage, and is turned off during the data writing phase to isolate the write path; the storage capacitor C is used simultaneously to couple voltage transitions and store the compensated gate-source voltage difference. Compared to existing compensation circuits, this design reduces the number of transistors and the pixel layout area, which is beneficial for improving pixel density and aperture ratio.

[0020] This invention, based on the basic 4T1C architecture, creates various circuit variants by adding switching transistors with different functions: Adding a fourth switching transistor M4 decouples the initialization and data writing paths, preventing data bus noise from interfering with initialization accuracy; adding a fifth switching transistor M5 and changing the connection position of M1 optimizes the light-emitting current path to reduce power consumption; adding a sixth switching transistor M6 forms a dual reset structure, improving initialization reliability and speed. All variants are designed with the same voltage balance conditions, allowing for the selection of appropriate solutions based on different application scenarios, thus forming a technical system covering a wide range of needs. Attached Figure Description

[0021] Figure 1 This is the circuit diagram for Example 1; Figure 2 This is the timing diagram for Example 1; Figure 3 This is the circuit diagram for Example 2; Figure 4 This is the timing diagram for Example 2; Figure 5 This is the circuit diagram for Example 3; Figure 6 This is the timing diagram for Example 3; Figure 7 This is the circuit diagram for Example 4; Figure 8 This is the timing diagram for Example 4; Figure 9 This is the circuit diagram for Example 5; Figure 10 This is the timing diagram for Example 5. Detailed Implementation

[0022] To facilitate understanding of this application and to make the aforementioned objectives, features, and advantages of this application more apparent, a detailed description of specific embodiments of this application is provided below in conjunction with the accompanying drawings. Numerous specific details are set forth in the following description to provide a thorough understanding of this application, and preferred embodiments are shown in the accompanying drawings. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the disclosure of this application. This application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application; therefore, this application is not limited to the specific embodiments disclosed below. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified. In the description of this application, "several" means at least one, such as one, two, etc., unless otherwise explicitly specified. It should be noted that when an element is referred to as being "fixed to" another element, it can be directly attached to the other element or there may be an intervening element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or there may be an intervening element. The terms "vertical," "horizontal," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only possible implementations. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is only for describing particular implementations and is not intended to limit the scope of this application. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0023] Reference Figure 1-10 A pixel circuit, comprising: The driving transistor TD has its source connected to the first node, its gate connected to the second node, and its drain connected to the third node. The first switching transistor M1 has its source connected to voltage input terminal 1, its drain connected to the second node or the third node, and its gate connected to control signal terminal 1 SW1. The second switching transistor M2 has its source connected to the third node, its drain connected to the gate of the driving transistor TD, and its gate connected to the control signal terminal SW2. The third switching transistor M3 has its source connected to the power supply voltage terminal VDD, its drain connected to the first node, and its gate connected to the control signal terminal SW3. A storage capacitor C is connected between the first node and the second node; An organic light-emitting diode (OLED) has its anode connected to a third node and its cathode connected to a low-level voltage terminal VSS.

[0024] In this configuration, when the drain of the first switching transistor M1 is connected to the second node, the third switching transistor M3 acts as a power switch, only conducting during the light-emitting phase, and then connecting VDD to the source of TD. During the data writing phase, it is disconnected to avoid crosstalk between the VDD trace and the data trace. The upper and lower substrates of capacitor C are connected to the source and gate of TD, respectively, making capacitor C a storage capacitor that stores the driving voltage during the data writing phase. The source and drain of transistor M2 are connected to the data DATA and the source of TD, respectively, and the source and drain of M3 are connected to the gate and drain of TD, respectively. Thus, during the reset phase, the conduction of transistor M3 will short-circuit the drain and gate of TD, and TD will operate in diode mode. At this time, capacitor C will store the difference between the data voltage Vdata and the TD threshold voltage. During the light-emitting phase, this stored voltage can offset the effect of TD threshold voltage drift, ensuring that the current flowing through the OLED is determined only by the data voltage, rather than the characteristics of the device itself. The drain of TD is connected to the anode of the OLED.

[0025] Based on the above-described pixel circuit, the present invention provides a driving method using the above-described pixel circuit, comprising the following steps: Initialization phase: Turn on the first switching transistor M1 and the second switching transistor M2, turn off the third switching transistor M3, and provide an initialization voltage to the source of the first switching transistor M1, causing the driving transistor to discharge in diode connection mode until its source voltage meets the first voltage condition, which is set as follows: Vs-Vini=a*(VDD-Vs)+|Vth| Where Vs is the source voltage of the driving transistor, Vini is the initialization voltage, a is the substrate bias effect coefficient, |Vth| is the absolute value of the threshold voltage of the driving transistor, and VDD is the power supply voltage. Data writing and compensation stage: The voltage supplied to the source of the first switching transistor M1 is switched to the data voltage Vdate. Specifically, switching the voltage supplied to the source of the first switching transistor M1 to Vdate includes: turning on the first switching transistor M1, turning off the second switching transistor M2 and the third switching transistor M3, causing a gate voltage jump in the driving transistor TD, and after coupling through the storage capacitor C to cause a change in its source voltage, discharging again until the second voltage condition is met. Vs-Vdata=a*(VDD-Vs)+|Vth| Light emission stage: The third switching transistor is turned on, and the first switching transistor M1 and the second switching transistor M2 are turned off; the organic light-emitting diode OLED is driven by the driving transistor TD.

[0026] In the initial discharge phase, which is the first stage, the switching state and current path of the transistor are as follows: The third transistor M3 is turned off, disconnecting the power supply voltage VDD from the first node of the TD source to prevent power supply interference during initialization. The first transistor M1 is turned on, allowing the initialization voltage Vini at the data terminal to be connected to the TD source, i.e., the first node. The second switching transistor M2 is turned on, shorting the gate of the driving transistor TD, i.e., the second node, to its drain. The driving transistor TD operates in diode mode, with its gate and drain at the same potential. At this time, the OLED anode and the TD drain are connected, and initialization is completed synchronously, initializing both the OLED anode and the TD gate. During the discharge process and voltage balance, the first node discharges through the TD transistor. The potential of the first node starts from the initialization voltage Vini and discharges through the diode conduction path of the driving transistor TD until the second voltage condition is met: Vs-Vini=a*(VDD-Vs)+|Vth| Where |Vth| is the absolute value of the threshold voltage of TD.

[0027] The core purpose of this stage is to eliminate residual voltage from the previous frame, establish a reference potential for subsequent data writing, and pre-store the threshold voltage information of TD. The initialization stage is the "preparation" for compensation. By discharging in diode mode, the circuit remembers the initial absolute value of the threshold voltage of the driving transistor TD, so as to avoid the voltage residue of historical frames interfering with the accuracy of this compensation.

[0028] The data writing and compensation phase is the second stage, which includes two steps. The first step is the switching state and point transition, which includes: turning off the second transistor M2 to release the gate-drain short circuit of the driving transistor TD, and the voltage of the second node transitions from the initialization voltage Vini to the data voltage Vdata. The third transistor M3 remains off, meaning that the power supply voltage VDD is still not connected to the first node. The first transistor M1 remains on, so that the data voltage Vdata continues to act on the first node. The potential of the first node changes by the same magnitude as the second node. The potential of the first node transitions synchronously with the second node because the capacitor C is connected across the first and second nodes, thus creating a coupling effect.

[0029] The second step is secondary discharge and compensation voltage generation. After the potential jump, the first node repeats the discharge process of the first stage, and then begins the same discharge process as the first stage until the new equilibrium condition is met. Vs-Vdata=a*(VDD-Vs)+|Vth| By modifying this formula, the source-gate voltage difference Vsg of TD is derived: Expanded to: Vs Vdata=a VDD a Vs+∣Vth∣ Transpose and combine terms: Vs(1+a)=a VDD+Vdata+|Vth| Therefore: Vs = (a VDD+Vdata+∣Vth∣) / (1+a) And Vsg=Vs Vg=Vs Substituting Vdata into Vs, we get: Vsg=a / (a+1)*(VDD Vdata ∣Vth∣)+∣Vth∣ The core of this step is to embed |Vth| into the expression of Vsg to achieve pre-compensation of the threshold voltage; stage ② is the core of the compensation: through capacitive coupling and secondary discharge, s The pressure difference Vsg between g contains a reverse compensation term of |Vth|, which prepares for offsetting threshold drift in the subsequent luminescence stage.

[0030] At this point, Vsg = a / (a+1)*(VDD-vdata-|Vth|)+|Vth| The stable light-emitting stage is the third stage. In this stage, the first switching transistor M1 and the second switching transistor M2 are turned off, which disconnects the short circuit between the data terminal and the gate drain. The voltage difference Vsg stored in the capacitor C is locked. The third switching transistor M4 is turned on, which connects the power supply voltage VDD to the source of the driving transistor TD, causing the driving transistor TD to enter the saturation operating region and start driving the OLED to emit light. In the stable light-emitting stage, the voltage difference Vsg is the same as in the second stage.

[0031] At this point, the drain current of TD is the OLED's light-emitting current Ioled, and the formula is: Ioled=β (Vsg |Vth|) 2 Where β is a device parameter of TD, which is related to the aspect ratio and carrier mobility.

[0032] Substitute the Vsg obtained in the second stage into the formula: Vsg |Vth|=a(VDD) Vdata |Vth|) / (a+1) The luminous current Ioled = β*(Vsg - |Vth|) 2 =β*a 2 / (a+1) 2 *(VDD-Vdata-|Vth|) 2 Where 'a' is the substrate bias coefficient, a coefficient that reflects the influence of the source potential on the threshold voltage due to the depletion layer between the source and substrate of the driving transistor TD. 0 <a<1 In this scheme, the operation of the first and second stages essentially involves sampling, embedding compensation terms, and performing reverse cancellation on the current |Vth| of the driving transistor TD before each frame is displayed. At this time, the absolute value of the threshold voltage |Vth| of TD is a fixed value at the initialization time of this frame, and is not a variable that changes with time / temperature.

[0033] Meanwhile, the luminous current Ioled is only related to the power supply voltage VDD, data voltage Vdata, and substrate bias coefficient a, and is independent of |Vth|. This means that even if |Vth| drifts with time / temperature, the luminous current will not change, completely solving the problems of uneven brightness and image retention in OLEDs. Before each frame is displayed, the circuit first “measures” the threshold voltage of the current driving transistor TD, and then adds an inverse “cancellation term” to the voltage difference, so that the luminous current is not affected by the threshold voltage drift. Therefore, |Vth| in the formula does not interfere with the luminous current as a measured value.

[0034] In this scheme, the core of the entire timing is to convert the threshold voltage |Vth| of TD into a voltage difference compensation term between the first node and the second node, and to offset the influence of |Vth| through formula calculation during the light emission stage.

[0035] The smaller 'a' is, the closer (a+1)² / a² is to 0, and the smaller the luminous current; the larger 'a' is, the closer the current is to β. (VDD Vdata |Vth|) 2 .

[0036] In actual manufacturing, by adjusting the substrate doping concentration of TD, the value of 'a' can be optimized to balance the luminous brightness and compensation effect. The switching control of the three stages is time-division asynchronous: no light emission during the initialization / writing stage and no writing during the luminous emission stage, avoiding crosstalk between data signals and luminous current. Initialization and writing can be completed in a short time, supporting higher panel refresh rates and meeting the requirements of high frame rate displays.

[0037] Example 2 Unlike Embodiment 1, the drain of the first switching transistor M1 can also be connected to a third node.

[0038] At this time, refer to Figure 3 The pixel driving method includes the following steps: Initialization phase: The first switching transistor M1 and the second switching transistor M2 are turned on, the third switching transistor M3 is turned off, an initialization voltage is provided to the source of the first switching transistor M1 to initialize the OLED anode and the TD gate, and the driving transistor is discharged in diode-connected mode until its source voltage meets a first voltage condition, which is set as follows: Vs-Vini=a*(VDD-Vs)+|Vth| Where Vs is the source voltage of the driving transistor, Vini is the initialization voltage, a is the substrate bias effect coefficient, |Vth| is the absolute value of the threshold voltage of the driving transistor, and VDD is the power supply voltage. Data writing and compensation stage: The voltage supplied to the source of the first switching transistor M1 is switched to the data voltage Vdate, the second node voltage jumps from Vini to Vdata, and the first node potential follows the second node change by the same magnitude. Specifically, switching the voltage supplied to the source of the first switching transistor M1 to the data voltage Vdate includes: turning on the first and second switching transistors M2, turning off the third switching transistor M3, causing the gate voltage of the driving transistor TD to jump. At this time, the second node voltage jumps from the initialization voltage Vini to the data voltage Vdata. The first node potential follows the second node change by the same magnitude and, through coupling with the storage capacitor C, causes a change in its source voltage. Then, it discharges again until the second voltage condition is met. Vs-Vdata=a*(VDD-Vs)+|Vth| Light-emitting stage: The third switching transistor is turned on, and the first switching transistor M1 and the second switching transistor M2 are turned off; the organic light-emitting diode (OLED) is driven by the driving transistor TD. The luminous current Ioled = β*(Vsg - |Vth|) 2 =β*a 2 / (a+1) 2 *(VDD-Vdata-|Vth|) 2 Example 3 Furthermore, the drain of the first switching transistor M1 is connected to the second node, and the pixel circuit also includes a fourth switching transistor M4. The source of the fourth switching transistor M4 is connected to the voltage input terminal two for inputting the initialization voltage Vini, its drain is connected to the third node, and its gate is connected to the control signal terminal four SW4.

[0039] Furthermore, a driving method using the aforementioned pixel circuit is also disclosed, comprising the following stages executed sequentially: Initialization phase: Turn on the first switching transistor M1, the second switching transistor M2 and the fourth switching transistor M4, and turn off the third switching transistor M3; provide an initialization voltage to the gate of the driving transistor TD through the first switching transistor M1, and provide the initialization voltage to the anode of the organic light-emitting diode OLED through the fourth switching transistor M4, so that the driving transistor TD discharges; Data writing and compensation stage: Turn on the first switching transistor M1 and the fourth switching transistor M4, and turn off the second switching transistor M2 and the third switching transistor M3; switch the voltage supplied to the source of the first switching transistor M1 to the data voltage, and write and compensate the gate voltage of the driving transistor TD; Light emission stage: The third switching transistor M3 and the fourth switching transistor M4 are turned on, and the first switching transistor M1 and the second switching transistor M2 are turned off; the organic light-emitting diode OLED is driven by the driving transistor TD.

[0040] In both Embodiment 1 and Embodiment 2, a 4T1C scheme is used. During the initialization phase of these schemes, Vini is connected to the source of the driving transistor TD via the first switching transistor M1. However, the first switching transistor M1 also needs to handle the writing of the data voltage Vdata in subsequent stages. If the on-resistance of the first switching transistor M2 has a process deviation or is affected by noise interference from the data DATE bus, the initialization potential Vini of the first node will fluctuate, thus affecting the discharge balance conditions in the first stage. Vs Vini=a (VDD The accuracy of Vs)+∣Vth∣ is reduced, ultimately decreasing the compensation accuracy.

[0041] Therefore, in this embodiment, a fourth switching transistor M4 is added to improve the above solution. The newly added fourth switching transistor M4 is driven by an independent control signal SW4 and is specifically responsible for the Vini connection during the initialization phase. The fourth switching transistor M4 is connected in series between the OLED anode AN and the second switching transistor M2, and the control signal SW4 is connected to the Vini. In the first stage, M4 / M2 is turned on and M3 is turned off. The turn-on of the fourth switching transistor M4 directly anchors the initialization voltage Vini precisely to the first node, achieving functional decoupling from the first switching transistor M1 and preventing DATA bus noise from crosstalking into the initialization circuit through the first switching transistor M1. The conduction path of the fourth switching transistor M4 is independent of the data writing path. Its conduction resistance deviation can be reduced through process optimization, ensuring the consistency of the initial potential of the second node and allowing the discharge process to strictly follow the balance formula, thus laying a precise potential reference for subsequent compensation.

[0042] Combination Figure 5 The working principle is as follows: The first stage is the initialization stage. During this stage, M3 is off, M4 / M2 are on, and the OLED anode and TD gate are initialized. Simultaneously, the first node discharges through the driving transistor TD until: Vs - Vini = a*(VDD - Vs) + |Vth| The second stage is the data writing and compensation stage. During this stage: M2 / M3 are off, and M4 / M1 are on. M4's role is to assist the first node's potential in following the second node's transition. After the second node's potential transitions from Vini to Vdata, the source-gate coupling effect of capacitor C drives the first node's potential to change synchronously. However, relying solely on capacitive coupling may result in potential following delay or amplitude attenuation. M4 remains on, effectively providing a low-impedance potential buffer path for the first node, ensuring that the first node's potential can quickly and without attenuation follow the second node's change, avoiding deviations in discharge balance conditions due to coupling losses. The parallel conduction of M4 and M1 reduces the equivalent connection resistance of the first node, accelerating data writing speed and supporting higher panel refresh rates. When the second node voltage transitions from Vini to Vdata, the first node's potential changes by the same magnitude. Then begin the same discharge process as in the first stage until Vs-Vdata=a*(VDD-Vs)+|Vth| At this point, Vsg = a / (a+1)*(VDD-vdata-|Vth|)+|Vth| The third stage is the light-emitting stage. At this time, M1 / M2 are off, and M4 / M3 are on. The role of M4 is to maintain the stability of the first node potential. After it is turned on, the power supply voltage VDD is connected to the first node, driving the transistor TD to enter the saturation region and drive the OLED to emit light. The Vsg voltage difference stored in capacitor C is the key to the stability of the light-emitting current. M4 remains on, which is equivalent to providing a potential holding loop for the first node. It can suppress the interference of voltage fluctuations of the power supply voltage VDD trace on the first node potential. Without M4, the first node potential is only maintained by the charge of capacitor C, which may cause the Vsg voltage difference to drift due to leakage current. The conduction path of M4 can supplement the leakage current of capacitor C, ensuring that the Vsg voltage difference is strictly equal to the calculated value of the second stage, and ultimately ensuring the stability of the light-emitting current. During the luminescence stage, the Vsg pressure difference is the same as in the second stage, then: Ioled=β*(Vsg-|Vth|)2=β*a2 / (a+1)2*(VDD-Vdata-|Vth|)2 In this embodiment, M4 is driven by an independent control signal SW4, decoupling its control timing from that of M1 (DATA driver), M2 (reset driver), and M3 (power driver), bringing two key advantages: More flexible timing fine-tuning: The discharge time during the initialization phase can be independently optimized by adjusting the pulse width of SW4 without changing the data write timing of M1, adapting to the needs of panels with different resolutions and refresh rates, such as the high-reliability timing of automotive screens and the low-power timing of flexible screens. Fault redundancy design: If a manufacturing defect in M1 causes data writing anomalies, M4 can temporarily take over part of the data writing function, improving the circuit's fault tolerance. This is suitable for scenarios with extremely high reliability requirements, such as medical displays and industrial control panels. Example 4 Reference Figure 7 Based on Embodiment 1, the present invention modifies the pixel circuit, including: the drain of the first switching transistor M1 is connected to the third node, and the pixel circuit further includes a fifth switching transistor M5; The source of the fifth switching transistor M5 is connected to the third node, and its drain is connected to the anode of the organic light-emitting diode OLED. The gate of the fifth switching transistor M5 is connected to the control signal terminal SW5.

[0043] Meanwhile, a driving method is provided based on the above pixel circuit, including: The method comprises the following stages, executed sequentially: Initialization phase: Turn on the first switching transistor M1, the second switching transistor M2 and the fifth switching transistor M5, and turn off the third switching transistor M3; provide an initialization voltage to the source of the first switching transistor M1, so that the driving transistor TD discharges in diode connection mode; Data writing and compensation stage: Turn on the first switching transistor M1 and the second switching transistor M2, and turn off the third switching transistor M3 and the fifth switching transistor M5; switch the voltage supplied to the source of the first switching transistor M1 to the data voltage, write it directly to the drain node of the driving transistor TD, and complete the compensation through circuit coupling; Light emission stage: The third switching transistor M3 and the fifth switching transistor M5 are turned on, and the first switching transistor M1 and the second switching transistor M2 are turned off; the organic light-emitting diode (OLED) is driven to emit light by the driving transistor TD.

[0044] The principle of this embodiment is as follows: The first stage is the initialization stage: M3 is turned off, M5 / M1 / M2 are turned on, the OLED anode and TD gate are initialized, and the first node discharges through the driving transistor TD until the first voltage condition is met. Vs-Vini=a*(VDD-Vs)+|Vth| The second stage is the data writing and compensation stage: M5 / M3 is turned off, cutting off the path from Vini to the OLED anode to avoid crosstalk of Vini to the data signal. M1 / M2 is turned on. At this time, M1 is only responsible for writing Vdata to the TD gate. The voltage of the second node jumps from Vini to Vdata, and the potential of the first node changes by the same amount as the potential of the second node. Then the same discharge process as in the first stage begins until the second voltage condition is met: Vs-Vdata=a*(VDD-Vs)+|Vth| Because the data writing loop is independent, Vdata has higher voltage accuracy, resulting in a smaller error in the final calculated Vsg and more accurate compensation for the TD threshold voltage; at this time: Vsg=a / (a+1)*(VDD-vdata-|Vth|)+|Vth| The third stage is the luminescence stage: M1 / M2 are off, M5 / M3 are on. In the third stage, the Vsg pressure difference is the same as in the second stage. Ioled = β*(Vsg - |Vth|) 2 =β*a 2 / (a+1) 2 *(VDD-Vdata-|Vth|) 2 In the third stage, M1 / M2 are turned off, and only M5 / M3 are turned on, resulting in a shorter light-emitting current path and lower impedance. When M3 is turned on, the power supply voltage VDD is connected to the first node, causing the driving transistor TD to enter the saturation region. When M5 is turned on, the OLED anode is directly connected to the drain of the driving transistor TD through M5. The current path is: power supply voltage VDD → third switching transistor M3 → first node → driving transistor TD → fifth switching transistor M5 → OLED → VSS. At this time, the equivalent resistance is lower than that in Example 1, and the power consumption is reduced by about 10%-15%. Meanwhile, the conduction of M5 provides a potential stabilization circuit for the OLED anode, suppresses the interference of external noise on the AN potential, ensures that the luminous current is always stable, and improves the brightness uniformity of the entire screen.

[0045] In the decoupling of data writing and reset, M1 is only responsible for data writing, while M2+M5 are responsible for reset, reducing crosstalk between the data voltage Vdata and the reset circuit, resulting in higher data writing accuracy and support for higher resolution panels such as 8K screens. During the light-emitting stage, M5 is turned on, the path from the OLED anode to VSS is shorter, the equivalent resistance is lower, and power consumption is reduced.

[0046] Example 5 Reference Figure 9 Based on Embodiment 1, the present invention modifies the pixel circuit, including: the drain of the first switching transistor M1 is connected to the second node, the pixel circuit further includes a sixth switching transistor M6, the source of the sixth switching transistor M6 is connected to the third node, its drain is connected to the anode of the organic light-emitting diode OLED, and its gate is connected to the control signal terminal SW6.

[0047] Meanwhile, the method for driving the aforementioned pixel circuit includes the following stages executed sequentially: Initialization phase: Turn on the first switching transistor M1, the second switching transistor M2 and the sixth switching transistor M6, and turn off the third switching transistor M3; provide an initialization voltage to the source of the first switching transistor M1, so that the driving transistor TD discharges in diode connection mode; Data writing and compensation stage: Turn on the first switching transistor M1 and the second switching transistor M2, and turn off the third switching transistor M3 and the sixth switching transistor M6; switch the voltage supplied to the source of the first switching transistor M1 to the data voltage, and write and compensate the gate voltage of the driving transistor TD; Light emission stage: The third switching transistor M3 and the sixth switching transistor M6 are turned on, and the first switching transistor M1 and the second switching transistor M2 are turned off; the organic light-emitting diode (OLED) is driven to emit light by the driving transistor TD.

[0048] Compared to Implementation 1, this scheme consists of 5T1C transistors. The added sixth switching transistor M6 is connected in parallel between the second switching transistor M2 and the OLED anode. The first switching transistor M1 is independently connected to Vini / Vdata. The working principle can be found in [reference needed]. Figure 5 : The first stage is the initialization stage: M3 is turned off, M6 / M1 / M2 are turned on, the OLED anode and the gate of the driving transistor TD are initialized, and the first node is discharged through the driving transistor TD until the first voltage condition is met: Vs-Vini=a*(VDD-Vs)+|Vth| The second stage is the data writing and compensation stage: M6 / M3 is closed, M2 / M2 is opened, the voltage of the second node jumps from the initial voltage Vini to the data voltage Vdata, and the potential of the first node changes by the same amount as the second node.

[0049] Then the same discharge process as in the first stage begins until the second voltage condition is met: Vs-Vdata=a*(VDD-Vs)+|Vth| At this point, Vsg = a / (a+1)*(VDD-vdata-|Vth|)+|Vth| The third stage is the light-emitting stage: M2 / M3 are closed, M1 / M4 are open, and during the light-emitting stage, the voltage difference Vsg is the same as in the second stage. At this time, the light-emitting current is: Ioled = β*(Vsg - |Vth|) 2 =β*a 2 / (a+1) 2 *(VDD-Vdata-|Vth|) 2 The core of this solution is to achieve upgrades such as dual reset protection, anti-interference for data writing, and enhanced light emission stability through the parallel design of M6 and the functional independence of M1. The advantages compared to Example 1 are as follows: In the first stage initialization, dual reset and potential redundancy are adopted to completely eliminate residual charge limitations. In Example 1, initialization relies solely on M1 / M2, and the potential anchoring of the OLED and the driving transistor TD depends on a single path. If a transistor has poor conduction, residual charge limitations are likely to occur. In this scheme, M6 and M2 are connected in parallel between the OLED anode and the gate of the driving transistor TD. When M6 / M1 / M2 are turned on simultaneously, a dual-path reset circuit is formed. For the gate of the driving transistor TD, i.e. the second node: the initialization voltage Vini is directly anchored through M1, while the potential is stabilized by the parallel path of M2 / M6. For the OLED anode AN: the parallel path of M6 and M2 is used to pull it down to the initialization voltage Vini, completely clearing the residual charge of the OLED. Therefore, even if there is a process deviation in one of M6 or M2, the other can still ensure the initialization process. During the first-node discharge process, the dual-path provides lower equivalent resistance, faster discharge speed, more accurate achievement of balance conditions, and significantly improved initialization fault tolerance.

[0050] In the second stage of data writing, compared to Example 1, where M1 is responsible for writing both Vini and Vdata simultaneously, the timing coupling can easily lead to Vdata being contaminated by Vini residue. In this solution, M1 is driven independently, which enhances the data anti-interference capability. In this solution, M1 is independently connected to Vini and Vdata. In the second stage, only M1 / M2 are turned on and M6 is turned off, which can achieve complete isolation between data writing and the reset circuit. Turning off M6 can cut off the parallel path between the OLED anode and the TD gate, avoiding interference from the OLED residual potential to the second node. At this time, M1 is only responsible for writing Vdata to the second node. Since M1 does not participate in the writing of the initialization voltage Vini, the voltage of the data voltage Vdata is not affected by Vini residue. Therefore, the process of the second node potential jumping from Vini to Vdata is purer. After the first node follows the second node transition, the error in discharging to the equilibrium condition is smaller, the compensation term of Vsg is more accurate, and the cancellation effect of the TD threshold drift of the driving transistor is more stable.

[0051] In the third stage of light emission, M6 independently carries the OLED current, improving device lifespan. Compared to Example 1, where the OLED current is entirely carried by the drain of the TD transistor, resulting in a high load on the TD transistor and potential for increased threshold drift over long-term operation, this solution offers the advantage of only having M6 and M3 enabled in the third stage. In this case, the OLED current is independently carried by M6, and the driving transistor TD is only responsible for controlling the current magnitude. The current path is "VDD→M4→first node→TD→M1→OLED→VSS". The drain of the driving transistor TD does not need to directly drive the OLED, reducing the workload of the driving transistor TD, slowing down the threshold drift, and extending the device lifespan. Furthermore, the on-resistance of M6 can be adjusted through process optimization to avoid the risk of overcurrent at the OLED anode, further protecting the OLED device. At the same time, M6 independently maintains the OLED anode potential, suppressing the impact of VDD fluctuations on the luminous current, resulting in stronger stability and improved brightness uniformity across the entire screen.

[0052] On the other hand, M6 and M2 can be turned on in a time-sharing or simultaneous manner to perform dual reset of the TD gate and OLED anode, further improving the compensation accuracy. This makes it suitable for medical displays and professional monitors with extremely high requirements for brightness uniformity. When M6, M1 and M2 are controlled independently, they can adapt to more complex timing sequences and have wider compatibility, such as HDR displays with multi-frame overlay or high-end flexible AMOLED and multi-scenario displays in vehicles.

[0053] As is known from common technical knowledge, this invention can be implemented through other embodiments that do not depart from its spirit or essential characteristics. Therefore, the disclosed embodiments described above are merely illustrative and not exhaustive. All modifications within the scope of this invention or its equivalents are included in this invention.

Claims

1. A pixel circuit, characterized in that, include: The driving transistor TD has its source connected to the first node, its gate connected to the second node, and its drain connected to the third node. The first switching transistor M1 has its source connected to voltage input terminal 1, its drain connected to the second node or the third node, and its gate connected to control signal terminal 1 SW1. The second switching transistor M2 has its source connected to the third node, its drain connected to the gate of the driving transistor TD, and its gate connected to the control signal terminal SW2. The third switching transistor M3 has its source connected to the power supply voltage terminal VDD, its drain connected to the first node, and its gate connected to the control signal terminal SW3. A storage capacitor C is connected between the first node and the second node; An organic light-emitting diode (OLED) has its anode connected to a third node and its cathode connected to a low-level voltage terminal VSS.

2. The pixel circuit according to claim 1, characterized in that, The drain of the first switching transistor M1 is connected to the second node. The pixel circuit also includes a fourth switching transistor M4. The source of the fourth switching transistor M4 is connected to the voltage input terminal two for input initialization voltage Vini, its drain is connected to the third node, and its gate is connected to the control signal terminal four SW4.

3. The pixel circuit according to claim 1, characterized in that, The drain of the first switching transistor M1 is connected to the third node, and the pixel circuit also includes a fifth switching transistor M5; The source of the fifth switching transistor M5 is connected to the third node, and its drain is connected to the anode of the organic light-emitting diode OLED. The gate of the fifth switching transistor M5 is connected to the control signal terminal SW5.

4. The pixel circuit according to claim 1, characterized in that, The drain of the first switching transistor M1 is connected to the second node. The pixel circuit also includes a sixth switching transistor M6. The source of the sixth switching transistor M6 is connected to the third node, its drain is connected to the anode of the organic light-emitting diode OLED, and its gate is connected to the control signal terminal SW6.

5. A display panel, characterized in that, The display panel includes a pixel circuit as described in any one of claims 1 to 4.

6. A driving method for a pixel circuit, characterized in that, Employing the pixel circuit as described in claim 1, the method comprises the following stages performed sequentially: Initialization phase: Turn on the first switching transistor M1 and the second switching transistor M2, turn off the third switching transistor M3, and provide an initialization voltage to the source of the first switching transistor M1, causing the driving transistor to discharge in diode connection mode until its source voltage meets the first voltage condition, which is set as follows: Vs-Vini=a*(VDD-Vs)+|Vth| Where Vs is the source voltage of the driving transistor, Vini is the initialization voltage, a is the substrate bias effect coefficient, |Vth| is the absolute value of the threshold voltage of the driving transistor, and VDD is the power supply voltage. Data writing and compensation stage: The voltage supplied to the source of the first switching transistor M1 is switched to the data voltage Vdate, causing the gate voltage of the driving transistor TD to jump, and after coupling through the storage capacitor C to cause a change in its source voltage, it is discharged again until the second voltage condition is met: Vs-Vdata=a*(VDD-Vs)+|Vth| Light emission stage: The third switching transistor is turned on, and the first switching transistor M1 and the second switching transistor M2 are turned off; the organic light-emitting diode OLED is driven by the driving transistor TD.

7. The driving method according to claim 6, characterized in that, In the pixel circuit, the drain of the first switching transistor M1 is connected to the second node, and the step of switching the voltage supplied to the source of the first switching transistor M1 to Vdate specifically includes: turning on the first switching transistor M1 and turning off the second switching transistor M2 and the third switching transistor M3.

8. The driving method according to claim 6, characterized in that, In the pixel circuit, the drain of the first switching transistor M1 is connected to the third node, and the step of switching the voltage supplied to the source of the first switching transistor M1 to the data voltage Vdate specifically includes: turning on the first switching transistor and the second switching transistor M2, and turning off the third switching transistor M3.

9. A driving method for a pixel circuit, characterized in that, Employing the pixel circuit as described in claim 2, the method comprises the following stages performed sequentially: Initialization phase: Turn on the first switching transistor M1, the second switching transistor M2 and the fourth switching transistor M4, and turn off the third switching transistor M3; provide an initialization voltage to the gate of the driving transistor TD through the first switching transistor M1, and provide the initialization voltage to the anode of the organic light-emitting diode OLED through the fourth switching transistor M4, so that the driving transistor TD discharges; Data writing and compensation stage: Turn on the first switching transistor M1 and the fourth switching transistor M4, and turn off the second switching transistor M2 and the third switching transistor M3; switch the voltage supplied to the source of the first switching transistor M1 to the data voltage, and write and compensate the gate voltage of the driving transistor TD; Light-emitting stage: The third switching transistor M3 and the fourth switching transistor M4 are turned on, and the first switching transistor M1 and the second switching transistor M2 are turned off. The organic light-emitting diode (OLED) is driven by the driving transistor TD.

10. A driving method for a pixel circuit, characterized in that, Employing the pixel circuit as described in claim 3, the method comprises the following stages performed sequentially: Initialization phase: Turn on the first switching transistor M1, the second switching transistor M2 and the fifth switching transistor M5, and turn off the third switching transistor M3; provide an initialization voltage to the source of the first switching transistor M1, so that the driving transistor TD discharges in diode connection mode; Data writing and compensation stage: Turn on the first switching transistor M1 and the second switching transistor M2, and turn off the third switching transistor M3 and the fifth switching transistor M5; switch the voltage supplied to the source of the first switching transistor M1 to the data voltage, write it directly to the drain node of the driving transistor TD, and complete the compensation through circuit coupling; Light emission stage: The third switching transistor M3 and the fifth switching transistor M5 are turned on, and the first switching transistor M1 and the second switching transistor M2 are turned off; the organic light-emitting diode (OLED) is driven to emit light by the driving transistor TD.

11. A driving method for a pixel circuit, characterized in that, Employing the pixel circuit as described in claim 4, the method comprises the following stages performed sequentially: Initialization phase: Turn on the first switching transistor M1, the second switching transistor M2 and the sixth switching transistor M6, and turn off the third switching transistor M3; provide an initialization voltage to the source of the first switching transistor M1, so that the driving transistor TD discharges in diode connection mode; Data writing and compensation stage: Turn on the first switching transistor M1 and the second switching transistor M2, and turn off the third switching transistor M3 and the sixth switching transistor M6; switch the voltage supplied to the source of the first switching transistor M1 to the data voltage, and write and compensate the gate voltage of the driving transistor TD; Light emission stage: The third switching transistor M3 and the sixth switching transistor M6 are turned on, and the first switching transistor M1 and the second switching transistor M2 are turned off; the organic light-emitting diode (OLED) is driven to emit light by the driving transistor TD.

12. The driving method according to any one of claims 6, 9, 10, and 11, characterized in that, During the initialization phase, the driving transistor TD is connected in diode mode by turning on the second switching transistor M2 connected between the gate and drain of the driving transistor TD.

13. The driving method according to any one of claims 6, 9, 10, and 11, characterized in that, The method includes repeatedly performing a discharge operation: after performing a first discharge operation in the initialization phase, a discharge operation is performed again in the data writing and compensation phase.

14. The driving method according to any one of claims 6, 9, 10, and 11, wherein in the data writing and compensation stage, during the step of writing data voltage to the gate of the driving transistor, the connection relationship between the two ends of the storage capacitor C remains unchanged, so that the source voltage of the driving transistor TD jumps synchronously with its gate voltage.

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