Time slot scheduling system and method
By using the time slot management module and the weighted round-robin scheduler for dynamic scheduling control, the problem of excessive load on the slave device buffer in the on-chip interconnect network is solved, achieving traffic balancing and improved system stability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- BEIJING TSINGMICRO INTELLIGENT TECH CO LTD
- Filing Date
- 2026-02-25
- Publication Date
- 2026-05-29
AI Technical Summary
In on-chip interconnect architecture, when multiple master devices concurrently access the same slave device, the load on the slave device's input buffer can increase rapidly, leading to uneven traffic distribution and local congestion, making it difficult to meet the system's operational stability requirements under complex concurrent access scenarios.
Through the time slot management module and weighted polling scheduler, dynamic scheduling control is performed based on the data interaction path delay between the master and slave devices to suppress local congestion and frequent triggering of back pressure signals, thereby achieving balanced traffic control.
It improves the scheduling order and data transmission stability of the on-chip interconnect network, reduces the instantaneous load on the device input buffer, and enhances the data transmission reliability of the system under complex load conditions.
Smart Images
Figure CN122120219A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit technology, and in particular to a time slot scheduling system and method. Background Technology
[0002] In an interconnect architecture, a single router node typically needs to receive data streams from multiple master devices simultaneously, creating a one-to-many communication scenario where multiple master devices concurrently access the same slave device. Under these concurrent access conditions, different data streams converge at the router node, easily leading to resource contention and concurrent conflicts. Therefore, effective scheduling and arbitration mechanisms are needed to manage concurrent access.
[0003] In existing technologies, slot arbitration and command parsing mechanisms are typically introduced at router nodes to handle concurrent access from multiple sources. For example, mixed traffic containing access requests from multiple slave devices is input to a slot arbiter, and the access commands are parsed by a command parsing module. Based on the target slave device identifier carried in the access command, the command is cached into the command queue of the corresponding slave device. The scheduling module uses a preset arbitration strategy to select the access command to be sent from each slave device's command queue, and sends the access command to the target slave device through on-chip interconnect, thereby achieving basic scheduling control of concurrent traffic.
[0004] However, in the existing technology, when the master device generates access commands of different lengths alternately and sends them to the same slave device continuously during operation, although the router node can complete the basic arbitration operation, it may still send unbalanced burst traffic to the slave device in a short period of time, which will cause the load on the slave device's input buffer to rise rapidly, and then cause problems such as uneven traffic distribution or local congestion, making it difficult to meet the requirements for system operation stability in complex concurrent access scenarios.
[0005] This section is intended to provide background or context for the embodiments of the invention set forth in the claims. The description herein is not an admission that it is prior art simply because it is included in this section. Summary of the Invention
[0006] This invention provides a time-slot scheduling system for use in scenarios where multiple master devices transmit data concurrently to multiple slave devices. Based on the write command length and the data interaction path delay between the master and slave devices, the system dynamically controls the scheduling time slots of slave devices, thereby suppressing local congestion and frequent triggering of backpressure signals caused by continuous data streams being injected into the on-chip interconnect network, and improving the scheduling order and data transmission stability of the on-chip interconnect network.
[0007] The time slot scheduling system includes: a time slot management module and a weighted round-robin scheduler; The time slot management module is used to determine the data interaction path delay between the master device and the slave device based on the timing delay of the hardware units in the data transmission path between the master device and each slave device; according to the data interaction path delay between the master device and each slave device, it performs weighted round-robin scheduling permission arbitration, generates a weighted round-robin request scheduling signal based on the permission arbitration result, and sends the weighted round-robin request scheduling signal to the weighted round-robin scheduler; The weighted round-robin scheduler is used to poll the slave device command queues participating in the weighted round-robin scheduling and determine the arbitrated slave device command queue.
[0008] In some embodiments, when the slave device input buffer in the slave device reaches a preset storage capacity limit, the slave device sends a backpressure signal to the corresponding master device.
[0009] In some embodiments, the time slot management module is specifically used to: determine a first path delay for the master device to transmit the data stream to the slave device and a second path delay for the slave device to transmit the reverse pressure signal to the master device based on the timing delay of the hardware units in the data transmission path between the master device and the slave device; and determine the data interaction path delay between the master device and the slave device according to the first path delay and the second path delay.
[0010] In some embodiments, the time slot management module includes: a plurality of slave device status management modules; When the slave device command queue corresponding to the slave device status management module is not empty, the slave device status management module determines whether the corresponding slave device is in a waiting time slot based on the command waiting time count of its slave device path delay counter; if the command waiting time count is greater than a first preset threshold, it determines that the slave device is in a waiting time slot; if the command waiting time count is equal to the first preset threshold, it determines that the slave device is in a scheduling time slot.
[0011] In some embodiments, in response to the slave device being in a scheduling time slot, when the data interaction path delay is greater than or equal to a second preset threshold, the slave device status management module allows the corresponding slave device command queue to participate in weighted round-robin scheduling, generates the weighted round-robin scheduling request signal, and sends the weighted round-robin scheduling request signal to the weighted round-robin scheduler; wherein, the second preset threshold is calculated based on the length of the write command to be sent in the slave device command queue.
[0012] In some embodiments, after the master device sends the write command to the corresponding slave device, the slave device status management module starts the slave device path delay counter so that the corresponding slave device enters the waiting time slot.
[0013] In some embodiments, the slave path delay counter of the slave device status management module determines the command waiting time based on the length of the write command and a preset command waiting period.
[0014] This invention also provides a time slot scheduling method. In a data interaction scenario where multiple master devices transmit data concurrently to multiple slave devices, the scheduling time slots of slave devices are dynamically controlled based on the write command length and the data interaction path delay between master devices and slave devices. This suppresses local congestion and frequent triggering of backpressure signals caused by continuous data streams being injected into the on-chip interconnect network, thereby improving the scheduling orderliness and data transmission stability of the on-chip interconnect network.
[0015] The time slot scheduling method includes: The time slot management module determines the data interaction path delay between the master device and the slave device based on the timing delay of the hardware units in the data transmission path between the master device and each slave device; according to the data interaction path delay between the master device and each slave device, it performs weighted round-robin scheduling permission arbitration, generates a weighted round-robin request scheduling signal based on the permission arbitration result, and sends the weighted round-robin request scheduling signal to the weighted round-robin scheduler; The weighted round-robin scheduler polls the slave device command queues participating in the weighted round-robin scheduling to determine the arbitrated slave device command queue.
[0016] This invention also provides a chip that includes the aforementioned time slot scheduling system.
[0017] This invention also provides a board card, including the chip described above.
[0018] This invention also provides an electronic device, including the aforementioned circuit board.
[0019] The time-slot scheduling system and method provided in this invention can control whether each slave device command queue of the master device participates in scheduling within each clock cycle, thereby achieving balanced control of the traffic sent from the master device to each slave device. By introducing the data interaction path delay information between the master device and the slave devices in the scheduling decision process, the weighted round-robin scheduling combines the actual timing characteristics of different data interaction paths between the master device and the slave devices to dynamically adjust the scheduling authority, avoiding scheduling bias and data burst injection problems caused by link timing differences. By having the time-slot management module uniformly complete the scheduling authority arbitration and output the scheduling request signal to the weighted round-robin scheduler, each slave device command queue participates in round-robin scheduling only when the path timing constraints are met. This helps reduce the instantaneous load on the slave device's input buffer, suppresses the frequent triggering of backpressure signals, thereby improving the scheduling stability and link utilization efficiency in multi-channel concurrent transmission scenarios, and enhancing the data transmission reliability of the system under complex load conditions. Attached Figure Description
[0020] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. In the drawings: Figure 1 This is a schematic diagram of the on-chip interconnect network structure in an embodiment of the present invention; Figure 2 This is a schematic diagram of the time slot scheduling system in an embodiment of the present invention; Figure 3 This is a schematic diagram of the timing control of a time slot scheduling system. Detailed Implementation
[0021] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings. Here, the illustrative embodiments and their descriptions are used to explain the present invention, but are not intended to limit the present invention. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be arbitrarily combined with each other. The acquisition, storage, use, and processing of data in the technical solutions of this application all comply with relevant laws and regulations. The user information in the embodiments of this application is obtained through legal and compliant means, and the acquisition, storage, use, and processing of user information have been authorized and agreed upon by the customer.
[0022] To facilitate understanding of the technical solution provided in this application, the relevant content of the technical solution in this application will be explained below.
[0023] To address the issues of distorted scheduling arbitration results, localized congestion, and reduced link utilization in scenarios where multiple master devices concurrently send data streams to multiple slave devices, due to varying hardware timing delays in the data interaction links between master and slave devices, and the triggering of backpressure mechanisms when slave device input buffers reach their capacity limits, this application provides a time-slot scheduling system. This system includes a time-slot management module and a weighted round-robin scheduler. The time-slot management module determines the data interaction path delay between the master device and each slave device based on the first path delay of data transmission from the master device to the slave device and the second path delay of the backpressure signal feedback from the slave device to the master device. Furthermore, when the corresponding slave device command queue is not empty, it calculates the command waiting time using a slave device path delay counter to distinguish between waiting time slots and scheduling time slots. When the write command length threshold and data interaction path delay conditions are met, the corresponding slave device command queue is allowed to participate in weighted round-robin scheduling and generate a scheduling request signal. The weighted round-robin scheduler then polls and selects the slave device command queues participating in the scheduling. Thus, under the comprehensive consideration of link timing delay and backpressure feedback constraints, the orderly and controlled scheduling of multi-channel data streams is achieved, suppressing the introduction of sudden traffic and the generation of local congestion, and improving the system scheduling stability and data transmission efficiency.
[0024] like Figure 1 As shown, the present invention adopts an on-chip interconnection network structure based on two-dimensional mesh topology (2D Mesh).
[0025] For example, the on-chip interconnect network consists of multiple routing nodes R0 to R11, which are arranged in a predetermined row and column pattern. Adjacent routing nodes are interconnected through bidirectional point-to-point links, thus forming a two-dimensional mesh-like backbone interconnection structure. In addition to establishing interconnection channels with adjacent routing nodes in the horizontal and vertical directions, each routing node is also connected to at least one master device and / or slave device to enable data interaction between the master device and the slave device via the routing nodes. Figure 1 The on-chip interconnect network structure shown is merely an illustrative example used to explain the technical solution of the present invention, and the present invention is not limited to this specific network structure.
[0026] exist Figure 1In the illustrated on-chip interconnect network (ISP) architecture, master device nodes (mst0 to mstn) act as data initiators, injecting data streams into the ISP through connected routing nodes. Slave device nodes (slv0 to slvn) act as data receivers, receiving data streams from the ISP through connected routing nodes. The data transmission paths in the ISP are constructed by cascading multiple routing nodes, forming multi-level hop data transmission paths between different master devices and different slave devices. The length of each data transmission path depends on the number of routing nodes traversed, resulting in different timing characteristics in the data transmission paths between different master and slave devices.
[0027] exist Figure 1 In the on-chip interconnect network structure shown, multiple master devices can send data streams to multiple slave devices in parallel. Different data streams are converged and forwarded at the routing node, thus forming a one-to-many or many-to-many concurrent communication scenario between master devices and slave devices.
[0028] For example, in this on-chip interconnect network architecture, data streams from the same master device can be parsed and distributed by the on-chip interconnect network and transmitted to multiple slave devices. When the data traffic sent by the master device to one or more slave devices is too large, it can easily cause the slave input buffer inside the slave device to become full, thereby triggering the backpressure mechanism and affecting the overall transmission of the on-chip interconnect network.
[0029] For example, multiple concurrent data streams exist in the master device mst10, with data streams sent by mst10 pointing to slave devices slv0, slv1, slv4, and slv8, respectively. The data streams from mst10 to slv1 and from mst10 to slv0 compete for resources on the transmission path from R11 to R4, potentially leading to congestion on this path. Simultaneously, the data streams from mst10 to slv4 and from mst10 to slv8 compete for resources on the transmission path from R11 to R10, which may also cause congestion on the R11 to R10 path. This demonstrates that under multi-channel concurrent access conditions, the lack of effective scheduling and flow control mechanisms can easily lead to congestion on local data transmission paths, impacting the overall transmission performance of the on-chip interconnect network.
[0030] like Figure 2 As shown, the present invention provides a time slot scheduling system including: a time slot management module and a weighted round-robin scheduler.
[0031] The time slot management module determines the data interaction path delay between the master and slave devices based on the timing delay of hardware units in the data transmission path between the master and slave devices. Based on the data interaction path delay between the master and each slave device, a weighted round-robin scheduling permission arbitration is performed. A weighted round-robin request scheduling signal is generated based on the arbitration result and sent to the weighted round-robin scheduler.
[0032] The weighted round-robin scheduler is used to poll the slave device command queues participating in the weighted round-robin scheduling and determine the arbitrated slave device command queue.
[0033] According to the above embodiments, the time-slot scheduling system can control whether each slave device command queue of the master device participates in scheduling within each clock cycle, thereby achieving balanced control of the traffic sent from the master device to each slave device. By introducing the data interaction path delay information between the master device and the slave device in the scheduling decision process, the weighted round-robin scheduling combines the actual timing characteristics of the data interaction paths between different master devices and slave devices to dynamically adjust the scheduling authority, avoiding scheduling bias and data burst injection problems caused by link timing differences. By having the time-slot management module uniformly complete the scheduling authority arbitration and output the scheduling request signal to the weighted round-robin scheduler, each slave device command queue participates in round-robin scheduling only when the path timing constraints are met. This helps reduce the instantaneous load on the slave device's input buffer, suppresses the frequent triggering of backpressure signals, thereby improving the scheduling stability and link utilization efficiency in multi-channel concurrent transmission scenarios, and enhancing the data transmission reliability of the system under complex load conditions.
[0034] In embodiments of the present invention, such as Figure 2 As shown, the Active Flow Control (AFC) module includes: a Slave Mapping Module (slv_map) and multiple Slave Command FIFOs (slv_map, ... (_cmd_fifo) and time slot scheduling system.
[0035] The slave device address mapping module matches the active flow control request address in the received active flow control request signal with the address range corresponding to each slave device in the pre-stored slave device address mapping relationship. When the active flow control request address matches the address range of any slave device, the slave device address mapping module determines the target slave device identifier corresponding to the active flow control request address. The slave device address mapping module transmits the active flow control request identifier (ActiveFlow Control Request ID, abbreviated as afc_req_id) in the active flow control request signal to the slave device command queue corresponding to the target slave device identifier, so as to store the active flow control request identifiers corresponding to different slave devices into different slave device command queues. The active flow control request identifier is generated based on the write command identifier in the write command. The storage entity of the slave device command queue can be a random access memory composed of registers (Reg) or a static random access memory (SRAM), and this invention is not limited thereto.
[0036] For example, the active flow control request identifier of the target device identified as slv0 is written to slv0_cmd_fifo, the active flow control request identifier of the target device identified as slv1 is written to slv1_cmd_fifo, ..., the active flow control request identifier of the target device identified as slv6 is written to slv6_cmd_fifo.
[0037] The time slot scheduling system includes: a time slot management module (time_slot_mgmt) and a weighted round-robin scheduler (WRR).
[0038] Within a scheduling cycle, the time slot management module determines the data interaction path delay between the master and slave devices based on the timing delay of the hardware units in the data transmission path between the master and slave devices. Based on the data interaction path delay between the master and each slave device, it determines the slave device command queues allowed to participate in the weighted round-robin scheduling, generates a weighted round-robin request scheduling signal, and sends the signal to the weighted round-robin scheduler. The weighted round-robin scheduler polls the slave device command queues participating in the weighted round-robin scheduling based on the weighted round-robin scheduling request signal and preset weight coefficients, determining the arbitrated slave device command queue.
[0039] In some embodiments, when the slave device input buffer in the slave device reaches a preset storage capacity limit, the slave device sends a backpressure signal to the corresponding master device.
[0040] In some embodiments, the time slot management module is specifically used to: determine a first path delay A for the master device to transmit data streams to the slave device and a second path delay B for the slave device to transmit back pressure signals to the master device, based on the timing delay of hardware units in the data transmission path between the master device and the slave device. Based on the first path delay A and the second path delay B, the data interaction path delay (path delay) between the master device and the slave device is determined. _dly).
[0041] In this embodiment of the invention, the first path delay A corresponding to the data stream transmitted from the master device to the slave device is calculated based on the timing delay of each hardware unit in the data transmission path between the master device and the slave device. The unit of the first path delay A is clock cycles (cc, clock). Furthermore, based on the timing delay of each hardware unit in the data transmission path between the master device and the slave device, the second path delay B, which is the return of the backpressure signal from the slave device to the master device after the slave device's input buffer is in a full state and a backpressure signal is triggered, is calculated. The unit of the second path delay B is clock cycles (cc, clock).
[0042] The calculation results of the first path delay A and the second path delay B between each master device and each slave device are summarized in Table 1 below.
[0043] Table 1. Statistics on delay time between master and slave devices
[0044] Therefore, based on the path delay parameters between each master device and each slave device given in Table 1, the data interaction path delay between the master device and the slave device is calculated, and the calculation relationship is shown in formula (1):
[0045] in, This indicates the data interaction path delay between the master device and the corresponding slave device. This represents the path delay time experienced by the data stream from the autonomous device to the slave device. This represents the path delay time experienced by the reverse voltage signal from the device back to the master device. The symbol " "" indicates the identifier of different slave devices, and its value ranges from 0 to 6.
[0046] According to the above embodiments, by feeding back a backpressure signal to the master device when the input buffer of the slave device reaches the preset capacity limit, and combining the data transmission path delay from the master device to the slave device and the path delay of the backpressure signal from the slave device back to the master device, the data interaction path delay between the master device and the slave device can be accurately calculated. This is beneficial to fully reflect the timing characteristics of the link and the actual receiving capacity of the slave device during the scheduling process, thereby avoiding the injection of disordered or excessive data streams into the on-chip interconnect network, reducing the risk of local congestion, and improving the rationality of system scheduling decisions and the stability of overall data transmission.
[0047] In some embodiments, the time slot management module includes: multiple slave status management modules (slv_st_mgmt). When the slave command queue corresponding to the slave status management module is not empty, the slave status management module determines whether the corresponding slave device is in a waiting time slot based on the command waiting count of its slave path delay counter. If the number of command wait times (_dly_cnt) is greater than the first preset threshold, the slave device is determined to be in a waiting time slot. If the number of command wait times is equal to the first preset threshold, the slave device is determined to be in a scheduling time slot.
[0048] In this embodiment of the invention, each slave device corresponds to a slave device status management module and a slave device command queue. The slave device status management module is used to detect the current slot status of the corresponding slave device and determine whether it is in a waiting slot (stop_slot).
[0049] Specifically, when the command waits for the number of beats (slv) When _dly_cnt is greater than zero, the slave device status management module determines that the slave device is in a waiting time slot state. In this case, the slave device's command queue does not participate in weighted round-robin scheduling. When the command waiting time count is slv... When _dly_cnt equals zero, the device status management module determines that the slave device is in a scheduling slot (arb_slot). At this time, the slave device's slave command queue is allowed to participate in weighted round-robin scheduling.
[0050] For example, assume the master device is mst0 and the slave device is slv0. When When slv0_st_mgmt determines that slv0 is in a waiting time slot state, its slave device command queue slv0_cmd_fifo does not participate in weighted round-robin scheduling. Conversely, when When slv0_st_mgmt determines that slv0 is in a scheduling time slot, the slave device command queue slv0_cmd_fifo of slv0 is allowed to participate in weighted round-robin scheduling.
[0051] According to the above embodiments, by configuring an independent state management module for each slave device and dynamically judging the time slot status of the slave device based on the command waiting time, the slave device command queue only participates in scheduling when the corresponding timing conditions are met. This helps to avoid scheduling conflicts and data burst injection problems caused by the difference in delay of master-slave data interaction paths, enhances the controllability and consistency of the scheduling process, and thus improves the overall stability of the system operation in multi-channel concurrent transmission scenarios.
[0052] In some embodiments, the slave path delay counter of the slave device status management module determines the command waiting time based on the length of the write command and the preset command waiting period.
[0053] In this embodiment of the invention, a slave device path delay counter is provided in the slave device status management module. The slave device path delay counter is used to calculate the command waiting time (slv) based on the length of the write command (len) and a preset command waiting period (x). The calculation relationship of _dly_cnt is shown in formula (2):
[0054] in, This indicates the length of the write command to be sent to the slave device, and x represents the pre-configured command wait period.
[0055] In some embodiments, in response to the slave device being in a scheduling time slot, when the data interaction path delay is greater than or equal to a second preset threshold, the slave device state management module allows the corresponding slave device command queue to participate in weighted round-robin scheduling, generates a weighted round-robin scheduling request signal, and sends the weighted round-robin scheduling request signal to the weighted round-robin scheduler. The second preset threshold is calculated based on the length of the write commands to be sent in the slave device command queue.
[0056] In this embodiment of the invention, based on the exhaustive enumeration results of the data interaction path delays between each master device and each slave device in Table 1 above, time slot control is performed on the data stream sent to each slave device in the master device.
[0057] When the data interaction path is delayed At that time, the active flow control request identifier is read from the device status management module, and the position corresponding to the slave device command queue is marked as valid in the weighted round-robin scheduling request signal to indicate that the slave device command queue participates in this weighted round-robin scheduling.
[0058] The weighted round-robin scheduler performs polling selection based on each valid bit in the weighted round-robin scheduling request signal and the preset weight coefficients to determine the active flow control request identifier that is allowed to be sent to the slave device. This enables the master device to obtain the corresponding write command from the write address channel buffer based on the active flow control request identifier and send the write command to the corresponding slave device through the AXI Master Interface (AXI_mst_if).
[0059] For example, assume the master device is mst0 and the slave device is slv0. When path0_dly ≥ 2 (len + 1), the slave device state management module slv0_st_mgmt allows the slave device command queue slv0_cmd_fifo of slave device slv0 to participate in weighted round-robin scheduling. Furthermore, after the master device mst0 sends a write command to the slave device slv0, the next write command sent by the master device mst0 to the slave device needs to be paused for (len + 1) + x clock cycles. After the pause period ends, when path0_dly ≥ 2 (len + 1), the slave device state management module slv0_st_mgmt again allows the slave device command queue slv0_cmd_fifo of slave device slv0 to participate in weighted round-robin scheduling.
[0060] According to the above embodiments, by introducing a threshold determination mechanism related to the data interaction path delay and the length of the write command under the premise that the slave device is in the scheduling time slot, the slave device command queue participates in weighted round-robin scheduling only when the link timing constraints are met. This helps to avoid the accumulation of buffer pressure and frequent triggering of back pressure caused by continuous injection of write commands, and improves the timing matching of scheduling decisions and the operational stability of the system in multi-channel concurrent scenarios.
[0061] In some embodiments, when the master device sends a write command to the corresponding slave device, the slave device status management module starts the slave device path delay counter so that the corresponding slave device enters the waiting time slot.
[0062] In this embodiment of the invention, after the master device sends a write command to the corresponding slave device, the slave device status management module starts the slave device path delay counter, and the slave device path delay counter waits for the calculated command latency (slv) according to the calculated command waiting time (slv). _dly_cnt performs a countdown to control the slave device to enter the waiting time slot.
[0063] In some embodiments, Figure 3 A schematic diagram of the timing control of a time slot scheduling system is shown. For example... Figure 3 As shown, with a unified clock clk as the time base, the master device sequentially sends write commands to multiple slave devices slv0 to slv6, with different write command lengths of len3, len5 and len8 respectively. Figure 3 In the diagram, light blue lines indicate that the corresponding slave device is in a scheduling slot state. In this state, the slave device's command queue is allowed to participate in weighted round-robin scheduling and actually send write commands. Gray shaded lines indicate that the corresponding slave device is in a waiting slot state. In this state, the slave device's command queue does not participate in scheduling within the corresponding clock cycle.
[0064] Specifically, for example, when slave device slv0 is selected by the weighted round-robin scheduler and sends a write command of length len3, its corresponding slave device state management module slv0_st_mgmt starts the slave device path delay counter. The slave device path delay counter counts down according to the command waiting time count calculated by formula (2). Before the counter decrements to zero, slv0 is always in the waiting time slot state, and its subsequent write commands do not participate in the scheduling arbitration. When the counter decrements to zero, slv0 switches to the scheduling time slot state, and its corresponding slave device command queue slv0_cmd_fifo regains the conditions to participate in the weighted round-robin scheduling. Subsequently, slv0 is selected again and sends a write command of length len5, and repeats the above switching process between the waiting time slot and the scheduling time slot until slv0 sends a write command of length len8.
[0065] Within the same scheduling cycle, the remaining slave devices slv1 to slv6 also independently execute the same time slot control process according to their respective write command lengths.
[0066] Specifically, when any slave device is selected by the weighted round-robin scheduler and sends a write command, its corresponding slave device status management module starts a slave device path delay counter. Based on the write command length and a preset command waiting period, it calculates the command waiting timeout count. While the counter is not decremented to zero, the slave device is placed in a waiting time slot state, preventing its command queue from participating in scheduling arbitration within the corresponding clock cycle. Once the counter decrements to zero, the slave device switches back to the scheduling time slot state, and its command queue once again becomes eligible to participate in weighted round-robin scheduling.
[0067] Combination Figure 3 As shown in the slave device command queue scheduling order (FIFO CMD), when any slave device is in a waiting time slot, the weighted round-robin scheduler skips that slave device's command queue and instead performs arbitration among the remaining slave device command queues in the scheduling time slot state. Figure 3 The "arb others" scheduling process, as marked in the code, ensures that scheduling resources are continuously allocated to slave devices that meet the timing conditions. As the path delay counters of each slave device sequentially reach zero, the slave device command queues that were previously in waiting slots re-enter the arbitrable set and are reselected in subsequent polls.
[0068] In contrast, the slv7 (no AFC func) marked in the diagram indicates a slave device without slot management enabled. Although there are also idle intervals on the timeline due to missed weighted polling arbitration (such as... Figure 3 (The gray shaded line segment), but this idle time is not actively imposed by the slave device state management module based on path delay and command length as a waiting time slot control, but rather a passive result of the scheduling process. Since SLV7 does not have a slave device path delay counter and corresponding waiting time slot constraints, its write command sending behavior is not limited by the minimum waiting time count. When the arbitration conditions are met, relatively concentrated continuous injections may still occur, making it easier to form burst traffic on the shared path.
[0069] This application provides a time-slot scheduling method applied to the aforementioned time-slot scheduling system. This time-slot scheduling method is based on the same inventive concept as the time-slot scheduling system in one embodiment of this application, and the principle of solving the problem is similar. Therefore, the implementation of the time-slot scheduling method is the same as that of the time-slot scheduling system in one embodiment of this application, and repeated details will not be described again. As used below, the terms "unit" or "module" can refer to a combination of software and / or hardware that implements a predetermined function. Although the system described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.
[0070] The time slot scheduling method includes: The time slot management module determines the data interaction path delay between the master and slave devices based on the timing delay of the hardware units in the data transmission path between the master and slave devices. Based on the data interaction path delay between the master and each slave device, a weighted round-robin scheduling permission arbitration is performed. A weighted round-robin request scheduling signal is generated based on the arbitration result and sent to the weighted round-robin scheduler.
[0071] The weighted round-robin scheduler polls the slave device command queues participating in the weighted round-robin scheduling to determine the arbitrated slave device command queue.
[0072] In some embodiments, when the slave device input buffer in the slave device reaches a preset storage capacity limit, the slave device sends a backpressure signal to the corresponding master device.
[0073] In some embodiments, the time slot management module determines a first path delay for the master device to transmit a data stream to the slave device and a second path delay for the slave device to transmit a reverse voltage signal to the master device based on the timing delay of the hardware units in the data transmission path between the master device and the slave device. The data interaction path delay between the master device and the slave device is then determined based on the first path delay and the second path delay.
[0074] In some embodiments, when the slave device command queue corresponding to the slave device status management module is not empty, the slave device status management module determines whether the corresponding slave device is in a waiting time slot based on the command waiting time count of its slave device path delay counter. If the command waiting time count is greater than a first preset threshold, it is determined that the slave device is in a waiting time slot. If the command waiting time count is equal to the first preset threshold, it is determined that the slave device is in a scheduling time slot.
[0075] In some embodiments, in response to the slave device being in a scheduling time slot, when the data interaction path delay is greater than or equal to a second preset threshold, the slave device state management module allows the corresponding slave device command queue to participate in weighted round-robin scheduling, generates a weighted round-robin scheduling request signal, and sends the weighted round-robin scheduling request signal to the weighted round-robin scheduler. The second preset threshold is calculated based on the length of the write commands to be sent in the slave device command queue.
[0076] In some embodiments, when the master device sends a write command to the corresponding slave device, the slave device status management module starts the slave device path delay counter so that the corresponding slave device enters the waiting time slot.
[0077] In some embodiments, the slave path delay counter of the slave device status management module determines the command waiting time based on the length of the write command and the preset command waiting period.
[0078] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0079] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0080] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0081] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0082] In the description of this specification, the references to terms such as "an embodiment," "a specific embodiment," "some embodiments," "for example," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0083] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.
Claims
1. A time-slot scheduling system, characterized in that, include: Time slot management module and weighted round-robin scheduler; The time slot management module is used to determine the data interaction path delay between the master device and the slave device based on the timing delay of the hardware units in the data transmission path between the master device and each slave device; according to the data interaction path delay between the master device and each slave device, it performs weighted round-robin scheduling permission arbitration, generates a weighted round-robin request scheduling signal based on the permission arbitration result, and sends the weighted round-robin request scheduling signal to the weighted round-robin scheduler; The weighted round-robin scheduler is used to poll the slave device command queues participating in the weighted round-robin scheduling and determine the arbitrated slave device command queue.
2. The system according to claim 1, characterized in that, When the slave device's input buffer reaches the preset storage capacity limit, the slave device sends a backpressure signal to the corresponding master device.
3. The system according to claim 2, characterized in that, The time slot management module is specifically used to: determine the first path delay of the master device transmitting the data stream to the slave device and the second path delay of the slave device transmitting the reverse pressure signal to the master device based on the timing delay of the hardware unit in the data transmission path between the master device and the slave device; and determine the data interaction path delay between the master device and the slave device according to the first path delay and the second path delay.
4. The system according to claim 1, characterized in that, The time slot management module includes: multiple slave device status management modules; When the slave device command queue corresponding to the slave device status management module is not empty, the slave device status management module determines whether the corresponding slave device is in a waiting time slot based on the command waiting time count of its slave device path delay counter; if the command waiting time count is greater than a first preset threshold, it determines that the slave device is in a waiting time slot; if the command waiting time count is equal to the first preset threshold, it determines that the slave device is in a scheduling time slot.
5. The system according to claim 4, characterized in that, In response to the slave device being in a scheduling time slot, when the data interaction path delay is greater than or equal to a second preset threshold, the slave device status management module allows the corresponding slave device command queue to participate in weighted round-robin scheduling, generates the weighted round-robin scheduling request signal, and sends the weighted round-robin scheduling request signal to the weighted round-robin scheduler; wherein, the second preset threshold is calculated based on the length of the write command to be sent in the slave device command queue.
6. The system according to claim 5, characterized in that, When the master device sends the write command to the corresponding slave device, the slave device status management module starts the slave device path delay counter so that the corresponding slave device enters the waiting time slot.
7. The system according to claim 5, characterized in that, The slave device path delay counter of the slave device status management module determines the command waiting time based on the length of the write command and the preset command waiting period.
8. A time-slot scheduling method, characterized in that, include: The time slot management module determines the data interaction path delay between the master device and the slave device based on the timing delay of the hardware units in the data transmission path between the master device and the slave device; Based on the data interaction path delay between the master device and each slave device, a weighted round-robin scheduling permission arbitration is performed. A weighted round-robin request scheduling signal is generated based on the permission arbitration result and sent to the weighted round-robin scheduler. The weighted round-robin scheduler polls the slave device command queues participating in the weighted round-robin scheduling to determine the arbitrated slave device command queue.
9. A chip, characterized in that, The time slot scheduling system includes any one of claims 1 to 7.
10. A circuit board, characterized in that, Includes the chip described in claim 9.
11. An electronic device, characterized in that, Includes the board as described in claim 10.