A memory data transmission method, device and terminal equipment
By acquiring multi-dimensional information from memory data, performing correlation mapping and fusion calculations, and optimizing transmission parameters, the problem of dynamic changes in memory transmission scenarios is solved, achieving efficient and reliable data transmission.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHENZHEN VITEM SEMICONDUCTOR CO LTD
- Filing Date
- 2026-02-24
- Publication Date
- 2026-06-02
AI Technical Summary
Existing technologies struggle to dynamically match real-time state changes in memory transmission, resulting in low energy efficiency, insufficient channel stability, and difficulty in guaranteeing data transmission quality and integrity. Bus utilization and transmission adaptability need to be improved.
By acquiring memory data read/write request information, channel status, storage load, and cache information, we perform correlation mapping and fusion calculations to generate memory data transmission status correlation information, and randomly generate initial transmission parameters. We then use particle swarm optimization, genetic algorithms, or multi-agent reinforcement learning algorithms to optimize the target transmission parameters, ensuring the real-time performance and stability of data transmission.
It improves the real-time performance and stability of memory data transmission, ensures data transmission quality and integrity, and enhances bus utilization and transmission adaptability.
Smart Images

Figure CN122132172A_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of data processing technology, and in particular relates to memory data transmission methods, apparatus and terminal equipment. Background Technology
[0002] The current field of memory data transmission is in a period of dual drive by technological iteration and explosive demand. With the expansion of emerging scenarios such as artificial intelligence, the Internet of Things, and smart cars, memory needs to cope with high-concurrency read and write requests, complex channel environments, and dynamic load changes. Technological evolution is moving towards higher frequencies, lower power consumption, stronger error correction capabilities, and multi-dimensional collaborative optimization.
[0003] Existing technologies rely on manually set static optimization strategies, adjusting transmission parameters through a single-dimensional performance evaluation metric, and using these periodically adjusted transmission parameters for memory data transfer.
[0004] However, in existing technologies, it is difficult to dynamically match the real-time state changes of memory transmission, resulting in low energy efficiency and insufficient channel stability in memory data transmission. The quality and integrity of data transmission cannot be accurately guaranteed, and bus utilization and transmission adaptability need to be improved. Summary of the Invention
[0005] In view of this, embodiments of this application provide a memory data transmission method, apparatus, and terminal device, aiming to solve the problem that the prior art is difficult to adapt to complex and ever-changing memory transmission scenarios, and to improve the problems of low energy efficiency, insufficient channel stability, weak data transmission quality and integrity assurance capabilities, and low bus utilization in memory data transmission.
[0006] The first aspect of this application provides a memory data transfer method, including: Obtain memory data read / write request information, memory data transmission channel status information, memory data storage load information, and memory data cache information; Based on the memory data read / write request information, memory data transmission channel status information, memory data storage load information, and memory data cache information, association mapping and fusion calculations are performed to generate memory data transmission status association information. Randomly generate multiple initial memory data transfer bandwidth information, multiple initial memory data transfer time slot allocation information, and multiple initial memory data transfer verification code information; Based on the memory data transmission status association information, multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, and multiple initial memory data transmission verification code information, target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification code information are generated. Based on the target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification code information, the memory data is processed for transmission.
[0007] A second aspect of this application provides a memory data transfer apparatus, including: The information acquisition module is used to acquire memory data read / write request information, memory data transmission channel status information, memory data storage load information, and memory data cache information. The memory data transmission status association information generation module is used to perform association mapping and fusion calculation based on the memory data read / write request information, memory data transmission channel status information, memory data storage load information and memory data cache information to generate memory data transmission status association information. The initial memory data transfer parameter generation module is used to randomly generate multiple initial memory data transfer bandwidth information, multiple initial memory data transfer time slot allocation information, and multiple initial memory data transfer check encoding information. The target memory data transmission parameter generation module is used to generate target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification code information based on the memory data transmission status association information, multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, and multiple initial memory data transmission verification code information. The memory data transmission module is used to process memory data for transmission based on the target memory data transmission bandwidth information, the target memory data transmission time slot allocation information, and the target memory data transmission verification code information.
[0008] A third aspect of this application provides a terminal device, the terminal device including a memory and a processor, the memory storing a computer program executable on the processor, and the processor executing the computer program to implement the steps of the memory data transfer method described in the first aspect above.
[0009] A fourth aspect of this application provides a computer-readable storage medium, comprising: storing a computer program, wherein when executed by a processor, the computer program implements the steps of the memory data transfer method described in the first aspect above.
[0010] The beneficial effects of this application embodiment compared with the prior art are as follows: This application fully considers the comprehensive impact of memory data read / write request information, memory data transmission channel status information, memory data storage load information, and memory data cache information on memory transmission performance, and selects appropriate target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification encoding information to process memory data transmission, thereby quickly responding to complex dynamic changes in the memory transmission scenario, improving the real-time performance and stability of memory data transmission, and ensuring the quality and integrity of memory data transmission while improving memory transmission efficiency. Attached Figure Description
[0011] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0012] Figure 1 This is a schematic diagram illustrating the implementation flow of the memory data transfer method provided in Embodiment 1 of this application; Figure 2 This is a schematic diagram illustrating the implementation flow of the memory data transfer method provided in Embodiment 2 of this application; Figure 3 This is a schematic diagram illustrating the implementation flow of the memory data transfer method provided in Embodiment 3 of this application; Figure 4 This is a schematic diagram illustrating the implementation flow of the memory data transfer method provided in Embodiment 4 of this application; Figure 5 This is a schematic diagram illustrating the implementation flow of the memory data transfer method provided in Embodiment 5 of this application; Figure 6 This is a schematic diagram illustrating the implementation flow of the memory data transfer method provided in Embodiment Six of this application; Figure 7 This is a schematic diagram illustrating the implementation flow of the memory data transfer method provided in Embodiment 7 of this application; Figure 8 This is a schematic diagram of the structure of the memory data transmission device provided in the embodiments of this application; Figure 9 This is a schematic diagram of the terminal device provided in the embodiments of this application. Detailed Implementation
[0013] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.
[0014] To illustrate the technical solution described in this application, specific embodiments are provided below.
[0015] Figure 1 A flowchart illustrating the implementation of the memory data transfer method provided in Embodiment 1 of this application is shown, and is described in detail below: Step S101: Obtain memory data read / write request information, memory data transmission channel status information, memory data storage load information, and memory data cache information.
[0016] In this embodiment, memory data read / write request information refers to data related to read or write requests initiated by the processor, peripherals, and other devices in the computer system to the memory. This data can include real-time dynamic information such as the request initiating device identifier, request type, data address range, requested data volume, request priority, and request initiation time. It can reflect memory access needs and access activity. This information can be obtained by capturing read / write commands transmitted via the bus in real time through the request monitoring module in the system bus, or by collecting and summarizing requests through the built-in request recording function of the memory controller, or by actively reporting memory read / write request information from each device through the device driver. Memory data transmission channel status information refers to the real-time status parameters of the channels through which memory data passes during transmission. This can include signal strength, signal-to-noise ratio, bit error rate, transmission delay, bandwidth utilization, and channel interference level. It can be used to evaluate the quality and reliability of the memory transmission link. This information can be obtained by collecting signal parameters of the transmission channel in real time through the channel monitoring unit integrated in the memory controller, or by sending preset test data and receiving feedback data, comparing and analyzing the transmission status of the test data to deduce the channel status information, or by using a dedicated bus analyzer to monitor the signal transmission status of the memory transmission bus in real time. Memory data storage load information refers to the current usage status data of each memory storage unit, which can include occupied storage capacity, free storage capacity, storage unit read / write frequency, storage area temperature, load distribution of different storage areas, etc. It is affected by the number of system running tasks and the scale of data processing. This information can be obtained by the memory management unit scanning the usage of each memory storage block in real time, or by calculating the number of read / write operations and data throughput of each storage unit over a period of time. Alternatively, it can be indirectly reflected by collecting voltage and current changes in storage units through load sensors built into the memory chip. Memory data caching information refers to the operating status and data storage information of the memory caching module, which can include cache hit rate, cache data type, cache block size, cache replacement policy execution status, cache free space, etc. This information can be used to reflect the performance improvement effect of caching on memory access. It can be obtained by the cache controller collecting cache operating parameters and data storage records in real time, or by analyzing the response time differences of memory read / write requests to infer the cache's working status, or by reading cache-related statistical data from the cache management module in the system kernel.
[0017] Step S102: Based on the memory data read / write request information, memory data transmission channel status information, memory data storage load information, and memory data cache information, perform association mapping and fusion calculation to generate memory data transmission status association information.
[0018] In this embodiment, the memory data read / write request information, memory data transmission channel status information, memory data storage load information, and memory data cache information can be preprocessed to remove outliers, unify units, and ensure spatiotemporal alignment. For example, various types of information under the same timestamp can be associated with the corresponding memory module identifier. Then, an association mapping process is performed to map the preprocessed information to a unified feature space, establishing relationships between different pieces of information. For instance, the requested data volume in the memory data read / write request information can be associated with the bandwidth utilization rate in the memory data transmission channel status information, and the load distribution in the memory data storage load information can be associated with the cache hit rate in the memory data cache information. Subsequently, based on a preset fusion calculation rule, the associated information is fused and calculated to generate memory data transmission status association information. This preset fusion calculation rule can be manually preset. It is understood that this memory data transmission status association information can encompass the intrinsic relationships between memory read / write requirements, channel quality, storage load, and cache status, thereby uncovering the nonlinear relationships between multi-dimensional memory status information and providing a comprehensive and accurate decision-making basis for subsequent optimized configuration of transmission parameters.
[0019] Step S103: Randomly generate multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, and multiple initial memory data transmission verification code information.
[0020] In this embodiment, the initial memory data transfer bandwidth information refers to the initial value of the available transmission bandwidth during memory data transfer, which directly affects the memory data transfer rate. An excessively high value may lead to resource waste, while an excessively low value will limit transmission efficiency. The initial memory data transfer time slot allocation information refers to the initial scheme of dividing the memory data transfer time into multiple discrete time segments and allocating dedicated time slots to different memory read / write requests. Time-division multiplexing technology is used to achieve orderly transmission of multiple requests, avoiding conflicts between data from different requests during transmission and ensuring the orderliness of the transmission. The initial memory data transfer verification encoding information refers to the initial information of the encoding scheme used to verify and encode the transmitted data to ensure the integrity and accuracy of memory data transfer. The encoding scheme may include parity check encoding, cyclic redundancy check encoding, Hamming encoding, etc., and error detection and correction are achieved by adding check bits. The number of randomly generated information items can be set manually, as well as the value range of the initial memory data transmission bandwidth information, the initial memory data transmission time slot allocation information, and the initial memory data transmission verification code information. The value range can be preset manually. Then, multiple initial memory data transmission bandwidth information items, multiple initial memory data transmission time slot allocation information items, and multiple initial memory data transmission verification code information items can be randomly generated by the computer.
[0021] Step S104: Based on the memory data transmission status association information, multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, and multiple initial memory data transmission verification code information, generate target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification code information.
[0022] In this embodiment, optionally, a particle swarm optimization algorithm can be used to treat multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, and multiple initial memory data transmission verification code information as multiple particles. Each particle has its own position and velocity. Then, based on the memory data transmission state association information, the optimization objective is determined, such as improving transmission efficiency while ensuring transmission quality, and a corresponding objective function is constructed, where the objective function can be preset by the user. Then, the particles adjust their velocity and position according to their own historical best position and the historical best positions of all particles, that is, by changing the initial memory data transmission bandwidth information, initial memory data transmission time slot allocation information, and initial memory data transmission verification code information. After each change, the objective function is used to evaluate the merits of the particle position in order to retain a better parameter combination. As all particles continuously iterate and search, they gradually converge to the optimal solution, thereby obtaining the target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification code information.
[0023] In this embodiment, optionally, multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, and multiple initial memory data transmission verification code information can be encoded into chromosomes. Genetic algorithms can simulate selection, crossover, and mutation operations in biological evolution. A fitness function is set based on the memory data transmission state association information, where the fitness function can be pre-set, for example, considering both the transmission rate requirements when memory read / write requests are large and the transmission stability requirements when channel interference is severe. Then, in the population, superior chromosomes are selected according to their fitness levels. Crossover operations are used to exchange some genes between chromosomes, generating new parameter combinations. Mutation operations are then used to randomly change some genes, increasing population diversity. After multiple generations of evolution, the chromosome with the highest fitness is selected. After decoding, the target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification code information are obtained.
[0024] In this embodiment, optionally, a model can be constructed based on multiple agents to interact with the memory transmission system environment. The agent's action space consists of various possible combinations of initial memory transmission bandwidth information, initial memory transmission time slot allocation information, and initial memory transmission verification code information. A reward mechanism is defined based on the memory transmission state association information. The reward mechanism can be pre-set, for example, giving a positive reward when the memory transmission system can effectively meet the read and write request requirements and has a low transmission error rate under the current parameters, and a negative reward otherwise. Then, the agent performs actions in the environment, that is, tries different combinations of initial parameters, observes the new state of the environment feedback, such as changes in actual transmission rate, transmission error rate, and rewards. Through continuous trial and error, the strategy is updated using reinforcement learning algorithms, and the agent gradually learns the optimal action under different memory transmission state association information, thereby generating target memory transmission bandwidth information, target memory transmission time slot allocation information, and target memory transmission verification code information.
[0025] Step S105: Based on the target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification code information, the memory data is processed for transmission.
[0026] In this embodiment, the target memory data transmission bandwidth information can be converted into a format conforming to the memory transmission bus standard, clarifying the specific bandwidth allocation requirements of the bus and ensuring the rational utilization of bandwidth resources. For the target memory data transmission time slot allocation information, the dedicated transmission time window corresponding to each memory read / write request can be automatically parsed and calibrated with the time synchronization system of the entire memory transmission system to ensure accurate data transmission time and avoid conflicts between different read / write requests. For the target memory data transmission verification encoding information, the specific encoding rules can be read to determine the verification encoding method and parameters for processing the memory data to be transmitted. The memory data to be transmitted can be cleaned and format-converted first to remove interference data and unify the data format before transmission preparation. The process involves encoding the preprocessed memory data according to the parsed target memory data transmission verification code information, adding check bits to ensure stable transmission in the current channel environment, reducing errors during transmission, and ensuring complete and accurate data transmission. Then, based on the bandwidth value set by the target memory data transmission bandwidth information and the target memory data transmission time slot allocation information, the encoded memory data is sent to the memory transmission channel for transmission within the corresponding time slot. During transmission, the memory data transmission channel status information can be monitored in real time. If interference, signal attenuation, or other adverse conditions are detected, immediate countermeasures will be taken, such as appropriately increasing the transmission bandwidth according to preset bandwidth adjustment rules to enhance the anti-interference capability of data transmission. These preset bandwidth adjustment rules can be manually set. When the receiving end successfully receives the transmitted data, it first decodes the data according to the decoding rules corresponding to the target memory data transmission verification code information to verify the data's integrity and accuracy. If an error is detected, a retransmission is requested; if the data is error-free, the data reception and storage are completed, thus achieving efficient and reliable transmission of memory data.
[0027] The memory data transmission method provided in this application fully considers the comprehensive impact of memory data read / write request information, memory data transmission channel status information, memory data storage load information, and memory data cache information on memory transmission performance. It selects appropriate target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification encoding information to process memory data transmission. This allows for rapid response to complex dynamic changes in memory transmission scenarios, thereby improving the real-time performance and stability of memory data transmission. While enhancing memory transmission efficiency, it also ensures the quality and integrity of memory data transmission.
[0028] Figure 2The flowchart illustrating the implementation of the memory data transfer method provided in Embodiment 2 of this application is shown. The difference between this method and Embodiment 1 is that step S102 specifically includes: Step S201: Based on the memory data read / write request information and memory data cache information, extract the memory data transmission time information and memory data transmission address information.
[0029] In this embodiment, it can be understood that both memory data read / write request information and memory data cache information are time-series information, used to characterize the memory access demand and cache operation status corresponding to each time node. Therefore, memory data transfer time information can be extracted from the memory data read / write request information and memory data cache information. Specifically, extraction can be performed at millisecond intervals, or the timestamp carried by each piece of information can be extracted to directly obtain accurate time information. Memory data transfer address information can be understood as information related to the target storage address corresponding to the memory data read / write request and the storage address of the cached data. Specifically, the start address, end address, and other address range information of the requested data can be extracted from the memory data read / write request information, and the physical address information corresponding to the cache block can be extracted from the memory data cache information. Then, the address resolution module organizes this address information to obtain standardized memory data transfer address information, used to locate the data storage location in memory.
[0030] Step S202: Based on the memory data transmission time information and memory data transmission address information, perform alignment and format conversion processing on the memory data read / write request information, memory data transmission channel status information, memory data storage load information, and memory data cache information to obtain memory data read / write request matrix information, memory data transmission channel status matrix information, memory data storage load matrix information, and memory data cache matrix information.
[0031] In this embodiment, it is understood that the sources of memory data read / write request information, memory data transmission channel status information, memory data storage load information, and memory data cache information are different, the collection frequencies vary, and the corresponding time nodes and address association dimensions are not uniform. Therefore, time alignment processing is required based on memory data transmission time information to unify all types of information into the same time window, for example, all to a 5-millisecond time window. Specifically, this can be achieved by dividing and integrating various types of information according to this fixed time window to ensure that all information is comparable in the time dimension. For information with missing or inconsistent timestamps, interpolation is used to correct them to ensure the continuity of the time series. At the same time, address alignment processing is performed based on memory data transmission address information to associate and match various types of information with the corresponding memory address regions, ensuring that different types of information can accurately correspond to the same memory storage area. After alignment, format conversion is performed. Since the original data formats and expressions of various types of information are different, they need to be converted into a unified matrix format. For example, for memory data read / write request information, the requested data volume, request priority, and other characteristics are organized into a two-dimensional matrix according to time windows and address regions. For memory data transmission channel status information, parameters such as signal strength and bit error rate are mapped to different time windows and transmission links and organized into a matrix. Then, the converted matrix data is normalized to scale all numerical ranges to a unified interval, thereby generating memory data read / write request matrix information, memory data transmission channel status matrix information, memory data storage load matrix information, and memory data cache matrix information.
[0032] Step S203: Generate memory data spatiotemporal feature mapping matrix information based on the memory data transmission time information, memory data transmission address information, memory data read / write request matrix information, memory data transmission channel status matrix information, memory data storage load matrix information, memory data cache matrix information, preset memory data transmission node spacing information, and preset memory data addressing mapping function.
[0033] In this embodiment, both the preset memory data transmission node spacing information and the preset memory data addressing mapping function can be preset manually. The preset memory data transmission node spacing information can be designed based on the physical deployment structure of the memory module, used to characterize the physical distance or logical link distance between different memory transmission nodes. For example, a value of 2 centimeters can be used to determine the correlation of transmission delay between nodes. The preset memory data addressing mapping function can be a linear mapping function, a hash mapping function, or a custom mapping function designed in conjunction with the memory storage architecture, used to quantify the correlation between memory addresses and transmission nodes. In specific processing, the address range corresponding to each memory transmission node is first determined based on the memory data transmission address information. Then, with each memory transmission node as the center and the preset memory data transmission node spacing information as the range, other transmission nodes that are associated with that node are selected to form a node association set. Then, the feature data corresponding to the memory data transmission time information, memory data transmission address information, and various matrix information are concatenated to generate a feature vector. This feature vector is used as the input of a preset memory data addressing mapping function. The association weight of each node in the spatiotemporal dimension is obtained through function calculation. Then, according to the node association set and association weight, various matrix information is weighted and fused to generate memory data spatiotemporal feature mapping matrix information. This matrix information can quantify the intrinsic association of various memory state information in the spatiotemporal dimension.
[0034] Step S204: Based on the memory data spatiotemporal feature mapping matrix information, the memory data read / write request matrix information, memory data transmission channel status matrix information, memory data storage load matrix information, and memory data cache matrix information are concatenated to obtain memory data spatiotemporal feature concatenation matrix information.
[0035] In this embodiment, feature data such as memory data read / write request matrix information, memory data transmission channel status matrix information, memory data storage load matrix information, and memory data cache matrix information corresponding to the same time window and the same address region can be selected first based on the spatiotemporal correlation in the memory data spatiotemporal feature mapping matrix information. Then, these feature data are horizontally concatenated according to feature dimensions to form a multi-channel feature tensor. Subsequently, based on the correlation weights in the memory data spatiotemporal feature mapping matrix information, the multi-channel feature tensor is weighted and integrated to strengthen the influence weight of key features and weaken the interference of irrelevant features. Then, the integrated feature tensor is dimensionally normalized and converted into a matrix form with a unified dimension, thereby generating a memory data spatiotemporal feature concatenation matrix information that can comprehensively represent the multi-dimensional memory state features in the same spatiotemporal scenario.
[0036] Step S205: Based on multiple preset memory data transmission state association mapping matrix information, perform association mapping and fusion calculation on the memory data spatiotemporal feature splicing matrix information to generate memory data transmission state association information.
[0037] In this embodiment, multiple preset memory data transmission state association mapping matrices can be manually preset and used to mine potential correlations between different dimensions of features in the spatiotemporal feature splicing matrix of memory data. For example, they can mine the intrinsic relationship between memory data read / write request features and channel state features, and storage load features and cache state features. Specifically, the multiple preset memory data transmission state association mapping matrices are first subjected to matrix operations with the spatiotemporal feature splicing matrix of memory data. These operations map the spatiotemporal feature splicing matrix of memory data to different feature spaces, amplifying the differences and correlations between different dimensions of features in each feature space. Then, the results of the multiple mapped matrices are fused. The fusion method can be a weighted summation based on preset weight coefficients, which can be manually preset or dynamically adjusted according to feature importance. Finally, the fused matrix is standardized to remove redundant features, generating memory data transmission state association information that accurately reflects the multi-dimensional memory state information correlations.
[0038] The memory data transmission method provided in this application quantifies the spatiotemporal correlation between memory transmission nodes by using preset memory data transmission node spacing information and preset memory data addressing mapping functions. It also mines potential connections of multi-dimensional features by combining multiple preset memory data transmission state association mapping matrix information, thereby achieving accurate perception of complex memory transmission scenarios and generating comprehensive and reliable memory data transmission state association information. This improves the adaptability and reliability of memory data transmission and enhances the overall performance of the memory transmission system.
[0039] Figure 3 The flowchart illustrating the implementation of the memory data transfer method provided in Embodiment 3 of this application is shown. Its difference from Embodiment 2 described above lies in: Multiple preset memory data transfer state association mapping matrix information includes preset memory data transfer state characterization mapping matrix information, preset memory data transfer state adaptation mapping matrix information, and preset memory data transfer state feature carrier coupling mapping matrix information. Step S205 specifically includes: Step S301: Based on the memory data spatiotemporal feature splicing matrix information, the preset memory data transmission state characterization mapping matrix information, the preset memory data transmission state adaptation mapping matrix information, and the preset memory data transmission state feature carrier coupling mapping matrix information, the memory data transmission state characterization mapping information, the memory data transmission state adaptation mapping information, and the memory data transmission state feature carrier coupling mapping information are obtained.
[0040] In this embodiment, the preset memory data transmission state characterization mapping matrix, the preset memory data transmission state adaptation mapping matrix, and the preset memory data transmission state feature carrier coupling mapping matrix can all be preset manually. Specifically, the preset memory data transmission state characterization mapping matrix can be used to map the memory data spatiotemporal feature splicing matrix to a feature space with clear semantics, enabling the memory data spatiotemporal feature splicing matrix to form feature information that accurately characterizes the core state of memory transmission within that space. The preset memory data transmission state adaptation mapping matrix can be used to perform targeted encoding processing on the memory data spatiotemporal feature splicing matrix, quantifying the degree of adaptation and correlation strength between different memory transmission states. The preset memory data transmission state feature carrier coupling mapping matrix can be used to realize the transformation of the memory data spatiotemporal feature splicing matrix between different dimensional spaces, fully preserving the identification information of each spatiotemporal feature during the transformation process, while strengthening the coupling correlation between different features. In specific processing, the spatiotemporal feature splicing matrix information of memory data can be subjected to matrix operations with the preset memory data transmission state characterization mapping matrix information, the preset memory data transmission state adaptation mapping matrix information, and the preset memory data transmission state feature carrier coupling mapping matrix information, respectively. The operation results are then used as the memory data transmission state characterization mapping information, the memory data transmission state adaptation mapping information, and the memory data transmission state feature carrier coupling mapping information, respectively.
[0041] Step S302: Multiply the memory data transmission state characterization mapping information and the memory data transmission state adaptation mapping information to obtain the memory data transmission state feature mapping information.
[0042] In this embodiment, the matrix corresponding to the memory data transmission state representation mapping information and the matrix corresponding to the memory data transmission state adaptation mapping information can be multiplied. This operation integrates the feature dimensions carried by the two types of information, so that the operation result retains the core representation features of the memory transmission state and incorporates the adaptation and correlation features between different states, thereby generating memory data transmission state feature mapping information that can comprehensively reflect the essence and adaptation relationship of the memory transmission state.
[0043] Step S303: Multiply the memory data transmission state feature mapping information and the memory data transmission state feature carrier coupling mapping information to generate memory data transmission state feature coupling mapping information.
[0044] In this embodiment, the matrix corresponding to the memory data transmission state feature mapping information can be multiplied with the matrix corresponding to the memory data transmission state feature carrier coupling mapping information. This operation further strengthens the coupling relationship between memory transmission features of different dimensions, deeply integrates the feature mapping relationship with the carrier coupling attribute, and then generates memory data transmission state feature coupling mapping information that can accurately characterize the multi-dimensional feature interaction coupling relationship.
[0045] Step S304: The memory data transmission state characterization mapping information and the memory data transmission state feature coupling mapping information are added together to calculate the memory data transmission state characterization mapping enhancement information.
[0046] In this embodiment, the matrix corresponding to the memory data transmission state representation mapping information and the matrix corresponding to the memory data transmission state feature coupling mapping information can be dimensionally calibrated first to ensure that the two have the same dimensions. Then, the corresponding elements of the two matrices are added together. By adding and fusing the core representation features and the coupled related features, the representation strength of the key features is enhanced, thereby generating memory data transmission state representation mapping enhancement information with more complete dimensions and more significant features.
[0047] Step S305: The memory data transmission state adaptation mapping information and the memory data transmission state feature coupling mapping information are added together to calculate the memory data transmission state adaptation mapping enhancement information.
[0048] In this embodiment, the matrix corresponding to the memory data transmission state adaptation mapping information and the matrix corresponding to the memory data transmission state feature coupling mapping information can first be dimension-matched to ensure that the two can be added together. Then, the corresponding elements of the two matrices are added together so that the addition result carries both the state adaptation association feature and the feature coupling attribute, thereby enhancing the adaptability of the adaptation feature to complex transmission scenarios and generating memory data transmission state adaptation mapping enhancement information.
[0049] Step S306: The memory data transmission state feature carrier coupling mapping information and the memory data transmission state feature coupling mapping information are added together to calculate the memory data transmission state feature carrier coupling mapping enhancement information.
[0050] In this embodiment, since both pieces of information involved in the addition are memory data transmission state feature carrier coupling mapping information, it is necessary to first confirm that the matrix dimensions of the two are completely consistent, and then perform the addition operation on the corresponding elements of the two matrices. This operation strengthens the coupling correlation strength of the feature carrier, enhances the feature carrier's ability to carry and transmit core transmission features, and thus generates memory data transmission state feature carrier coupling mapping enhancement information.
[0051] Step S307: Count the number of times the memory data transmission state feature coupling mapping information is generated, and obtain the number of times the memory data transmission state feature coupling mapping information is generated.
[0052] In this embodiment, a counter can be set to count the generation process of memory data transmission state feature coupling mapping information in real time. Each time memory data transmission state feature coupling mapping information is generated, the counter is automatically incremented once. The real-time value of the counter is then used as the number of times memory data transmission state feature coupling mapping information is generated. This number can intuitively reflect the iterative processing of feature coupling mapping.
[0053] Step S308: Generate memory data transmission state association information based on the memory data transmission state characterization mapping enhancement information, memory data transmission state adaptation mapping enhancement information, memory data transmission state feature carrier coupling mapping enhancement information, memory data transmission state feature coupling mapping information generation count, and a preset memory data transmission state feature coupling mapping information generation count threshold.
[0054] In this embodiment, the preset threshold for the number of times the memory data transmission state feature coupling mapping information is generated can be preset manually, and its value can be determined based on factors such as the complexity of the memory transmission scenario and the data processing accuracy requirements. Specifically, the number of times the memory data transmission state feature coupling mapping information is generated is first compared with the preset threshold. Based on the comparison result, the corresponding information fusion method is selected. If the number of generation reaches or exceeds the threshold, it indicates that the feature coupling iteration has been sufficient, and the memory data transmission state representation mapping enhancement information, memory data transmission state adaptation mapping enhancement information, and memory data transmission state feature carrier coupling mapping enhancement information can be comprehensively fused to generate memory data transmission state association information. If the number of generation does not reach the threshold, iterative processing is required until the conditions are met, thereby ensuring that the generated memory data transmission state association information can fully explore the inherent correlation of multi-dimensional features.
[0055] The memory data transmission method provided in this application, through preset memory data transmission state characterization mapping matrix information, preset memory data transmission state adaptation mapping matrix information, and preset memory data transmission state feature carrier coupling mapping matrix information, transforms the spatiotemporal feature splicing matrix information of memory data into a specific feature semantic space for multi-round interactive operations and enhancement processing. It fully explores the potential correlations between multimodal memory transmission features from multiple dimensions, avoids the limitations of a single feature processing perspective, and enables the generated memory data transmission state correlation information to accurately adapt to complex and ever-changing memory transmission scenarios. This provides more comprehensive and accurate data support for the subsequent optimization and configuration of transmission parameters, thereby improving the adaptability, stability, and reliability of memory data transmission and ensuring the efficient operation of the memory transmission system.
[0056] Figure 4 The flowchart illustrating the implementation of the memory data transfer method provided in Embodiment 4 of this application is shown. The difference between this method and Embodiment 3 above is that step S308 specifically includes: Step S401: Determine whether the number of times the memory data transmission state feature coupling mapping information is generated is greater than the preset threshold for the number of times the memory data transmission state feature coupling mapping information is generated; if yes, proceed to step S402; if no, proceed to step S403.
[0057] In this embodiment, the preset threshold for the number of times the memory data transfer state feature coupling mapping information is generated can be preset manually. The specific value can be set manually based on factors such as the performance requirements and data processing efficiency requirements of the actual memory transfer system. For example, it can be set to 5 or 8 times. The number of times the memory data transfer state feature coupling mapping information is generated can be directly retrieved and compared with the preset threshold. The subsequent processing flow is determined by the comparison result. If the number of generation is greater than the threshold, it means that the feature coupling iteration has reached a sufficient level and no further iteration is needed. If the number of generation is not greater than the threshold, it is necessary to return to the previous steps to continue the iterative enhancement processing.
[0058] Step S402: Summing the memory data transmission state characterization mapping enhancement information, memory data transmission state adaptation mapping enhancement information, and memory data transmission state feature carrier coupling mapping enhancement information to generate memory data transmission state association information.
[0059] In this embodiment, the three matrices corresponding to the memory data transmission state representation mapping enhancement information, memory data transmission state adaptation mapping enhancement information, and memory data transmission state feature carrier coupling mapping enhancement information are first checked for dimensional uniformity to ensure that the three dimensions are completely consistent. If there is any inconsistency in dimensions, dimensional adjustment processing is required to make them match. Then, the corresponding elements of the three matrices are summed to fully integrate the feature dimensions of representation enhancement, adaptation enhancement, and carrier coupling enhancement through summation. Finally, the summation result is standardized to convert the matrix form into an information format that meets the requirements of subsequent parameter optimization, thereby generating memory data transmission state association information.
[0060] Step S403: Use the memory data transmission state representation mapping enhancement information as memory data transmission state representation mapping information, use the memory data transmission state adaptation mapping enhancement information as memory data transmission state adaptation mapping information, use the memory data transmission state feature carrier coupling mapping enhancement information as memory data transmission state feature carrier coupling mapping information, and return to step S302.
[0061] In this embodiment, if the number of times the memory data transmission state feature coupling mapping information is generated does not exceed a preset threshold, it indicates that the current feature enhancement effect has not yet met expectations and iterative processing is required. The original memory data transmission state representation mapping information, memory data transmission state adaptation mapping information, and memory data transmission state feature carrier coupling mapping information are replaced by the memory data transmission state representation mapping information, memory data transmission state adaptation mapping information, and memory data transmission state feature carrier coupling mapping information, respectively. A new round of multiplication and enhancement operations begins until the number of times the memory data transmission state feature coupling mapping information is generated exceeds the preset threshold, thereby ensuring the sufficiency of feature interaction and enhancement.
[0062] The memory data transmission method provided in this application embodiment ensures that multi-dimensional memory transmission features can be fully integrated and enhanced, avoiding the problem of insufficient accuracy of associated information due to insufficient feature processing. This makes the memory data transmission status associated information more in line with the dynamic change requirements of complex memory transmission scenarios, providing high-quality data support for subsequent transmission parameter optimization, thereby improving the reliability and adaptability of memory data transmission and ensuring the stable and efficient operation of the memory transmission system.
[0063] Figure 5 The flowchart illustrating the implementation of the memory data transfer method provided in Embodiment 5 of this application is shown. The difference between this method and Embodiment 1 is that step S104 specifically includes: Step S501: Based on the memory data transmission status association information, multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, multiple initial memory data transmission verification encoding information, preset memory data transmission energy efficiency calculation function, preset memory data transmission channel stability calculation function, and preset memory data integrity calculation function, calculate multiple initial memory data transmission energy efficiency information, multiple initial memory data transmission channel stability information, and multiple initial memory data integrity information.
[0064] In this embodiment, the preset memory data transmission energy efficiency calculation function, the preset memory data transmission channel stability calculation function, and the preset memory data integrity calculation function can all be preset manually. Specifically, the preset memory data transmission energy efficiency calculation function can be used to quantify the energy utilization efficiency of memory data transmission under different combinations of transmission parameters. It can specifically calculate the effective data transmission volume per unit of energy consumption by combining memory data storage load information and memory data cache information in the memory data transmission status association information. The preset memory data transmission channel stability calculation function can be used to evaluate the reliability of the transmission channel. It can analyze the signal transmission bit error rate, latency, and other indicators to generate a stability score based on the memory data transmission channel status information in the memory data transmission status association information, combined with the initial memory data transmission bandwidth information and the initial memory data transmission time slot allocation information. The preset memory data integrity calculation function can be used to determine the integrity of transmitted data. It can calculate the integrity index by combining the initial memory data transmission checksum information and the memory data transmission status association information through methods such as check bit verification and data redundancy analysis. In specific processing, the initial memory data transmission bandwidth information, initial memory data transmission time slot allocation information, initial memory data transmission verification code information, and memory data transmission status association information of each set can be associated and substituted into three preset functions for calculation, thereby obtaining the initial memory data transmission energy efficiency information, initial memory data transmission channel stability information, and initial memory data integrity information corresponding to each set of parameters, that is, multiple initial memory data transmission energy efficiency information, multiple initial memory data transmission channel stability information, and multiple initial memory data integrity information.
[0065] Step S502: Calculate weights based on preset memory data transmission parameter indicators, and perform weighted summation based on the multiple initial memory data transmission energy efficiency information, multiple initial memory data transmission channel stability information, and multiple initial memory data integrity information to obtain multiple initial memory data transmission indicator information.
[0066] In this embodiment, the preset weights for memory data transfer parameters can be manually set, and their values can be determined according to the needs of the actual memory transfer scenario. For example, in high-performance computing scenarios, the weight of memory data transfer channel stability information can be increased, while in mobile terminal scenarios, the weight of memory data transfer energy efficiency information can be increased. Specifically, each initial memory data transfer energy efficiency information, the corresponding initial memory data transfer channel stability information, and the initial memory data integrity information can be multiplied by a preset weight. Then, the three multiplication results are summed, with each parameter combination corresponding to a summation result, thereby generating multiple initial memory data transfer parameter information.
[0067] Step S503: Determine the maximum value of the plurality of initial memory data transfer index information to obtain the target memory data transfer index information.
[0068] In this embodiment, by traversing multiple initial memory data transmission indicator information, comparing the values of each indicator information one by one, the indicator information with the largest value is selected as the target memory data transmission indicator information. The combination of initial memory data transmission bandwidth information, initial memory data transmission time slot allocation information, and initial memory data transmission verification code information corresponding to this target memory data transmission indicator information is the optimal combination for transmission performance in the current set of initial parameters.
[0069] Step S504: Determine whether the target memory data transmission index information is greater than the preset memory data transmission index threshold information; if yes, proceed to step S505; if no, proceed to step S506.
[0070] In this embodiment, the preset memory data transfer index threshold can be manually set, and its value can be determined based on factors such as the performance requirements of the memory transfer system and the minimum requirements of the actual application scenario. During the judgment process, the target memory data transfer index can be directly compared with the preset memory data transfer index threshold. If the target memory data transfer index is greater than the threshold, it indicates that the transmission performance of the current optimal parameter combination meets the actual requirements and no further optimization is needed; if the target memory data transfer index is not greater than the threshold, it indicates that the transmission performance of the current parameter combination does not meet the standard and the initial parameters need to be adjusted and re-evaluated.
[0071] Step S505: The initial memory data transmission bandwidth information, initial memory data transmission time slot allocation information, and initial memory data transmission verification code information corresponding to the target memory data transmission index information are respectively used as the target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification code information.
[0072] In this embodiment, when the target memory data transmission index information is determined to be greater than the preset memory data transmission index threshold information, it indicates that the corresponding initial parameter combination can meet the performance requirements of memory data transmission. At this time, the initial memory data transmission bandwidth information, the initial memory data transmission time slot allocation information, and the initial memory data transmission verification code information in the parameter combination are directly determined as the final target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification code information used for data transmission, respectively.
[0073] Step S506: The initial memory data transmission bandwidth information, initial memory data transmission time slot allocation information, and initial memory data transmission verification code information corresponding to the target memory data transmission index information are respectively used as intermediate memory data transmission bandwidth information, intermediate memory data transmission time slot allocation information, and intermediate memory data transmission verification code information.
[0074] In this embodiment, when it is determined that the target memory data transmission index information does not exceed the preset memory data transmission index threshold information, it indicates that the current optimal parameter combination still needs to be optimized. At this time, the initial memory data transmission bandwidth information, the initial memory data transmission time slot allocation information, and the initial memory data transmission verification code information in the parameter combination are used as intermediate parameters, namely intermediate memory data transmission bandwidth information, intermediate memory data transmission time slot allocation information, and intermediate memory data transmission verification code information. Subsequently, the initial parameter set will be adjusted based on the intermediate parameters to guide the parameters to be optimized in a better direction.
[0075] Step S507: Based on the intermediate memory data transmission bandwidth information, intermediate memory data transmission time slot allocation information, and intermediate memory data transmission verification code information, and according to the preset memory data transmission bandwidth adjustment information, preset memory data transmission time slot allocation adjustment coefficient, and preset memory data transmission verification code adjustment information, the multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, and multiple initial memory data transmission verification code information are adjusted and calculated to generate multiple candidate memory data transmission bandwidth information, multiple candidate memory data transmission time slot allocation information, and multiple candidate memory data transmission verification code information.
[0076] In this embodiment, the preset memory data transmission bandwidth adjustment information, the preset memory data transmission time slot allocation adjustment coefficient, and the preset memory data transmission verification code adjustment information can all be preset manually. Specifically, the preset memory data transmission bandwidth adjustment information can set the adjustment range and magnitude of the bandwidth; the preset memory data transmission time slot allocation adjustment coefficient can set the adjustment ratio of the time slot allocation; and the preset memory data transmission verification code adjustment information can set the adjustment rules for the encoding scheme. In specific processing, based on the intermediate memory data transmission bandwidth information, each initial memory data transmission bandwidth information is adjusted by increasing or decreasing according to the preset memory data transmission bandwidth adjustment information; based on the intermediate memory data transmission time slot allocation information, each initial memory data transmission time slot allocation information is proportionally adjusted in conjunction with the preset memory data transmission time slot allocation adjustment coefficient; and based on the intermediate memory data transmission verification code information, each initial memory data transmission verification code information is optimized or its parameters are fine-tuned according to the preset memory data transmission verification code adjustment information, thereby generating multiple candidate memory data transmission bandwidth information, multiple candidate memory data transmission time slot allocation information, and multiple candidate memory data transmission verification code information.
[0077] Step S508: Use the multiple candidate memory data transmission bandwidth information as multiple initial memory data transmission bandwidth information, use the multiple candidate memory data transmission time slot allocation information as multiple initial memory data transmission time slot allocation information, use the multiple candidate memory data transmission verification encoding information as multiple initial memory data transmission verification encoding information, and return to step S501.
[0078] In this embodiment, multiple candidate memory data transfer bandwidth information, multiple candidate memory data transfer time slot allocation information, and multiple candidate memory data transfer verification code information are used to replace the original initial parameter set as the initial memory data transfer bandwidth information, multiple initial memory data transfer time slot allocation information, and multiple initial memory data transfer verification code information for the next round of iteration calculation. Then, performance evaluation and parameter selection are performed again. Through this iterative process, the parameter combination is continuously optimized until the target parameters that meet the performance threshold requirements are obtained.
[0079] The memory data transmission method provided in this application selects the current optimal parameter combination and measures whether it meets the standard. If it does not meet the standard, the initial parameter set is adjusted based on the optimal parameters for iterative optimization. This ensures that the generated target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification encoding information can accurately adapt to complex memory transmission scenarios, effectively improve the energy efficiency, stability, and data integrity of memory data transmission, and ensure the efficient and reliable operation of the memory transmission system.
[0080] Figure 6 The flowchart illustrating the implementation of the memory data transfer method provided in Embodiment Six of this application is shown. The difference between this method and Embodiment Five is that step S501 specifically includes: Step S601: Based on the memory data transmission status association information, the bandwidth information of multiple initial memory data transmissions, the time slot allocation information of multiple initial memory data transmissions, the verification encoding information of multiple initial memory data transmissions, and the preset memory data transmission energy efficiency calculation function, calculate the energy efficiency information of multiple initial memory data transmissions.
[0081] In this embodiment, the preset memory data transmission energy efficiency calculation function can be manually preset. This function can comprehensively consider the energy consumption and effective transmission efficiency of memory data transmission. Specifically, the initial memory data transmission bandwidth information, initial memory data transmission time slot allocation information, initial memory data transmission verification encoding information, and memory data storage load information and memory data cache information in the memory data transmission status association information of each set can be correlated and matched. The matched information is used as the input of the preset memory data transmission energy efficiency calculation function. The function calculates the effective data transmission amount per unit energy consumption corresponding to each set of parameters. This data amount is the initial memory data transmission energy efficiency information. Multiple parameter combinations correspond to multiple initial memory data transmission energy efficiency information.
[0082] Step S602: Based on the memory data transmission status association information, multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, and a preset memory data transmission channel stability calculation function, multiple initial memory data transmission channel stability information are calculated.
[0083] In this embodiment, the preset memory data transmission channel stability calculation function can be manually preset. This function is mainly used to evaluate the reliable transmission capability of the memory transmission channel under different parameter configurations. Specifically, the memory data transmission channel status information can be extracted from the memory data transmission status association information and combined with the initial memory data transmission bandwidth information and initial memory data transmission time slot allocation information for each group. This information is then input into the preset memory data transmission channel stability calculation function. The function generates a corresponding channel stability score by analyzing indicators such as the bit error rate, transmission delay, and bandwidth utilization of signal transmission. This score is the initial memory data transmission channel stability information. Multiple parameter combinations correspond to multiple initial memory data transmission channel stability information.
[0084] Step S603: Based on the memory data transmission status association information, multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, multiple initial memory data transmission verification encoding information, and a preset memory data integrity calculation function, multiple initial memory data integrity information are calculated.
[0085] In this embodiment, the preset memory data integrity calculation function can be manually preset. This function is used to determine the integrity guarantee capability of transmitted data during the transmission process. Specifically, the initial memory data transmission bandwidth information, initial memory data transmission time slot allocation information, initial memory data transmission checksum information, and memory data transmission status association information of each group can be associated. The associated information is then input into the preset memory data integrity calculation function. The function calculates the data transmission integrity index under the corresponding parameter combination by analyzing the error correction capability of the checksum, the impact of bandwidth and time slot configuration on the continuity of data transmission, etc. This index is the initial memory data integrity information. Multiple parameter combinations correspond to multiple initial memory data integrity information.
[0086] The memory data transmission method provided in this application performs precise calculations on memory data transmission energy efficiency, channel stability, and data integrity. It accurately explores the impact of different memory data transmission parameters on various performance dimensions, thereby improving the targeting and effectiveness of memory data transmission parameter selection and optimization. This ensures that the final target transmission parameters are adaptable to various transmission performance dimensions, thereby improving the overall performance of memory data transmission.
[0087] Figure 7 The flowchart illustrating the implementation of the memory data transfer method provided in Embodiment Seven of this application is shown. The difference between this method and Embodiment Five is that step S507 specifically includes: Step S701: Based on the intermediate memory data transmission bandwidth information, adjust and calculate the multiple initial memory data transmission bandwidth information according to the preset memory data transmission bandwidth adjustment information to generate multiple candidate memory data transmission bandwidth information.
[0088] In this embodiment, the preset memory data transfer bandwidth adjustment information can be manually preset and may include parameters such as the bandwidth adjustment magnitude, step size, and maximum adjustment range. In specific processing, using the intermediate memory data transfer bandwidth information as the core benchmark, for each initial memory data transfer bandwidth information, calculations are performed according to the adjustment rules set in the preset memory data transfer bandwidth adjustment information. For example, the bandwidth may be increased or decreased based on a set step size, or adjusted proportionally according to the difference between the initial and intermediate bandwidth, ensuring that the adjusted bandwidth is within a reasonable range, thereby generating multiple candidate memory data transfer bandwidth information.
[0089] Step S702: Based on the intermediate memory data transmission time slot allocation information, adjust and calculate the multiple initial memory data transmission time slot allocation information according to the preset memory data transmission time slot allocation adjustment coefficient to generate multiple candidate memory data transmission time slot allocation information.
[0090] In this embodiment, the preset memory data transmission time slot allocation adjustment coefficient can be manually preset. This coefficient is used to control the adjustment ratio and direction of time slot allocation. In specific processing, based on the intermediate memory data transmission time slot allocation information, each initial memory data transmission time slot allocation information is multiplied by the preset memory data transmission time slot allocation adjustment coefficient to obtain the adjusted time slot allocation ratio. Then, combined with the time window requirements of memory data transmission, the number of time slots, time slot length, etc. are precisely adjusted to generate multiple candidate memory data transmission time slot allocation information, ensuring that the adjusted time slot allocation can better adapt to the channel status and transmission requirements.
[0091] Step S703: Based on the intermediate memory data transmission verification code information, adjust and calculate the multiple initial memory data transmission verification code information according to the preset memory data transmission verification code adjustment information to generate multiple candidate memory data transmission verification code information.
[0092] In this embodiment, the preset memory data transmission verification code adjustment information can be manually preset. This information may include adjustment rules for the encoding scheme, standards for increasing or decreasing the number of check bits, etc. In specific processing, based on the encoding scheme corresponding to the intermediate memory data transmission verification code information, each initial memory data transmission verification code information is optimized and adjusted according to the preset memory data transmission verification code adjustment information. For example, the number of check bits may be adjusted, or an encoding method more suitable for the current transmission scenario may be replaced. This ensures that the adjusted verification code can improve data error correction capabilities, thereby generating multiple candidate memory data transmission verification code information.
[0093] The memory data transmission method provided in this application makes precise adjustments to memory data transmission bandwidth information, memory data transmission time slot allocation information, and memory data transmission verification encoding information to optimize each parameter dimension in a targeted manner. This avoids mutual interference between parameters of different dimensions during the optimization calculation process and guides the parameters to iteratively optimize in a better direction. As a result, it improves the efficiency and accuracy of iterative optimization of memory data transmission parameters, ensures that the generated target transmission parameters are more adaptable to complex and ever-changing memory transmission scenarios, and guarantees the high efficiency and reliability of memory data transmission.
[0094] Corresponding to the method in the above embodiments, Figure 8A structural block diagram of a memory data transfer apparatus provided in an embodiment of this application is shown. For ease of explanation, only the parts related to the embodiments of this application are shown. Figure 8 The example memory data transfer device can be the execution subject of the memory data transfer method provided in the aforementioned embodiment 1.
[0095] Reference Figure 8 The memory data transfer device includes: The information acquisition module 810 is used to acquire memory data read / write request information, memory data transmission channel status information, memory data storage load information, and memory data cache information. The memory data transmission status association information generation module 820 is used to perform association mapping and fusion calculation based on the memory data read / write request information, memory data transmission channel status information, memory data storage load information and memory data cache information to generate memory data transmission status association information. The initial memory data transfer parameter generation module 830 is used to randomly generate multiple initial memory data transfer bandwidth information, multiple initial memory data transfer time slot allocation information, and multiple initial memory data transfer verification code information. The target memory data transmission parameter generation module 840 is used to generate target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification code information based on the memory data transmission status association information, multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, and multiple initial memory data transmission verification code information. The memory data transmission module 850 is used to process memory data for transmission based on the target memory data transmission bandwidth information, the target memory data transmission time slot allocation information, and the target memory data transmission verification code information.
[0096] For details on how each module in the memory data transfer device provided in this application implements its respective function, please refer to the foregoing. Figure 1 The description of Embodiment 1 shown will not be repeated here.
[0097] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.
[0098] The memory data transfer method provided in this application can be applied to terminal devices such as mobile phones, tablets, wearable devices, in-vehicle devices, augmented reality / virtual reality devices, laptops, super mobile personal computers, netbooks, and personal digital assistants. This application does not impose any restrictions on the specific type of terminal device.
[0099] Figure 9 This is a schematic diagram of the structure of a terminal device provided in an embodiment of this application. For example... Figure 9 As shown, the terminal device 9 of this embodiment includes: at least one processor 90 ( Figure 9 (Only one is shown in the image), a memory 91, which stores a computer program 92 that can run on the processor 90. When the processor 90 executes the computer program 92, it implements the steps in the various memory data transfer method embodiments described above, for example... Figure 1 Steps S101 to S105 are shown. Alternatively, when the processor 90 executes the computer program 92, it implements the functions of each module / unit in the above-described device embodiments, for example... Figure 8 The functions of modules 810 to 850 are shown.
[0100] The terminal device 9 can be a desktop computer, laptop, handheld computer, or cloud server, etc. The terminal device may include, but is not limited to, a processor 90 and a memory 91. Those skilled in the art will understand that... Figure 9 This is merely an example of terminal device 9 and does not constitute a limitation on terminal device 9. It may include more or fewer components than shown, or combine certain components, or different components. For example, the terminal device may also include input transmission devices, network access devices, buses, etc.
[0101] The processor 90 may be a central processing unit, or it may be other general-purpose processors, digital signal processors, application-specific integrated circuits, off-the-shelf programmable gate arrays or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.
[0102] In some embodiments, the memory 91 may be an internal storage unit of the terminal device 9, such as a hard disk or memory of the terminal device 9. The memory 91 may also be an external storage device of the terminal device 9, such as a plug-in hard disk, smart memory card, secure digital card, flash memory card, etc., equipped on the terminal device 9. Furthermore, the memory 91 may include both internal and external storage units of the terminal device 9. The memory 91 is used to store operating systems, applications, bootloaders, data, and other programs, such as the program code of computer programs. The memory 91 can also be used to temporarily store data that has been sent or will be sent.
[0103] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.
[0104] This application also provides a terminal device, which includes at least one memory, at least one processor, and a computer program stored in the at least one memory and executable on the at least one processor. When the processor executes the computer program, it causes the terminal device to implement the steps in any of the above method embodiments.
[0105] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps described in the various method embodiments above.
[0106] This application provides a computer program product that, when run on a terminal device, enables the terminal device to implement the steps described in the various method embodiments above.
[0107] If the integrated module / unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, a recording medium, a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, a computer memory, a read-only memory, a random access memory, an electrical carrier signal, a telecommunication signal, and a software distribution medium, etc.
[0108] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.
[0109] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0110] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0111] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.
Claims
1. A memory data transfer method, characterized in that, include: Obtain memory data read / write request information, memory data transmission channel status information, memory data storage load information, and memory data cache information; Based on the memory data read / write request information, memory data transmission channel status information, memory data storage load information, and memory data cache information, association mapping and fusion calculations are performed to generate memory data transmission status association information. Randomly generate multiple initial memory data transfer bandwidth information, multiple initial memory data transfer time slot allocation information, and multiple initial memory data transfer verification code information; Based on the memory data transmission status association information, multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, and multiple initial memory data transmission verification code information, target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification code information are generated. Based on the target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification code information, the memory data is processed for transmission.
2. The memory data transfer method as described in claim 1, characterized in that, The step of generating memory data transmission status association information by performing association mapping and fusion calculation based on the memory data read / write request information, memory data transmission channel status information, memory data storage load information, and memory data cache information specifically includes: Based on the memory data read / write request information and memory data cache information, the memory data transmission time information and memory data transmission address information are extracted. Based on the memory data transmission time information and memory data transmission address information, the memory data read / write request information, memory data transmission channel status information, memory data storage load information, and memory data cache information are aligned and format converted to obtain memory data read / write request matrix information, memory data transmission channel status matrix information, memory data storage load matrix information, and memory data cache matrix information. Based on the memory data transmission time information, memory data transmission address information, memory data read / write request matrix information, memory data transmission channel status matrix information, memory data storage load matrix information, memory data cache matrix information, preset memory data transmission node spacing information, and preset memory data addressing mapping function, a memory data spatiotemporal feature mapping matrix information is generated. Based on the memory data spatiotemporal feature mapping matrix information, the memory data read / write request matrix information, the memory data transmission channel status matrix information, the memory data storage load matrix information, and the memory data cache matrix information are concatenated to obtain the memory data spatiotemporal feature concatenation matrix information. Based on multiple preset memory data transmission state association mapping matrix information, the memory data spatiotemporal feature splicing matrix information is associated, mapped and fused to generate memory data transmission state association information.
3. The memory data transfer method as described in claim 2, characterized in that, Multiple preset memory data transfer state association mapping matrix information includes preset memory data transfer state characterization mapping matrix information, preset memory data transfer state adaptation mapping matrix information, and preset memory data transfer state feature carrier coupling mapping matrix information. The step of generating memory data transmission state association information by performing association mapping and fusion calculation on the spatiotemporal feature splicing matrix information of memory data based on multiple preset memory data transmission state association mapping matrix information specifically includes: Based on the spatiotemporal feature splicing matrix information of memory data, the preset memory data transmission state characterization mapping matrix information, the preset memory data transmission state adaptation mapping matrix information, and the preset memory data transmission state feature carrier coupling mapping matrix information, the memory data transmission state characterization mapping information, the memory data transmission state adaptation mapping information, and the memory data transmission state feature carrier coupling mapping information are obtained. The memory data transmission state characterization mapping information and the memory data transmission state adaptation mapping information are multiplied together to obtain the memory data transmission state feature mapping information. The memory data transmission state feature coupling mapping information is generated by multiplying the memory data transmission state feature carrier coupling mapping information with the memory data transmission state feature mapping information. The memory data transmission state characterization mapping enhancement information is calculated by adding the memory data transmission state characterization mapping information and the memory data transmission state feature coupling mapping information. The memory data transmission state adaptation mapping information and the memory data transmission state feature coupling mapping information are added together to calculate the memory data transmission state adaptation mapping enhancement information. The memory data transmission state feature carrier coupling mapping enhancement information is calculated by adding the memory data transmission state feature carrier coupling mapping information and the memory data transmission state feature coupling mapping information. The number of times the memory data transfer state feature coupling mapping information is generated is counted to obtain the number of times the memory data transfer state feature coupling mapping information is generated. Based on the memory data transmission state characterization mapping enhancement information, memory data transmission state adaptation mapping enhancement information, memory data transmission state feature carrier coupling mapping enhancement information, memory data transmission state feature coupling mapping information generation count, and a preset memory data transmission state feature coupling mapping information generation count threshold, memory data transmission state association information is generated.
4. The memory data transfer method as described in claim 3, characterized in that, The step of generating memory data transmission state association information based on the memory data transmission state characterization mapping enhancement information, memory data transmission state adaptation mapping enhancement information, memory data transmission state feature carrier coupling mapping enhancement information, the number of times memory data transmission state feature coupling mapping information is generated, and a preset threshold for the number of times memory data transmission state feature coupling mapping information is generated, specifically includes: Determine whether the number of times the memory data transmission state feature coupling mapping information is generated is greater than a preset threshold for the number of times the memory data transmission state feature coupling mapping information is generated; If so, the memory data transmission state characterization mapping enhancement information, memory data transmission state adaptation mapping enhancement information, and memory data transmission state feature carrier coupling mapping enhancement information are summed to generate memory data transmission state association information; If not, then the memory data transmission state representation mapping enhancement information is used as the memory data transmission state representation mapping information, the memory data transmission state adaptation mapping enhancement information is used as the memory data transmission state adaptation mapping information, and the memory data transmission state feature carrier coupling mapping enhancement information is used as the memory data transmission state feature carrier coupling mapping information. Then, the process returns to the step of multiplying the memory data transmission state representation mapping information and the memory data transmission state adaptation mapping information to obtain the memory data transmission state feature mapping information.
5. The memory data transfer method as described in claim 1, characterized in that, The step of generating target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification code information based on the memory data transmission status association information, multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, and multiple initial memory data transmission verification code information specifically includes: Based on the memory data transmission status association information, multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, multiple initial memory data transmission verification encoding information, preset memory data transmission energy efficiency calculation function, preset memory data transmission channel stability calculation function, and preset memory data integrity calculation function, multiple initial memory data transmission energy efficiency information, multiple initial memory data transmission channel stability information, and multiple initial memory data integrity information are calculated. The weights are calculated based on preset memory data transmission parameter indicators. The weighted sums are then performed based on the multiple initial memory data transmission energy efficiency information, multiple initial memory data transmission channel stability information, and multiple initial memory data integrity information to obtain multiple initial memory data transmission indicator information. Determine the maximum value of the plurality of initial memory data transfer index information to obtain the target memory data transfer index information; Determine whether the target memory data transfer index is greater than a preset memory data transfer index threshold. If so, the initial memory data transmission bandwidth information, initial memory data transmission time slot allocation information, and initial memory data transmission verification code information corresponding to the target memory data transmission index information shall be respectively used as the target memory data transmission bandwidth information, the target memory data transmission time slot allocation information, and the target memory data transmission verification code information; If not, the initial memory data transmission bandwidth information, initial memory data transmission time slot allocation information, and initial memory data transmission verification code information corresponding to the target memory data transmission index information shall be respectively used as intermediate memory data transmission bandwidth information, intermediate memory data transmission time slot allocation information, and intermediate memory data transmission verification code information. Based on the intermediate memory data transmission bandwidth information, intermediate memory data transmission time slot allocation information, and intermediate memory data transmission verification code information, and according to the preset memory data transmission bandwidth adjustment information, preset memory data transmission time slot allocation adjustment coefficient, and preset memory data transmission verification code adjustment information, the multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, and multiple initial memory data transmission verification code information are adjusted and calculated to generate multiple candidate memory data transmission bandwidth information, multiple candidate memory data transmission time slot allocation information, and multiple candidate memory data transmission verification code information. The multiple candidate memory data transmission bandwidth information is used as multiple initial memory data transmission bandwidth information, the multiple candidate memory data transmission time slot allocation information is used as multiple initial memory data transmission time slot allocation information, and the multiple candidate memory data transmission verification encoding information is used as multiple initial memory data transmission verification encoding information. The process then returns to the step of calculating multiple initial memory data transmission energy efficiency information, multiple initial memory data transmission channel stability information, and multiple initial memory data integrity information based on the memory data transmission status association information, the multiple initial memory data transmission bandwidth information, the multiple initial memory data transmission time slot allocation information, the multiple initial memory data transmission verification encoding information, the preset memory data transmission energy efficiency calculation function, the preset memory data transmission channel stability calculation function, and the preset memory data integrity calculation function.
6. The memory data transfer method as described in claim 5, characterized in that, The step of calculating multiple initial memory data transmission energy efficiency information, multiple initial memory data transmission channel stability information, and multiple initial memory data integrity information based on the memory data transmission status association information, multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, multiple initial memory data transmission verification encoding information, a preset memory data transmission energy efficiency calculation function, a preset memory data transmission channel stability calculation function, and a preset memory data integrity calculation function specifically includes: Based on the memory data transmission status association information, multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, multiple initial memory data transmission verification encoding information, and the preset memory data transmission energy efficiency calculation function, multiple initial memory data transmission energy efficiency information is calculated. Based on the memory data transmission status association information, multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, and a preset memory data transmission channel stability calculation function, multiple initial memory data transmission channel stability information are calculated. Based on the memory data transmission status association information, multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, multiple initial memory data transmission verification encoding information, and a preset memory data integrity calculation function, multiple initial memory data integrity information is calculated.
7. The memory data transfer method as described in claim 5, characterized in that, The step of adjusting and calculating the multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, and multiple initial memory data transmission verification code information based on the intermediate memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, and multiple initial memory data transmission verification code information, according to preset memory data transmission bandwidth adjustment information, preset memory data transmission time slot allocation adjustment coefficient, and preset memory data transmission verification code adjustment information, to generate multiple candidate memory data transmission bandwidth information, multiple candidate memory data transmission time slot allocation information, and multiple candidate memory data transmission verification code information, specifically includes: Based on the intermediate memory data transmission bandwidth information, and according to the preset memory data transmission bandwidth adjustment information, the multiple initial memory data transmission bandwidth information is adjusted and calculated to generate multiple candidate memory data transmission bandwidth information. Based on the intermediate memory data transmission time slot allocation information, and according to the preset memory data transmission time slot allocation adjustment coefficient, the multiple initial memory data transmission time slot allocation information is adjusted and calculated to generate multiple candidate memory data transmission time slot allocation information. Based on the intermediate memory data transmission verification code information, and according to the preset memory data transmission verification code adjustment information, the multiple initial memory data transmission verification code information are adjusted and calculated to generate multiple candidate memory data transmission verification code information.
8. A memory data transfer device, characterized in that, include: The information acquisition module is used to acquire memory data read / write request information, memory data transmission channel status information, memory data storage load information, and memory data cache information. The memory data transmission status association information generation module is used to perform association mapping and fusion calculation based on the memory data read / write request information, memory data transmission channel status information, memory data storage load information and memory data cache information to generate memory data transmission status association information. The initial memory data transfer parameter generation module is used to randomly generate multiple initial memory data transfer bandwidth information, multiple initial memory data transfer time slot allocation information, and multiple initial memory data transfer verification code information. The target memory data transmission parameter generation module is used to generate target memory data transmission bandwidth information, target memory data transmission time slot allocation information, and target memory data transmission verification code information based on the memory data transmission status association information, multiple initial memory data transmission bandwidth information, multiple initial memory data transmission time slot allocation information, and multiple initial memory data transmission verification code information. The memory data transmission module is used to process memory data for transmission based on the target memory data transmission bandwidth information, the target memory data transmission time slot allocation information, and the target memory data transmission verification code information.
9. A terminal device, characterized in that, The terminal device includes a memory and a processor. The memory stores a computer program that can run on the processor. When the processor executes the computer program, it implements the steps of the method as described in any one of claims 1 to 7.
10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method as described in any one of claims 1 to 7.