Display device

Abstract

This invention discloses a display device. The display device includes a pixel circuit and a control circuit. The pixel circuit includes a control transistor for driving current to the pixel and a pulse width modulation (PWM) circuit that provides a control signal to the control transistor. The PWM circuit uses the control signal to turn the control transistor on / off to control the emission period of the pixel in one frame period. The PWM circuit uses a grayscale data voltage from the control circuit, a first ramp signal, and a second ramp signal that is steeper than the first ramp signal to turn the driving transistor that outputs the control signal on / off. The second ramp signal is used for control of a low grayscale range including the minimum grayscale level, but not for control of a high grayscale range including grayscale levels higher than the low grayscale level range. The first ramp signal is used at least for control of the high grayscale range.

Description

Technical Field

[0001] This disclosure relates to a display device. Background Technology

[0002] Display devices utilizing miniature light-emitting diodes (LEDs) employ pulse width modulation (PWM) driving, which modulates the emission period to display halftones. Among various PWM driving methods, analog PWM driving has been standardized in recent years. Analog PWM driving modulates the emission pulse width in an analog manner based on grayscale data.

[0003] The pixel circuit driven by analog PWM includes a constant current generation (CCG) unit, a PWM unit, and a switch. The CCG unit generates a constant current. The PWM unit compares the grayscale data voltage representing the grayscale data with a ramp signal and converts the grayscale data voltage into a pulse signal. The switch turns the current generated by the CCG unit on / off according to the pulse signal from the PWM unit.

[0004] Analog PWM driving requires rectangular pulses to obtain the ideal drive current; however, the current in a real circuit does not drop immediately, and its finite fall time (transition time) causes a degraded display quality in the low grayscale range. The length of the fall time is one of the problems, and in particular, achieving good grayscale representation in the low-level range is a major issue. Summary of the Invention

[0005] PWM driving of light-emitting elements requires a technique for a steep falling edge of the pulse waveform used to drive the current.

[0006] A display device includes a plurality of pixel circuits and a control circuit configured to control the plurality of pixel circuits. Each of the plurality of pixel circuits includes a control transistor for a drive current for the pixel and a pulse width modulation circuit for providing a control signal to the control transistor. The pulse width modulation circuit includes a drive transistor for outputting the control signal. The pulse width modulation circuit is configured to turn the control transistor on / off using the control signal to control the emission period of a pixel in a frame period. The pulse width modulation circuit is configured to turn the drive transistor on / off using a grayscale data voltage from the control circuit, a first ramp signal, and a second ramp signal that is steeper than the first ramp signal. The second ramp signal is used for control of a low grayscale range including a minimum grayscale level, but not for control of a high grayscale range including grayscale levels higher than the low grayscale range. The first ramp signal is used at least for control of the high grayscale range.

[0007] The present disclosure improves the PWM drive of a light-emitting element with a sharp falling edge of a pulse waveform of a drive current.

[0008] It should be understood that the above general description and the following detailed description are exemplary and explanatory, and do not limit this disclosure. Attached Figure Description

[0009] Figure 1 The configuration of pixel circuitry associated with embodiments of the present disclosure is illustrated schematically.

[0010] Figure 2 The time variation of the input signal voltages VRAMP and VDATA to the PWM circuit, the control signal voltage VOUT output from the PWM circuit, and the drive current ILED to the micro LED is shown.

[0011] Figure 3A It shows Figure 2 The state of the pixel circuit at time T1.

[0012] Figure 3B It shows Figure 2 The state of the pixel circuit at time T2.

[0013] Figure 3C It shows Figure 2 The state of the pixel circuit at time T3.

[0014] Figure 3D It shows Figure 2 The state of the pixel circuit at time T4.

[0015] Figure 3E It shows Figure 2 The state of the pixel circuit at time T5.

[0016] Figure 4 An example of a PWM circuit configured with thin-film transistors and capacitors is shown.

[0017] Figure 5 The waveforms of the ramp signal VRAMP, the gate voltage Vg of the driving thin-film transistor in the PWM circuit, the control signal voltage VOUT from the PWM circuit, and the driving current ILED of the micro LED are schematically shown.

[0018] Figure 6 Simulation results of the input-output characteristics (static characteristics) of the PWM circuit are provided.

[0019] Figure 7 The verification results were provided by simulating the relationship between the gradient of the ramp signal VRAMP and the fall time of the LED drive current ILED.

[0020] Figure 8 The waveforms of the ramp signal VRAMP and the LED drive current ILED in response to different grayscale data voltages are schematically shown.

[0021] Figure 9 This is a timing diagram of the control signals of the pixel circuit in an embodiment of this disclosure.

[0022] Figure 10 Simulation results for LED driving current at different gray levels are provided.

[0023] Figure 11 Simulation results are provided regarding the relationship between grayscale level and peak LED drive current.

[0024] Figure 12 Simulation results are provided regarding the relationship between the deviation of the average current caused by the threshold voltage variation of the driving thin-film transistor in the PWM circuit and the gradient of the ramp signal VRAMP.

[0025] Figure 13 Simulation results are provided showing the relationship between the gradient of the ramp signal and the deviation of the average current.

[0026] Figure 14 This is a conceptual diagram of the waveforms of two ramp signals within a frame period.

[0027] Figure 15 This is a plan view showing an example configuration of a micro LED display device.

[0028] Figure 16 An example configuration of a grayscale data voltage generation unit in a signal circuit is shown.

[0029] Figure 17 An example of a gamma LUT used in a configuration that uses a single ramp signal per frame is provided.

[0030] Figure 18A Example configuration of a gamma LUT for the first sub-cycle of a flat ramp signal is provided in Example 1.

[0031] Figure 18B Example configurations for a gamma LUT using a second sub-cycle of a steep ramp signal, as shown in Example 1, are provided.

[0032] Figure 19A Example configuration of a gamma LUT for the first sub-cycle using a gentle ramp signal is provided in Example 2.

[0033] Figure 19B Example configurations for a gamma LUT using a second sub-cycle of a steep ramp signal are provided in Example 2.

[0034] Figure 20 Simulation results for LED driving current at different gray levels are provided in Example 2.

[0035] Figure 21 Simulation results of the average current in Example 1 are provided when the grayscale level changes only in the central area of ​​the display area and remains constant in other areas.

[0036] Figure 22 Another simulation result of the average current in Example 1 is provided when the gray level changes only in the central area of ​​the display area and remains constant in other areas.

[0037] Figure 23 Simulation results of the average current in Example 2 are provided when the grayscale level changes only in the central area of ​​the display area and remains constant in other areas.

[0038] Figure 24 This is a timing diagram of the pixel control signals in the progressive driving method of Example 3.

[0039] Figure 25 Simulation results are provided for the temporal variation of the ramp signal within one frame period in Example 4, as well as the temporal variation of the LED driving current for different gray levels.

[0040] Figure 26 This is a timing diagram of the pixel control signal in Example 4.

[0041] Figure 27 An example configuration from Embodiment 5 is shown, in which each pixel is divided into two sub-pixels.

[0042] Figure 28 This is a timing diagram of the pixel control signal in Example 5. Detailed Implementation

[0043] This disclosure describes the control of light emission from a micro-light-emitting diode (micro-LED). Pixel circuitry for controlling the light emission of the micro-LED illuminates the micro-LED within a frame cycle for a light emission period of length based on grayscale data, and then de-illuminates the micro-LED. A longer light emission period implies higher brightness.

[0044] Embodiments of this disclosure control the light emission period (brightness) of a micro-LED using pulse width modulation (PWM) based on grayscale data. The method of driving a micro-LED by PWM control (PWM driving) provides the micro-LED with a pulsed drive current (also called lighting current or LED current) having a pulse width based on the grayscale data to light the micro-LED.

[0045] The pulse width is the length between the midpoint of the rise and fall of the pulse drive current; a longer pulse width means a longer emission period or higher brightness. The drive current for the low grayscale range does not reach the maximum value for the high grayscale range; its waveform can consist of a steep rising edge and a gentle falling edge.

[0046] Analog PWM drives require a rectangular waveform to obtain the ideal drive current. However, the current in a real circuit does not drop sharply; there is a finite fall time (transition region) during which the drive current gradually decreases. During this fall time, the drive current gradually decreases.

[0047] The emission wavelength of a micro-LED shifts towards shorter wavelengths with increasing drive current density, and then towards longer wavelengths with further increases. When the drive current density is low, the external quantum efficiency (EQE) of the micro-LED decreases significantly. This adverse effect on micro-LED emission is particularly pronounced when the drive current supply cycle for low grayscale levels consists only of the fall time. Therefore, the length of this fall time is a major issue in the PWM driving of micro-LEDs.

[0048] The pixel circuitry of this disclosure includes a constant current circuit, a PWM circuit, and a current control switch. The constant current circuit generates a constant current. The PWM circuit generates a control signal based on grayscale data voltage and a ramp signal with different gradients. The current control switch turns the current flowing from the constant current circuit to the micro-LED on / off, depending on the control signal from the PWM circuit.

[0049] Example 1

[0050] Figure 1 The illustration schematically shows the configuration of pixel circuitry associated with embodiments of the present disclosure. The display area of ​​the display device includes micro-LEDs arranged in a predetermined layout (e.g., in a matrix). 11. The display device includes pixel circuits 10 for individually controlling micro-LEDs 11. Each pixel circuit 10 includes a constant current circuit 14, a PWM circuit 12, and a current control switch 16. The current control switch 16 is a control transistor for the drive current of the micro-LEDs 11. All micro-LEDs 11 can be used for the same color of light, or the display area can include micro-LEDs for different colors of light, such as red, blue, and green. In this example, one micro-LED 11 corresponds to a single light-emitting area, and it is associated with the pixel circuit. The features of this disclosure can be applied to light-emitting elements other than micro-LEDs.

[0051] The miniature LED 11 includes an anode and a cathode. The cathode of the miniature LED 11 is supplied with a constant power supply voltage PVEE. The constant current circuit 14 and the PWM circuit 12 can have any internal configuration; Figure 1 The PWM circuit 12 in the example is shown.

[0052] A constant current circuit 14 generates a constant current. A current control switch 16 is positioned between the constant current circuit 14 and the micro LED 11. The current control switch 16 is a thin-film transistor (also simply a transistor), and... Figure 1 In the configuration example, switch 16 is a p-type thin-film transistor. The active layer of the p-type thin-film transistor can be made of, for example, low-temperature polysilicon. Instead of the current-controlled switch 16, the driving thin-film transistor included in the constant current circuit 14 can be controlled by the PWM circuit 12. This driving thin-film transistor is a control transistor for the LED drive current. In this case, the driving thin-film transistor in the constant current circuit 14 uses its gate voltage to control the magnitude of the LED drive current and turns on / off depending on the output voltage of the PWM circuit 12.

[0053] exist Figure 1 In the configuration example, the source of the current-controlled switch 16 is connected to the terminal of the constant current circuit 14, and the drain is connected to the anode of the micro LED 11. The current-controlled switch 16 is positioned on the current path from the constant current circuit 14 to the power line to provide a power supply voltage PVEE via the micro LED 11 to turn the path on / off.

[0054] A current-controlled switch 16 can be positioned between the micro-LED 11 and the power line used to provide the power supply voltage PVEE. The current-controlled switch 16 can be an n-type thin-film transistor. The active layer of the n-type thin-film transistor can be made of, for example, oxide semiconductor or low-temperature polycrystalline silicon.

[0055] The constant current circuit 14 is supplied with a power supply voltage PVDD to generate and output a constant current. The power supply voltage PVDD is higher than the power supply voltage PVEE. The current output from the constant current circuit 14 is turned on / off by a current control switch 16.

[0056] The PWM circuit 12 includes a comparator 121, a switch 122, capacitors 123 and 124, and another switch 125. One end of switch 122 and one end of capacitor 123 are connected to the inverting input of comparator 121. The non-inverting input of comparator 121 is supplied with a constant voltage VH2. Comparator 121 is also supplied with a constant voltage VH2 as a power supply voltage.

[0057] Comparator 121 compares the input signal voltage VIN at the inverting input terminal with the reference voltage VH2 at the non-inverting input terminal and outputs an output signal voltage VOUT indicating the comparison result. The output signal voltage VOUT of comparator 121 is provided to the gate of the current control switch 16 as a control signal voltage for controlling the opening / closing of the current control switch 16.

[0058] Switch 122 turns the path between the transmission line of the grayscale data voltage VDATA and the inverting input of comparator 121 on / off. The other end of capacitor 123 is supplied with a ramp signal VRAMP. The ramp signal VRAMP is a voltage (signal) that increases or decreases linearly over time, and the grayscale data voltage VDATA is the voltage corresponding to the grayscale level of a pixel in a video frame. The examples of ramp signals described below primarily use a decreasing voltage ramp signal, but a increasing voltage ramp signal can also be used.

[0059] Capacitor 124 is configured between the gate of current-controlled switch 16 and the line used to provide a constant voltage VSET. The constant voltage VSET is lower than the constant voltage VH2. One end of capacitor 124 is connected to the node between the gate of current-controlled switch 16 and the output of comparator 121, and the other end is connected to the line used to provide the constant voltage VSET.

[0060] Switch 125 turns the path between the gate of current control switch 16 and the line used to provide a constant voltage VSET on / off. One end of switch 125 is connected to the node between the gate of current control switch 16 and the output of comparator 121, and the other end is connected to the line used to provide a constant voltage VSET.

[0061] PWM circuit 12 generates and outputs control signal voltage VOUT based on grayscale data voltage VDATA. The signal voltage input to PWM circuit 12 includes the grayscale data voltage VDATA and the change in the ramp signal. The PWM circuit 12 modulates the grayscale data voltage VDATA, representing the grayscale data, with the change of the ramp signal. The control signal voltage VOUT is compared and output as a pulse signal.

[0062] Figure 1 The PWM circuit 12 uses comparator 121 to compare the sum of the grayscale data voltages VDATA with the change of a ramp signal having a constant voltage VH2. The values ​​are compared, and a control signal voltage VOUT is output based on their magnitude relationship. This operation corresponds to the change in grayscale data voltage VDATA with the ramp signal VRAMP. The comparison is as follows. The PWM circuit 12 disconnects the switch 16 by outputting a high (high, H) level voltage VH2 from the comparator 121 to stop supplying current to the micro LED 11.

[0063] Figure 2 The diagram illustrates the time-varying input signal voltages VRAMP and VDATA of the PWM circuit 12, the control signal voltage VOUT output from the PWM circuit 12, and the driving current ILED of the miniature LED 11. The input signal voltage VIN at the inverting input of comparator 121 is the variation of the grayscale data voltage VDATA and the ramp signal VRAMP. The sum of voltages.

[0064] Figures 3A to 3E It shows Figure 2 The state of pixel circuit 10 at times T1 to T5. Refer to the following text... Figure 2 and Figures 3A to 3E Describe the circuit operation of pixel circuit 10.

[0065] Refer to the state shown at time T1 Figure 3A Miniature LED 11 is not emitting light. Time T1 is included in the non-emitting cycle. Switches 122 and 125 are open. (See reference...) Figure 2 At time T1, the input voltage of comparator 121 is the minimum voltage used as a reference. The control signal voltage VOUT from PWM circuit 12 is VH2, which is the H-level output from comparator 121. Therefore, current control switch 16 is turned off, cutting off the drive current ILED of micro LED 11.

[0066] Refer to the state shown at time T2 Figure 3B Switches 122 and 125 are closed. (Refer to...) Figure 2 At time T2, the grayscale data voltage VDATA corresponding to the grayscale level in the video frame data is written to PWM circuit 12. The period from time T2 to time T3 is the period for writing the grayscale data voltage. Since switch 125 is turned on, the control signal voltage VOUT from PWM circuit 12 is VSET at level L. Therefore, current control switch 16 is turned on; drive current ILED is provided to microLED 11, and microLED 11 begins to emit light. Figure 3B In one example, switches 122 and 125 are turned on together during the period from time T2 to time T3. In another example, as... Figure 4 As shown in signals S1 and S2, the closing times of these switches can be different.

[0067] Refer to the state shown at time T3 Figure 3C Switches 122 and 125 are disconnected. (Refer to...) Figure 2The ramp signal VRAMP begins input at time T3. The changes in grayscale data voltage VDATA and the ramp signal are shown. The sum of the voltages is higher than voltage VH2. The control signal voltage VOUT from PWM circuit 12 is maintained at VSET at level L. Current control switch 16 remains on, and miniature LED 11 remains lit.

[0068] Refer to the state shown at time T4 Figure 3D Switches 122 and 125 remain open. (Refer to...) Figure 2 Changes in grayscale data voltage VDATA and ramp signal The sum of the voltages is higher than voltage VH2. The control signal voltage VOUT from PWM circuit 12 is maintained at VSET at level L. Current control switch 16 remains on, and miniature LED 11 remains lit.

[0069] Refer to the state shown at time T5 Figure 3E Switches 122 and 125 remain open. (Refer to...) Figure 2 Changes in grayscale data voltage VDATA and ramp signal The total voltage has decreased to voltage VH2. The control signal voltage VOUT from PWM circuit 12 changes from VSET at level L to VH2 at level H. In response to the change in control signal voltage VOUT, current control switch 16 is turned off, and miniature LED 11 stops illuminating.

[0070] As mentioned above, the pulse width of the driving current of the micro LED 11 depends on the grayscale data voltage VDATA. In other words, the light emission cycle of the micro LED 11 is controlled by the grayscale data voltage VDATA.

[0071] Figure 4 An example of a PWM circuit 12 configured with thin-film transistors and capacitors is shown. Switches 122 and 125, and comparator 121, are p-type thin-film transistors. The gate of switch 125 is provided with a selection signal (scan signal) S1, and the gate of switch 122 is provided with a selection signal (scan signal) S2. Switches 122 and 125 are selected by the selection signals S1 and S2 to interact with a reference... Figures 3A to 3E Controlled in the same way as described.

[0072] Figure 4 The pixel circuit includes another p-type switching thin-film transistor 131 between the source of the constant current circuit 14 and the current control switch 16. Thin-film transistor 131 is controlled by a control signal EM. Thin-film transistor 131 can be positioned at different locations on the LED driving current path, and its conductivity type can be one of them.

[0073] The gate of thin-film transistor 121 corresponds to the inverting input of the comparator and is supplied with an input signal voltage VIN. The source of thin-film transistor 121 is supplied with a constant voltage VH2. The drain of thin-film transistor 121 is connected to the gate of current control switch 16. Thin-film transistor 121 outputs a control signal voltage VOUT for controlling the on / off state of current control switch 16. Therefore, thin-film transistor 121 can be referred to as the driving thin-film transistor in PWM circuit 12.

[0074] although Figure 4 In the pixel circuit 10, all thin-film transistors are p-type thin-film transistors, but one or more, or even all, of the thin-film transistors can be n-type thin-film transistors. The pixel circuit 10 may also include, in addition to... Figure 4 Components other than those shown, such as thin-film transistors and capacitors, and / or components from... Figure 4 Some components are excluded from the components shown. The same applies to the control signals of pixel circuit 10; one or more control signals may be added and / or one or more signals may be excluded.

[0075] exist Figure 2 In the waveform, the drive current ILED of the micro LED 11 drops sharply at time T5. This is an ideal waveform; in reality, the drive current ILED drops very smoothly. Unlike the falling edge, the rising edge of the drive current ILED has a nearly ideal steep gradient. This is because the switching thin-film transistor 131 is positioned in the path of the LED drive current, and the voltage at its gate changes abruptly from high to low on the order of sub-microseconds, just like the light-emitting control signal EM.

[0076] The drive current ILED decreases slowly and gradually from its maximum value to zero over time. In a constant current PWM drive, the drive current ILED is not immediately cut off, thus providing a non-constant period for the drive current ILED. An ideal constant current PWM drive has not been achieved.

[0077] Figure 5 The waveforms of the ramp signal VRAMP, the gate voltage Vg of the driving thin-film transistor 121 in the PWM circuit 12, the control signal voltage VOUT from the PWM circuit 12, and the driving current ILED for the micro LED 11 are schematically shown.

[0078] As the ramp signal VRAMP gradually decreases, the gate voltage Vg of the driving thin-film transistor 121 in the PWM circuit 12 decreases. When the gate voltage Vg reaches the threshold voltage Vth, the driving thin-film transistor 121 changes from off to on. However, the output voltage VOUT from the PWM circuit 12 gradually increases from VSET to VH2. This rise time is the response time of the output voltage VOUT from the PWM circuit 12. As the output voltage VOUT from the PWM circuit 12 gradually increases, the driving current ILED of the micro LED 11 gradually decreases.

[0079] For pulse width modulation of the micro LED 11, the long fall time of the drive current ILED can cause considerable variations in luminous efficiency and chromaticity between micro LEDs, degrading display quality. This is because the LED drive current has a low density during the fall time. As mentioned above, the fall time of the drive current ILED is caused by the response time (rise time) of the control signal voltage VOUT output from the PWM circuit 12.

[0080] Figure 6 Simulation results for the input-output characteristics (static characteristics) of PWM circuit 12 are provided. Dashed lines represent ideal characteristics, and solid lines represent the characteristics of the actual circuit. The input-output characteristics reflect the steepness of the Id-Vg characteristic of the driving thin-film transistor 121. The simulation results show that after transistor 121 is turned on, the gate voltage of the driving thin-film transistor 121 needs to change by 0.61V to provide sufficient drain current Id.

[0081] The time required for the gate voltage to change by 0.61V is the response time of the control signal voltage VOUT output from the PWM circuit 12. The time required for the gate voltage to change by 0.61V as the potential of the ramp signal VRAMP gradually decreases corresponds to the fall time of the LED drive current. In the case of grayscale display using a single ramp signal, the gradient of the ramp signal decreases depending on the pulse width of the output VOUT of the PWM circuit 12 at the peak brightness or maximum grayscale level. To maximize the luminous duty cycle of the maximum grayscale level, a longer pulse width is required; the potential of the ramp signal decreases gradually over a long period of time, approximately slightly shorter than one frame. For this reason, the 0.61V input voltage required for the control signal voltage VOUT to respond is a non-negligible amount for the luminous control of the micro LED 11.

[0082] Through their research on constant-current PWM driving of micro LEDs, the inventors discovered that the response time of the PWM circuit 12, or the fall time of the LED drive current ILED, is related to the gradient of the ramp signal and the sharpness of the Id-Vg characteristic of the thin-film transistor. Specifically, they found that increasing the gradient of the ramp signal reduces the response time of the output voltage VOUT of the PWM circuit 12, and therefore also reduces the fall time of the drive current ILED. Furthermore, they found a more suitable range for the gradient of the ramp signal, which will be described later.

[0083] Figure 7 The verification results are provided by simulating the relationship between the gradient of the ramp signal VRAMP and the fall time of the LED drive current ILED. The horizontal axis of the graph represents the gradient of the ramp signal VRAMP, and the vertical axis represents the fall time of the LED drive current ILED. Figure 7 As can be understood from the curve, when the gradient of the ramp signal VRAMP is large, the fall time of the output current from the current control switch 16 is short.

[0084] The fall time of the LED driving current ILED is even more important in the low grayscale range with short light emission cycles. Figure 8 The waveforms of the ramp signal VRAMP and the LED drive current ILED in response to different grayscale data voltages are schematically shown.

[0085] Waveform 201 is the drive current waveform for high grayscale levels; waveform 202 is the drive current waveform for intermediate grayscale levels; and waveform 203 is the drive current waveform for low grayscale levels. For example, the maximum grayscale level is 255 and the minimum grayscale level is 0.

[0086] Waveforms 201 and 202, for high and medium gray levels respectively, have pulse widths longer than their fall times, and their peak values ​​(maximum current values) are the same. Waveforms 201 and 202 have periods indicating constant (maximum) current values. In waveforms 201 and 202, the drive current rises to its maximum value, remains at its maximum value, and then falls. Here, the pulse width is defined as the time width (half-value width) between the midpoint of the rising and falling edges of the waveform. The rising edge can be considered essentially vertical.

[0087] Waveform 203, representing the drive current for low grayscale levels, has a pulse width shorter than the fall time, and its peak value (maximum current value) is lower than that of other waveforms 201 and 202. Waveform 203 begins to fall immediately from its peak value and does not have a period indicating a constant value. When the pulse width of the drive current is shorter than the fall time in this case, the peak value of the drive current becomes lower. That is, the current density flowing through the LED is low, causing variations in brightness and chromaticity between LEDs. The long fall time of the LED drive current has a more significant impact on luminescence in the low grayscale range.

[0088] In embodiments of this disclosure, different ramp signals (slopes) are applied to the high and low grayscale ranges when generating the LED drive current. More specifically, a gentler ramp signal (slope) is applied to the high grayscale range, and a steeper ramp signal (slope) is applied to the low grayscale range. This configuration reduces the fall time in the low grayscale range, where a long fall time has a greater impact, and also achieves high brightness in the high grayscale range. For the high grayscale range, the upper limit of the average current or luminous duty cycle is increased by increasing the width of the ramp signal to provide a gentler ramp signal. The gradient of the ramp signal can be varied with the voltage amplitude of the ramp signal. However, the voltage amplitude is finite, and increasing the voltage amplitude increases power consumption. Reducing the fall time in the low grayscale range can reduce the brightness and chromaticity variations based on the characteristics of the micro-LED (improving brightness and chromaticity uniformity) and further reduce the average current variations caused by thin-film transistor variations (improving average current uniformity).

[0089] The following describes an example of applying two ramp signals with different gradients to different grayscale ranges. Three or more ramp signals with different gradients can be applied to different grayscale ranges. Steeper ramp signals are applied to lower grayscale ranges. The gradient of the ramp signal can be rising (positive) or falling (negative), depending on the circuit design. A steeper gradient means a larger absolute value of the gradient.

[0090] Figure 9 This is a timing diagram of the control signals for the pixel circuit 10 in an embodiment of this disclosure. The control signals are generated by... Figure 9 The driver circuit, not shown, is provided. Figure 9 The grayscale data voltage VDATA and the scan signal (selection signal) are shown. The time variations of the emission control signal EM and the ramp signal VRAMP within one frame period. Scan signal. This is the scan signal used to select the k-th pixel row out of N pixel rows, where N and k are natural numbers. The scan signal SCAN is provided to the pixel rows one after another with a horizontal period delay. The light emission control signal EM is the control signal for switching the thin-film transistor 131 on the path of the LED drive current. Here is about Figure 4 A supplementary description of the relationship between S1 and S2 shown. Signal S2 is delayed by one horizontal period compared to signal S1, and they have , The relationship is as follows: The scan signals of row (k-1) and row k are used for the pixel circuitry in row k. Using signals from adjacent rows helps to reduce the cardinality (number of units) of the scan circuitry.

[0091] The pixel circuit 10 of this disclosure divides one frame period of video data into two sub-periods. In one sub-period, the pixel circuit 10 illuminates its microLEDs 11 for the high grayscale range, while the pixel circuit 10 for the low grayscale range keeps its microLEDs 11 off. In the other sub-period, the pixel circuit 10 illuminates its microLEDs 11 for the low grayscale range, while the pixel circuit 10 for the high grayscale range keeps its microLEDs 11 off.

[0092] exist Figure 9 In the first sub-cycle of the configuration example, for the high grayscale range, pixel circuit 10 writes a grayscale data voltage corresponding to the grayscale level specified in the video frame and illuminates its microLED 11. For the low grayscale range, pixel circuit 10 writes a grayscale data voltage for a non-illuminating grayscale level (at the zero current level) and keeps its microLED 11 off.

[0093] In the second sub-cycle following the first sub-cycle, pixel circuits 10 in the high grayscale range are written with grayscale data voltages that are not emitting light (at the zero current level) and their microLEDs 11 remain unlit. Pixel circuits 10 in the low grayscale range are written with grayscale data voltages corresponding to the grayscale levels specified in the video frame and their microLEDs 11 are lit. In this way, in both the first and second sub-cycles, each pixel circuit 10 is scanned by a signal. The selection is made, and grayscale data voltages are written into it.

[0094] Pixel circuit 10 is provided with a gentle ramp signal VRAMP for the high grayscale range in the first sub-cycle and a steep ramp signal VRAMP for the low grayscale range in the second sub-cycle. For example, pixel circuit 10 primarily uses the steep ramp signal VRAMP for the low grayscale range at grayscale level 65 and the gentle ramp signal VRAMP for the high grayscale range above grayscale level 64. In another example, emission for the low grayscale range can be performed in the first sub-cycle and emission for the high grayscale range can be performed in the second sub-cycle.

[0095] In the first sub-cycle, the driver circuit of the display device writes the grayscale data voltage VDATA to all pixel circuits 10, and then illuminates the micro-LEDs 11 for the high grayscale range. Subsequently, all pixel circuits 10 de-illuminate the micro-LEDs 11. In the second sub-cycle, the driver circuit writes the grayscale data voltage VDATA to all pixel circuits 10, and then illuminates the micro-LEDs 11 for the low grayscale range. Subsequently, all pixel circuits 10 de-illuminate the micro-LEDs 11.

[0096] Figure 10 Simulation results for LED drive current at different gray levels are provided. Graph 221 shows the waveform of the ramp signal VRAMP during a frame period. Graphs 222, 223, 224, and 225 show the waveforms of the LED drive current during frame periods for gray levels 255, 127, 65, and 64, respectively. Pixel circuit 10 uses a gentle ramp signal 227 for the high gray level range above level 64 and a steep ramp signal 228 for the low gray level range below level 65. For example, the maximum gray level is 255, and the minimum gray level is 0. As shown in graphs 222 to 225, the pulse width of the LED drive current decreases as the gray level decreases.

[0097] Figure 11 Simulation results are provided regarding the relationship between grayscale level and peak LED drive current. Figure 11 The horizontal axis of the graph represents the grayscale level, and the vertical axis represents the peak value of the LED drive current. The dashed line represents the LED drive current with a single ramp signal waveform, and the solid line represents the LED drive current with two ramp signals of different gradients.

[0098] For reference Figure 8 The peak value of the LED driving current is uniform across the high grayscale range, but decreases as the grayscale level decreases in the low grayscale range. (Refer to...) Figure 11The curves show that, in the low grayscale range, both lines decrease as the grayscale level decreases. However, at any grayscale level, the LED drive current is higher when the waveforms of two ramp signals with different gradients are used than when the waveform of a single ramp signal is used.

[0099] With a single ramp signal (its voltage waveform), the lower limit of the gray level that can maintain the maximum LED drive current across the entire grayscale range is level 26. Conversely, with two ramp signals, the lower limit of the gray level that can maintain the maximum LED drive current across the entire grayscale range is level 15. In other words, the illumination control by two ramp signals can maintain the maximum value of the LED drive current down to a lower grayscale level.

[0100] Figure 12 Simulation results are provided showing the relationship between the deviation of the average current caused by the threshold voltage offset of the driving thin-film transistor 121 in the PWM circuit 12 and the gradient of the ramp signal VRAMP. The average current here is obtained by integrating the current over an interval that is an integer multiple of a frame and dividing the integral by that interval. The average current and brightness are strongly correlated. Figure 12 In the graph, the horizontal axis represents the gradient (absolute value) of the ramp signal, and the vertical axis represents the deviation of the average current caused by the threshold voltage offset of the thin-film transistor 121, assuming the threshold voltage offset is -0.5V, and the driving thin-film transistor 121 in the PWM circuit 12 performs threshold voltage compensation.

[0101] refer to Figure 12 The graph shows that the gradient of a single ramp signal can be 0.9 V / ms (assuming a frame rate of 120 Hz, the width of the ramp signal corresponds to the length of one frame period), and the steeper gradient of two ramp signals can be 29.1 V / ms. Figure 12 As can be understood from the graph, increasing the slope of the ramp signal significantly reduces the deviation of the average current caused by the threshold voltage offset of the thin-film transistor 121. For example, when the gradient increases from 0.9 V / ms to 29.1 V / ms, the deviation of the average current is reduced to 1 / 13.

[0102] Figure 13Simulation results are provided showing the relationship between the gradient (absolute value) of the ramp signal and the average current deviation. The horizontal axis represents the gradient (absolute value) of the ramp signal, and the vertical axis represents the deviation of the average current when the threshold voltage of the driving thin-film transistor 121 in the PWM circuit 12 deviates by -0.5V. Line 251 shows the relationship in the pixel circuit without threshold voltage compensation, and line 252 shows the relationship in the pixel circuit with threshold voltage compensation. Regardless of whether threshold voltage compensation is performed, the deviation of the average current decreases as the gradient of the ramp signal increases.

[0103] To simplify this principle, the case without threshold voltage compensation is described. The driving thin-film transistor 121 in the PWM circuit 12 is off when light emission begins, and when the gate-source voltage... The LED is switched on when the threshold voltage Vth has been exceeded. In response, the LED drive current begins to decrease.

[0104] Therefore, when the threshold voltage Vth increases (negative offset in the case of p-type semiconductors), the pulse width of the LED drive current becomes longer. This indicates a strong correlation between the current pulse width and the threshold voltage. However, when the gate voltage... When the change is very rapid, the difference in pulse width of the current caused by the difference in threshold voltage Vth becomes smaller. That is, as the gradient of the ramp signal increases, the gate voltage driving the thin-film transistor 121 changes faster, thus reducing the effect of the threshold voltage difference. Although threshold voltage compensation reduces the deviation, the trend of reducing deviation with a steeper ramp signal is the same. Even with threshold voltage compensation, the deviation before compensation will persist to some extent. Therefore, although threshold voltage compensation is typically performed on the driving thin-film transistor, the effect of Vth offset can be reduced by increasing the gradient of the ramp signal.

[0105] As described above, using a configuration of ramp signals with different gradients improves various characteristics of the pixel circuitry used to control the emission of the micro LED 11. The inventors' research indicates that there exists a more suitable range for the gradient of the ramp signals. In particular, the steepest ramp signal has a more suitable range for its gradient. However, this disclosure does not eliminate the possibility that the steepest gradient (its waveform) among the multiple ramp signals exceeds the range described below.

[0106] First, a lower bound for the gradient (its absolute value) of the ramp signal is described. Figure 14 This is a conceptual diagram of the waveforms of two ramp signals 261 and 262 within a frame period. As a premise of this example, the second ramp signal 262 has a steeper gradient than the first ramp signal 261, and ramp signals 261 and 262 have the same amplitude (the absolute value of the difference between the start voltage and the end voltage).

[0107] Let b be the amplitude of the second ramp signal 262, and a be its gradient. Figure 14 In the example, the gradient 'a' is negative. Also, let f be the frame rate. One frame period is... To ensure that the second ramp signal 262 has a steeper gradient than the first ramp signal 261 within one frame period, the following condition must be met: .

[0108] Therefore, the maximum value or absolute value of gradient a The following conditions must be met: The absolute value of the gradient of the ramp signal 262 The lower limit is 2bf. When the voltage amplitude b of the ramp signal is 6V and the frame rate f is 120 Hz, the lower limit 2bf is defined as 1.44 V / ms.

[0109] When using three or more ramp signals, the absolute value of the gradient of the steepest ramp signal should satisfy the following condition: , where n is an integer greater than 2. The following description concerns the configuration using two ramp signals with different gradients.

[0110] like Figure 7 As shown, the fall time tf of the LED driving current varies with the absolute value of the gradient of the ramp signal. The gradient decreases and then increases from 0. However, when the absolute value of the gradient... When a specific value is taken, the descent time tf reaches a saturation value, and at the absolute value of the gradient... The voltage remains essentially consistent within a range exceeding a specific value. This is because the potential of the ramp signal has dropped to its limit (potential saturation), and the driving thin-film transistor 121 in the PWM circuit 12... Both Id and saturate. Therefore, even if the gradient of the ramp signal is increased to a value exceeding a certain threshold, the descent time tf will not change.

[0111] Within the range where the fall time tf decreases to its saturation value, the fall time tf can be logically expressed by the following formula:

[0112] (Formula 1)

[0113] Where s represents the S value of the driving thin-film transistor 121 in the PWM circuit 12.

[0114] Next, the absolute value of the gradient of ramp signal 262 is described. The upper limit. As mentioned above, when the absolute value of the gradient... When a specific value is taken, the descent time tf reaches a saturation value, and at the absolute value of the gradient... The voltage levels become essentially uniform within a range exceeding a certain value. This is because the amplitude of the ramp signal is finite and fixed. The amplitude of the ramp signal equals the data voltage range, typically around 6V. Expanding the data voltage range would increase power consumption to rewrite the data line voltage. (Reference) Figure 7 It provides information about the fall time of the LED current and the absolute value of the gradient of the ramp signal 262. The simulation results show the absolute value of the fall time tf when it begins to saturate. The upper limit is 100. The saturation value of the descent time can be logically expressed by the following formula:

[0115] (Formula 2)

[0116] in V represents the gain factor of the driving thin-film transistor 121 in the PWM circuit 12, C represents the capacitance of the capacitor 124 connected to the output node of the driving thin-film transistor 121, VH2 represents the positive power supply voltage of the driving thin-film transistor 121 in the PWM circuit 12, and VDATA represents the grayscale data voltage.

[0117] Based on formulas 1 and 2 above regarding the descent time tf, the gradient a for the descent time tf to reach the saturation value is expressed by the following formula: .

[0118] Because the width of the ramp signal decreases as the ramp signal gradient increases, the upper limit of the current pulse width is shortened to prevent the ramp signal width from becoming unnecessarily short. In other words, values ​​greater than a certain value are assigned... It does not reduce the fall time of LED current, but it lowers the upper limit of the luminous duty cycle.

[0119] Given the above description, the absolute value of the gradient of ramp signal 262 The appropriate range can be represented as follows: .

[0120] The following are some numerical examples: ramp signal amplitude Frame rate ,capacitance ,Voltage Grayscale data voltage Gain factor The absolute value of the gradient is defined above. In the expression for the range, the absolute value of the gradient is defined. An example of the lower bound value is 1.44 V / ms, and the absolute value of the gradient is defined. An example of the upper limit value is 100 V / ms.

[0121] The generation of grayscale data voltages is described. Figure 15 This is a plan view illustrating an example configuration of a micro LED display device. The micro LED display device includes a display area consisting of an array of pixel circuits 10 and micro LEDs 11, a signal circuit 31, and a scanning circuit 32.

[0122] Each of the signal circuit 31 and the scanning circuit 32, or a combination thereof, is a driver circuit (also called a control circuit) for driving and controlling the pixel circuit 10. The signal circuit 31 and the scanning circuit 32 provide control signals and power supply voltages for controlling the pixel circuit 10. Figure 15 Instructions in the form of examples Figure 4 The types of output signals (including control signals and power supply voltages) from the signal circuit 31 and scanning circuit 32 of the pixel circuit 10 are shown. The types of output signals from the driver circuit depend on the configuration of the pixel circuit.

[0123] Pixel circuit 10 controls micro LED 11. Components of pixel circuit 10 are fabricated on a thin-film transistor (TFT) substrate. Micro LED 11 is connected to connection pads 111 and 112 on the TFT substrate to be electrically connected to pixel circuit 10 via connection pads 111 and 112.

[0124] Figure 16 An example configuration of the grayscale data voltage generation unit 310 in signal circuit 31 is shown. The grayscale data voltage generation unit 310 includes a digital-analog converter (DAC) 311, a gamma voltage generator 313, and a memory 315. The memory 315 stores gamma lookup tables (LUTs) 317A and 317B. Gamma LUTs 317A and 317B are tables for two ramp signals with different gradients.

[0125] The grayscale data voltage generation unit 310 receives RGB image data extracted from video data and uses DAC 311 to convert the digital signal into an analog signal. The analog signal is written as grayscale data voltage into the storage capacitor in each pixel circuit 10. Figure 16 The storage capacitor in the middle corresponds to Figure 4 Capacitor 123 is used in the DAC 311. The DAC references multiple gamma voltages to generate grayscale data voltages based on the grayscale levels. The gamma voltages define the relationship between the grayscale levels and the grayscale data voltages.

[0126] Gamma voltage generator 313 retrieves or uses gamma LUT 317A or 317B stored in memory 315. Gamma voltage generator 313 generates gamma voltages for each grayscale level based on the digital data specified in the gamma LUT and outputs the gamma voltages via a DAC. For example, gamma voltage generator 313 uses gamma LUT 317A for a gentle slope signal and gamma LUT 317B for a steep slope signal. Gamma voltage generator 313 switches the gamma LUTs before writing grayscale level data voltages in each of the first and second sub-cycles within a frame period.

[0127] Example 2

[0128] Example 2 features a technical characteristic relating gray levels and gray level data voltages in a gamma LUT. In a conventional configuration using a single ramp signal per frame, the pulse width of the LED drive current increases with increasing gray levels. The number of gamma LUTs to be used is 1.

[0129] Figure 17 An example of a gamma LUT to be used in a configuration using a single ramp signal per frame is provided. Figure 17 In the graph, the horizontal axis represents the grayscale level of the pixel acquired from the video data, and the vertical axis represents the grayscale data voltage. As the grayscale level increases, the grayscale data voltage also increases. When designing the grayscale data voltage generation unit 310, it is desirable that the grayscale data voltage does not decrease in response to an increase in the grayscale level, or that it either increases or remains at a fixed value. This is because the simplest example of the grayscale data voltage generation unit 310 provides voltage across a resistor string configured by connecting multiple resistors in series, and takes the voltage from the intermediate node between the series-connected resistors.

[0130] For example, Example 1 generates an LED drive current with a steep ramp signal for gray levels below level 65 and an LED drive current with a gentle ramp signal for gray levels above level 64. For example, Example 1 uses a gentle ramp signal in the first sub-cycle and a steep ramp signal in the subsequent second sub-cycle.

[0131] Figure 18A Example configuration of the Gamma LUT 317A for the first sub-cycle using a gentle ramp signal is provided in Example 1. Figure 18B Example configurations of the Gamma LUT 317B for the second sub-cycle using a steep ramp signal, as shown in Example 1, are provided. In each graph, the horizontal axis represents the grayscale level, and the vertical axis represents the grayscale level data voltage.

[0132] Reference Figure 18AThe grayscale data voltage is fixed at a minimum value in the grayscale range below level 65 and increases monotonically with subsequent grayscale levels. This configuration satisfies the aforementioned desired conditions when designing the grayscale data voltage generation unit. However, there are pixel circuits where the data voltage monotonically decreases with increasing grayscale level. Ideally, the data voltage should either change monotonically or remain fixed with increasing grayscale level.

[0133] Reference Figure 18B Within the grayscale range below level 65, the grayscale data voltage monotonically increases with increasing grayscale level, drops to a minimum at level 65, and remains at a minimum with subsequent grayscale level increases. In short, the grayscale voltage initially increases and then decreases with increasing grayscale level. This configuration does not meet the desired conditions when designing the grayscale data voltage generation unit.

[0134] This embodiment creates a gamma LUT that meets the above conditions. Figure 19A Example configuration of the Gamma LUT 327A for the first sub-cycle of a signal using a gently sloping signal is provided in Embodiment 2. The Gamma LUT 327A is used for high grayscale levels and is referred to as the first table. Figure 19B Example configuration of the Gamma LUT 327B for the second sub-cycle using a steep ramp signal is provided in Embodiment 2. The Gamma LUT 327B is used for low gray levels and is referred to as the second meter. In each graph, the horizontal axis represents the gray level, and the vertical axis represents the gray level data voltage.

[0135] Reference Figure 19A The Gamma LUT 327A maintains a minimum grayscale data voltage in the grayscale range below level 65, and monotonically increases it as subsequent grayscale levels increase. (See reference...) Figure 19B The Gamma LUT 327B monotonically increases the grayscale data voltage as the grayscale level increases from level 0 to level 64, and maintains it at its maximum value for subsequent grayscale level increases. The grayscale data voltages for levels 64 and 65 are equal.

[0136] Similar to Embodiment 1, the grayscale data voltage generation unit 310 in this embodiment increases the grayscale data voltage as the grayscale level increases in the low grayscale range (e.g., below level 65) of the second sub-cycle of the steep slope signal. In the high grayscale range (e.g., above level 64), it maintains the grayscale data voltage at a fixed value. In at least a portion of the high grayscale range, the grayscale data voltage can increase as the grayscale level increases.

[0137] In other words, when using a steep ramp signal, the grayscale data voltage generation unit 310 will output LED drive current even if the grayscale level is higher than level 64. To balance this, compared to Embodiment 1, the grayscale data voltage generation unit 310 reduces the LED drive current for the high grayscale range when using a gentle ramp signal in the first sub-cycle.

[0138] Figure 20 Simulation results for LED drive current at different gray levels are provided. Graph 281 shows the waveform of the ramp signal VRAMP within a frame period. Graphs 282, 283, 284, and 285 show the LED drive current waveforms for gray levels 255, 127, 65, and 64 within a frame period, respectively. The maximum gray level is 255, and the minimum gray level is 0.

[0139] The grayscale data voltage generation unit 310 uses a gentle ramp signal 287 and a steep ramp signal 288 for the high grayscale range of level 64 and above, while using only a steep ramp signal 228 for the low grayscale range of level 65 and below. That is, in response to the ramp signals 287 and 288 for the high grayscale range, a current pulse is output. The brightness of the micro-LED 11 depends on the average value of the LED driving current (average current) over one or more frame cycles. The average current is obtained by dividing the time integral of the LED driving current by time. Therefore, compared to Embodiment 1, the pulse width of the LED driving current for the high grayscale range in the first sub-cycle is shorter.

[0140] Referring to graph 284 for level 65, although the waveform shows pulses with low peak values ​​in the first sub-cycle, steep pulses dominate in the second sub-cycle; therefore, the quality of the average current waveform is better than in Example 1. Furthermore, Example 2 obtains fewer motion image false contours than Example 1. Motion image false contours are a type of motion image noise.

[0141] The display quality of moving images is evaluated as follows. Moving images shift the boundary between brightness and darkness, and the human eye's gaze changes accordingly. The brightness of each point is integrated over time to be defined as the brightness there. Because the brightness update is delayed by one frame, the brightness and darkness on both sides of the boundary are mixed to form a lateral gradient, which becomes blurred to the human eye. In Embodiment 1, each microLED 11 is turned on in the first or second sub-cycle and turned off in the other sub-cycle. In the case of displaying a gradient of gray levels, the brightness of the boundary between level 64 and level 65 is increased because the light emitted in the first sub-cycle and the light emitted in the second sub-cycle are added together. However, in this embodiment, for levels higher than level 64, the microLED 11 is always lit in both cycles; the continuity of brightness at the boundary between gray levels is improved and false contours are reduced.

[0142] This embodiment further suppresses image quality degradation caused by IR drop, which is the phenomenon where the line resistance of the LED driving current decreases as the voltage drops when the LED driving current flows through the positive power line. Examples of positive power line layouts include thick, frame-like lines outside the display area and thin, straight lines along each pixel column. Therefore, the drop in positive power supply voltage is greatest in the middle of the display area in the pixel column direction (vertical direction).

[0143] In Example 1, depending on the grayscale level, each microLED 11 is turned on in the first or second sub-cycle and turned off in the other sub-cycle. Therefore, when the image is displayed at a high grayscale level across the entire display area, a large IR drop occurs in the first sub-cycle, while no IR drop occurs in the second sub-cycle.

[0144] Figure 21 and 22 Simulation results of the average current in Example 1 are provided when the gray level changes only in the central area of ​​the display area and remains constant in other areas (the area surrounding the central area). Figure 21 Simulation results are provided for the case where the gray level in other regions is the maximum level of 255. Figure 22 Simulation results are provided for cases where the grayscale level in other regions is level 50, which is included in the low grayscale level range. In each graph, the horizontal axis represents the grayscale level, and the vertical axis represents the average current. Figure 21 and 22 In this process, the balance of IR drop is lost at the boundary between gray levels using different ramp signals, making the relationship between brightness and gray level discontinuous.

[0145] Figure 23Simulation results for the average current in Example 2 are provided when the grayscale level varies only in the central region of the display area and remains constant in other areas. In Example 2, the micro-LED 11 for the high grayscale range is lit in the first and second sub-cycles. Therefore, IR drop occurs, but its balance is maintained; the continuity of brightness relative to grayscale level is improved.

[0146] This embodiment describes the creation of the gamma LUT. Creating the gamma LUT involves averaging the total current over one frame period. Assign IH and IL, where IH is the average current using a gentle ramp signal and IL is the average current using a steep ramp signal. The following relationship is satisfied. The gamma LUT is created to fix the IL at its maximum value in the high grayscale range and use only IL in the low grayscale range. In the low grayscale range, IL is regulated by the grayscale data voltage.

[0147] refer to Figure 19A and Figure 19B When the average current does not exceed the maximum value ILmax, the gamma LUT 327B used for steep slope signals monotonically increases the grayscale data voltage as the grayscale level increases, while fixing the grayscale data voltage when the average current exceeds ILmax. Similarly, the gamma LUT 327A used for gentle slope signals fixes the grayscale data voltage when the average current does not exceed ILmax, and monotonically increases the grayscale data voltage when the average current exceeds ILmax.

[0148] Example 3

[0149] The above embodiments describe simultaneous driving. Simultaneous driving writes grayscale data voltages row by row, and illuminates all pixels after writing to all pixel rows is complete. During the emission cycle, simultaneous driving does not write grayscale data voltages to any pixel row.

[0150] The driver circuit in this embodiment controls the display area using progressive driving. Progressive driving begins illuminating pixels in each pixel row immediately after writing grayscale data voltages to the row, without waiting for grayscale data voltages to be written to other rows. Based on the estimated length of one frame cycle for the two driving methods described above, progressive driving achieves approximately 34% reduction compared to simultaneous driving; progressive driving also enables higher frame rates. Furthermore, progressive driving reduces display non-uniformity caused by IR drop because fewer micro-LEDs are illuminated simultaneously.

[0151] Figure 24 This is a timing diagram of the pixel control signals in progressive driving. It mainly describes the relationship with... Figure 9 The differences between the timing diagrams of simultaneous drives in [the context of the original text]. Reference symbols. This represents the illumination control signal for the k-th pixel row. (Reference symbol) This represents the ramp signal for the k-th pixel row. Here, k is any natural number from 1 to N, and N is a natural number greater than 2.

[0152] The time for controlling the gate of the driving transistor 121 in the (k+1)th pixel row is delayed by one horizontal cycle compared to the time for controlling the gate of the driving transistor 121 in the kth pixel row. Similar to the scan signal SCAN, the emission control signal EM and the ramp signal VRAMP are offset by one horizontal cycle to be provided to each pixel row.

[0153] The pixel circuit can have the same configuration as the pixel circuit used for simultaneous driving. Compared to the driver circuit used for simultaneous driving, it additionally includes scanning circuitry for the emission control signal EM and the ramp signal VRAMP. Figure 15 In the driver circuit shown, signal circuit 31 outputs a ramp signal VRAMP; however, in progressive driving, an additional scan circuit outputs the ramp signal VRAMP one after another to the pixel row.

[0154] Example 4

[0155] In this embodiment, the gradient of the ramp signal is continuously changed. Figure 25 Simulation results are provided for the temporal variation of the ramp signal during a frame period and the temporal variation of the LED drive current for different gray levels.

[0156] Figure 291 shows the waveform of the ramp signal VRAMP during a frame period. Figure 292 shows the waveform of the LED drive current for low grayscale levels during a frame period. Figure 293 shows the waveform of the LED drive current for high grayscale levels during a frame period.

[0157] The waveform of the ramp signal in graph 291 consists of continuous ramp signals with different gradients. In this example, the gradient of the ramp signal changes from a steep gradient to a gentle gradient. In other words, the ramp signal includes a steep ramp signal 295 and a subsequent gentle ramp signal 296. By fixing the gradient of the gentle ramp signal 296, the gradient of the ramp signal can be prevented from becoming too small at the maximum gray level.

[0158] although Figure 25 The curve 291 in the diagram uses ramp signals 295 and 296 as line segments to provide a polyline, but the gradient can be gradually changed to smoothly connect the two ramp signals. This configuration improves the brightness uniformity when displaying a gradient using the boundary between ramp signals 295 and 296. Although ramp signals 295 and 296 are in Figure 25 The segments are represented as line segments, but they can be connected non-linearly in such a way that the gradient gradually decreases.

[0159] This embodiment provides a gradient-variable ramp signal to the pixel circuit to control the pulse width of the LED drive current using grayscale data voltage. A steeper ramp signal reduces the fall time of short pulses. The fundamental reason for this is that when the LED current pulse is short, the emission duty cycle is low, illuminating the micro-LED 11 at a low grayscale level, while when the LED current pulse is long, the emission duty cycle is high, illuminating the micro-LED 11 at a high grayscale level. Making the first portion of the ramp signal, or ramp signal 295, steeper prioritizes improving display quality at low grayscale levels, while making the second portion, or ramp signal 296, gentler provides a sufficiently long ramp signal width to increase the upper limit of the emission duty cycle or peak brightness.

[0160] Figure 26 This is a timing diagram of the pixel control signals in this embodiment. Figure 24 Compared to the timing diagram, the pixel row selection is performed once per frame period to scan the signal. Write grayscale data voltage. Ramp signal. The waveform has continuously varying gradients. Here, k is any natural number from 1 to N, and N is a natural number greater than 2. The first gradient is steep, and subsequent gradients are gentle. Although Figure 26 This is an example of progressive driving, but the same applies to driving as well.

[0161] In this embodiment, data is written once per frame, unlike other embodiments, thus achieving a high frame rate. Furthermore, compared to other embodiments, continuous ramp signals with different gradients are more effective at reducing motion image noise and false contours in motion images.

[0162] This is because this embodiment provides a single emission pulse per frame. While graph 291 includes a single piecewise ramp signal in a frame, it can also include multiple ramp signals. Progressive driving requires a ramp signal with a delay of one horizontal cycle per cycle; as... Figure 26 As shown, with a single ramp signal per frame, up to N scan lines are required ( to The ramp signals are defined as follows: Ramp signals 295 and 296 are defined as a group, with W being the width of the group and H being one horizontal period. The number of ramp signals is... Furthermore, it decreases as the width W decreases. When applied to progressive drives, the number of ramp signals can be significantly reduced by decreasing the width of the ramp signal and repeating the set.

[0163] Example 5

[0164] Example 5 divides the pixel (light-emitting area) into multiple sub-pixels to provide them with ramp signals with different gradients. Figure 27 This diagram illustrates an example configuration where each pixel is divided into two sub-pixels. A pair of sub-pixel circuits 10HR and 10LR constitute the overall pixel circuit for a red pixel. A pair of sub-pixel circuits 10HG and 10LG constitute the overall pixel circuit for a green pixel. A pair of sub-pixel circuits 10HB and 10LB constitute the overall pixel circuit for a blue pixel. Each sub-pixel circuit is equipped with a micro-LED connected to it. Each micro-LED corresponds to a sub-pixel, and a light-emitting area of ​​the pixel consists of two micro-LEDs.

[0165] exist Figure 27 In the configuration example, sub-pixel circuits control the emission of one of their associated micro-LEDs 11. Sub-pixel circuits 10HR, 10HG, and 10HB control the emission period of micro-LED 11 according to a gentle ramp signal. Sub-pixel circuits 10LR, 10LG, and 10LB control the emission period of micro-LED 11 according to a steep ramp signal.

[0166] Each dedicated ramp signal transmission line for a specific type of ramp signal is positioned within the display area. This is used to transmit gentle ramp signals. The ramp signal transmission line 401H extends through the area including the row of sub-pixel circuits 10HR, 10HG, and 10HB. It is used to transmit steep ramp signals. The ramp signal transmission line 401L extends through the area of ​​the sub-pixel circuit row including sub-pixel circuits 10LR, 10LG, and 10LB. Ramp signal transmission lines 401H extending through the sub-pixel circuit row using gentle ramp signals and ramp signal transmission lines 401L extending through the sub-pixel circuit row using steep ramp signals are provided in the display area.

[0167] Figure 28 This is a timing diagram of the pixel control signals in this embodiment. Signal group 411H is used to apply a gentle ramp signal. The control signal group for the sub-pixel circuit. Signal group 411L is used for using steep ramp signals. The control signal group of the sub-pixel circuit.

[0168] Signal group 411H utilizes selection signals Select one by one to use the gentle slope signal The sub-pixel rows are written to them, and grayscale data voltages are written to them. During writing, it uses Figure 17 The public gamma LUT in the middle.

[0169] Signal group 411L utilizes selection signals Select one by one to use steep slope signals The sub-pixel rows are written to them, and grayscale data voltages are written to them. The grayscale data voltage is written to the sub-pixel circuit only once per frame. Signal groups 411H and 411L write grayscale data voltage to all their sub-pixel circuit rows within the same period.

[0170] After the grayscale data voltage has been written to all sub-pixel circuit rows, all sub-pixel circuits begin to illuminate the sub-pixels. (Emitting control signal) Control using gentle slope signals The sub-pixel circuit emits light from a miniature LED. The light emission control signal... Control using steep slope signals The sub-pixel circuits emit light from the miniature LEDs. The waveforms of these light-emitting control signals are identical.

[0171] In this embodiment, the grayscale data voltage is written to the sub-pixel circuit once per frame. During the emission cycle, ramp signals with different gradients are input simultaneously. Embodiments 1, 2, and 3 require time division to change the gradient of the ramp signals. This embodiment 5 does not require such time division; the data writing cycle can be reduced to once to achieve a high frame rate and improved display quality.

[0172] As described above, embodiments of the present disclosure have been presented; however, the present disclosure is not limited to the embodiments described above. Those skilled in the art can readily modify, add to, or transform each element of the above embodiments within the scope of the present disclosure. A portion of the configuration of one embodiment may be replaced by the configuration of another embodiment, or the configuration of one embodiment may be incorporated into the configuration of another embodiment.

Claims

1. A display device, comprising: Multiple pixel circuits; as well as A control circuit, configured to control the plurality of pixel circuits. Each of the plurality of pixel circuits includes: Control transistors, used to drive the current of pixels; and A pulse width modulation circuit is used to provide control signals to the control transistor. The pulse width modulation circuit includes a drive transistor for outputting the control signal. The pulse width modulation circuit is configured to turn the control transistor on / off using the control signal to control the emission period of the pixel in one frame period. The pulse width modulation circuit is configured to turn the drive transistor on / off using grayscale data voltage from the control circuit, a first ramp signal, and a second ramp signal that is steeper than the first ramp signal. The second ramp signal is used for control of a low grayscale range including the minimum grayscale level, but not for control of a high grayscale range including grayscale levels above the low grayscale level. The first ramp signal is used at least for control of the high grayscale range.

2. The display device according to claim 1, in, The control circuit includes a first table and a second table, each table defining the relationship between gray levels and gray level data voltages. The control circuit is configured as follows: The grayscale data voltage within the high grayscale range is determined using the first table; and The second table is used to determine the grayscale data voltage within the low grayscale range, and Each of the first and second tables defines a voltage that either changes monotonically or remains constant as the gray level increases.

3. The display device according to claim 2, in, In the second table, the grayscale data voltage increases to a maximum value, and then maintains that maximum value as the grayscale level increases. In the first table, the grayscale data voltage is kept at a minimum value and then increases as the grayscale level increases.

4. The display device according to claim 1, wherein, The timing of controlling the gate of the driving transistor in the (k+1)th pixel row is offset by a horizontal period from the timing of controlling the gate of the driving transistor in the kth pixel row.

5. The display device according to claim 1, wherein, The slope of the second ramp signal is continuous with the slope of the first ramp signal, and the slope of the second ramp signal is earlier than the slope of the first ramp signal.

6. The display device according to claim 1, in, The pixel includes a first light-emitting diode and a second light-emitting diode. The pixel circuit includes a first sub-pixel circuit for controlling the first light-emitting diode and a second sub-pixel circuit for controlling the second light-emitting diode. Wherein, the first sub-pixel circuit is configured to use the first ramp signal, and The second sub-pixel circuit is configured to use the second ramp signal.

7. The display device according to claim 1 or 5, wherein, The absolute value of the gradient of the second ramp signal satisfy .

Images