Fractional spurious suppression modulator applied to multi-channel charge pumps
By flexibly selecting charge pump branching paths and controlling the total on-time, the problem of integer boundary spurious emissions in multi-charge pump architecture phase-locked loops is solved, and fractional spurious emissions are effectively suppressed, thus improving the spurious emission suppression performance of the phase-locked loop.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- UNIV OF ELECTRONICS SCI & TECH OF CHINA
- Filing Date
- 2026-01-08
- Publication Date
- 2026-06-02
AI Technical Summary
In multi-charge pump architecture phase-locked loops, integer boundary spurious problems caused by current source mismatch and layout mismatch are difficult to suppress effectively.
By flexibly selecting the shunts of the charge pumps and controlling their total on-time, the net injected charge due to mismatch is reduced to zero. An arbitration strategy is adopted to make all charge pumps have the same total on-time, thus suppressing the conversion of mismatch current into stray current.
It effectively suppresses integer boundary spurious emissions and improves the spurious emission suppression performance of the phase-locked loop.
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Figure CN122137348A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of mixed-signal circuits, and relates to a modulator structure applied in a multi-channel charge pump architecture phase-locked loop, and specifically provides a modulator implementation method with fractional spurious suppression function caused by mismatch. Background Technology
[0002] As wireless communication and radar systems place increasingly stringent demands on clock source spurious suppression performance, integer boundary spurious emissions, particularly those in fractional-frequency-locked loops (FLLs), pose a significant challenge in practical applications due to their small frequency offset and large amplitude. In multi-charge-pump architecture FLLs, mismatches between different charge pumps, such as current source mismatches and layout mismatches, can lead to integer boundary spurious emissions. To address this issue, we propose a modulator structure that selectively suppresses spurious emissions at small frequency offsets caused by mismatches. Summary of the Invention
[0003] To alleviate the problem of integer boundary spurious degradation caused by mismatch in multi-channel charge pump phase-locked loops, this invention proposes a method for implementing a modulator with fractional spurious suppression functionality due to mismatch. This method filters out low-frequency components of the mismatch-injected charge by making the net long-range mismatch injection charge zero. The technical solution adopted by this invention to achieve the above objective is as follows.
[0004] A modulator with fractional spurious suppression function due to mismatch is characterized by achieving zero net mismatch injected charge at the principle level by flexibly selecting the branch corresponding to the charge pump with extra on-time. Since the injection of mismatch current is a quantity proportional to the total on-time of the charge pump, if the total on-time of each charge pump can be controlled to be the same, the mismatch current can be prevented from being converted into spurious current.
[0005] Note that when the number of charge pump branches is N, if M of them require an additional TVCO (oscillator oscillation period) time, their selection among the N charge pumps is arbitrary. Therefore, in the proposed modulator, we adopt an arbitration strategy whereby the M branch with the lowest total on-time is selected for the additional TVCO on-time. Based on this strategy, since charge pumps with lower total on-times have a greater probability of being selected with a "larger on-time" in subsequent arbitrations, after dynamic adjustment, all charge pumps will tend to have the same total on-time. This prevents mismatch current from being converted into stray current. Attached Figure Description
[0006] To more clearly illustrate the technical solution of the present invention, the accompanying drawings used in the embodiments will be briefly described below. Obviously, the drawings described below are merely some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.
[0007] Figure 1 This is a schematic diagram of the modulator in this invention, which has a function to suppress fractional spurious emissions due to mismatch.
[0008] Figure 2 This is a simulation diagram of the spurious suppression effect of the modulator with fractional spurious suppression function due to mismatch in this invention.
[0009] Figure 3 This is a block diagram of a phase-locked loop that incorporates a modulator with fractional spurious suppression functionality due to mismatch. Detailed Implementation
[0010] To make the objectives, technical solutions, and technical effects of this invention clearer and more complete, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. The modulator with fractional spurious suppression function due to mismatch provided in this embodiment (hereinafter referred to as the spurious suppression modulator) is as follows: Figure 1 As shown. The diagram with the gray background is the schematic of the spurious suppression modulator. Figure 1 The other sections are schematic diagrams of other circuit modules related to the spurious suppression modulator. The proposed spurious suppression modulator has one input and one output, the input being the charge pump shunt CP with one or more additional VCO cycles on-time derived from the differential integral modulator. bin Its output is the specific control word CP for each charge pump branch. OH For ease of explanation, it is assumed here that the number of charge pump branches N=8. The spurious suppression modulator implementation method for charge pumps with other branch numbers can be derived by analogy with the 8-branch modulator. In the modulator, a counter array is maintained, which records the number of oscillator cycles that each charge pump is additionally delayed. When the input of a charge pump is delayed by N oscillator cycles, its count is incremented by N (for the sake of illustration, the figure depicts the case of N=1). A reordering array can arrange the count values of the counter array in ascending order. When CP... bin When input to the spurious suppression modulator, a comparator array acts as an arbitrator, selecting the CP with the smallest count value. bin The charge pump branch sets its control word to 1 (the number of oscillator cycles to be delayed when the charge pump input can be delayed by multiple oscillator cycles) and sets the control words of the other branches to zero, generating CP. OH Then CP OHThis will be added to the counter array as an addend. Furthermore, to prevent overflow, all counter values will be decremented by one once all count values in the counter array are greater than zero.
[0011] Figure 2 The spurious suppression effect of the spurious suppression modulator is demonstrated. In the simulation, an eight-channel charge pump was configured with 1% nonlinearity and 1% mismatch. The simulated phase spectrum is shown below. Figure 2 The right half of the diagram is shown. After turning on the spurious suppression modulator, the fractional spuriouss are suppressed by more than 20 dB. We also simulated the case where the spurious suppression modulator is turned off and the charge pump mismatch is ignored. The spuriouss in this case are the same as those when the spurious suppression modulator is turned on and the charge pump mismatch suppression is added. This shows that the spurious suppression modulator completely suppresses the fractional spuriouss introduced by the mismatch, and the final spuriouss are entirely contributed by the nonlinearity of the charge pump.
[0012] To further demonstrate the application of this spurious suppression modulator, this... Figure 3 A block diagram of a phase-locked loop (PLL) with an embedded spurious suppression modulator is shown. It can be directly inserted between the differential-integral modulator and the charge pump control terminal of a conventional multi-channel charge pump PLL. Note that this block diagram is only used to illustrate one application of the spurious suppression modulator; in practice, this modulator can be used in other architectures such as cascaded PLLs or harmonic mixing PLLs.
Claims
1. A modulator capable of suppressing fractional spurious emissions caused by charge pump mismatch. Characterized by, By flexibly selecting the branch corresponding to the charge pump with extra on time, the charge pumps of all branches are controlled to have the same on time over long distances, thereby suppressing fractional spurious emissions caused by mismatch.
2. The spurious suppression modulator according to claim 1 is characterized in that... It has one input and one output, the input being the number of time-on charge pump shunts CP derived from the differential integral modulator with one or more additional oscillator cycles. bin Its output is the specific control word CP for each charge pump branch. OH The modulator maintains an array of counters that records the number of oscillator cycles for which each charge pump is additionally activated. When a charge pump is additionally activated for N oscillator cycles, its count is incremented by N.
3. The spurious suppression modulator of claim 1 is also characterized by having a reordering array capable of arranging the count values of the counter array from smallest to largest. When CP bin When input to the spurious suppression modulator, a comparator array acts as an arbitrator, selecting the CP with the smallest count value. bin The charge pump branch sets its control word to a value greater than 1 as the number of additional oscillator cycles it is enabled for, and sets the control words of the other branches to zero, generating CP. OH Then CP OH This will be added to the counter array as an addend. Furthermore, to prevent overflow, once all count values in the counter array are greater than zero, all count values will be synchronously decremented.