Synchronization accuracy optimization method for end-to-end transmission mode clock synchronization system
By filtering and weighting the transmission delay of the IEEE 1588V2 clock synchronization system, the problem of unstable clock synchronization caused by network link asymmetry is solved, and the clock synchronization accuracy and stability between devices are improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHENYANG INST OF AUTOMATION - CHINESE ACAD OF SCI
- Filing Date
- 2024-03-18
- Publication Date
- 2026-06-02
AI Technical Summary
In the IEEE 1588V2 precise clock synchronization protocol, the asymmetry of the network link leads to unstable clock synchronization accuracy. In particular, under network anomalies, the transmission delay error added by the transparent clock affects the clock synchronization accuracy of the device.
By filtering the transmission delay in the clock synchronization system, calculating the clock deviation using the timestamp and the processed transmission delay, discarding abnormal delay data when the network is abnormal, and adjusting the local clock using a weighted average, clock synchronization is achieved.
It improves the clock synchronization accuracy between network devices, reduces the impact of network anomalies on clock synchronization, and ensures the stability and accuracy of the clock synchronization process.
Smart Images
Figure CN122137488A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of network communication, and specifically relates to a method for optimizing the synchronization accuracy of an end-to-end transmission mode clock synchronization system. Background Technology
[0002] Industrial network communication systems contain various devices such as monitoring servers, switches, controllers, and wireless routers. To ensure the logical consistency, security, and traceability of data and information transmitted between these devices, a common clock reference is required. This need for clock synchronization spurred the development of the IEEE 1588 Precision Time Protocol. The IEEE 1588 Precision Time Protocol is a method for synchronizing network devices in a distributed system. It achieves sub-microsecond time synchronization accuracy through the exchange of PTP message packets between network devices without adding additional hardware. Therefore, it has been widely used in various industries, including power transmission networks, wireless transmission networks, the Internet of Things (IoT), and industrial control networks.
[0003] End-to-end transmission mode is the most basic and widely used mode in the IEEE 1588 precise clock synchronization protocol. Network devices can calculate the clock deviation between them by exchanging four types of clock synchronization messages: Sync, Follow-up, Delay-Req, and Delay-Resp. Based on this, clock adjustments are made to ensure that devices in the network are on the same clock reference. However, in this mode, the clock synchronization message transmission within the network is assumed to be symmetrical, meaning that the transmission time of the clock synchronization message is the same in both directions between devices. In actual applications, the transmission delay of data packets in both directions along the same path is not the same, and the difference in transmission delay in both directions is affected by various factors such as network congestion, uplink and downlink transmission rates, and routing asymmetry.
[0004] Link asymmetry can have a significant and unstable impact on clock synchronization. Therefore, the IEEE 1588V2 precise clock synchronization protocol standard introduced the concept of a transparent clock. A transparent clock adds the transmission time of the clock synchronization message during device forwarding to the message itself, improving clock synchronization accuracy between devices. Currently, mainstream network transmission devices already support the transparent clock function. While the transparent clock function can fundamentally solve the link asymmetry latency problem, when network anomalies occur, such as network congestion or partial network device failures requiring rerouting, the transmission delay added to the clock synchronization message by the transparent clock has a significant error compared to the actual transmission delay. If the transmission delay within the clock synchronization message is directly used to calculate the clock deviation between devices and adjusted accordingly, it will actually affect the clock synchronization accuracy between devices.
[0005] To address the aforementioned issues, this paper proposes a method for optimizing the synchronization accuracy of end-to-end transmission mode clock synchronization systems. This method involves filtering the transmission delay added to the clock synchronization message by the transmission devices, calculating the clock deviation between devices based on the timestamp and the processed transmission delay, and finally adjusting the local clock of each device using the calculated clock deviation, thereby improving the clock synchronization accuracy between devices. Summary of the Invention
[0006] To address the aforementioned shortcomings in the existing technology, the technical problem to be solved by the present invention is to provide a method for optimizing the synchronization accuracy of an end-to-end transmission mode clock synchronization system, which is mainly used to improve the clock synchronization accuracy between network devices in an end-to-end transmission mode clock synchronization system.
[0007] The technical solution adopted by this invention to achieve the above objectives is a method for optimizing the synchronization accuracy of an end-to-end transmission mode clock synchronization system, comprising the following steps:
[0008] Within the clock synchronization system, slave nodes and master nodes exchange PTP messages in an end-to-end transmission mode according to the clock protocol.
[0009] After obtaining the timestamps and transmission delays recorded in each PTP message from the node device, the transmission delays are filtered, and the clock deviation from the master clock is calculated based on the timestamps and the processed transmission delays. Finally, the local clock is adjusted using the calculated clock deviation.
[0010] The slave node device and the master node interact with each other in PTP message mode according to the clock protocol in end-to-end transmission mode, as follows: When the master node sends a Sync message and a Follow-up message to the slave node device, the slave node device sends a Delay-Req message to the master node after receiving it, so that the master node immediately replies with a Delay-Resp message after receiving the Delay-Req message sent by the slave node device.
[0011] The master node device supports the IEEE 1588 clock protocol.
[0012] The transmission device between the master node and slave node devices in the clock synchronization system is a transparent clock device, that is, the transmission device between the master node and slave node devices adds the dwell time of the PTP message in the transmission device in the form of a timestamp to a specified position in the PTP message.
[0013] The transmission delay includes the forward transmission delay when a PTP message sent from the master node is transmitted to the slave node device. msThe reverse transmission delay when PTP messages sent by the slave node are transmitted to the master node. sm .
[0014] The slave node device internally stores and maintains the forward transmission delay during the historical PTP message exchange process. ms With reverse transmission delay sm .
[0015] The filtering process includes the following steps:
[0016] The obtained forward transmission delay ms Reverse transmission delay sm Each of these is compared with the time t required for transmission along the longest transmission path within the network. max Compare;
[0017] If the forward transmission delay is delayed ms Or reverse transmission delay sm Greater than 2t max If the timestamp and transmission delay obtained during this PTP message exchange are discarded, the clock adjustment will be terminated, and the next PTP message exchange will begin.
[0018] If the forward transmission delay is delayed ms With reverse transmission delay sm All less than 2t max If so, proceed to the next step.
[0019] The filtering process further includes:
[0020] For forward transmission delay ms With reverse transmission delay sm Select the set window size M, and calculate the forward transmission delay, including the delay of this transmission. ms With reverse transmission delay sm The weighted average of M consecutive historical transmission delays. and Then use and The clock offset between the slave node and the master node is calculated using the timestamps recorded in the PTP messages.
[0021] The calculation of the clock deviation from the master clock based on the timestamp and the processed transmission delay is specifically as follows:
[0022] According to the clock offset calculation formula in the IEEE 1588 clock protocol, the clock offset between the slave node device and the master clock is calculated using the timestamp in the PTP message and the processed transmission delay.
[0023] A time synchronization optimization device includes a memory and a processor; the memory is used to store a computer program; the processor is used to implement, when executing the computer program, a synchronization accuracy optimization method for an end-to-end transmission mode clock synchronization system.
[0024] This invention provides a method for optimizing synchronization accuracy in end-to-end transmission mode clock synchronization systems. The method addresses the problem of asymmetric delays during message transmission affecting the clock synchronization accuracy between master and slave nodes in end-to-end transmission mode clock synchronization systems, thereby improving the time synchronization accuracy between devices in network communication systems and possessing broad application prospects. It offers the following advantages:
[0025] 1. Fast time synchronization adjustment. In the method of this invention, when the transmission delay in any direction exceeds twice the time required for the longest transmission path, the slave node will exit the current clock adjustment. This avoids the large errors in the clock deviation calculated during the clock synchronization process due to network congestion and other reasons. Furthermore, it prevents the slave node from oscillating after adjusting its local clock using this significantly erroneous clock deviation, thus allowing the slave node's local clock to stabilize more quickly and improving the adjustment speed of time synchronization between the master and slave nodes.
[0026] 2. High clock synchronization accuracy. In the clock synchronization system of this invention, the transmission device records the transmission delay of the PTP message in both directions between the master and slave nodes within the PTP message. Furthermore, this method filters the transmission delay in both directions, thereby eliminating the impact of asymmetric delay during clock synchronization between the master and slave nodes and improving the clock synchronization accuracy between the master and slave nodes within the clock synchronization system.
[0027] 3. Mature technology and easy to implement. The clock synchronization process and the filtering algorithm for transmission delay in the method of this invention are both based on mature clock synchronization and data processing technologies. The technical difficulty in developing and implementing this method is relatively small. Furthermore, this method has low requirements for the processing power of the hardware system platform and can be applied to various industrial control system platforms, making it highly versatile. Attached Figure Description
[0028] Figure 1 This is a structural diagram of a clock synchronization system constructed using an example of the method of this invention;
[0029] Figure 2 This is an overall flowchart of the method of the present invention;
[0030] Figure 3 This is a schematic diagram of the clock synchronization principle in IEEE 1588 end-to-end transmission mode;
[0031] Figure 4 This is a flowchart illustrating the transmission delay filtering algorithm of the present invention. Detailed Implementation
[0032] The present invention will now be described in further detail with reference to the accompanying drawings and examples.
[0033] A method for optimizing synchronization accuracy in an end-to-end transmission mode clock synchronization system, used to improve the clock synchronization accuracy between network devices in the system, includes the following steps:
[0034] In the clock synchronization system, the master node and slave node devices exchange PTP messages in end-to-end transmission mode according to the IEEE 1588 Precision Clock Protocol. The slave node device obtains the timestamp and transmission delay recorded in each PTP message. Then, the slave node device uses a filtering algorithm to process the forward and reverse transmission delays. Combining the clock deviation calculation formula in the IEEE 1588 Precision Clock Protocol, the slave node device calculates the clock deviation between the master clock and the master clock using the timestamp in the PTP message and the processed transmission delay. Finally, the local clock is adjusted using the calculated clock deviation.
[0035] In the clock synchronization system, the master node and slave node devices exchange PTP messages according to the end-to-end transmission mode of the IEEE 1588 Precision Clock Protocol. First, the master node sends a Sync message and a Follow-up message to the slave node device. After receiving the message, the slave node device sends a Delay-Req message to the master node. Upon receiving the Delay-Req message from the slave device, the master node immediately replies with a Delay-Resp message.
[0036] The master node device in the clock synchronization system fully supports the IEEE 1588 Precision Clock Protocol, meaning it can send and receive corresponding PTP messages according to the IEEE 1588 Precision Clock Protocol standard requirements, and add the time of sending and receiving PTP messages as a timestamp to the specified position of the corresponding message.
[0037] In a clock synchronization system, the transmission device between the master node and the slave node is a transparent clock device. The dwell time of the PTP message in the transmission device during the forward and reverse transmission between the master and slave nodes can be added to the corresponding position in the PTP message in the form of a timestamp.
[0038] After extracting the forward and reverse transmission delays between the master and slave devices from the PTP packets recorded within the node devices, filtering algorithms are applied to the transmission delays. The specific process of the filtering algorithm mainly consists of the following two steps:
[0039] Step 1: Obtain the forward transmission delay. ms With reverse transmission delay sm The time t required for transmission along the longest transmission path within the network max For comparison, if the transmission delay in any direction is greater than 2t max If the timestamp and transmission delay obtained during this PTP message exchange are discarded, the clock adjustment is terminated, and the next PTP message exchange is initiated; if the transmission delay in both propagation directions is less than 2t... max If so, proceed to the next step.
[0040] Step 2: Store the forward transmission delay after processing in Step 1 from the node device. ms With reverse transmission delay sm Select the set window size M, and calculate the forward transmission delay, including the delay of this transmission. ms With reverse transmission delay sm The weighted average of M consecutive historical transmission delays. and Then use and The clock offset between the slave node and the master node is calculated using the timestamps recorded in the PTP messages.
[0041] Finally, based on the clock offset calculation formula in the IEEE 1588 Precision Clock Protocol, the clock offset between the slave node device and the master clock is calculated using the timestamp in the PTP message and the processed transmission delay, and the local clock is adjusted using the calculated clock offset.
[0042] To further illustrate the method of this invention, the implementation process of each step will be described in detail below with specific implementation examples. Figure 1This is a structural diagram of a clock synchronization system constructed according to an implementation example of the method of this invention. The master clock node device in the clock synchronization system receives satellite signals from GPS / BeiDou satellites via a satellite receiver, extracts the time information from the satellite signals, and uses this as the clock reference for the entire clock synchronization system. Then, it transmits the time information to each slave node device through clock synchronization message interaction. This master clock node device fully supports the end-to-end transmission mode of the IEEE 1588 Precision Clock Protocol, meaning it can send and receive corresponding PTP messages according to the IEEE 1588 Precision Clock Protocol standard requirements, and add the timestamps of sending and receiving PTP messages to the designated positions in the corresponding messages. The switch in the clock synchronization system is an IEEE 1588 switch, i.e., a transparent clock device defined in the IEEE 1588 Precision Clock Protocol. The IEEE 1588 switch can add the dwell time of the PTP message in the transmission device during the forward and reverse transmission processes between the master and slave nodes to the corresponding positions in the PTP message in the form of timestamps. Controllers 1-8, as slave node devices in the clock synchronization system, run the clock synchronization accuracy optimization method described above.
[0043] Figure 2 This is an overall flowchart of the method of the present invention. First, following the IEEE 1588 Precision Clock Protocol, the master and slave nodes in the clock synchronization system exchange PTP messages in end-to-end transmission mode. The slave node device obtains the timestamps recorded in each PTP message and the transmission delay written to the designated position in the PTP message by the transparent clock device. Then, the slave node device uses a filtering algorithm to process the forward and reverse transmission delays. Combining the clock offset calculation formula in the IEEE 1588 Precision Clock Protocol, it calculates the clock offset between the slave node device and the master clock using the timestamps in the PTP messages and the processed transmission delays. Finally, the calculated clock offset is used to adjust the local clock. This achieves clock synchronization between the various devices within the clock synchronization system.
[0044] Figure 3 This is a schematic diagram of the clock synchronization principle in IEEE 1588 end-to-end transmission mode. Here, t1 represents the time when the slave node receives the Sync message sent by the master node, t2 represents the time when the Sync message leaves the master clock node, t3 represents the time when the Delay_Req message leaves the slave node device, and t4 represents the time when the slave node receives the Delay_Req message. ms The delay represents the forward transmission delay of a message from the master node to the slave node. smThis indicates the reverse transmission delay of a message from the slave node to the master node. First, the master clock node sends Sync messages to the clock synchronization system at a fixed frequency. The IEEE 1588 switch forwards the Sync messages sent by the master clock node to each slave node device within the clock synchronization system. Simultaneously, it records the forward transmission delay of the Sync message's residence time within the IEEE 1588 switch. ms The timestamp is added to the corresponding position in the Sync message. After successfully sending the Sync message, the master clock node adds the time t2 when the Sync message leaves the master clock node as a timestamp to the Follow-up message, and forwards it to each slave node device through the IEEE 1588 switch. After receiving the Sync message, the slave node device immediately records and stores the time t1 when it receives the Sync message, and then sends a Delay_Req message to the master clock node, and records and stores the time t3 when the Delay_Req message leaves the slave node device. The IEEE 1588 switch forwards the Delay_Req message sent by the slave device to the master node device, and at the same time, transmits the delay time of the Delay_Req message in reverse within the IEEE 1588 switch. sm The timestamp is added to the corresponding position in the Delay_Req message. Upon receiving the Delay_Req message, the master clock node immediately records and stores the received time t4, then adds time t4 as a timestamp to the corresponding position in the Delay_Resp message and sends it to the slave node device via the IEEE 1588 switch. Upon receiving the Delay_Resp message, the slave node device extracts the timestamp from it. This completes a full end-to-end clock synchronization process between master and slave nodes. Finally, the slave node device calculates the forward transmission delay between the master and slave devices based on the delay recorded inside the PTP message. ms With reverse transmission delay sm And the four times t1, t2, t3, and t4 obtained during the clock synchronization process, according to Figure 3 The clock skew calculation formula can be used to calculate the clock skew between the slave node and the master clock node. However, when network congestion occurs, or when some network devices fail and routing path replanning is performed, the transparent clock adds a forward transmission delay to the clock synchronization message. ms With reverse transmission delay smThere is a significant error between the calculated and actual transmission delays. If the clock deviation between devices is directly calculated using the transmission delay recorded within the PTP message, the calculated clock deviation will have a large discrepancy with the actual clock deviation. Therefore, the method of this invention utilizes a filtering algorithm to filter the transmission delay. The specific process of the filtering algorithm is as follows: Figure 4 As shown, the following will provide a detailed introduction with implementation examples, in which... This indicates the delay of the latest forward transmission. Indicates the delay in forward transmission of history. This indicates the delay of the latest forward and reverse transmission. The filtering algorithm, which represents the historical reverse transmission delay, mainly consists of the following two steps:
[0045] Step 1: Obtain the forward transmission delay With reverse transmission delay The time t required for transmission along the longest transmission path within the network max The comparison is made based on the time t required for transmission along the longest transmission path within the network. max This can be obtained from the routing management table of the IEEE 1588 switch within the network. If the transmission delay in any direction is greater than 2t... max If, during this clock synchronization process, network congestion or partial network device failure requiring rerouting occurs, the timestamps and transmission delays obtained during this PTP message exchange are discarded, and the clock adjustment is terminated, proceeding to the next PTP message exchange; if the transmission delays in both propagation directions are less than 2t... max If so, proceed to the next step.
[0046] Step 2: Then, the forward transmission delay processed in Step 1 will be... With reverse transmission delay Stored inside the slave node device. This indicates that the historical forward transmission delay records stored internally by the node device are updated, discarding the oldest forward transmission delay value. This indicates updating the historical reverse transmission delay records stored internally by the slave node device, discarding the oldest reverse transmission delay value. The number of historical forward and reverse transmission delay records needs to be selected with an appropriate parameter N value based on the internal storage space and processing capacity of the slave node device; in this example, N = 10. The calculation includes the forward transmission delay. With reverse transmission delay The weighted average of M consecutive historical transmission delays, including time. and The value of the moving average window size M can be selected according to the actual network jitter. In this example, the window size value M = 5.
[0047] Finally utilize and According to the timestamp recorded in the PTP message Figure 3 The clock offset formula shown calculates the clock offset between the slave node and the master node, and uses the calculated clock offset to adjust the local clock of the slave node device.
Claims
1. A method for optimizing the synchronization accuracy of an end-to-end transmission mode clock synchronization system, characterized in that, Includes the following steps: Within the clock synchronization system, slave nodes and master nodes exchange PTP messages in an end-to-end transmission mode according to the clock protocol. After obtaining the timestamps and transmission delays recorded in each PTP message from the node device, the transmission delays are filtered, and the clock deviation from the master clock is calculated based on the timestamps and the processed transmission delays. Finally, the local clock is adjusted using the calculated clock deviation.
2. The synchronization accuracy optimization method for an end-to-end transmission mode clock synchronization system according to claim 1, characterized in that, The slave node device and the master node interact with each other in PTP message mode according to the clock protocol in end-to-end transmission mode, as follows: When the master node sends a Sync message and a Follow-up message to the slave node device, the slave node device sends a Delay-Req message to the master node after receiving it, so that the master node immediately replies with a Delay-Resp message after receiving the Delay-Req message sent by the slave node device.
3. The synchronization accuracy optimization method for an end-to-end transmission mode clock synchronization system according to claim 1, characterized in that, The master node device supports the IEEE 1588 clock protocol.
4. The method for optimizing synchronization accuracy in an end-to-end transmission mode clock synchronization system according to claim 1, characterized in that, The transmission device between the master node and slave node devices in the clock synchronization system is a transparent clock device, that is, the transmission device between the master node and slave node devices adds the dwell time of the PTP message in the transmission device in the form of a timestamp to a specified position in the PTP message.
5. The synchronization accuracy optimization method for an end-to-end transmission mode clock synchronization system according to claim 1, characterized in that, The transmission delay includes the forward transmission delay when a PTP message sent from the master node is transmitted to the slave node device. ms The reverse transmission delay when PTP messages sent by the slave node are transmitted to the master node. sm .
6. The method for optimizing synchronization accuracy of an end-to-end transmission mode clock synchronization system according to claim 1, characterized in that, The slave node device internally stores and maintains the forward transmission delay during the historical PTP message exchange process. ms With reverse transmission delay sm .
7. The method for optimizing synchronization accuracy of an end-to-end transmission mode clock synchronization system according to claim 1 or 5, characterized in that, The filtering process includes the following steps: The obtained forward transmission delay ms Reverse transmission delay sm Each of these is compared with the time t required for transmission along the longest transmission path within the network. max Compare; If the forward transmission delay is delayed ms Or reverse transmission delay sm Greater than 2t max If the timestamp and transmission delay obtained during this PTP message exchange are discarded, the clock adjustment will be terminated, and the next PTP message exchange will begin. If the forward transmission delay is delayed ms With reverse transmission delay sm All less than 2t max If so, proceed to the next step.
8. The method for optimizing synchronization accuracy in an end-to-end transmission mode clock synchronization system according to claim 7, characterized in that, The filtering process further includes: For forward transmission delay ms With reverse transmission delay sm Select the set window size M, and calculate the forward transmission delay, including the delay of this transmission. ms With reverse transmission delay sm The weighted average delay of M consecutive historical transmission delays. ms and delay sm Then use delay ms and delay sm The clock offset between the slave node and the master node is calculated using the timestamps recorded in the PTP messages.
9. The method for optimizing synchronization accuracy of an end-to-end transmission mode clock synchronization system according to claim 1, characterized in that, The calculation of the clock deviation from the master clock based on the timestamp and the processed transmission delay is specifically as follows: According to the clock offset calculation formula in the IEEE 1588 clock protocol, the clock offset between the slave node device and the master clock is calculated using the timestamp in the PTP message and the processed transmission delay.
10. A synchronization accuracy optimization device for an end-to-end transmission mode clock synchronization system, characterized in that, It includes a memory and a processor; the memory is used to store a computer program; the processor is used to implement, when executing the computer program, a synchronization accuracy optimization method for an end-to-end transmission mode clock synchronization system as described in any one of claims 1-9.