Method of removing a substrate ion implantation barrier layer
By forming a substrate ion implantation barrier layer through a three-layer process, and removing the SiARC layer by etching the substrate protective layer and dry etching, the problem of substrate ion implantation barrier layer residue is solved, achieving efficient removal and protection without residue.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI HUALI INTEGRATED CIRCUIT CORP
- Filing Date
- 2026-02-28
- Publication Date
- 2026-06-02
AI Technical Summary
In the prior art, the substrate ion implantation barrier layer is difficult to completely remove, resulting in residual formation defects.
A three-layer process is used to form an ion implantation barrier layer on the substrate, including spin-coated SOC and SiARC layers. The SiARC layer is removed by forming a substrate protective layer, etching and dry etching, and the SOC layer is removed by a combination of ashing process, thus protecting the substrate from damage.
It effectively removes the substrate ion implantation barrier layer, avoids residue, protects the substrate from damage, and improves the reliability and efficiency of the process.
Smart Images

Figure CN122138628A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and specifically to a method for removing an ion implantation barrier layer from a substrate. Background Technology
[0002] When forming deep P-wells (DPWs) and deep N-wells (DNPPDs) in substrates via ion implantation, thick photoresist (up to 2.5 micrometers thick) is used as a barrier layer due to the high energy of ion implantation. The disadvantages of thick photoresist are its thickness, low carbon content, and inability to achieve smaller photoresist layers (CDs). Therefore, the industry employs a three-layer process to form the substrate ion implantation barrier layer, using spin-coated carbon materials (SOCs) with higher carbon content and high-silicon content SiARC (silicon-containing anti-reflective coating) to replace the photoresist (PR) as the substrate ion implantation barrier layer. A problem with the three-layer process is that after substrate ion implantation, both wet and dry photoresist removal processes are difficult to effectively remove the SiARC, resulting in residues and defects. Summary of the Invention
[0003] In view of the shortcomings of the prior art described above, the purpose of this application is to provide a method for removing the substrate ion implantation barrier layer, so as to solve the problem of defects caused by incomplete removal of the substrate ion implantation barrier layer in the prior art.
[0004] To achieve the above and other related objectives, this application provides a method for removing an ion implantation barrier layer from a substrate, comprising: Step 1: Provide a substrate, form an ion implantation barrier layer on the substrate, and then perform ion implantation on the substrate; Step 2: Form a substrate protective layer to fill the gaps in the ion implantation barrier layer; Step 3: Etch the substrate protective layer so that the thickness of the substrate protective layer is less than the thickness of the SOC layer in the ion implantation barrier layer; Step 4: Remove the SiARC layer from the ion implantation barrier layer; Step 5: Remove the SOC layer from the substrate protective layer and the ion implantation barrier layer.
[0005] Preferably, a spin coating process is used to form the substrate protective layer.
[0006] Preferably, the material of the substrate protective layer includes BARC, SOC, or APF.
[0007] Preferably, the ion implantation barrier layer is composed of a SOC layer and a SiARC layer stacked from bottom to top.
[0008] Preferably, the step of forming the ion implantation barrier layer includes: sequentially forming a SOC layer, a SiARC layer, and a photoresist layer on a substrate by deposition or spin coating; patterning the photoresist layer, and then sequentially etching the SiARC layer and the SOC layer using the photoresist layer as a mask; and removing the photoresist layer.
[0009] Preferably, the etching process in step three is divided into two steps: first, the substrate protective layer is etched until the SiARC layer is exposed, and then the substrate protective layer is etched until the thickness of the substrate protective layer is less than the thickness of the SOC layer.
[0010] Preferably, the SiARC layer is removed by a dry etching process, using a fluorine-containing gas as the etching gas.
[0011] Preferably, the fluorine-containing gas includes CF4 or NF3.
[0012] Preferably, the substrate protective layer and the SOC layer are removed by an ashing process.
[0013] Preferably, the ashing process employs a power-decreasing method, with the oxygen concentration inside the chamber decreasing from high to low.
[0014] As described above, the method for removing the substrate ion implantation barrier layer provided in this application has the following beneficial effects: it can effectively remove the substrate ion implantation barrier layer without forming residues while protecting the substrate from damage. Attached Figure Description
[0015] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0016] Figure 1 The flowchart shown is a method for removing the substrate ion implantation barrier layer provided in an embodiment of this application; Figure 2 The diagram shown is a cross-sectional view of the device formed after step one, as described in the invention title provided in this application. Figure 3 The diagram shown is a cross-sectional view of the device formed after step two, as described in the invention title provided in this application. Figure 4 The diagram shown is a cross-sectional view of the device formed after step three, as described in the invention title provided in this application. Figure 5 The diagram shown is a cross-sectional view of the device formed after step four, as described in the invention title provided in this application. Figure 6 The diagram shown is a cross-sectional view of the device formed after step five, as described in the invention title provided in this application. Detailed Implementation
[0017] The following specific examples illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. This application can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this invention.
[0018] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0019] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," indicating orientation or positional relationships, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0020] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.
[0021] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.
[0022] After substrate ion implantation, existing processes use either dry or wet methods to remove the substrate ion implantation barrier layer. Dry removal has low selectivity for SiARC and is prone to leaving residues; wet processes are time-consuming, cannot remove SiARC, and require high SPM temperatures, cause contamination of the wet drying area, and increase the frequency of filter replacement.
[0023] To address this problem, this application provides a method for removing the ion implantation barrier layer on a substrate.
[0024] Please see Figure 1 The diagram illustrates a flowchart of a method for removing a substrate ion implantation barrier layer according to an embodiment of this application.
[0025] like Figure 1 As shown, the method for removing the substrate ion implantation barrier layer includes the following steps: Step 1: Provide a substrate, form an ion implantation barrier layer on the substrate, and then perform ion implantation on the substrate; Step 2: Form a substrate protective layer to fill the gaps in the ion implantation barrier layer; Step 3: Etch the substrate protective layer so that the thickness of the substrate protective layer is less than the thickness of the SOC layer in the ion implantation barrier layer; Step 4: Remove the SiARC layer from the ion implantation barrier layer; Step 5: Remove the SOC layer from the substrate protective layer and the ion implantation barrier layer.
[0026] In step one, as Figure 2 As shown, a substrate 200 is provided. Optionally, the substrate 200 is a silicon substrate, a germanium substrate, or a silicon-on-insulator substrate, etc.; or the material of the substrate 200 may also include other materials, such as gallium arsenide or other III-V compounds. Those skilled in the art can select the constituent material of the substrate 200 according to the type of device structure formed on the substrate 200, therefore the type of substrate 200 should not limit the scope of protection of this invention.
[0027] As an example, an ion implantation barrier layer 201 with multiple gaps is formed on a substrate 200 using a Tri-layer process. The ion implantation barrier layer 201 is composed of a SOC layer 201a and a SiARC layer 201b stacked from bottom to top.
[0028] The Tri-layer process includes the following steps: forming a SOC layer 201a, a SiARC layer 201b, and a photoresist layer sequentially on a substrate 200 by deposition or spin coating; patterning the photoresist layer, and then etching the SiARC layer 201b and the SOC layer 201a sequentially using the photoresist layer as a mask; and finally removing the photoresist layer.
[0029] For example, regions such as DPW and DNPPD are formed in substrate 200 by substrate ion implantation.
[0030] In step two, as Figure 3 As shown, a substrate protective layer 202 is formed to fill the gaps in the ion implantation barrier layer 201.
[0031] As an example, a spin-coating process is used to form the substrate protective layer 202. Due to the high aspect ratio of the ion implantation barrier layer 201, different process nodes can use BARC, SOC, or APF (Advanced Patterned Film) as the material for the substrate protective layer 202, with the fill density ranging from low to high as BARC, SOC, and APF, respectively.
[0032] BARC has a low cost but fills more voids, and its resistance to etching with fluorine-containing gases is not as strong as that of SOC and APF. SOC has a high cost but fills more voids than BARC, increases the selectivity, and has stronger resistance to etching with fluorine-containing gases than BARC. APF has a high cost, fills fewer voids, has a longer film expansion time, and has strong resistance to fluorine-containing gases, and is used in high-end process nodes.
[0033] In step three, such as Figure 4 As shown, the substrate protective layer 202 is etched so that the thickness of the substrate protective layer 202 is less than the thickness of the SOC layer 201a in the ion implantation barrier layer 201.
[0034] As an example, the etching process is divided into two steps: first, the substrate protection layer 202 is etched until the SiARC layer 201b is exposed, and then the substrate protection layer 202 is etched until the thickness of the substrate protection layer 202 is less than the thickness of the SOC layer 201a in the ion implantation barrier layer 201.
[0035] In step four, as Figure 5 As shown, the SiARC layer 201b is removed by a dry etching process. This etching process uses a fluorine-containing gas as the etching gas; for example, fluorine-containing gases include CF4, NF3, etc. Fluorine-containing gases have high selectivity for the SiARC layer 201b and can effectively remove the SiARC layer 201b.
[0036] During the removal of the SiARC layer 201b, part of the substrate protective layer 202 will also be removed. Due to the protection of the substrate protective layer 202, the substrate 200 will not be damaged.
[0037] In step five, such as Figure 6 As shown, the substrate protective layer 202 and the SOC layer 201a are removed by an ashing process. This ashing process uses a power decreasing method, and the oxygen concentration in the cavity decreases from high to low to reduce the oxidation of the substrate 200 surface.
[0038] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of this application. Therefore, the drawings only show the components related to this invention and are not drawn according to the actual number, shape and size of the components. In actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.
[0039] In summary, the method for removing the ion implantation barrier layer from the substrate provided in this application can effectively remove the ion implantation barrier layer without leaving any residue, while protecting the substrate from damage. Therefore, this application effectively overcomes the various shortcomings of the prior art and has high industrial applicability.
[0040] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this invention should still be covered by the claims of this application.
Claims
1. A method for removing an ion implantation barrier layer from a substrate, characterized in that, The method includes: Step 1: Provide a substrate, form an ion implantation barrier layer on the substrate, and then perform ion implantation on the substrate; Step 2: Form a substrate protective layer to fill the gaps in the ion implantation barrier layer; Step 3: Etch the substrate protective layer so that the thickness of the substrate protective layer is less than the thickness of the SOC layer in the ion implantation barrier layer; Step 4: Remove the SiARC layer from the ion implantation barrier layer; Step 5: Remove the SOC layer from the substrate protective layer and the ion implantation barrier layer.
2. The method according to claim 1, characterized in that, The substrate protective layer is formed using a spin coating process.
3. The method according to claim 1 or 2, characterized in that, The material of the substrate protective layer includes BARC, SOC, or APF.
4. The method according to claim 1, characterized in that, The ion implantation barrier layer is composed of the SOC layer and the SiARC layer stacked from bottom to top.
5. The method according to claim 4, characterized in that, The steps for forming the ion implantation barrier layer include: sequentially forming the SOC layer, the SiARC layer, and the photoresist layer on the substrate by deposition or spin coating; patterning the photoresist layer, and then sequentially etching the SiARC layer and the SOC layer using the photoresist layer as a mask; and removing the photoresist layer.
6. The method according to claim 1, characterized in that, The etching process in step three consists of two steps: first, etching the substrate protective layer until the SiARC layer is exposed, and then etching the substrate protective layer until the thickness of the substrate protective layer is less than the thickness of the SOC layer.
7. The method according to claim 1, characterized in that, The SiARC layer is removed by a dry etching process, using a fluorine-containing gas as the etching gas.
8. The method according to claim 7, characterized in that, The fluorine-containing gas includes CF4 or NF3.
9. The method according to claim 1, characterized in that, The substrate protective layer and the SOC layer are removed by an ashing process.
10. The method according to claim 9, characterized in that, The ashing process employs a power-decreasing method, with the oxygen concentration inside the chamber decreasing from high to low.