Direct view display assembly with sparse distribution of pixel emitters

By employing a sparse distribution of pixel emitters and metal wiring traces enclosed in dielectric material in direct-view displays, the problem of wasted resources by micro LED pixel emitters in direct-view displays is solved, achieving high brightness, low power consumption, and flexible display design.

CN122139467APending Publication Date: 2026-06-02GOOGLE LLC

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
GOOGLE LLC
Filing Date
2024-10-30
Publication Date
2026-06-02

AI Technical Summary

Technical Problem

In the prior art, microLED pixel emitters in direct-view displays have such small pixel pitch that high-resolution displays waste power, cost, and resources, and users can hardly perceive the high resolution.

Method used

By employing a sparse distribution of pixel emitters, combined with driver circuits and controller circuits, and using metal wiring traces enclosed by dielectric material, wiring is routed from the controller circuit to multiple driver circuits, and from the driver circuits to the sparsely distributed pixel emitters, a direct-view display assembly is constructed.

Benefits of technology

It achieves increased pixel pitch without increasing display thickness and complexity, avoids resource waste, and provides high brightness, low power consumption, and flexible display design suitable for display applications of various shapes and sizes.

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Abstract

This document describes a direct-view display assembly with a sparse distribution of pixel emitters and a method for constructing the direct-view display assembly. An example display assembly includes a set of pixel emitters transferred from a donor wafer on which the pixel emitters are fabricated to the display assembly. Although fabricated at a first pixel pitch, these pixel emitters are distributed within the display assembly at a second pixel pitch greater than the first pixel pitch. The display assembly further includes: a first driver circuit electrically coupled to a first subset of the set of pixel emitters via a first set of emitter traces; a second driver circuit electrically coupled to a second subset of the set of pixel emitters via a second set of emitter traces; and a controller circuit electrically coupled to the first and second driver circuits via a set of controller traces.
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Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to U.S. Provisional Application No. 63 / 595,950, filed November 3, 2023, the disclosure of which is incorporated herein by reference in its entirety. Background Technology

[0003] Semiconductor manufacturing processes allow the creation of extremely small electronic components, such as transistors, resistors, capacitors, and light-emitting diodes (LEDs). The manufacture of these semiconductor products can involve a series of precise steps, including depositing thin films of material, patterning circuits using photolithography and etching techniques, and connecting everything through metallization.

[0004] For many electronic components, miniaturization to an almost limitless degree can be advantageous. For example, the more transistor logic can be miniaturized, the more functionality (e.g., processing and storage capacity) can be mounted on a single chip, resulting in portable, lightweight, low-power electronic devices. However, for other electronic components, their usefulness may be limited as they become smaller in size. As an example, microLEDs and other small light-emitting components used as pixels in electronic displays can become so small that a user would need to magnify them to see and perceive the high resolution being provided. While such magnification may be acceptable or desirable for some applications, for direct-view applications where the display is not magnified, utilizing the potential high resolution of these types of pixel emitters may be wasteful and undesirable. Summary of the Invention

[0005] Some pixel emitters, such as microLEDs, can be fabricated in such small sizes and pixel pitches that they become inefficient and suboptimal for use in direct-view displays where the user's limited vision cannot perceive the full resolution provided by the microemitters (e.g., in terms of power usage, cost, etc.). However, due to the many other advantages of microLEDs (despite this direct-view limitation), this disclosure relates to direct-view display assemblies with a sparse distribution of pixel emitters. More specifically, processes and methods for producing direct-view display assemblies are described, wherein microLEDs or other small pixel emitters are distributed across the display in a relatively sparse manner to have a pixel pitch larger than the pixel pitch the pixel emitters have when they are fabricated. In this way, the display assemblies described herein can benefit from all the advantages of microLED technology while still being suitable for direct viewing (without magnification) and without unnecessarily wasting power, cost, and other resources at pixel resolutions higher than those reasonably perceptible or perceptible to the user. Additionally, other benefits achieved by the direct-view display assembly with a sparse distribution of pixel emitters described herein include the possibility of using a flexible substrate, the opportunity for other components (e.g., antennas, cameras, sensors, etc.) to be placed below the pixel emitters while still having a largely unobstructed path to clean air, and so on.

[0006] Therefore, one implementation described herein relates to a display assembly constructed according to the principles described herein. The display assembly may include a set of pixel emitters, multiple driver circuits, and controller circuitry. The set of pixel emitters can be transferred from a donor wafer on which the set of pixel emitters is fabricated to the display assembly. The set of pixel emitters may be fabricated at a first pixel pitch and distributed within the display assembly at a second pixel pitch greater than the first pixel pitch. The multiple driver circuits may include a first driver circuit electrically coupled to a first subset of the set of pixel emitters via a first set of emitter traces, and a second driver circuit electrically coupled to a second subset of the set of pixel emitters via a second set of emitter traces. The controller circuitry may be electrically coupled to the first and second driver circuits (and other driver circuits among the multiple driver circuits) via a set of controller traces. These traces may be enclosed in one or more layers of dielectric material.

[0007] Other implementations described in this article relate to methods for constructing display assemblies similar to the example display assemblies described above. For example, an example method includes steps including, but not limited to: 1) transferring a set of pixel emitters from a donor wafer to a cover carrier, the set of pixel emitters being fabricated on the donor wafer at a first pixel pitch and distributed on the cover carrier at a second pixel pitch greater than the first pixel pitch; 2) after transferring the set of pixel emitters, depositing: (a) a first set of emitter traces configured to electrically couple a first driver circuit to a first subset of the set of pixel emitters, and (b) a second set of emitter traces configured to electrically couple a second driver circuit to a second subset of the set of pixel emitters; 3) after depositing the first set of emitter traces and the second set of emitter traces, attaching a first driver circuit to the first set of emitter traces and attaching a second driver circuit to the second set of emitter traces; and 4) depositing a set of controller traces configured to electrically couple controller circuitry to the first driver circuitry and the second driver circuitry.

[0008] Other example methods described in this article use a substrate and build from the bottom of the display assembly, instead of building downwards from the cover plate as described above. For example, another example method includes steps including, but not limited to: 1) attaching a first driver circuit and a second driver circuit to a substrate carrier; 2) after attaching the first driver circuit and the second driver circuit, depositing: (a) a set of controller traces configured to electrically couple the controller circuit to the first driver circuit and the second driver circuit, (b) a first set of emitter traces configured to electrically couple the first driver circuit to a first subset of a set of pixel emitters, and (c) a second set of emitter traces configured to electrically couple the second driver circuit to a second subset of the set of pixel emitters; and 3) after depositing the set of controller traces, the first set of emitter traces and the second set of emitter traces, transferring the first subset and the second subset of the set of pixel emitters from a donor wafer to couple with the first set of emitter traces and the second set of emitter traces on the substrate carrier, respectively, the pixel emitters being fabricated on the donor wafer at a first pixel pitch and distributed on the substrate carrier at a second pixel pitch greater than the first pixel pitch.

[0009] Various additional operations that can serve a particular implementation can be added to these procedures and methods, examples of which will be described in more detail below. Additionally, it should be understood that each of the procedures and operations described above as being performed by different types of implementations can also be additionally or alternatively performed by other types of implementations.

[0010] Details of these and other implementations are set forth in the accompanying drawings and the description below. Other features will also become apparent from the following description, drawings, and claims. Attached Figure Description

[0011] Figure 1 Illustrative aspects of an example implementation of a direct-view display assembly with a sparse distribution of pixel emitters, based on the principles described herein, are shown.

[0012] Figure 2 This diagram shows an illustrative view of a portion of a display assembly constructed from a cover carrier using a top-down approach according to the principles described herein.

[0013] Figure 3 An illustrative method for constructing a display assembly from a cover plate carrier using a top-down approach, based on the principles described herein, is shown.

[0014] Figures 4A to 4K Illustrative aspects of the various intermediate steps in constructing a display assembly from a cover plate using a top-down approach based on the principles described herein are illustrated.

[0015] Figure 5 This is a view illustrating a portion of a display assembly constructed from a substrate carrier using a bottom-up approach according to the principles described herein.

[0016] Figure 6 An illustrative method is shown for constructing a display assembly from a substrate carrier using a bottom-up approach based on the principles described herein.

[0017] Figures 7A to 7G Illustrative aspects of the various intermediate steps in constructing a display assembly from a substrate using a bottom-up approach based on the principles described herein are illustrated. Detailed Implementation

[0018] Emerging light-emitting technologies offer numerous advantages over conventional technologies. As an example, extremely bright and power-efficient display panels can be fabricated from tiny pixel emitters using microLEDs or other similar technologies. These technologies can produce pixel panels with pixel pitches in the range of a few micrometers, allowing for the creation of panels with hundreds of thousands or millions of pixels per square centimeter. Such pixel resolution far exceeds the resolving limits of the human visual system, meaning that panels with pixel densities in this range are typically significantly magnified before being viewed by a user. As an example of where these technologies are already useful, extended reality headsets (e.g., augmented reality glasses) are well-suited for very dense pixel panels because the form factor provides very limited space for the display, and because there is typically a complex optical stack (including magnification and other optical manipulations) between the pixel panel and the head-up display viewed by the user.

[0019] While high-density microLED pixel panels are a particularly good option for magnified displays, such as those that can be integrated into head-mounted displays, the desirable properties of microLED components (e.g., brightness, power efficiency, etc.) also make them desirable for other types of applications, including direct-viewing displays. As used herein, a direct-viewing display refers to a display configured for direct viewing by a viewer without significant manipulation of light (e.g., other than natural distortions that may be introduced by covering glass or other such optics integrated with the display for protective or aesthetic purposes). For example, a direct-viewing display can contrast with a display, such as one that can be included in a head-mounted extended reality device, that manipulates light in a more significant way (e.g., significantly amplifying light, moving light through waveguides, projecting light to form an image on a display separate from the pixel panel or directly on the user's retina, etc.). In some direct-viewing examples (including those described herein), individual pixel emitters (e.g., individual microLEDs of a single color; white pixels in groups comprising red, green, and blue microLEDs, etc.) can be viewed through optics configured to protect the pixel emitters or to collect and direct light in a particular manner. For example, a pixel panel characterized by microlenses in front of each pixel emitter would still be a direct-viewing display if the optics do not magnify the image (i.e., increase the apparent pixel pitch) or move or reproject the image to be viewed separately from the panel itself. Some typical example applications using direct-viewing displays include smartwatch devices, mobile devices (e.g., smartphones, tablets, etc.), and television screens.

[0020] A potential technical problem when using extremely small pixel emitters such as microLEDs in direct-view displays is that the pixel pitch can be so small that it is wasteful and inefficient. For example, while a smartwatch display may only be a few square centimeters in size, the number of microLEDs that can be fitted onto a direct-view display of that size could be in the tens of millions. Along with adding significant costs to the device's bill of materials, displays with this type of resolution will put significant strain on the device's power and heat requirements, as well as the additional complexities and resource requirements associated with creating the display and processing / storing the high-resolution images it produces. Even if all these problems were solved through a specific design, the design would still be wasteful and inefficient because the human visual system cannot distinguish such high resolutions.

[0021] In response to these technical challenges, the technical solutions described herein relate to direct-view display assemblies using a sparse distribution of pixel emitters. For example, the methods and processes described herein allow for the construction of direct-view display assemblies that utilize microLED or other small-pixel emitter technologies (thus enjoying the associated brightness, power efficiency, and other benefits of these technologies) while increasing the pixel pitch of the pixel emitters to avoid the waste and inefficiencies described above. While smartwatch displays provide a good example of an application where a direct-view display assembly with a sparse distribution of pixel emitters can be used, it should be understood that the principles described herein can be similarly applied to a variety of other direct-view display applications, such as mobile devices, computer screens, television screens, appliance panels, automotive interfaces, etc.

[0022] Along with the more sparse distribution of pixel emitters on the display assembly (in order to increase the pixel pitch to a level that can be more reasonably addressed by the user), another technical problem addressed by the display assembly described herein involves how to distribute power and signaling to the pixel emitters located in their sparsely distributed positions. To spread the pixel emitters over a relatively large area, thereby increasing the pixel pitch in the manner already described, the pixel emitters are transferred from the donor substrate on which they are fabricated to the display assembly, in which the pixel emitters can operate with greater space between them. However, this transfer precludes the pixel emitters from being fabricated directly on chips in which wiring and other backplane functions are already integrated. Instead, the wiring from the central display controller to the sparsely fanned-out pixel emitters across a relatively large display area becomes the responsibility of the display assembly itself.

[0023] To address this technical challenge, implementations described herein include methods and processes for laying layers of metallic wiring traces enclosed by a dielectric material to route from controller circuitry to multiple driver circuits (also known as block drivers) and from the driver circuitry to the pixel emitters themselves (e.g., sparsely distributed microLED devices). In some implementations, the resulting display assembly may include sparsely distributed pixel emitters and the entire infrastructure (e.g., driver circuitry, controller circuitry, and necessary wiring) for driving these pixel emitters on a discrete display assembly that can be mounted as an off-the-shelf direct-view display in a device (e.g., a smartwatch, etc.). In other implementations, certain elements of the display assembly (e.g., controller circuitry, certain wiring, etc.) may be implemented separately from the pixel emitters and driver circuitry, but may be configured to interoperate when connected. For example, the display assembly may be partially implemented on a cover plate to which the pixel emitters and driver circuitry are coupled, and partially implemented within a printed circuit board (PCB) or other prefabricated elements that include other elements of the display assembly (e.g., some of the controller circuitry, power and / or signal wiring, etc.).

[0024] Additionally, the construction of a direct-view display assembly with a sparse distribution of pixel emitters can be performed using either a top-down approach (building down from the cover to which the pixel emitters are coupled to the controller circuitry and its wiring) or a bottom-up approach (building up from the substrate to which the driver circuitry is coupled to the fan-out wiring to which the pixel emitters are connected). Each of these examples and other optional aspects of how a direct-view display assembly with a sparse distribution of pixel emitters can be constructed will be described in more detail below.

[0025] These solutions result in a variety of beneficial technical effects. For example, as already mentioned, direct-view display assemblies with a sparse distribution of pixel emitters allow the benefits of microLEDs to be applied to direct-view display applications, even by avoiding the wasteful inefficiencies that would otherwise accompany displays with extremely high density. These benefits include bright, vivid displays with accurate colors, deep blacks, and also high power efficiency and other advantages. Additional technical effects of the display assemblies described herein include various options on how the displays can be constructed to potentially provide unique characteristics for devices using the display assemblies therein.

[0026] As an example, if a flexible cladding or substrate is used in the construction, the resulting display assembly can be thin and flexible to form a suitable device that may not be rigid and / or flat. As another example, the flexibility in how the pixel emitters are positioned in the implementations described herein does not impose a preference for a straight line or any particular shape of pixel emitter array. As a result, display assemblies of various shapes and sizes that can serve a particular implementation can be readily produced. As yet another example, the use of very small pixel emitters (e.g., microLEDs) in a direct-view display allows for opportunities to place other components and / or sensors between the emitters. For example, an antenna requiring an unobstructed path to clean air can be conveniently positioned below the direct-view display, and photosensitive detectors (e.g., camera pixel arrays) can be staggered between the emitters to allow the display to act as an image capture device, etc. Other example benefits may include: the display assemblies described herein can tend to be very thin (which can be a critical design constraint for some applications), allowing for flexible placement of controller circuitry, and full integration (e.g., where all driver circuitry or even the controller is embedded in an assembly with a carrier sheet), etc.

[0027] Various implementations will now be described in more detail with reference to the accompanying drawings. It should be understood that the specific implementations described below are provided as non-limiting examples and can be used in a variety of situations. Additionally, it should be understood that other implementations not explicitly described herein may also fall within the scope of the claims set forth below. The systems and methods described herein for direct-view display assemblies with a sparse distribution of pixel emitters can result in any or all of the technical effects mentioned above, as well as various additional effects and benefits that will be described below and / or become apparent.

[0028] Figure 1 An illustrative aspect of an example implementation 100 of a direct-view display assembly 102 with a sparse distribution of pixel emitters, based on the principles described herein, is shown. Figure 1 The display assembly 102 is described as being configured for use as a smartwatch display (e.g., based on its shape, size, etc.). However, as mentioned above, it should be understood that the same principles described with respect to display assembly 102 can be applied to other types of direct-view display assemblies configured for use in other applications such as mobile device displays, laptop screens, televisions, appliance panels, etc.

[0029] like Figure 1 As shown, a small segment 104 of the direct-view display assembly 102 is exploded and magnified to illustrate certain aspects of the display to be described. Additionally, Figure 1A donor wafer 106 (not drawn to scale relative to the direct-view display assembly 102) is shown, which can undergo photolithography and / or other processes to fabricate a large number of pixel emitters (e.g., microLED devices, etc.). More specifically, as shown by a segment 108 of the donor wafer 106—segment similarly shown as a break from the wafer and enlarged in the figure—a set of pixel emitters 110 (represented by small squares within segment 108) can be fabricated on the donor wafer 106 prior to undergoing transfer 112 to the display assembly 102.

[0030] The transfer 112 can be performed in any suitable manner. For example, after the pixel emitters 110 have been fabricated at high density on the donor wafer 106, the donor wafer can be aligned with the carrier substrate of the display assembly, and the pixel emitters 110 can be released or detached from the donor wafer to be coupled (e.g., electrical connection, adhesive connection, etc.) to a desired location on the carrier substrate (i.e., the location where the pixel emitters are already aligned). This detachment can be facilitated by a focused laser (e.g., from a first side of the donor wafer) that creates defects (e.g., cracks) at a specified depth within the wafer beneath one or more emitters to be released. In the case of donor wafer and carrier alignment, another laser (e.g., introduced from the opposite side of the donor wafer) can then cause the defects to propagate (e.g., cause crack propagation) within a boundary already set around the specific pixel emitter (or group of pixel emitters) to be released by the action of the laser. Thus, the pixel emitter or group can be detached from the donor wafer on which it or they were fabricated and can be attached to the carrier substrate. As mentioned above and as will be described in more detail below, the pixel pitch of the pixel emitters can be increased by transfer 112, so that the pixel emitters are not so densely packed. For example, in some cases, the donor wafer can be aligned and then only one out of every N pixel emitters can be released to the carrier sheet (where N can be equal to 2, 10, 25, 50 or any other suitable number) – before the donor wafer is realigned to the same or another carrier sheet to repeat the process for the other pixel emitters that have not yet been released.

[0031] Therefore, paragraph 104 shows the group of pixel emitters 110 (in Figure 1 Only a few pixel emitters in this group are explicitly labeled, but this group of pixel emitters will be understood as all the small squares shown combined) are disposed in the display assembly 102 after being transferred (transfer 112) from the donor wafer 106 on which the group of pixel emitters is made to the display assembly 102. Figure 1As further shown, the set of pixel emitters 110 can be fabricated with a first pixel pitch 114-1 and distributed within the display assembly 102 with a second pixel pitch 114-2 greater than the pixel pitch 114-1. In some examples, the pixel pitch 114-1 with which the set of pixel emitters 110 is fabricated can be a very small pixel pitch, such as in the range of approximately 2 to 4 micrometers. Conversely, the pixel pitch 110 with which the set of pixel emitters 110 is distributed within the display assembly 102 with a pixel pitch 114-2 can be much larger than the pixel pitch 114-1. While not necessarily drawn to scale relative to the pixel pitch 114-1, in various examples, the pixel pitch 114-2 can be at least twice the pixel pitch 114-1, at least four times the pixel pitch 114-1, at least ten times the pixel pitch 114-1, at least twenty times the pixel pitch 114-1, at least forty times the pixel pitch 114-1, or can be another suitable increase serving a particular implementation. For example, while pixel pitch 114-1 can represent a high-density pitch in the range of 2 to 4 micrometers, pixel pitch 114-2 can represent a low-density or sparse pitch (e.g., 80 micrometers) in the range of 50 to 120 micrometers.

[0032] Along with the sparse distribution of the set of pixel emitters 110, in section 104, the display assembly 102 is also shown as including a first driver circuit 116-1 electrically coupled to a first subset 118-1 of the set of pixel emitters 110 via a first set of emitter traces 120-1. The subset 118-1 will be understood to include each pixel emitter in the pixel emitters 110 (i.e., each small square in the small squares) within the dashed box labeled subset 118-1. As shown, each pixel emitter in these pixel emitters 110 is routed to the driver circuit 116-1 via an emitter trace, which is drawn as a thick line extending between the pixel emitters 110 and the driver circuit 116-1, and will be understood to represent one or more traces electrically connecting the emitter trace to the driver circuit. For example, in some implementations, both the active line and the return line from the driver circuit to each individual pixel emitter may be represented by a black pixel trace, while in other implementations, the return line may be represented by a black pixel trace. Figure 1 Implemented on another layer not shown. The transmitter traces are collectively referred to as this set of transmitter traces 120-1.

[0033] Similar to driver circuit 116-1, subset 118-1 of the set of pixel emitters 110, and emitter trace 120-1, display assembly 102 is also shown in segment 104 as including a second driver circuit 116-2 electrically coupled to a second subset 118-2 of the set of pixel emitters 110 via a second set of emitter trace 120-2. Although in Figure 1Only these driver circuits and their corresponding subsets of pixel emitters and traces are explicitly labeled, but it should be understood that any suitable number of driver circuits—each driver circuit corresponding similarly to its own subset of pixel emitters and traces—can be used to implement a display assembly of the desired size. Additionally, while driver circuits 116-1 and 116-2 are shown as corresponding to a subset of 16 pixel emitters for the example of implementation 100, it should be understood that different sizes of subsets can be used to serve a particular implementation. For example, each circuit driver can be electrically coupled to (and responsible for driving) 64 pixel emitters (e.g., an 8×8 grid), 256 pixel emitters (e.g., a 16×16 grid), or other suitable numbers (not necessarily powers of 2, and not necessarily in a square or linear grid). For example, if a display assembly includes 160,000 pixel emitters in a 400×400 grid, and each driver circuit corresponds to a 100×100 subset of the pixel emitters (100,000 pixel emitters), then the display assembly can use 16 individual driver circuits to drive all the emitter elements of the display.

[0034] Along with these multiple driver circuits (e.g., driver circuits 116-1, 116-2 and other driver circuits of display assembly 102 not explicitly shown in section 104), display assembly 102 may further include controller circuit 122 electrically coupled to driver circuits 116-1, 116-2 and other driver circuits (not shown) via a set of controller traces 124. These traces are drawn in a similar manner to transmitter traces 120-1 and 120-2, but are shown extending from controller circuit 122 to driver circuits 116-1 and 116-2. As with the other traces described above, controller trace 124 may represent one or more connections between controller circuits and driver circuits (e.g., for transmitting data signaling, power, return, etc.). Although shown on the same layer in the illustration of implementation 100, it should be understood that in some implementations, the set of controller traces 124 may be implemented on one or more different layers than the layers on which the respective sets of transmitter traces 120-1 and 120-2 are implemented. That is, for a given implementation, it may be desirable to have as few layers as possible (e.g., so that the display assembly 102 can have a low profile, may be flexible, and avoid certain thermal problems, etc.). Thus, this can help achieve certain design goals in terms of the extent to which the wiring of transmitter traces and controller traces may be included on a single layer (as shown) or on a relatively small number of layers.

[0035] Figure 1The set of controller traces 124 shown implies a point-to-point connection between controller circuit 122 and each of driver circuits 116-1 and 116-2, and in some implementations, this may indeed be a suitable way for controller circuit 122 to communicate with driver circuits. However, it should be understood that point-to-point communication is not required, and may not be the most efficient communication mode in some implementations. Instead, in some examples, a single controller circuit 122 can communicate with a large number of driver circuits using an architecture logically configured, for example, in a row / column grid. For example, row and column signals generated by the controller circuit can each be connected in parallel to a number of block drivers, and these connections are arranged such that activation of any given row and column signal pair selects a single block driver. Although this type of architecture can use rows and columns logically, it should be understood that the driver circuits do not necessarily need to be physically arranged in geometric rows and columns. Instead, the physical placement of each driver circuit can be arranged in any suitable geometry, and the connections to the controller circuit can be configured to create a row / column architecture.

[0036] Figure 1 The implementation 100 shown represents an example of a direct-view display assembly with a sparse distribution of pixel emitters, based on the principles described herein. However, it should be understood that... Figure 1 The additional details and variations explicitly shown can be implemented for other display assemblies. As an example variation, a first subset 118-1 of the set of pixel emitters 110, to which the first driver circuit 116-1 is electrically coupled, may include pixel emitters arranged in a non-linear fashion, rather than in the square, 4×4 linear arrangement shown. The same applies to the second subset 118-2 and any other subset of the set of pixel emitters 110 that can be included on the display assembly 102. As already mentioned above, the flexibility provided by this non-linear possibility allows for the convenient and efficient construction of displays of different shapes. In relatively simple cases, Figure 1 The rounded corners of the display assembly 102 shown can be implemented using a subset of square, linearly arranged pixel emitters that do not share subsets 118-1 and 118-2. In more advanced examples, displays of arbitrary shapes can be efficiently manufactured for a variety of applications, and sections of the display can be efficiently carved out (e.g., to make room for a camera or fingerprint reader within the display), etc.

[0037] Each of the elements shown in section 104 of the display assembly 102 will now be described in more detail, including possible variations and details that may be used in some implementations.

[0038] The set of pixel emitters 110 can be implemented by any suitable light-emitting device that can be used as a pixel for a display. A primary example used throughout this disclosure is the example of a microLED device. For example, each pixel emitter 110 can represent a white microLED having red, green, and blue elements that combine to create a white pixel or any desired color (based on the effect given to each of the primary colors). As another example, each pixel emitter 110 can represent a single microLED assembly of an individual color (e.g., a red microLED, a green microLED, etc.). While microLEDs are used as the primary example in this disclosure, it should be understood that the principles described herein can be applied to other types of pixel emitters, particularly those that, like microLEDs, can be made so small that a sparser distribution is desired before they can be used in efficient direct-view displays.

[0039] The driver circuits 116-1 and 116-2 and the controller circuit 122 can each be implemented on semiconductor chips or integrated circuits, whether these chips are unpackaged semiconductor dies, fully packaged chips, or something in between. For example, these circuits can each represent (e.g., on a wafer similar to donor wafer 106) being separately fabricated and then integrated into the display assembly 102 to serve different complementary metal-oxide-semiconductor (CMOS) chips for the functions described herein. In some examples, these chips can be configured to be relatively thin and low-profile (e.g., having a thickness of less than 100 micrometers, less than 50 micrometers, less than 20 micrometers, etc.).

[0040] Each set of transmitter traces 120-1 and 120-2 can be implemented on a single plane (as shown), or, where more complex fan-out is required (e.g., for a subset of pixel emitters with tens or hundreds of pixel emitter devices), on two or more planes separated by layers of insulating dielectric material (as will be described and shown in more detail below). Similarly, the set of controller traces 124 can be implemented on the same insulating substrate plane as the controller circuitry 122 and / or the driver circuitry 116-1 and 116-2 themselves, or on separate layers. Power traces can have a thickness ranging from 5 to 50 micrometers and can be separate from traces configured to carry signaling information (e.g., image data).

[0041] Details of a display assembly, such as display assembly 102, and the processes and techniques used to construct the display assembly will now be described in conjunction with the remainder of the accompanying drawings. More specifically, Figure 2 , Figure 3 and Figures 4A to 4KThis invention relates to a construction technique for producing a direct-view display assembly with a sparse distribution of pixel emitters using what is referred to herein as a top-down approach. As will be illustrated and described, this approach involves starting with a cover plate carrier (e.g., an insulating and transparent carrier sheet that will eventually become the front portion of the display viewed by the user) and building down from the pixel emitters themselves to trace layers, multiple driver circuits, and controller circuitry.

[0042] Then, Figure 5 , Figure 6 and Figures 7A to 7G This relates to a construction technique for producing similar or identical direct-view display assemblies with a sparse distribution of pixel emitters, using what is referred to herein as a bottom-up approach. As will be illustrated and described, this method involves building from a substrate carrier (e.g., a carrier sheet that will form the back or bottom of the display, rather than the portion visible to the user) and upwards from the driver circuitry and trace layers up to the sparsely distributed pixel emitters.

[0043] As will be clear in the description below, any of these methods, or a combination of methods that construct some layers from top to bottom and others from bottom to top before assembling the other layers, can be a suitable way to create the various types of direct-view display assemblies described and shown above. Certain advantages may accompany one method or another to help achieve certain purposes and objectives that may be associated with a particular implementation.

[0044] Figure 2 A top view 200-1 and a corresponding side view 200-2 depicting certain aspects of a display assembly constructed from a cover plate using a top-down approach according to the principles described herein. As shown, top view 200-1 depicts aspects described above. Figure 1 The elements are similar to those shown in one of the subsets 118-1 or 118-2 of the pixel emitter 110. Although the elements may be similar to those shown above for... Figure 1 The descriptions are not identical, but the reference numerals used for these elements (and other elements in the following figures) are similar. Specifically, as shown, a subset 218 of the entire group of pixel emitters 210 (similar to either subset 118-1 or 118-2 or the group of pixel emitters 110) is shown in the illustrated portion of the display assembly to be electrically coupled to driver circuitry 216 (similar to either driver circuitry 116-1 or 116-2) via a set of emitter traces 220 (similar to emitter traces 120-1 or 120-2). Additionally, a controller trace 224 (similar to one of the controller traces 124) is shown, which will be understood as electrically coupling driver circuitry 216 to controller circuitry (“to controller”), although this controller circuitry is not in the display assembly. Figure 2 The diagram is explicitly shown (and will be understood to serve multiple other driver circuits as well as driver circuit 216). At the bottom of top view 200-1, an indicator shows the view of side view 200-2, which is then depicted below top view 200-1, with similar indicators showing the view of top view 200-1.

[0045] In side view 200-2, some of the elements already shown and described from the top view perspective are depicted from the side view perspective. For example, four pixel emitters 210 and several layers are shown in the side view, in which emitter traces 220 electrically couple the pixel emitters 210 to driver circuitry 216. Controller traces 224 are also shown as being routed on these layers and exiting the view to (not depicted) controller circuitry (“to controller”). Although these traces appear to overlap and intersect each other from the perspective of side view 200-2 (because, in this example, the set of emitter traces 220 and controller traces 224 are all routed on the same layer), it should be understood that, as can be clearly seen from top view 200-1, each trace can be electrically independent of each other.

[0046] Along with the elements visible in both views 200-1 and 200-2, side view 200-2 also shows certain additional elements not explicitly shown or labeled from top view 200-1. Specifically, as shown, cover carrier 230 is shown above pixel emitter 210. Additionally, optical devices 232 (e.g., microlenses, light collecting or dispersing devices, etc.) are shown integrated in cover carrier 230 above each pixel emitter in pixel emitter 210. Various dielectric layers 234 of dielectric material encapsulating various other elements (e.g., pixel emitter 210, the set of emitter tracks 220, driver circuitry 216, etc.) are also shown. In the side views 200-2 and other side views depicted herein, various material layers such as cover plate carrier 230, dielectric layer 234 and other such layers are shown with serrated edges, showing only a portion of the cut side view, and these layers extend in other directions (e.g., to incorporate other pixel emitters, other traces, other driver circuits, etc.).

[0047] To demonstrate how it can be constructed (i.e., assembled, made, manufactured, etc.) Figure 2 The display assembly will now refer to the one made by Figures 4A to 4K The individual process steps shown are used to describe Figure 3 The method 300 shown is for constructing a direct-view display assembly with a sparse distribution of pixel emitters.

[0048] Figure 3This illustrates a top-down approach for constructing from a cover plate carrier, based on the principles described herein. Figure 2 Method 300 for display assembly. It should be understood that in some examples, method 300 and other similar methods described herein (and / or variations of method 300 based on the principles described herein) may be encoded in instructions that may be stored by a non-transitory computer-readable medium and, when executed, may cause a processor of a computing device (e.g., a display manufacturing system) to perform one or more operations of method 300.

[0049] Although Figure 3 Illustrative operations 302 to 308 are shown according to a particular implementation, but it should be understood that other implementations of this method may omit, add, reorder, and / or modify them. Figure 3 Any one of operations 302 to 308 explicitly represented in the text. Additionally, although... Figure 3 The operations shown are indicated by arrows suggesting the sequential order of operations; however, it should be understood that some or all of the operations in method 300 can be executed concurrently (e.g., in parallel). Each operation in these methods will now be described in more detail, as these operations can be performed by a system such as a display manufacturing system. Additionally, as mentioned above, reference will be made to... Figures 4A to 4K Provide further details related to certain operations in the process.

[0050] At operation 302, the display fabrication system can transfer a set of pixel emitters from the donor wafer to the cover carrier. For example, as per [reference to...] Figure 1 As shown and described, the set of pixel emitters (e.g., the set of pixel emitters 110) may have been fabricated on a donor wafer (e.g., donor wafer 106) and then transferred to a carrier sheet (i.e., a cover plate carrier in this example) so that the pixel emitters can be spread out for better direct viewing and for various other reasons (e.g., to allow for flexible displays, etc.). To further illustrate operation 302, Figures 4A to 4C Illustrative aspects of various intermediate steps that can be performed to advance operation 302 are shown.

[0051] exist Figure 4AIn step 400-A, a cover carrier 230 is shown that has been manufactured, constructed, or otherwise obtained. The cover carrier 230 may be made of a transparent material such as glass or plastic, such that when attached, it allows the pixel emitters to emit light through the transparent material of the cover carrier. In this way, the cover carrier 230 can serve as a protective mechanism (e.g., to shield a delicate set of pixel emitters from dust and debris, electrostatic discharge, and / or other potential damage). Additionally, as will become apparent in the following figures, the cover carrier 230 can serve as a carrier sheet that helps mechanically hold the display assembly together when the emitter traces and controller traces, circuitry (e.g., driver circuitry and controller circuitry), and dielectric material are deposited in layers onto the cover carrier 230.

[0052] Along with being a transparent carrier capable of serving as the layer described below, the cover carrier 230 may also have other optical and / or mechanical properties that may be desirable for a particular implementation. For example, the cover carrier 230 may be relatively thin (e.g., having a thickness of less than 100 micrometers, less than 40 micrometers, etc.) and the material constituting the cover carrier may be insulating. Additionally, the cover carrier 230 may have any suitable shape desired for the display assembly and may be made of a flexible material configured to allow the display assembly to bend without damage upon flexing. Flexible displays may be used to bend around edges (e.g., to reduce or eliminate bezels, etc.) to conform to the non-flat surface on which the display is desired, etc.

[0053] like Figure 4A As further shown, a set of optical devices 232 can be integrated within the cover carrier 230. These optical devices 232 can be configured to manipulate light emitted by the set of pixel emitters through the transparent material of the cover carrier 230 in any suitable manner. For example, the optical devices 232 can represent microlenses imprinted into the material of the cover carrier 230 and configured to collect the light generated by the pixel emitters, which will be coupled to the cover carrier 230 at each of the optical devices 232. In this way, the light generated by the micro-pixel emitters can be slightly amplified or made appear brighter because less light will be scattered and more light will be directed to the user viewing the display. Thus, the optical devices 232 can help increase the brightness efficiency of the display, or can otherwise help improve the overall appearance or functionality of the display (e.g., by reducing reflections / glare, etc.).

[0054] exist Figure 4BIn step 400-B, the pixel emitters 210 are coupled to the overlay carrier 230 (e.g., transferred from the donor wafer as described above). The pixel emitters 210 can be attached to the overlay carrier 230 using any suitable adhesive or bonding technique and, as shown, can be distributed to align with the optics 232 imprinted into the overlay carrier 230 (i.e., one pixel emitter 210 is directly disposed behind each optics 232). (See also...) Figure 1 As shown and described, the set of pixel emitters can already be fabricated with a relatively small first pixel pitch (e.g., pixel pitch 114-1). For example, modern photolithography can allow pixel pitches in the range of 2 to 4 micrometers, which, as mentioned above, is too small to be distinguished by the human visual system. Therefore, part of the objective of transferring the set of pixel emitters at operation 302 could be to increase the pixel pitch so that it is more perceptible to human visual ability for direct-view applications (although it should be understood that the resulting direct-view screen can still be small and appear very detailed and high-resolution to the user). Thus, the set of pixel emitters coupled to the cover carrier 230 at step 400-B can be distributed on the cover carrier with a second pixel pitch (e.g., pixel pitch 114-2) greater than the first pixel pitch.

[0055] Figure 4B The pixel emitters 210 are shown to be at least slightly further apart than they were when they were manufactured, but it should be understood that... Figure 4B The spacing of the pixel emitters 210 in the other figures below may not be well proportional to the degree of spacing expansion used in some implementations. This spacing expansion factor (i.e., how much larger the second pixel pitch is than the first pixel pitch) can depend on several considerations. For example, the techniques and craftsmanship used to fabricate the pixel emitters on the wafer donor can determine how small the first pixel pitch should be. Additionally, the type of direct-view display assembly being constructed also affects how much the pixel pitch should be expanded from the fabricated pitch. For example, a smartwatch display may have different pixel density requirements than a large television (due to the fact that it is typically viewed across a room) (due to the fact that it is typically viewed close to the viewer). In one example, the first pixel pitch may be 4 micrometers, and the transfer may increase the first pixel pitch by a factor of 20, making the second pixel pitch 80 micrometers. In other examples, the transfer may increase by a factor of 2 (or even less than 2 but greater than 1), 5, 10, 40, 100, or another suitable factor.

[0056] exist Figure 4CIn step 400-C, a first dielectric layer 234 is deposited onto the cover carrier 230. More specifically, as shown, an interlayer dielectric (ILD) of insulating material is applied to enclose and protect the pixel emitter, and, as will be shown below, to support a first metal layer that will provide contact for the pixel emitter to fan out to the driver circuitry (as emitter trace 220).

[0057] Back Figure 3 At operation 304, the display fabrication system may deposit emitter traces to couple pixel emitters 210 to driver circuitry (e.g., driver circuitry 216) that will be incorporated later. More specifically, after transferring the set of pixel emitters at operation 302, operation 304 may be performed to deposit: 1) a first set of emitter traces configured to electrically couple a first driver circuitry to a first subset of the set of pixel emitters, 2) a second set of emitter traces configured to electrically couple a second driver circuitry to a second subset of the set of pixel emitters, and 3) other corresponding sets of emitter traces configured to electrically couple other driver circuitry to their own subsets of the set of pixel emitters. Figure 2 and Figures 4A to 4K An example of a single subset of pixel emitters (i.e., subset 218) and a single set of emitter traces (i.e., emitter traces 220) is shown, but it should be understood that operation 304 is performed throughout the entire display assembly to connect the entire set of pixel emitters 210 to the corresponding driver circuitry assigned to it. To further illustrate operation 304, Figures 4D to 4F Illustrative aspects of the various intermediate steps that can be performed to advance operation 304 are shown.

[0058] exist Figure 4D In step 400-D, the deposition of a first metal layer implementing the transmitter trace 220 and the controller trace 224 is performed onto the first dielectric layer 234 deposited in step 400-C. (See also: Regarding...) Figure 2 As shown and described, the relatively limited number of pixel emitters 210 in subset 218 makes it possible to route all emitter traces 220 on the same layer as each other, and in this example, on the same layer as the controller trace 224. Where this is possible, it is advantageous to implement traces in such a way on a single metal layer (or on as few layers as possible) because this results in thinner display assemblies, less risk or complexity of thermal problems, lower manufacturing costs and complexity, etc. However, it should be understood that in some implementations that assign driver circuitry to a larger subset of pixel emitters (e.g., implementations using a subset with hundreds of pixel emitters served by each driver circuitry, etc.), it may not be possible to... Figure 4EAll wiring is completed on a single metal layer as shown.

[0059] Therefore, in some implementations, each set of transmitter traces, such as the set of transmitter traces 220, can be deposited on multiple layers separated by dielectric material (e.g., distributed between the multiple layers) to allow wiring to cross and overlap without trace contact. Additionally, controller traces, such as controller trace 224, can be implemented on another layer or multiple layers that can serve a particular implementation.

[0060] As shown in the figure Figure 4D The first metal layer shown includes components configured to be electrically coupled to the pixel emitter 210 and to the driver circuitry beneath the first dielectric layer 234. Figure 4D (not shown in the image), and travels between the driver circuit and the controller circuit ( Figure 4D The trace (not shown in the image). Although the fan-out of the transmitter trace 220 is seen from side view 200-2 and Figure 4A-4K While not visible in the corresponding view, it should be understood that the emitter trace 220 and controller trace 224 deposited in step 400-D can be fanned out in a manner as shown in implementation 100 above and top view 200-1. The emitter trace 220 can be made of any suitable conductive material (e.g., copper, aluminum, etc.) and can be deposited using any suitable technique (e.g., photolithography process, etc.).

[0061] exist Figure 4E In step 400-E, the second dielectric layer 234 is deposited onto the cover carrier 230. More specifically, as shown, an insulating ILD material may be applied at step 400-E to enclose and support the metal layer comprising the transmitter trace 220 and controller trace 224 deposited at step 400-D.

[0062] exist Figure 4F In step 400-F, another metal layer is deposited to prepare transmitter trace 220 and controller trace 224 so that they can be combined with driver circuitry and controller circuitry when placed.

[0063] Back Figure 3 At operation 306, the display fabrication system may attach (e.g., physically and electrically couple, either in combination or otherwise) a first driver circuit to a first set of transmitter traces and attach a second driver circuit to a second set of transmitter traces. For example, this attachment of the driver circuits may be performed after depositing the first and second sets of transmitter traces at operation 304. To further illustrate operation 306, Figures 4G to 4I Illustrative aspects of various intermediate steps that can be performed to advance operation 306 are shown. More specifically, Figure 4G and Figure 4H An example aspect of a method for attaching driver circuitry to a display assembly under construction is shown, while Figure 4I An example aspect of an alternative method for performing this attachment is shown.

[0064] exist Figure 4G In step 400-G, the driver circuit 216 is incorporated into the connection established in step 400-F. Thus, once step 400-G is completed, each pixel emitter 210 becomes electrically coupled to the driver circuit 216 via one or more emitter traces in the emitter traces 220.

[0065] exist Figure 4H In step 400-H, the driver circuit 216 is encapsulated in a third dielectric layer 234. In this way, the driver circuit 216 is protected from dust and debris while being encapsulated in the dielectric material. Additionally, attaching and embedding the driver circuit 216 in steps 400-G and 400-H results in the driver circuit 216 being integrated with the rest of the display assembly, allowing the display to be used as a discrete, self-contained component, as it is deployed within the design of various types of devices (e.g., in a smartwatch along with other components such as a processor, memory, power supply, etc.).

[0066] In discrete-type display assemblies described up to this point, a carrier sheet (i.e., cover carrier 230) may receive the deposition of elements such as a set of pixel emitters (e.g., pixel emitter 210), multiple sets of emitter traces (e.g., emitter trace 220), multiple driver circuits (e.g., driver circuit 216), a set of controller traces (e.g., controller trace 224), and dielectric material (e.g., in dielectric layer 234) in a series of layers. However, in other types of implementations, display assemblies having these same elements may be distributed between a portion of the assembly associated with the carrier sheet and a printed circuit board (PCB) on which the remaining elements are disposed. More specifically, for example, a two-part display assembly may include: a cover carrier on which a set of pixel emitters is transferred, and a PCB to which the first and second driver circuits are attached. In this type of implementation, the first set of emitter traces, the second set of emitter traces, and the set of controller traces may be entirely included on the cover carrier or the PCB, or they may be distributed between the cover carrier and the PCB.

[0067] To illustrate, Figure 4IStep 400-I is shown, in which partial assembly 402 and PCB 404, which together include all the elements described above, are assembled (as indicated by arrow 406) to complete the functional display assembly. More specifically, as shown in the figures, in this example, partial assembly 402 includes a cover carrier 230, in which the optical device 232, pixel emitter 210, and emitter trace 220 are encapsulated within a layer of the first dielectric layer 234, as already described. However, the driver circuitry 216 and controller trace 224 (pointing out of the scope of the figures) are not included. Figure 4I The controller (not shown) is illustrated as being implemented separately from the rest of these components. Specifically, driver circuitry 216 and controller trace 224 are shown as being manufactured within one or more layers 408 of a PCB 404, which can be constructed in any suitable manner, including those similar to those described herein for the display assembly (e.g., by interleaving metal trace layers and dielectric material layers, etc.). This type of approach can be particularly useful if the display assembly is not expected to be flexible (since typical PCBs can be inflexible) and if there is a large amount of wiring that allows for simplification of the design by moving some of the wiring to the PCB instead of the carrier overlay and part of the assembly 402.

[0068] Although Figure 4I Although not explicitly shown, it should be understood that alternative methods to those explicitly shown herein are also possible. For example, in the same manner that partial assembly 402 can be mounted on PCB 404 to complete a complete display assembly, the display assembly can be constructed by preforming partial assemblies (also called preforms) and assembling these preforms, rather than as described above. Figures 4A to 4H The process is completed by laying each layer sequentially as already described. For example, a preform can be constructed from a cover carrier such as cover carrier 230, and can include components with... Figure 4I Some of the components in assembly 402 are the same as those in the other preform, while another preform may be constructed from a substrate carrier (such as will be described in more detail below) to include the components shown on PCB 404. Constructing and then assembling these types of preforms may be another suitable way to construct the final display assembly.

[0069] Back Figure 3At operation 308, the display fabrication system may deposit a set of controller traces (e.g., including controller trace 224) configured to electrically couple controller circuitry to multiple driver circuits (e.g., including driver circuitry 216). As described and shown above, in some cases, this operation can be performed in parallel with operation 304, in which transmitter trace 220 is deposited. In other examples (e.g., when there is not enough wiring space on a single layer), operation 308 may be performed at different times, such as after operation 306 attaches driver circuitry 216. To further illustrate operation 308, Figures 4J to 4K Illustrative aspects of the steps that can be performed to advance operation 308 are shown. More specifically, Figure 4J An example aspect of a first method for depositing controller traces is shown in an example in which through-silicon vias (TSVs) are not included within the driver circuitry 216, while Figure 4K An example aspect of an alternative method for performing this deposition is shown when the driver circuit 216 does include a TSV (in order to allow electrical connections on both sides of the chip).

[0070] exist Figure 4J In step 400-J, a metal layer is deposited beneath the third dielectric layer 234 (i.e., on a layer separate from the transmitter trace 220 and driver circuitry 216). For example, this layer could be dedicated to wiring between the controller circuitry and the various driver circuits to allow signaling and power to be distributed from the central power supply and controller logic to the driver circuitry of the various individuals driving the subset of pixel transmitters. In other examples, if sufficient wiring space exists, this wiring can be performed on the same layer as the wiring of the transmitter trace 220 (as described above).

[0071] exist Figure 4J In the example, the driver circuitry (e.g., including driver circuitry 216) can be fabricated as a through-silicon via (TSV) without supporting a two-sided wiring scheme. Thus, Figure 4J It is shown that not only the transmitter trace 220 but also the controller trace 224 can be implemented (or at least partially routed) in one or more layers on the same side of the driver circuitry (i.e., above the driver circuitry in this example). In other words, as shown, without the TSV, the controller trace 224 connects to the top of the driver circuitry 216 via the transmitter trace 220 and then descends to its own layer elsewhere to be routed to the controller (“to controller”).

[0072] In comparison, Figure 4KStep 400-K (e.g., an alternative to step 400-J) is illustrated, wherein the first and second driver circuits are fabricated with through-silicon vias configured to support a two-sided wiring scheme. As a result, in this example, the set of transmitter traces 220 can be implemented in one or more layers on the first side of the driver circuitry (e.g., above the chip on the top side, as shown), and the controller trace 224 can be implemented in one or more layers on the second side of the driver circuitry opposite the first side (e.g., below the chip on the bottom side, as shown). In some examples, portions of the controller wiring can be implemented on the first side (i.e., the top side), while other wiring can be connected to the second side (i.e., the bottom side). For example, logic signaling can be performed on one or more planes above the controller circuitry, while power and ground can be routed (connected to silicon via TSVs) on one or more planes below the controller circuitry.

[0073] Back Figure 3 , already combined Figures 4A to 4K Further illustrations in the diagram depict each operation within the process. It should also be understood that in some implementations, Figure 3 or Figures 4A to 4K Other operations not explicitly shown may be part of method 300. For example, operations involving fabricating the set of pixel emitters 210 on the donor wafer may be performed before transferring the set of pixel emitters to the cover carrier at operation 302. As another example, operations involving completing the display assembly and mounting it for use in an electronic device (e.g., a smartwatch or other suitable device) may be performed after operation 308.

[0074] As mentioned above, Figures 2 to 4K This involves a top-down approach to constructing a display assembly, starting from the cover plate. However, this is not the only suitable way to construct a display assembly such as display assembly 102. Therefore, a method related to... Figures 2 to 4K Some are similar and roughly parallel Figures 5 to 7G This illustrates a bottom-up approach to constructing display assemblies starting from the cover plate.

[0075] Figure 5 A top view 500-1 and a corresponding side view 500-2 depicting certain aspects of a display assembly constructed from a substrate using a bottom-up approach according to the principles described herein. As shown, top view 500-1 depicts the same aspects as top view 200-1 and those described above. Figure 1Similar elements are shown within one of the subsets 118-1 or 118-2 of the pixel emitter group 110. Similarly, the reference numerals for these elements are similar to those used in the previous examples. For example, a subset 518 of the entire pixel emitter group 510 is shown in the illustrated portion of the display assembly as electrically coupled to the driver circuitry 516 via a set of emitter traces 520. Additionally, a controller trace 524 is shown, which will be understood as electrically coupling the driver circuitry 516 to a controller circuitry, although this controller circuitry is not in... Figure 5 It is explicitly shown in the diagram. At the bottom of the top view 500-1, an indicator shows the perspective of the side view 500-2, which is then depicted below the top view 500-1, with a similar indicator showing the perspective of the top view 500-1.

[0076] In side view 500-2, certain elements already shown and described from the top view perspective are depicted from the side view perspective. For example, four pixel emitters 510 and several layers are shown in the side view, in which emitter traces 520 electrically couple the pixel emitters 510 to driver circuitry 516. Controller traces 524 are also shown as wiring on these layers and exiting the view to (not depicted) controller circuitry (“to controller”). Along with the elements common to top view 500-1, side view 500-2 also shows additional elements not explicitly drawn or labeled from top view 500-1, including various dielectric layers 534 of dielectric material encapsulating other elements (e.g., a set of emitter traces 520, driver circuitry 516, etc.) and a substrate carrier 540 beneath the driver circuitry 516.

[0077] To demonstrate how it can be constructed (i.e., assembled, made, manufactured, etc.) Figure 5 The display assembly will now refer to the one made by Figures 7A to 7G The individual process steps shown are used to describe Figure 6 The method 600 shown is for constructing a direct-view display assembly with a sparse distribution of pixel emitters.

[0078] Figure 6 This illustrates a method for constructing from a substrate carrier using a bottom-up approach, based on the principles described herein. Figure 5 Method 600 for a display assembly. It should be understood that, as with method 300 described above and other similar methods (and / or variations of method 600) described herein, method 600 may, in some examples, be encoded in instructions stored by a non-transitory computer-readable medium, which, when executed, cause a processor of a computing device (e.g., a display manufacturing system) to perform one or more operations of method 600.

[0079] Although Figure 6Illustrative operations 602 to 610 are shown according to a particular implementation, but it should be understood that other implementations of this method may omit, add, reorder, and / or modify them. Figure 6 Any one of operations 602 to 610 explicitly represented in the text. Additionally, although... Figure 6 The operations shown are indicated by arrows suggesting the sequential order of operations; however, it should be understood that some or all of the operations in method 600 can be executed concurrently (e.g., in parallel). Each operation in these methods will now be described in more detail, as these operations can be performed by a system such as a display manufacturing system. Additionally, as mentioned above, reference will be made to... Figures 7A to 7G Provide further details related to certain operations in the process.

[0080] At operation 602, the display manufacturing system can attach the first driver circuit and the second driver circuit to the substrate carrier. For example, as mentioned above... Figures 2 to 4K An alternative to the cover plate used in the described top-down approach, the bottom-up approach, can involve constructing the same or similar assemblies starting from a substrate at the bottom, which is similarly configured to hold the assemblies together and provide a platform for construction. To further illustrate operation 602, Figures 7A to 7B Illustrative aspects of various intermediate steps that can be performed to advance operation 602 are shown.

[0081] exist Figure 7A In step 700-A, a substrate carrier 540 that can be manufactured, constructed, or otherwise obtained is shown. Compared to the overlay carrier 230 described above, constructing the substrate carrier 540 from a transparent material (e.g., glass or plastic) may not offer any particular advantage, as the substrate carrier 540 forms the bottom of the display assembly such that the pixel emitters will not emit light through it. However, similar to the overlay carrier 230, the substrate carrier 540 can also serve as a carrier sheet to help mechanically hold the display assembly together when the various sets of emitter traces and controller traces, circuitry (e.g., driver circuitry and controller circuitry), and dielectric material are deposited layer by layer onto the substrate carrier 540. Additionally, like the overlay carrier 230, the substrate carrier 540 can have other desired mechanical properties, such as being relatively thin (e.g., having a thickness of less than 100 micrometers, less than 40 micrometers, etc.), being made of an insulating material, being formed into a desired shape (including irregular and non-rectangular shapes in some examples), and being made of a flexible material configured to allow the display assembly to bend without damage during flexing.

[0082] In obtaining or constructing the substrate carrier 540, step 700-A shows that the driver circuit 516 can be attached to the substrate carrier. This can be achieved using any suitable bonding technique, adhesive, etc.

[0083] exist Figure 7B In step 700-B, a first dielectric layer 534 is deposited onto a substrate carrier 540. More specifically, as shown, an interlayer dielectric (ILD) of insulating material is applied to enclose and protect the driver circuitry 516, and, as will be shown below, to support a metal layer that will provide contacts for the driver circuitry to fan out to the pixel emitter (as emitter trace 520).

[0084] Back Figure 6 After attaching the driver circuitry at operation 602, operations 604 through 608 can be performed to deposit various traces. More specifically, at operation 604, the display fabrication system can deposit a set of controller traces configured to electrically couple controller circuitry to a first driver circuitry and a second driver circuitry. At operation 606, the display fabrication system can deposit a first set of emitter traces configured to electrically couple first driver circuitry to a first subset of a set of pixel emitters. Similarly, at operation 608, the display fabrication system can deposit a second set of emitter traces configured to electrically couple second driver circuitry to a second subset of the set of pixel emitters. It should be understood that in some implementations, these operations can be performed in parallel (e.g., as part of the same metal layer), while in other implementations, operation 604 can be performed separately from operations 606 and 608 (e.g., in the case where controller trace 524 is on a different layer than the set of emitter traces 520). Furthermore, in performing these operations, it should be understood that the display manufacturing system may also deposit other corresponding set emitter traces configured to electrically couple other driver circuitry to their own subsets of the set of pixel emitters.

[0085] Figure 5 and Figures 7A to 7G Examples of a single subset of pixel emitters (i.e., subset 518) and a single set of emitter traces (i.e., emitter traces 520) are shown, but it should be understood that operations 604 to 608 can be performed throughout the entire display assembly to connect the entire set of pixel emitters 510 to the corresponding driver circuitry assigned to it. To further illustrate operations 604 to 608, Figures 7C to 7E Illustrative aspects of various intermediate steps that can be performed to advance operations 604 to 608 are shown.

[0086] exist Figure 7C In step 700-C, the process involves depositing a first metal layer that implements the transmitter trace 520 and the controller trace 524 onto the first dielectric layer 534 deposited in step 700-B. As described above... Figure 2 As in the example, Figure 5The relatively finite number of pixel emitters 510 in subset 518 allows all emitter traces 520 to be routed on the same layer as each other, and in this example, on the same layer as the controller trace 524. As shown in the figure, Figure 7C The first metal layer shown includes traces configured to be electrically coupled to driver circuitry 516, and then travels over the first dielectric layer 534 to fan out to pixel emitter 510 and controller circuitry. Figure 7C (Not shown in the image). Although the transmitter trace 520 fans out from side view 500-2 and Figures 7A to 7G While not visible in the corresponding view, it should be understood that the transmitter trace 520 and controller trace 524 deposited at step 700-C can be fanned out in a manner as shown in implementation 100 above and top view 500-1. Like transmitter trace 220, transmitter trace 520 can be made of any suitable conductive material and can be deposited using any suitable technique.

[0087] exist Figure 7D In step 700-D, the second dielectric layer 534 is deposited onto the substrate carrier 540. More specifically, as shown, an insulating ILD material may be applied at step 700-D to enclose and support the metal layer comprising the transmitter trace 520 and controller trace 524 deposited at step 700-C.

[0088] exist Figure 7E In step 700-E, another metal layer is deposited to fabricate emitter traces 520, thereby combining them with pixel emitters 510 when these emitter traces are placed. As already described, it should be understood that although a single metal layer is shown in this example as sufficient for all wiring, other implementations may employ two or more layers of metal and dielectric to implement the wiring of the entire group of emitter traces (including emitter traces 520) and the entire group of controller traces (including controller traces 524).

[0089] Back Figure 6 At operation 610, the display fabrication system can transfer a set of pixel emitters from the donor wafer to the display assembly. For example, as per [reference to...] Figure 1As shown and described, the set of pixel emitters (e.g., set of pixel emitters 110) may have been fabricated on a donor wafer (e.g., donor wafer 106) and then transferred to a display assembly constructed on a carrier sheet (i.e., a substrate carrier in this example), such that the pixel emitters can be spread out for better direct viewing and for various other reasons (e.g., to allow for flexible displays, etc.). Because the display assembly in this example is constructed from the bottom up, operation 610 can be performed after depositing the set of controller traces at operation 604, depositing the first set of emitter traces at operation 606, and depositing the second set of emitter traces at operation 608. In other words, once the wiring for the emitter and controller circuitry is in place, operation 610 can be performed so that once the pixel emitters are attached to the emitter traces 520, the electrical connections to the circuitry are in place. Figure 7F Illustrative aspects of operation 610 are shown to further illustrate this.

[0090] exist Figure 7F In step 700-F, the pixel emitters 510 are coupled to the emitter traces 520 prepared in step 700-E. In other words, in this step, the pixel emitters 510 can be transferred from the donor wafer and bonded to the dielectric layer 534 and the emitter traces 520 using any suitable adhesive or bonding technique. As previously described and shown, the pixel emitters 510 may have already been laid with a relatively small first pixel pitch (e.g., similar to...). Figure 1 The pixel pitch 114-1 in the image is created, and can then be transferred to have a second pixel pitch on the display assembly (e.g., similar to...). Figure 1 The pixel pitch in the middle is 114-2 (although this is in Figure 7F (It may not be drawn to scale).

[0091] In some examples, Figure 7F The output of steps 700-F shown can be considered complete and ready for use as a display assembly to be installed in a device such as a smartwatch. In other examples, one or more additional layers may be added for various reasons. For example, a transparent material layer configured to protect the pixel emitters 510 from interfering with the light they emit may be added above the top dielectric layer 534. As another example, a cover glass similar to the cover carrier 230 shown above may be added to the display assembly for a similar purpose. The cover glass may be constructed of a transparent material through which the set of pixel emitters are configured to emit light, and in some implementations, a set of optical devices, similar to optical device 232, may be integrated within the cover glass and configured to manipulate the light emitted by the set of pixel emitters through the transparent material of the cover glass in a manner similar to that described above.

[0092] To illustrate, Figure 7G Step 700-G is shown, in which cover glass 530 (numbered to indicate the similarity between cover glass and cover plate carrier 230) is applied to, as Figure 7F The display assembly is assembled in the middle. As shown, the cover glass 530 includes a plurality of optical devices 532, which are configured to perform a role similar to that of the optical device 232 described above (e.g., manipulating light emitted by the pixel emitter 510 through the transparent material of the cover glass).

[0093] Back Figure 6 , already combined Figures 7A to 7G Further illustrations in the diagram depict each operation within the process. It should also be understood that in some implementations, Figure 6 or Figures 7A to 7G Other operations not explicitly shown may be part of method 600. For example, operations involving fabricating the set of pixel emitters 510 on the donor wafer may be performed before transferring the set of pixel emitters to the display assembly at operation 610. As another example, operations involving completing the display assembly and mounting it for use in an electronic device (e.g., a smartwatch or other suitable device) may be performed after operation 610.

[0094] The following example illustrates an implementation of a direct-view display assembly with a sparse distribution of pixel emitters, based on the principles described herein.

[0095] Example 1: A method comprising: transferring a set of pixel emitters from a donor wafer to a cover plate carrier, the set of pixel emitters being fabricated on the donor wafer at a first pixel pitch and distributed on the cover plate carrier at a second pixel pitch greater than the first pixel pitch; after transferring the set of pixel emitters, depositing: a first set of emitter traces configured to electrically couple first driver circuitry to a first subset of the set of pixel emitters, and a second set of emitter traces configured to electrically couple second driver circuitry to a second subset of the set of pixel emitters; after depositing the first set of emitter traces and the second set of emitter traces, attaching the first driver circuitry to the first set of emitter traces and attaching the second driver circuitry to the second set of emitter traces; and depositing a set of controller traces configured to electrically couple controller circuitry to the first driver circuitry and the second driver circuitry.

[0096] Example 2: The method as described in any one of Examples 1 to 2, wherein: the cover carrier is made of a transparent material, the group of pixel emitters is configured to emit light through the transparent material; and a set of optical devices is integrated within the cover carrier and configured to manipulate the light emitted by the group of pixel emitters through the transparent material of the cover carrier.

[0097] Example 3: The method as described in any one of Examples 1 to 3, wherein the first set of transmitter traces and the second set of transmitter traces are deposited on a plurality of layers separated by a dielectric material.

[0098] Example 4: The method as described in any one of Examples 1 to 4, wherein: the cover plate carrier is made of a flexible material; the first driver circuit and the second driver circuit are implemented by a complementary metal-oxide-semiconductor (CMOS) chip; and the group pixel emitter is implemented by a micro light-emitting diode (microLED).

[0099] Example 5: The method as described in any of the preceding examples, wherein the first subset of the group of pixel emitters comprises pixel emitters arranged in a non-linear manner.

[0100] Example 6: The method of any one of Examples 1 to 5, wherein the first driver circuit and the second driver circuit are fabricated having silicon vias configured to support a two-sided wiring scheme, wherein: the first set of transmitter traces and the second set of transmitter traces are implemented in one or more layers on a first side of the first driver circuit and the second driver circuit; and the group controller traces are implemented in one or more layers on a second side of the first driver circuit and the second driver circuit, the second side being opposite to the first side.

[0101] Example 7: The method of any one of Examples 1 to 6, wherein: the first driver circuit and the second driver circuit are attached to a printed circuit board; and the first set of transmitter traces, the second set of transmitter traces and the set of controller traces are deposited on the cover carrier, deposited on the printed circuit board, or distributed between the cover carrier and the printed circuit board.

[0102] Example 8: The method of any one of Examples 1 to 7 further includes fabricating the group pixel emitter on the donor wafer before transferring the group pixel emitter to the cover carrier.

[0103] Example 9: A method includes: attaching a first driver circuit and a second driver circuit to a substrate carrier; after attaching the first driver circuit and the second driver circuit, depositing: a set of controller traces configured to electrically couple the controller circuit to the first driver circuit and the second driver circuit; a first set of emitter traces configured to electrically couple the first driver circuit to a first subset of a set of pixel emitters; and a second set of emitter traces configured to electrically couple the second driver circuit to a second subset of the set of pixel emitters; and after depositing the set of controller traces, the first set of emitter traces, and the second set of emitter traces, transferring the first subset and the second subset of the set of pixel emitters from a donor wafer to couple to the first set of emitter traces and the second set of emitter traces on the substrate carrier, respectively, the pixel emitters being fabricated on the donor wafer at a first pixel pitch and distributed on the substrate carrier at a second pixel pitch greater than the first pixel pitch.

[0104] Example 10: The method of Example 9 further includes: after transferring the first subset and the second subset of the group pixel emitters, applying a cover glass to the group pixel emitters, the cover glass being made of a transparent material, the group pixel emitters being configured to emit light through the transparent material; wherein a set of optical devices is integrated within the cover glass and configured to manipulate the light emitted by the pixel emitters through the transparent material of the cover glass.

[0105] Example 11: The method as described in any one of Examples 9 to 10, wherein the first set of transmitter traces and the second set of transmitter traces are deposited on a plurality of layers separated by a dielectric material.

[0106] Example 12: The method of any one of Examples 9 to 11, wherein: the substrate carrier is made of a flexible material; the first driver circuit and the second driver circuit are implemented by a complementary metal-oxide-semiconductor (CMOS) chip; and the group pixel emitter is implemented by a micro light-emitting diode (microLED).

[0107] Example 13: The method as described in any one of Examples 9 to 12, wherein the first subset of the group of pixel emitters comprises pixel emitters arranged in a non-linear manner.

[0108] Example 14: The method of any one of Examples 9 to 13, wherein the first driver circuit and the second driver circuit are fabricated having silicon vias configured to support a two-sided wiring scheme, wherein: the first set of transmitter traces and the second set of transmitter traces are implemented in one or more layers on a first side of the first driver circuit and the second driver circuit; and the group controller traces are implemented in one or more layers on a second side of the first driver circuit and the second driver circuit, the second side being opposite to the first side.

[0109] Example 15: The method of any one of Examples 9 to 14 further includes: fabricating the group pixel emitter on the donor wafer before transferring the first subset and the second subset of the group pixel emitter.

[0110] Example 16: A display assembly comprising: a set of pixel emitters disposed in the display assembly, the set of pixel emitters being transferred from a donor wafer on which the set of pixel emitters are fabricated to the display assembly, the set of pixel emitters being fabricated at a first pixel pitch and distributed within the display assembly at a second pixel pitch greater than the first pixel pitch; a first driver circuit electrically coupled to a first subset of the set of pixel emitters via a first set of emitter traces; a second driver circuit electrically coupled to a second subset of the set of pixel emitters via a second set of emitter traces; and a controller circuit electrically coupled to the first driver circuit and the second driver circuit via a set of controller traces.

[0111] Example 17: The display assembly of Example 16 further includes: a cover carrier made of a transparent material; wherein: the group pixel emitters are transferred from the donor wafer to the cover carrier and configured to emit light through the transparent material of the cover carrier, and the first group emitter traces, the second group emitter traces, the group controller traces and the dielectric material are deposited in layers onto the cover carrier.

[0112] Example 18: The display assembly of Example 17 further includes: a set of optical devices integrated within the cover carrier and configured to manipulate light emitted by the set of pixel emitters through the transparent material of the cover carrier.

[0113] Example 19: The display assembly of Example 16 further includes a substrate carrier to which the first driver circuit and the second driver circuit are attached; wherein the group controller trace, the first group transmitter trace, the second group transmitter trace, and the dielectric material are deposited in layers on the substrate carrier.

[0114] Example 20: The display assembly of Example 19 further includes: a cover glass made of a transparent material, the group of pixel emitters being configured to emit light through the transparent material glass; and a set of optical devices integrated within the cover glass and configured to manipulate the light emitted by the group of pixel emitters through the transparent material of the cover glass.

[0115] Example 21: A display assembly as described in any one of Examples 16 to 20, wherein the display assembly is configured for use as a smartwatch display.

[0116] Various implementations of the systems and techniques described herein can be implemented in digital electronic circuit systems, integrated circuit systems, specially designed ASICs (Application-Specific Integrated Circuits), computer hardware, firmware, software, and / or combinations thereof. These various implementations may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system, which includes at least one programmable processor, which may be dedicated or general-purpose, and is coupled to receive data and instructions from and to the storage system, at least one input device, and at least one output device.

[0117] Various implementations have been described. However, it will be understood that various modifications may be made without departing from the spirit and scope of the specification and claims. Furthermore, the logical flow depicted in the figures does not require the desired result to be achieved in the specific order or sequence shown. Additionally, other steps may be provided, or steps may be removed from the described flow, and other components may be added to or removed from the described system. Therefore, other implementations are within the scope of the following claims.

[0118] The specific structural and functional details disclosed in this article are representative only for the purpose of describing the example implementation. However, the example implementation can be embodied in many alternative forms and should not be construed as being limited to the implementation described in this article.

[0119] It should be understood that although the terms first, second, etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. A first element may be referred to as a second element, and similarly, a second element may be referred to as a first element, without departing from the scope of the implementation of this disclosure. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0120] The terminology used herein is for the purpose of describing a particular implementation only and is not intended to limit the implementation. As used herein, unless the context clearly indicates otherwise, the singular forms “a / an” and “the” are intended to include the plural forms as well. It should be further understood that the terms “comprises, comprising, includes, and / or including” as used in this specification specify the presence of the stated features, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or groups thereof.

[0121] It should be understood that when an element is referred to as being “coupled” to, “connected” to, or “in response to” or “on” another element, the element may be directly coupled to, connected to, or in response to, or on the other element, or there may be intermediate elements present. Conversely, when an element is referred to as being “directly coupled” to, “directly connected” to, or “directly in response to” another element or “directly on” another element, there are no intermediate elements present. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items.

[0122] For ease of description, spatial relative terms such as “below,” “under,” “down,” “above,” “above,” etc., may be used herein to describe the relationship between one element or feature and another element or feature as shown in the figures. It should be understood that spatial relative terms are intended to cover different orientations of the device in use or operation, in addition to those depicted in the figures. For example, if the device in the figures is flipped, then an element described as “below” or “under” other elements or features is then oriented “above” other elements or features. Therefore, the term “below” can include both above and below orientations. The device may be oriented in other ways (rotated 130 degrees or in other orientations), and the spatial relative descriptors used herein may be interpreted accordingly.

[0123] Unless otherwise defined, the terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which these concepts belong. It should further be understood that terms such as those defined in common dictionaries should be interpreted as having a meaning consistent with their meaning in the relevant field and / or the context of this specification, and should not be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0124] In addition to the description above, users can be provided with controls that allow them to choose whether and when the system, program, or feature described herein enables the collection of user information (e.g., information about the user's social networks, social actions or activities, occupation, user preferences, or the user's current location) and whether to send content or communications to the user from the server. Furthermore, some data may be processed in one or more ways before it is stored or used, resulting in the removal of personally identifiable information. For example, a user's identity may be processed so that personally identifiable information cannot be determined, or the user's geographic location may be generalized, or location information (such as down to the city, zip code, or state level) may be obtained so that the user's specific location cannot be determined. Therefore, users can control what information is collected, how that information is used, and what information is provided to the user.

[0125] While certain features of the described implementations have been exemplified as described herein, many modifications, substitutions, alterations, and equivalents will occur to those skilled in the art. Therefore, it should be understood that the appended claims are intended to cover such modifications and alterations falling within the scope of the implementations. It should be understood that they are presented by way of example only and not limitation, and various changes in form and detail are possible. Any part of the apparatus and / or method described herein can be combined in any combination, except for mutually exclusive combinations. The implementations described herein may include various combinations and / or sub-combinations of the functions, components, and / or features of the different implementations described. Thus, the scope of this disclosure is not limited to the specific combinations claimed below, but instead extends to encompass any combination of features or exemplary implementations described herein, regardless of whether such specific combination has been specifically enumerated in the appended claims herein.

Claims

1. A method comprising: A set of pixel emitters is transferred from a donor wafer to a cover carrier. The set of pixel emitters is fabricated on the donor wafer with a first pixel pitch and distributed on the cover carrier with a second pixel pitch greater than the first pixel pitch. After the transfer of the group of pixel emitters, deposition occurs: A first set of emitter traces, configured to electrically couple a first driver circuit to a first subset of the group of pixel emitters, and A second set of emitter traces, configured to electrically couple a second driver circuit to a second subset of the group of pixel emitters; After depositing the first set of transmitter traces and the second set of transmitter traces, the first driver circuit is attached to the first set of transmitter traces and the second driver circuit is attached to the second set of transmitter traces. as well as A set of controller traces is deposited, the set of controller traces being configured to electrically couple controller circuitry to the first driver circuitry and the second driver circuitry.

2. The method of claim 1, wherein: The cover plate carrier is made of a transparent material, and the pixel emitter is configured to emit light through the transparent material; and A set of optical devices is integrated within the cover carrier and configured to manipulate the light emitted by the set of pixel emitters through the transparent material of the cover carrier.

3. The method according to any one of claims 1 to 2, wherein, The first set of transmitter traces and the second set of transmitter traces are deposited on multiple layers separated by dielectric material.

4. The method according to any one of claims 1 to 3, wherein: The cover plate carrier is made of flexible material; The first driver circuit and the second driver circuit are implemented using a complementary metal-oxide-semiconductor (CMOS) chip; and The pixel emitter is implemented using microLEDs.

5. The method according to any one of claims 1 to 4, wherein, The first subset of the group of pixel emitters includes pixel emitters arranged in a non-linear manner.

6. The method according to any one of claims 1 to 5, wherein, The first driver circuit and the second driver circuit are fabricated with through-silicon vias configured to support a two-sided wiring scheme, wherein: The first set of transmitter traces and the second set of transmitter traces are implemented in one or more layers on the first side of the first driver circuit and the second driver circuit; and The group controller trace is implemented in one or more layers on a second side of the first driver circuit and the second driver circuit, the second side being opposite to the first side.

7. The method according to any one of claims 1 to 6, wherein: The first driver circuit and the second driver circuit are attached to a printed circuit board; and The first set of transmitter traces, the second set of transmitter traces, and the group controller traces are deposited on the cover plate carrier, deposited on the printed circuit board, or distributed between the cover plate carrier and the printed circuit board.

8. The method of any one of claims 1 to 7, further comprising fabricating the group pixel emitter on the donor wafer prior to transferring the group pixel emitter to the cover carrier.

9. A method comprising: Attach the first driver circuit and the second driver circuit to the substrate carrier. After attaching the first driver circuit and the second driver circuit, deposition is performed: A set of controller traces configured to electrically couple controller circuitry to the first driver circuitry and the second driver circuitry. A first set of emitter traces, configured to electrically couple the first driver circuitry to a first subset of a set of pixel emitters, and A second set of emitter traces, configured to electrically couple the second driver circuitry to a second subset of the group of pixel emitters; as well as After depositing the group controller traces, the first group emitter traces, and the second group emitter traces, the first subset and the second subset of the group pixel emitters are transferred from the donor wafer to couple with the first group emitter traces and the second group emitter traces on the substrate carrier, respectively. The pixel emitters are fabricated on the donor wafer with a first pixel pitch and distributed on the substrate carrier with a second pixel pitch greater than the first pixel pitch.

10. The method of claim 9, further comprising: After transferring the first subset and the second subset of the group pixel emitter, a cover glass is applied to the group pixel emitter, the cover glass being constructed of a transparent material, and the group pixel emitter is configured to emit light through the transparent material; One set of optical devices is integrated within the cover glass and configured to manipulate the light emitted by the pixel emitter through the transparent material of the cover glass.

11. The method according to any one of claims 9 to 10, wherein, The first set of transmitter traces and the second set of transmitter traces are deposited on multiple layers separated by dielectric material.

12. The method according to any one of claims 9 to 11, wherein: The substrate carrier is made of a flexible material; The first driver circuit and the second driver circuit are implemented using a complementary metal-oxide-semiconductor (CMOS) chip; and The pixel emitter is implemented using microLEDs.

13. The method according to any one of claims 9 to 12, wherein, The first subset of the group of pixel emitters includes pixel emitters arranged in a non-linear manner.

14. The method according to any one of claims 9 to 13, wherein, The first driver circuit and the second driver circuit are fabricated with through-silicon vias configured to support a two-sided wiring scheme, wherein: The first set of transmitter traces and the second set of transmitter traces are implemented in one or more layers on the first side of the first driver circuit and the second driver circuit; and The group controller trace is implemented in one or more layers on a second side of the first driver circuit and the second driver circuit, the second side being opposite to the first side.

15. The method of any one of claims 9 to 14, further comprising: The group of pixel emitters is fabricated on the donor wafer before the first and second subsets of the group of pixel emitters are transferred.

16. A display assembly comprising: A set of pixel emitters disposed in the display assembly, the set of pixel emitters being transferred from a supplier wafer on which the set of pixel emitters are fabricated to the display assembly, the set of pixel emitters being fabricated at a first pixel pitch and distributed within the display assembly at a second pixel pitch greater than the first pixel pitch; A first driver circuit, which is electrically coupled to a first subset of the group of pixel emitters via a first set of emitter traces; A second driver circuit, which is electrically coupled to a second subset of the group of pixel emitters via a second set of emitter traces; as well as A controller circuit, which is electrically coupled to the first driver circuit and the second driver circuit via a set of controller traces.

17. The display assembly of claim 16, further comprising: A covered carrier made of transparent material; in: The pixel emitters are transferred from the donor wafer to the cover carrier and configured to emit light through the transparent material of the cover carrier. The first set of transmitter traces, the second set of transmitter traces, the group controller traces, and the dielectric material are deposited in layers onto the cover carrier.

18. The display assembly of claim 17, further comprising: A set of optical devices, integrated within the cover plate carrier, and configured to manipulate light emitted by the set of pixel emitters through the transparent material of the cover plate carrier.

19. The display assembly of claim 16, further comprising a substrate carrier to which the first driver circuit and the second driver circuit are attached; The group controller trace, the first group transmitter trace, the second group transmitter trace, and the dielectric material are deposited in layers onto the substrate carrier.

20. The display assembly of claim 19, further comprising: A cover glass made of a transparent material, wherein the group of pixel emitters is configured to emit light through the transparent material glass; as well as A set of optical devices integrated within the cover glass and configured to manipulate light emitted by the set of pixel emitters through the transparent material of the cover glass.

21. The display assembly as claimed in any one of claims 16 to 20, wherein, The display assembly is configured to be used as a smartwatch display.