A numerical calculation program parallelization reconstruction method

Abstract

The application discloses a numerical calculation program parallelization reconstruction method, constructs a program semantic graph containing four views of structure, calling, importing and data flow through static analysis; performs two-stage function semantic understanding and multi-dimensional context variable analysis on the graph node, identifies the calculation physical semantics and the access mode of the variable in the loop; introduces the field knowledge of the general parallel numerical solver, reconstructs the original program into a parallelization architecture containing the "domain-field" separation standardized data structure through the multi-scheme generation, static verification and confidence optimization mechanism; constructs a generation plan graph, and generates a postorder traversal based on a code sketch by using a large language model; and dynamically locates errors and triggers cascading repair through iterative compilation feedback driven incremental influence analysis. The application can efficiently reconstruct a serial numerical calculation program into a CUDA parallel program, and solves the problems of low code compilation pass rate, chaotic data dependence and inefficient memory management of traditional large models.

Description

Technical Field

[0001] This invention relates to the fields of computer software engineering, high-performance computing (HPC), and artificial intelligence-assisted programming, specifically a method for parallelizing and reconstructing numerical computing programs based on multi-view semantic graph enhancement and adaptive iterative compilation. Background Technology

[0002] With the rapid development of high-performance computing (HPC) technology, scientific and engineering computing fields (such as computational fluid dynamics (CFD), electromagnetic field simulation, structural mechanics analysis, and weather forecasting) have placed extremely high demands on the real-time performance and accuracy of numerical simulations. Traditional CPU-based serial or low-concurrency computing models, limited by physical bottlenecks, are no longer sufficient to meet the computational challenges of large-scale meshes and complex physical models. Graphics processing units (GPUs), with their ultra-large-scale parallel computing architecture and high memory bandwidth, have become the mainstream hardware platform for accelerating numerical computation. Therefore, porting and refactoring existing massive serial numerical computation programs (mainly written in C / C++ and Fortran) into parallel programs suitable for GPU architectures (such as CUDA and HIP code) has become an urgent need for both industry and academia.

[0003] Currently, the methods for parallelizing and refactoring numerical computation programs can be mainly divided into the following three categories: 1) Manual rewriting and porting: This is the most traditional method, heavily reliant on experts with cross-disciplinary knowledge—they need to be familiar with numerical solutions to partial differential equations and proficient in heterogeneous parallel programming models such as CUDA. This method faces extremely high labor costs and technical barriers, has a long development cycle, and is highly susceptible to introducing human error during the rewriting process. Furthermore, manually maintained code is often coupled with specific hardware, making subsequent porting and optimization for next-generation hardware architectures extremely difficult.

[0004] 2) Automatic Parallelization Based on Compiler Instructions or Traditional Compilers: This category includes guided techniques such as OpenACC and OpenMPOffloading, or automatic parallelization compilers based on the polyhedral model. Users attempt to offload computational tasks to the GPU by adding guided statements (pragmas) or relying on the compiler to analyze circular dependencies. However, these methods are limited by the conservative strategies of static analysis. To ensure the absolute correctness of program semantics, parallelization optimization is often abandoned when the compiler cannot fully determine pointer aliasing or complex data dependencies. More importantly, traditional tools cannot perform architecture-level data structure reconstruction (e.g., automatically reconstructing the object-oriented array structure AoS into a structure array SoA suitable for GPU memory access), resulting in low memory access efficiency in the generated parallel program and failing to fully utilize the GPU's hardware performance.

[0005] 3) End-to-end code translation based on Large Language Models (LLM): With the rise of large language models such as GPT-4 and DeepSeek, directly using LLM to "translate" serial code into parallel code has become a research hotspot. However, existing LLM generation methods have the following significant drawbacks in practical engineering applications: (1) "Illusion" and uncompileability: The code generated by LLM often contains syntax errors, calls to non-existent APIs, or parameter type mismatches, which makes the code unable to pass the compiler check and has extremely low usability.

[0006] (2) Lack of global perspective and context constraints: Numerical computation programs often contain complex variable definitions and deep function calls across files. Due to the context window, directly inputting code snippets into the LLM often results in the generation of incorrect interface code due to missing global variable definitions or low-level function signatures.

[0007] (3) Data dependency and chaotic memory management: Numerical computation (such as FVM / FEM) involves the transfer and updating of a large number of discrete variables. LLM has difficulty understanding complex physical field dependencies, and the generated CUDA Kernel often has a long parameter list and chaotic management. It lacks a unified memory management mechanism, which leads to frequent invalid copying of data between the host and the device, which seriously restricts performance.

[0008] (4) Lack of domain knowledge constraints: General-purpose LLMs lack best practice knowledge for HPC (such as mesh coloring techniques, double buffering strategies, merged memory access modes, etc.), and the generated code is often only “can run on GPU” rather than “runs efficiently”, which cannot meet the speedup requirements of high-performance computing. Summary of the Invention

[0009] Objective: To address the problems and shortcomings of existing technologies, this invention provides a method for parallelizing and refactoring numerical computation programs based on multi-view semantic graph enhancement and adaptive iterative compilation. This invention aims to solve the problems of low automation, poor compilation pass rates of code generated from large language models, inability to effectively handle complex data dependencies, and low performance due to a lack of knowledge constraints in the high-performance computing domain during the parallelization and refactoring of existing numerical computation programs. This invention can deeply understand the physical and computational semantics of serial programs, automatically refactor a parallel architecture that conforms to the high-performance computing paradigm, and achieve highly reliable code generation through compiler feedback loops.

[0010] Technical solution: A method for parallelizing and reconstructing numerical computation programs based on multi-view semantic graph enhancement and adaptive iterative compilation, comprising the following steps: 1) Construction of multi-view semantic graph; Static analysis is performed on the input serial numerical computation source program to extract code entities such as classes, functions, and variables. A multi-view semantic graph containing four dimensions, including structural dependencies, call relationships, import relationships, and data flow, is constructed to establish a panoramic relational view of the code entities.

[0011] 2) Hierarchical semantic enhancement; Perform two-stage function semantic understanding and multidimensional context variable analysis on the program semantic graph.

[0012] In terms of function semantic understanding, local functional semantics are first generated based on the function source code, and then global semantic enhancement is performed by aggregating the semantic information of neighboring nodes based on the call view. In terms of variable analysis, variable definitions and access records are extracted based on data flow analysis, and enhanced usage context is constructed by combining the loop semantics and function semantics of the access point. Based on this, the functional category (such as field variables, domain topology data, etc.) and mapping attributes of variables are accurately determined.

[0013] 3) Architecture design based on a general solution paradigm; By introducing knowledge from the domain of general-purpose parallel numerical solvers, and combining the results of hierarchical semantic enhancement in step 2) with the multi-view semantic graph constructed in step 1), the original program is reconstructed into a parallelized target architecture containing a standardized domain-field separation data structure, complete function signatures, and mapping relationships through multi-scheme generation, static verification, and confidence optimization mechanisms. Specifically, this includes: Strategy planning and data definition: Formulate parallel strategies and define a unified data structure adapted to CUDA heterogeneous computing, including a global parameter container, a host-side domain data container, and a device-side field data container; Infrastructure Generation: Based on a domain knowledge base for semantic retrieval and matching in program computation, a program framework is statically generated, including the signatures of core computational flow functions (such as flux calculation functions and unit update functions) and file structures for each step in the numerical solution process. The core computational flow functions are the functions that perform the calculations at each step in the numerical solution process. For example, flux calculation is a step in the FVM program; it's considered core because implementing this step may require other non-core auxiliary functions. Here, only the core functions are initially generated.

[0014] Complete architecture design and optimization: Based on the program framework, a complete refactoring architecture and function mapping relationship are designed, and the optimal refactoring strategy is selected through semantic coverage check and confidence voting mechanism.

[0015] 4) Adaptive code generation; A plan graph is built based on the target program architecture. A post-order traversal strategy is adopted, and the target parallel code is generated using a large language model combined with a code sketch context. The code sketch includes header files, macro definitions, sub-function signatures, and reference code from the original program to minimize context overhead.

[0016] 5) Iterative compilation feedback; The generated code is compiled, compilation errors are captured and their line numbers are parsed, and the abstract syntax tree (AST) is used to reverse-engineer the specific node in the generated plan graph. Impact analysis is performed based on graph dependencies, and the state of relevant nodes is dynamically updated to trigger incremental fixes until compilation succeeds.

[0017] This invention has the following significant technical features in the field of parallelization and refactoring of numerical computation programs: 1) Graph-Driven Adaptive Closed-Loop Generation Mechanism. The core feature of this invention lies in constructing a closed loop of "generation-verification-repair." Unlike traditional unidirectional code generation, this method introduces a generation plan graph as the state control center and treats the compiler as the system's "verification oracle." By combining reverse localization technology using Abstract Syntax Trees (ASTs), this invention can accurately map compilation errors back to specific code generation task nodes. Simultaneously, utilizing an incremental impact analysis algorithm, when the function interface of a node changes, this invention can automatically identify and cascade updates the state of all callers that depend on that node. This mechanism fundamentally guarantees the convergence of the generated code in terms of syntactic correctness and logical consistency.

[0018] 2) Architectural Restructuring Capabilities Integrating Domain Knowledge. This invention differs from tools that only perform syntax translation; it possesses deep architectural restructuring capabilities. During the restructuring process, domain knowledge templates for general-purpose parallel numerical solvers are introduced, enabling it to overcome the limitations of the original program's code structure. Through intelligent analysis, the scattered discrete variables in the original program are automatically reorganized into standardized data containers with "domain-field separation" (i.e., host-side domain data containers and device-side field data containers). This domain knowledge-based restructuring not only achieves physical memory isolation and logical decoupling between host and device data but also provides a standardized architectural foundation for subsequent high-performance computing optimization techniques such as Structured Arrays (SoA) and merged memory access.

[0019] 3) Multidimensional and Deep Semantic Understanding and Mapping Technology. This invention employs a hierarchical semantic enhancement approach. At the function level, it combines local source code analysis with global call graph aggregation to accurately deduce the function's role in the overall computational process. At the variable level, it innovatively introduces "loop semantics" as an analysis dimension, accurately distinguishing core physical field variables from auxiliary topological data by identifying the read / write patterns of variables within nested loops. This abstract semantic understanding capability allows this invention to be widely adaptable to various mesh-based numerical computation programs, including the Finite Volume Method (FVM), Finite Difference Method (FDM), and Finite Element Method (FEM).

[0020] 4) Refined Context Pruning and Generation Strategy. At the interaction level with the large language model, this invention employs a minimalist context construction strategy. Instead of the coarse-grained approach of full code input, this invention uses a "Code Sketch" technique, extracting only the necessary header files, macro definitions, sub-function signatures, and mapping source code for the current task. Combined with a bottom-up generation order, this ensures that when generating upper-level code, the interfaces that the lower-level dependencies are already determined and minimized. This significantly reduces dependence on the large model's context window while effectively shielding against interference from irrelevant code, thus improving the accuracy of the generated content. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of the overall process and data flow of the method according to an embodiment of the present invention; Figure 2 This is a schematic diagram of the core architecture reconstruction mapping and iterative compilation feedback mechanism in an embodiment of the present invention. Detailed Implementation

[0022] The present invention will be further illustrated below with reference to specific embodiments. It should be understood that these embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. After reading the present invention, any modifications of the present invention in various equivalent forms by those skilled in the art will fall within the scope defined by the appended claims.

[0023] A method for parallelizing and refactoring numerical computation programs based on multi-view semantic graph enhancement and adaptive iterative compilation includes: multi-view semantic graph construction, hierarchical semantic enhancement, architecture design based on a general solution paradigm, adaptive code generation, and iterative compilation feedback. Specifically: 1) Static analysis is performed on the input serial numerical computation source program to construct a multi-view semantic graph containing four dimensions: structural dependencies, call relationships, import relationships, and data flow. 2) Two-stage function semantic understanding and multi-dimensional context variable analysis are performed on the program's multi-view semantic graph to identify computational physics semantics and variable access patterns in loops. 3) Knowledge from the domain of general parallel numerical solvers is introduced, and combined with the analysis results, the original program is refactored into a parallel architecture containing a standardized domain-field separation data structure. 4) A generation plan graph is constructed based on the target program architecture. A post-order traversal strategy is adopted, and target parallel code is generated using a large language model combined with code sketch context. 5) The generated code is compiled, compilation errors are captured and mapped to specific graph nodes, impact analysis is performed based on dependency relationships, and the node states in the generation plan graph are dynamically updated to trigger incremental repairs until compilation succeeds.

[0024] In step 1), static analysis is performed on the input serial numerical computation source program to construct a multi-view program semantic graph. This method is mainly aimed at numerical computation programs (such as FVM / FDM solvers).

[0025] 101) Use parsing tools such as Tree-sitter to parse the source code and generate an abstract syntax tree (AST).

[0026] 102) Construct the structural dependency view in the multi-view semantic graph: Traverse the AST, extract class definition, structure definition and function signature information, construct the corresponding nodes, and establish dependency connections for class member inclusion relationships, inheritance relationships and function parameter types.

[0027] 103) Construct the call view in the multi-view semantic graph: Traverse the function definitions and function call expressions in the AST, construct the corresponding function nodes, establish directed edges between the caller and the callee, and count the number of static calls as the weight of the edges for subsequent determination of computational density.

[0028] 104) Construct the import view in the multi-view semantic graph: parse #include or module statements, establish scope dependencies between files and modules, and handle cross-file symbol references.

[0029] 105) Construct a data flow view in the multi-view semantic graph: For global variables and class member variables, create variable nodes and use data flow analysis technology to trace the definition point of each variable node in the program and all reference points of that variable, and construct a complete "definition-use" chain.

[0030] In step 2), hierarchical semantic enhancement is performed on the program semantic graph to accurately understand the function roles and variable uses.

[0031] 201) Local function awareness: For each function node in the calling view of the multi-view semantic graph, extract its source code and comments, input them into the large language model, and generate an atomic function summary (e.g., "computational grid cell flux").

[0032] 202) Global function enhancement: On the call view of the multi-view semantic graph, with each function node as the center, aggregate the functional semantics of adjacent nodes in the semantic graph within a specified radius, and combine the source code input large language model to deduce the role and computational semantics of the current node in the overall numerical solution process (such as the function belonging to the flux calculation "Flux_Computation" stage in the FVM solution process, and the corresponding physical equation being the shallow water equation "Shallow Water").

[0033] 203) Multidimensional Context Analysis of Variables: Based on the data flow view, all read and write access points of variables are extracted. Static analysis identifies the loop context and function context of each variable access point. Combining the variable's declaration and definition, the extracted loop context and function context of all variable access points are input into a large language model to deduce the computational semantics, access pattern, whether it is a computationally intensive field variable, and the corresponding mapping strategy. For example, the computational semantics of the variable 'flux' obtained from the analysis is the flux per cell edge, and the access pattern is accessed per cell edge, making it a computationally intensive field variable. Therefore, its corresponding mapping strategy is to map it to the device's global memory.

[0034] In step 3), the architecture design based on a general solution paradigm aims to map the original program to a target standard architecture suitable for CUDA (Compute Unified Device Architecture) parallelization. Prior to this step, this method predefines a domain knowledge base for general parallel numerical solvers. This knowledge base is a structured template collection containing various numerical computation paradigms, and its construction includes: Standardized Data Container Templates: Defines a set of data management protocols suitable for heterogeneous parallel computing. These are specifically designed to reorganize discrete variables in the original program into standardized objects conforming to the CUDA memory hierarchy, including global parameter containers, host-side data containers, and device-side field data containers. Global parameter containers store scalar physical parameters, time step control, and convergence thresholds. Host-side field data containers store computational domain topology information, mesh geometry attributes, and variables computed only on the host side, all residing in host memory. Device-side field data containers store frequently accessed physical field variables and intermediate computation states residing in device memory. Based on variable analysis results, this method automatically categorizes and populates the discrete variables in the original program into the aforementioned data containers.

[0035] Solver Flow Templates: These templates define a general computational workflow framework for different numerical computation methods based on standardized data containers. Taking the Finite Volume Method (FVM) as an example, the templates cover standard computational flows for explicit time-marching and implicit iterative (e.g., Jacobi / Red-BlackGauss-Seidel) methods, and pre-define the operator topology of "throughput computation—source term processing—variable update—boundary synchronization".

[0036] Project Layout Norms: Defines a directory structure that conforms to engineering standards (e.g., include / for header files, src / kernel / for CUDA kernel functions, and src / host / for logic control flow).

[0037] Core function stubs: Define the necessary function signatures for different solver modes (such as compute_flux_kernel, update_variable_kernel) and pre-define standardized parameter lists to ensure that the generated code snippets can be seamlessly mounted.

[0038] The standardized data container template and file organization specifications are common to all numerical solution programs, while the solution process template and core function skeleton are different in different numerical solution methods. Here, the natural language description of the numerical solution method is used as the index key for vector encoding, and the corresponding solution process template and core function skeleton are stored in the vector database for subsequent retrieval. Based on this, the specific execution flow of step 3) is as follows: 301) Strategy Understanding and Planning: Combining the call view in the multi-view semantic graph of step 2), integrate the context input large language model and formulate parallel strategies (such as thread block partitioning dimensions, double buffering strategy).

[0039] 302) Unified Data Structure Definition: Based on the separation of host and device memory spaces in CUDA heterogeneous computing, and according to the variable analysis results (computational semantics, access patterns, and corresponding mapping strategies) in 203) Multidimensional Variable Context Analysis, three standardized container templates in the domain knowledge base are instantiated: GlobalSolverParams: Used to store global constants such as scalar physical parameters and time step control, typically mapped to CUDA constant memory. HostDomainData: Used to store data residing in host memory. This includes not only the topology information of the computation domain and mesh geometry attributes, but also file I / O buffers, initialization data, and variables that only participate in computation on the CPU side. DeviceFieldData: Used to store data residing in device memory. This includes physical field variables that need to be accessed frequently on the GPU side, intermediate computation states, and data that needs to be computed in parallel within the kernel function. This method automatically categorizes and fills the discrete variables in the original program into the above containers, realizing the orderly management of data in heterogeneous memory space.

[0040] 303) Infrastructure Generation (Static Matching): Using the computational semantics extracted in step 202) global function enhancement (e.g., identified as "explicit FVM method") as the retrieval key, the word embedding vector of the retrieval key is calculated. This vector is then matched against the solution process template and core function skeleton with the highest semantic similarity in the domain knowledge base. The matched template is directly instantiated, generating a physical file structure on disk, along with function signatures (Function Stubs) for the core computation process. These signatures have predefined standard parameter lists in the templates. At this point, the infrastructure of the target standard architecture—the program file structure and core computation function declarations—is generated.

[0041] 304) Complete Design and Mapping of the Target Standard Architecture: Based on the target standard architecture generated in 303), design the complete target standard architecture. For the auxiliary functions in the original program identified in 202) Global Function Enhancement, supplement the corresponding function declarations in the basic architecture of the target standard architecture; at the same time, establish a mapping table between the auxiliary functions in the original program and the currently supplemented functions, clarifying the logical migration path. At this point, the complete architecture of the target standard architecture, i.e., the program file structure and complete function declarations, is complete; simultaneously, the mapping relationship between the functions in the original program and the functions in the complete architecture of the target standard architecture is output.

[0042] 305) Static verification and optimization: For the generated complete target standard architecture, a semantic coverage check is performed based on the function mapping relationship constructed in 304) to ensure that each function in the input original program has a corresponding function in the target architecture.

[0043] 306) Physical Skeleton Instantiation (Lowering): The optimal refactoring strategy selected in step 305 is "sinked" from its abstract description in memory to a physical program file skeleton on disk. A project directory tree (e.g., include / , src / ) is created based on the program file structure of the target standard architecture, and declarations, empty implementations, and necessary header file references (including unified data structure definitions) of all planned functions are written into the generated source files. At this point, a syntactically correct but empty function body project skeleton is obtained, serving as the physical carrier for subsequent adaptive code generation.

[0044] In section 4), adaptive code generation aims to generate high-quality target CUDA code using a large language model.

[0045] 401) Construct PlanGraph: Build a generation plan graph based on the target architecture. This graph is a dynamic directed acyclic graph, and the node status includes pending generation, generation in progress, verification in progress, error, and completion.

[0046] 402) Post-order traversal strategy: First generate low-level mathematical auxiliary functions that do not depend on other functions, then generate intermediate kernels, and finally generate top-level control logic.

[0047] 403) Code Sketch Construction: When generating a single function node, extract the header file definition, macro definition, sub-function signature, and source code of the corresponding mapping function of the original program from the file to which the node belongs as a "Code Sketch".

[0048] 404) LLM generation: The code sketch is fed into the large language model as context input, requiring it to implement the specific CUDA Kernel or Host call logic, and written into the program file through AST.

[0049] In step 5), iterative compilation feedback aims to ensure that the generated code can pass the compiler's inspection and run correctly.

[0050] 501) Compile and execute: After a set of nodes that satisfy the dependencies have been generated, the NVCC compiler is called to compile the complete program generated in step 4).

[0051] 502) Error Mapping: If compilation fails, parse the error line number output by the compiler, use the AST to reverse locate the function definition node in the PlanGraph to which the line number belongs, bind the error information to the node and record the number of errors.

[0052] 503) Handling internal logic changes: If the node repair only involves the internal logic of the function body and the signature remains unchanged, the impact will not be propagated, and the current node state will be reset to "pending generation" for retry.

[0053] 504) Interface signature change handling: If node repair causes changes to function parameters or return values, query the dependency graph and reset the status of all parent nodes that call this node to "pending generation", triggering cascading updates.

[0054] 505) Data Structure Change Handling: If node repair causes a change in the unified data structure definition (such as DeviceFieldData), then the status of all nodes that depend on this data structure will be reset to "pending generation".

[0055] 506) Repeat steps 501) to 505) until all nodes compile successfully. Parallel computing environment description: This method can be executed on a computer device that includes memory, a general-purpose computing processor (CPU), a general-purpose graphics processing unit (GPU), and computer programs stored in memory and capable of running on the processor. This computer device is configured to support a CUDA compilation environment (such as NVCC) and a large language model calling interface. By executing the program described above using the parallel reconstruction method for numerical computation programs, automated parallel reconstruction of user-input serial numerical computation source code can be achieved. For example... Figure 1 As shown, the specific implementation process includes: Step 1: Analyze the source code of the numerical computation model input by the user (such as the C++ implementation of FVM code) to obtain the computational semantics of each function layer and the storage attributes of each variable in the model. This method first uses the Tree-sitter tool for static parsing to obtain the AST. The framework will then identify which functions are core computational kernels and which variables are field variables that require GPU memory allocation based on the two-stage semantic analysis model.

[0056] Step Two: Introduce domain knowledge and perform architecture mapping. For grid-based computing methods such as FVM / FDM, this method predefines standardized data container templates. For example, for a function compute_flux(intn, double* u, double* f) that calculates flux, this method analyzes that u and f are field variables and n is a parameter, thus reconstructing its parameter list to accept pointers to GlobalSolverParams and DeviceFieldData structures, achieving unified data management.

[0057] Step 3: Start the adaptive iterative generation process.

[0058] 601) Initialize PlanGraph and mark all function nodes to be generated as Pending.

[0059] 602) Select a leaf node whose dependencies are satisfied, extract its signature, functional description, data structure definition, and original mapping function as a sketch, and call LLM to generate CUDA code.

[0060] 603) If the generated code references an undefined variable, the compiler will report an error. This method catches the error and locates the relevant node.

[0061] 604) This method feeds back error information, node spatial information (call context), and time information (code generated and modified within the first 3 calls) to the LLM. The LLM then modifies the code, for example, by adding missing variable definitions in DeviceFieldData.

[0062] 605) Due to the change in data structure, this method, based on the impact analysis logic, resets the state of all other Kernel nodes using DeviceFieldData to Pending, waiting for the next round of regeneration, to ensure that all Kernels can correctly access the new data members.

[0063] It is obvious to those skilled in the art that the steps of the methods described in the embodiments of the present invention can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. Optionally, they can be implemented using device-executable program code, which can then be stored in a storage device for execution by a computing device. Furthermore, in some cases, the steps shown or described can be performed in a different order than those presented herein, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, the embodiments of the present invention are not limited to any particular hardware and software combination.

Claims

1. A method for parallelizing and reconstructing numerical computation programs based on multi-view semantic graph enhancement and adaptive iterative compilation, characterized in that, Includes the following steps: (1) Construction of multi-view semantic graph: Static analysis is performed on the input serial numerical calculation source program to extract class, function and variable entities, and construct a multi-view semantic graph containing four dimensions: structural dependency, calling relationship, import relationship and data flow; (2) Hierarchical semantic enhancement: Perform two-stage function semantic understanding and multi-dimensional context variable analysis on the semantic graph; The two-stage function semantic understanding includes: first, generating local functional semantics based on the function source code, and then performing global semantic enhancement by aggregating the semantic information of neighboring nodes based on the call view; the multi-dimensional context variable analysis includes: extracting variable definitions and access records, and constructing an enhanced usage context by combining the loop semantics and function semantics of the access point, thereby determining the functional category and mapping attribute of the variable; (3) Architecture design based on general solution paradigm: Introduce knowledge of the general parallel numerical solver domain, combine the results of hierarchical semantic enhancement and semantic graph, and reconstruct the original program into a parallel architecture containing standardized domain-field separation data structure, complete function signature and mapping relationship through multi-scheme generation, static verification and confidence optimization mechanism; (4) Adaptive code generation: Based on the target program architecture, a generation plan diagram is constructed, a post-order traversal strategy is adopted, and the target parallel code is generated by combining the large language model with the code sketch context; (5) Iterative compilation feedback: Compile the generated code, capture compilation errors and map them to specific graph nodes, perform impact analysis based on dependency relationships, dynamically update the node status in the generated plan graph to trigger incremental repair, until compilation is successful.

2. The method for parallelizing and reconstructing numerical computation programs based on multi-view semantic graph enhancement and adaptive iterative compilation according to claim 1, characterized in that, The specific process of "two-stage function semantic understanding" mentioned in step (2) is as follows: 1.1) Local function awareness: For each function node in the call view of the semantic graph, the source code is analyzed using a large language model to generate an atomic function summary; 1.2) Global function enhancement: On the call view of the semantic graph, with each function node as the center, the functional semantics of adjacent nodes in the semantic graph within a specified radius are aggregated, and the role and computational semantics of the current node in the overall numerical solution process are deduced by combining the large language model of the source code input.

3. The method for parallelizing and reconstructing numerical computation programs based on multi-view semantic graph enhancement and adaptive iterative compilation according to claim 1, characterized in that, The "multidimensional contextual variable analysis" mentioned in step (2) specifically includes: 2.1) Extract all read and write access points of variables based on the data flow view; 2.2) For each access point, identify its loop level and function context through static analysis; 2.3) Input the read / write access point information of the variable with the loop hierarchy and the function context into the large language model for comprehensive analysis to determine whether the variable is a computationally intensive field variable, and generate the "host-device" mapping strategy and data synchronization strategy accordingly.

4. The method for parallelizing and reconstructing numerical computation programs based on multi-view semantic graph enhancement and adaptive iterative compilation according to claim 1, characterized in that, The "architectural design based on a general solution paradigm" mentioned in step (3) specifically includes the following sub-steps: 3.1) Strategy understanding and planning: Combining the call view in the semantic graph of step (2), integrate the context input large language model, understand the original program's computational logic, and formulate the parallel strategy of the target program; 3.2) Unified Data Structure Definition: Based on the parallel strategy and variable analysis results, define a unified data structure that adapts to the target parallel architecture; 3.3) Infrastructure generation: The computational semantics extracted from global function enhancement are used as retrieval keys. The word vector embedding vector of the retrieval key is calculated, and the solution process template with the highest semantic similarity is matched in the domain knowledge base. The matched template is instantiated directly, a physical file structure is generated on the disk, and a function signature for the core computing process is written. The signature has a predefined standard parameter list in the template. At this point, the basic architecture of the target standard architecture, namely the program file structure and the core calculation function declarations, has been generated. 3.4) Complete Design and Mapping of the Target Standard Architecture: Based on the basic architecture of the target standard architecture, the complete architecture of the target standard architecture is designed based on the parallel strategy, that is, the program file structure and complete function declarations are completed; at the same time, the mapping relationship between the functions in the original program and the functions in the complete architecture of the target standard architecture is output. 3.5) Static verification and optimization: For the generated complete target standard architecture, perform semantic coverage checks based on function mapping relationships to ensure that each function in the input source program has a corresponding function in the target architecture.

5. The method for parallelizing and reconstructing numerical computation programs based on multi-view semantic graph enhancement and adaptive iterative compilation according to claim 1, characterized in that, The "domain knowledge of general parallel numerical solvers" mentioned in step (3) includes a structured template set of various numerical computation paradigms, specifically including: 4.1) Standardized Data Container Template: Contains a set of data containers suitable for CUDA parallelization, namely: Global parameter container: used to store scalar physical parameters, time step control, and convergence threshold; Host-side domain data container: used to store computational domain topology information, mesh geometry properties, and variables that are computed only on the host side and reside in host memory; Device-side field data container: used to store high-frequency access physical field variables and intermediate calculation states residing in the device's video memory; this method automatically categorizes and fills the discrete variables in the original program into the above data container based on the variable analysis results; 4.2) Solution Process Template: A general computational process framework based on different numerical solution methods defined by standardized data containers; 4.3) Document organization standards: Define a directory structure that conforms to engineering standards; 4.4) Core function skeleton: Defines the necessary function signatures for different solution modes.

6. The method for parallelizing and reconstructing numerical computation programs based on multi-view semantic graph enhancement and adaptive iterative compilation according to claim 1, characterized in that, The "generation plan graph" mentioned in step (4) is a dynamic directed acyclic graph, whose node states include pending generation, generation in progress, verification in progress, error reporting, and completion. When generating a single function node, the header file definition, macro definition, sub-function signature, and mapping function corresponding to the original program of the file to which the node belongs are extracted as "code sketches" and input into the large language model as the generation context.

7. The method for parallelizing and reconstructing numerical computation programs based on multi-view semantic graph enhancement and adaptive iterative compilation according to claim 1, characterized in that, The "impact analysis" described in step (5) includes three propagation logics: 6.1) Internal logic changes: If the node repair only involves the internal logic of the function body and the signature remains unchanged, the impact will not be propagated, and only the current node will be updated; 6.2) Interface signature change: If node repair causes changes to function parameters or return values, then the status of all parent nodes that call that node will be reset to "pending generation"; 6.3) Data structure change: If node repair causes a change in the unified data structure definition, then the status of all nodes that depend on this data structure will be reset to "pending generation".

8. The method for parallel reconstruction of numerical computation programs based on multi-view semantic graph enhancement and adaptive iterative compilation according to claim 1, characterized in that, The "capture compilation errors and map them to specific graph nodes" mentioned in step (5) specifically means: parsing the error line number output by the compiler, using the abstract syntax tree to reverse locate the function definition node to which the line number belongs, and binding the compilation error information to the corresponding task node in the generation plan graph.

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