A method for configuring a re-timer and an electronic device

Abstract

The application discloses a re-timer configuration method and electronic equipment, relates to the technical field of signal transmission, and comprises the following steps: determining the current configuration state of a re-timer; in response to the current configuration state indicating that the re-timer is not powered on, waiting for a first time interval and then re-acquiring the configuration state of the re-timer; in response to the current configuration state indicating that the re-timer is powered on, acquiring the configuration progress of the re-timer; in the case that the configuration progress is not configured, performing initialization configuration on the re-timer; in the case that the configuration progress is the initialization configuration completed, performing a configuration operation of a channel side receiving link on the re-timer; and in the case that the configuration progress is the configuration operation of the channel side receiving link completed and the system driver is loaded, performing a configuration operation of a system side receiving link on the re-timer. The application solves the problem of low re-timer configuration efficiency in the prior art.

Description

Technical Field

[0001] This application relates to the field of signal transmission technology, and in particular to a method for configuring a re-timer and an electronic device. Background Technology

[0002] In the field of high-speed signal transmission technology, retimers, as a core component for physical layer signal enhancement, are widely used in high-end electronic devices such as servers and data center switches.

[0003] Currently, the configuration of retimers in the industry is typically initiated by the configuration control unit, with the basic process including initial parameter configuration and parameter debugging of the receiving and transmitting links. In practical applications, the execution effect of the existing configuration method is greatly affected by factors such as the hardware power-on status and the system driver loading progress. Due to the lack of effective means to identify the real-time status of the retimer, the configuration control unit may issue commands before the device has completed power-on, leading to configuration failure. At the same time, there is no effective record of the execution progress during the configuration process. If the configuration control unit unexpectedly restarts, the entire configuration process must be executed from the beginning, significantly extending the system startup time.

[0004] Therefore, the related technology suffers from the technical problem of low configuration efficiency of the retimer. Summary of the Invention

[0005] This application provides a method for configuring a re-timer and an electronic device to at least solve the problem of low configuration efficiency of re-timers in related technologies.

[0006] This application provides a method for configuring a re-timer, the method comprising: Determine the current configuration status of the retimer; In response to the current configuration state indicating that the retimer is not powered on, wait for a first time interval and then reacquire the configuration state of the retimer; In response to the current configuration status indicating that the retimer has been powered on, the configuration progress of the retimer is obtained; If the configuration progress is not configured, the re-timer is initialized. If the configuration progress indicates that initialization configuration has been completed, perform configuration operations on the channel-side receive link for the retimer; When the configuration progress indicates that the configuration operation of the channel-side receiving link has been completed and the system driver has been loaded, the configuration operation of the system-side receiving link is executed for the retimer.

[0007] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for implementing the configuration method of any of the above-described timers when executing the computer program.

[0008] This application also provides a computer-readable storage medium storing a computer program, wherein when the computer program is executed by a processor, it implements the steps of any of the above-described re-timer configuration methods.

[0009] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described retimer configuration methods.

[0010] This application first determines the current configuration status and progress of the retimer, avoiding the drawbacks of blindly initiating configurations in related technologies. The waiting and polling mechanism designed for the power-off state can avoid configuration failures when power-off, ensuring the accuracy of configuration timing. For different configuration progresses after power-on, differentiated operations are triggered for initialization configuration, channel-side receiving link configuration, and system-side receiving link configuration, realizing the orderly advancement of the configuration process. At the same time, the deep binding of configuration progress and configuration operations provides basic support for subsequent breakpoint resume configuration, effectively solving the pain point of having to perform configuration from scratch after the configuration control unit is unexpectedly restarted, greatly improving configuration efficiency and shortening system startup time. In addition, its phased configuration design for the channel-side and system-side receiving links can selectively filter the messy data generated in different startup stages, significantly optimizing the integrity and stability of high-speed signal transmission, ensuring that the retimer can fully play its signal shaping and compensation role under high-speed interface protocols, and adapting to the high-bandwidth and high-reliability data transmission requirements of high-end electronic devices such as servers and data centers. Attached Figure Description

[0011] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0012] Figure 1 This is one of the flowcharts illustrating a method for configuring a re-timer according to an embodiment of this application; Figure 2 A second schematic flowchart illustrating a method for configuring a re-timer provided in an embodiment of this application; Figure 3 A third flowchart illustrating a method for configuring a re-timer provided in this application embodiment; Figure 4 This is the fourth flowchart illustrating a re-timer configuration method provided in this application embodiment. Detailed Implementation

[0013] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0014] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0015] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0016] This application provides a method for configuring a retimer. The method is described in detail below, along with its execution flow. Figure 1 The diagram shown is a flowchart illustrating the configuration method for the retimer provided in this application. The specific steps include the following: S101. Determine the current configuration status of the re-timer.

[0017] Specifically, by synchronously reading the configuration status register and configuration progress register, the real-time running status of the retimer (whether the configuration conditions are met) is obtained, i.e., the current configuration status.

[0018] For example, the configuration status register is a dedicated storage unit for storing the power-on ready state of the retimer. Its output signal directly represents the two core states of "not powered on" or "powered on", ensuring that the configuration control unit can quickly determine whether the hardware has the configuration conditions.

[0019] In this embodiment, this step is the core data acquisition and decision-making basis for the dynamic configuration of the retimer. It breaks the limitation of related technologies that rely solely on a single state signal. By using dual registers to collaboratively read data, it achieves control over the entire lifecycle of the retimer configuration, providing data support for the dynamic adjustment of subsequent configuration strategies and ensuring the effectiveness of the configuration.

[0020] S102. In response to the current configuration status indicating that the retimer is not powered on, wait for the first time interval and then reacquire the configuration status of the retimer.

[0021] Specifically, in response to the "not powered on" invalid configuration state read by S101, instead of directly terminating the configuration or blindly retrying, a buffer logic of "waiting for the first time interval" was designed. This not only reserves sufficient power-on initialization time for the retimer, but also achieves continuous monitoring of the hardware status by "reacquiring the configuration status", forming a closed loop of "identifying invalid status - buffering and waiting - status re-checking" to avoid configuration anomalies caused by momentary misjudgment of the status.

[0022] For example, the first time interval is a preset parameter adapted to the power-on characteristics of the retimer hardware. Its value needs to be combined with the power-on startup timing specification of the retimer (usually in the millisecond to second range) to ensure that the retimer can complete key processes such as power stabilization and hardware initialization within this time. The operation of re-acquiring the configuration status is consistent with the reading logic of S101, that is, the latest status signal is read again through the communication between the configuration control unit and the configuration status register until the "power-on" status is detected or the preset retry limit is triggered.

[0023] In this embodiment, the invalid state adaptive handling technology of the retimer configuration solves the configuration failure problem caused by hardware power-on delay in related technologies through a dynamic adjustment mechanism of waiting and retrying, ensuring the matching of the configuration process with the hardware startup sequence and improving the robustness of the configuration process.

[0024] S103. In response to the current configuration status indicating that the retimer has been powered on, obtain the configuration progress of the retimer.

[0025] Specifically, based on the confirmation of the "power-on" status by S101, the historical data of the configuration progress register is further read to achieve a smooth transition from "status qualification judgment" to "configuration strategy decision". Its core logic is "only after the hardware is ready, the historical configuration progress is traced", ensuring the validity and reference value of the progress data, while providing a clear basis for judgment for the subsequent "new configuration" or "continued configuration" branch logic.

[0026] For example, by initiating a read command through the configuration control unit, the numerical signal returned by the configuration progress register is parsed to determine the current configuration stage of the re-timer. This progress data will be directly used to distinguish between different scenarios such as "configuration not started" (complete initialization needs to be performed) and "partially completed configuration" (incomplete nodes need to be continued), ensuring that subsequent configuration operations can match the actual configuration trajectory of the re-timer and avoid duplicate configuration or configuration omissions. The configuration progress register is a storage unit that records the configuration execution nodes in real time, and the values ​​stored in it correspond to different progress stages such as "not started", "not configured" and "initialization configuration completed".

[0027] In this embodiment, this step is a progress association technology under the effective state of retimer configuration. It establishes the association logic between the hardware ready state and the configuration execution progress, avoiding the inefficient mode of directly configuring from scratch after power-on in related technologies. This provides a basis for the formulation of subsequent differentiated configuration strategies and improves the pertinence and efficiency of the configuration process.

[0028] S104. If the configuration progress is not configured, initialize the re-timer configuration.

[0029] In this embodiment, this step is the core execution link of the retimer dynamic configuration process. By using the logic of "progress threshold triggering configuration", the drawback of "blind initialization after power-on" in related technologies is avoided. This ensures that the initialization operation is only performed under the valid condition that the retimer is "powered on + not configured", laying a stable parameter foundation for subsequent link configuration and improving the reliability of high-speed signal shaping and compensation functions.

[0030] Specifically, S104 above can be further refined into steps 1041 to 1049 as follows: Step 1041: Based on the identifier of the re-timer to be configured, determine the target level combination corresponding to the re-timer to be configured.

[0031] Specifically, this step is the "target selection pre-processing" of the initialization configuration, which is responsible for the "matching of the device to be configured with the control signal". It filters the corresponding level control signal by the unique identifier of the timer (such as phy0, phy1, phy2, phy3) and establishes the association between "device identity and control signal" to avoid subsequent configuration commands being sent to the wrong device. This is a prerequisite for ensuring the accuracy of multi-device configuration.

[0032] For example, the "identifier of the re-timer to be configured" is a pre-assigned unique number (e.g., 0~3 corresponds to 4 re-timers) and is stored in the cache of the configuration control unit; the "target level combination" is the high and low level combination of the general input / output interface (e.g., 00, 01, 10, 11), and each combination corresponds one-to-one with the identifier (e.g., identifier 0 corresponds to level combination 00). This mapping relationship is pre-set in the logic program of the configuration control unit and the output is quickly matched by looking up the table.

[0033] In this embodiment, the pain point of easily confusing targets in the configuration of multiple devices in related technologies is solved. By using a unique mapping of "identifier-level combination", multiple timers can be distinguished, providing a basis for the orderly execution of parallel configurations.

[0034] Step 1042: Send the target level combination to the general-purpose input / output interface.

[0035] Specifically, it receives the level combination decision result from 1041, converts the target level combination into an analog electrical signal and outputs it to the general-purpose input / output interface, completing the signal transmission between the "configuration control unit and the general-purpose input / output interface". It is the key execution link connecting the "target decision" and the "level verification", ensuring that the strobe signal can be accurately transmitted to the hardware interface.

[0036] In this embodiment, the matching result of "identifier-level" is converted into an electrical signal that can be recognized by the hardware, so as to enable the configuration control unit to select the target retimer and provide hardware support for the targeted issuance of subsequent configuration instructions.

[0037] Step 1043: After delaying the second time interval, determine the actual level combination of the general-purpose input / output interface.

[0038] Specifically, the validity of the level combinations sent by 1042 is verified, and transient errors caused by line interference and interface response delay are filtered out to ensure that the actual state of the general input / output interface is consistent with the target state, thus providing an accurate hardware status basis for subsequent targeted configuration.

[0039] In this embodiment, the jitter interference problem in the transmission of level signals is solved by delaying and waiting and secondary detection to ensure the stability of the gating signal, avoid misjudgment of target devices due to instantaneous level fluctuations, and improve the reliability of the configuration.

[0040] Step 1044: Determine the initialization configuration mode based on the preset configuration file.

[0041] Specifically, by reading specified fields in the preset configuration file, the optimal initialization mode for the current scenario is determined, providing guidance for subsequent parameter configuration and realizing the logical connection between "scenario requirements, configuration mode, and parameter distribution", ensuring that the initialization configuration matches the actual application requirements.

[0042] In this embodiment, the limitations of the fixed configuration mode in related technologies are broken, and different application scenarios (such as high-speed data transmission, signal testing, equipment debugging, etc.) are adapted by preset configuration files, thereby improving the versatility and scenario adaptability of the retimer.

[0043] Step 1045: Initialize and configure the retimer that matches the actual level combination with the target level combination based on the initialization configuration mode.

[0044] The initialization configuration mode includes any one of the following: retimer mode, bit multiplexing mode, remote loopback mode, broadcast mode, and mixed mode.

[0045] Specifically, it integrates the dual results of "target gating verification" and "mode decision", and only sends the corresponding mode configuration parameters to the target retimer that has successfully matched the level, avoiding configuration of incorrect or unstable devices, forming a complete closed loop of "gating-verification-mode-configuration", and ensuring the accuracy and effectiveness of the initialization operation.

[0046] For example, "based on initialization configuration mode" means calling the pre-stored parameter instruction set (such as the signal regeneration parameters corresponding to the re-timer mode and the test signal parameters corresponding to the remote loopback mode) according to the mode determined in step 1044; the specific operation of "initialization configuration" is to configure the control unit to write the parameter instructions into the corresponding register of the re-timer (such as the gain register and equalization register) through the communication link (such as I2C) and read the register readback value to confirm successful configuration.

[0047] In this embodiment, the scenario-based configuration mode is transformed into specific hardware parameters to initialize the retimer, ensuring that it can fully exert its signal enhancement function in the target scenario and guarantee the stability of high-speed data transmission.

[0048] Step 1046: In response to the inconsistency between the actual level combination and the target level combination, initiate the retry mechanism.

[0049] Specifically, for the verification error result 1043, the preset retry logic is initiated instead of directly terminating the process, realizing a closed-loop processing of "error identification - retry remedy - process continuation". This not only filters out momentary errors but also avoids overall configuration interruption caused by occasional anomalies, ensuring the stability of the configuration process.

[0050] In this embodiment, the drawback of terminating the configuration upon level verification failure in related technologies is addressed. A retry mechanism is used to improve the robustness of the configuration process, reduce the configuration failure rate caused by transient interference and interface fluctuations, and ensure the continuity of multi-device configuration.

[0051] Step 1047: Resend the target level combination to the general input / output interface, and verify the level combination again after a second time interval; if the verification fails for a preset number of consecutive times, output a configuration error prompt signal.

[0052] Specifically, repeat the core operations of steps 1042-1043, and set a fault tolerance threshold by setting a preset number of retries (e.g., 3 times) to distinguish between "instantaneous anomaly recovery" and "hardware fault identification". When the retries still fail after reaching the threshold, notify the operation and maintenance personnel through an anomaly prompt, forming a complete anomaly handling chain of "retry recovery - fault alarm".

[0053] In this embodiment, the hierarchical logic of "multiple retries - threshold termination - exception prompt" balances the requirements for configuration continuity and error avoidance. This can not only solve transient exceptions to the greatest extent, but also identify hardware faults (such as interface damage or device failure) in a timely manner, thereby improving the maintainability of the configuration process.

[0054] Step 1048: In response to a restart of the configuration control unit during the configuration process, re-determine the current configuration status and configuration progress of the retimer.

[0055] Specifically, for the special scenario of restarting the configuration control unit, the core logic of S101 (status + progress reading) is re-executed to achieve "hardware status reconstruction after restart", avoiding the loss of status information caused by restart, providing an accurate basis for subsequent judgment of "whether to continue and from where to continue", and ensuring the continuity of the configuration process.

[0056] In this embodiment, the pain point of configuration process being completely interrupted after the configuration control unit is restarted in related technologies and needs to be executed from the beginning is solved. By re-sensing the hardware status and progress after restarting, data support is provided for subsequent configuration to continue, thereby improving configuration efficiency.

[0057] Step 1049: If the configuration progress is not configured and the configuration progress is not in the unstarted state, continue the initialization configuration operation from the unfinished node corresponding to the configuration progress.

[0058] Specifically, following the status-progress reading results from step 1048, the system uses a dual-condition filtering of "not configured + not started" to accurately locate scenarios where "configuration was not completed before interruption" (such as restarting when configuring a certain parameter). The system then resumes the configuration from the corresponding node, avoiding the re-execution of completed steps and forming a complete recovery chain of "restart - status reconstruction - breakpoint continuation".

[0059] In this embodiment, the inefficient mode of reconfiguring from scratch after a restart in related technologies is broken. By accurately locating the incomplete configuration nodes, the configuration process can be seamlessly continued, which greatly shortens the configuration time after a restart and improves the system startup efficiency.

[0060] S105. If the configuration progress indicates that the initialization configuration has been completed, perform the configuration operation of the channel-side receiving link on the retimer.

[0061] In this embodiment, the limitation of directly activating the link after initialization in related technologies is broken. By configuring the channel-side receiving link in a targeted manner, the messy data remaining in the initialization stage is filtered out, the integrity of high-speed signal transmission is optimized, a stable foundation is laid for the system-side link configuration, and the signal quality requirements of high-speed protocols such as PCIe are adapted.

[0062] Specifically, the above S105 can be further refined into the following steps 1051 to 1053: Step 1051: When the configuration progress indicates that the initialization configuration has been completed, turn off the channel-side receivers of each retimer in sequence.

[0063] Specifically, by shutting down devices sequentially, the bus load fluctuations caused by the simultaneous shutdown of multiple devices are avoided. This ensures that the channel-side link of each retimer enters the shutdown state independently and smoothly, laying the foundation for subsequent unified buffering and waiting.

[0064] In this embodiment, by actively shutting down the channel-side receiver, the transmission path of the messy signals remaining in the initialization phase is cut off, ensuring the purity of the signal after the link restarts and avoiding interference signals from affecting the quality of high-speed data interaction.

[0065] Step 1052: After all the channel-side receivers of the retimer are turned off, wait for the third time interval, and then turn on all the channel-side receivers of each retimer in sequence.

[0066] Specifically, this step is the core execution link of S105, which integrates the logic chain of "full shutdown confirmation, buffer purification, and orderly startup". It not only reserves sufficient noise dissipation time for the channel-side link of the retimer, but also avoids signal conflicts caused by multiple links starting at the same time by starting them sequentially, thus achieving a smooth transition of the link from "shutdown reset" to "stable startup".

[0067] For example, the confirmation method for "all channel-side receivers of the retimer are off" is to configure the control unit to poll the RX status register of all retimers until all registers return a "successfully off" signal; the "third time interval" is a preset parameter for clutter dissipation (usually 5 seconds), which is controlled by the timer of the configuration control unit; the order of "sequentially turning on" is the same as the order of turning off. The turning-on operation is achieved by writing an "enable" instruction (such as 0x01 to indicate turning on) to the RX enable register. After turning on, it is necessary to confirm that the amplitude and phase of the link signal meet the preset standards.

[0068] In this embodiment, by buffering and waiting for the transient noise remaining after the filter is turned off, and then ensuring the signal stability after the link is restarted in an orderly manner, the problems of signal jitter and high bit error rate caused by direct link activation in related technologies are solved.

[0069] Step 1053: Update the configuration progress of the retimer.

[0070] Specifically, upon receiving the result of the channel-side receiving link configuration completion, the configuration progress is updated from "initialization configuration completed" to "channel-side receiving link configuration completed", realizing a closed loop between "link configuration operation" and "progress recording", providing a progress trigger condition for the start of S106.

[0071] In this embodiment, by updating the progress in real time, a clear decision basis is provided for the subsequent system-side link configuration, ensuring that the configuration process proceeds in an orderly manner in the order of "initialization, channel side, system side", and avoiding logical confusion in link configuration.

[0072] S106. When the configuration progress indicates that the configuration operation of the channel-side receiving link has been completed and the system driver has been loaded, the configuration operation of the system-side receiving link for the re-timer is executed.

[0073] In this embodiment, the problem of disconnect between system driver and hardware link configuration in related technologies is solved. By triggering the dual conditions of "channel side completion + driver loading", the system side receiving link configuration and system driver state are matched, maximizing the cooperative performance of high-speed signal transmission.

[0074] Specifically, the above S106 can be further refined into the following steps 1061 to 1062: Step 1061: When the configuration progress shows that the channel-side receiving link configuration operation has been completed and the system driver has been loaded, but the system-side receiving link configuration operation has not been executed, shut down and restart the system-side receivers of each retimer in sequence.

[0075] Specifically, the uniqueness and validity of the configuration operation are ensured by "triple condition verification" (completion on the channel side, driver loading, and no system-side configuration execution). Then, the system-side receiver is reset in a "sequential shutdown and restart" manner to achieve the coordination of "driver loading" and "link calibration" and ensure that the system-side link can quickly adapt to the driver requirements.

[0076] In this embodiment, by restarting the system-side receiver, the hardware link state is aligned with the loaded system driver parameters, eliminating the signal transmission bottleneck caused by the mismatch in link state after driver loading, and improving the overall high-speed data interaction efficiency of the system.

[0077] Step 1062: In response to the system-side receivers of each retimer completing the restart operation, update the system driver status and the retimer configuration progress.

[0078] Specifically, following the completion of the system-side receiver restart, the "system driver status" (from "loaded" to "adapted") and "configuration progress" (from "channel-side configuration completed" to "full configuration completed") are updated synchronously, realizing the complete logic of "link configuration - status synchronization - process closed loop", providing a basis for enabling the subsequent data transmission function of the system.

[0079] In this embodiment, by synchronously updating the driver status and configuration progress, the entire process of re-timer configuration is completed, providing a clear "ready signal" for the system to start high-speed data transmission, and ensuring that both hardware and software are in optimal collaborative state.

[0080] In this embodiment, in response to the completion of each stage of configuration, a corresponding configuration feedback signal is sent; the configuration status and configuration progress are updated synchronously based on the configuration feedback signal, which solves the problem of asynchronous configuration operation and status / progress update in related technologies. The feedback signal realizes a strong binding between "configuration operation completed" and "status / progress update", ensuring the traceability and accuracy of the configuration process and improving the robustness of system configuration.

[0081] For example, "Complete configuration of each stage" means that each core step (initialization, channel-side configuration, system-side configuration) has been executed and confirmed to be successful; "Send configuration feedback signal" means that the configuration control unit sends an interrupt signal or specific value feedback to the complex programmable logic device (or register control module); "Synchronously update configuration status and configuration progress" means that after receiving the feedback signal, the corresponding values ​​of the configuration status register (such as "Configuring" or "Completed at a certain stage") and the configuration progress register are updated according to preset rules. The update process must follow the register read / write timing and communication protocol.

[0082] In the above solution, the current configuration status and progress of the retimer are determined first, avoiding the drawbacks of blindly initiating configuration in related technologies. The waiting and polling mechanism designed for the power-off state can avoid the problem of configuration failure when power-off, ensuring the accuracy of configuration timing. For different configuration progress after power-on, differentiated operations are triggered for initialization configuration, channel-side receiving link configuration, and system-side receiving link configuration, realizing the orderly progress of the configuration process. At the same time, through the deep binding of configuration progress and configuration operation, a basic support is provided for subsequent breakpoint resume configuration, effectively solving the pain point that configuration control unit needs to be executed from scratch after unexpected restart, greatly improving configuration efficiency and shortening system startup time. In addition, its phased configuration design for channel-side and system-side receiving links can selectively filter the messy data generated in different startup stages, significantly optimizing the integrity and stability of high-speed signal transmission, ensuring that the retimer can fully play its signal shaping and compensation role under high-speed interface protocol, and adapting to the high bandwidth and high reliability data transmission requirements of high-end electronic devices such as servers and data centers.

[0083] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0084] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any of the above embodiments of the retimer configuration method.

[0085] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above embodiments of the re-timer configuration method when running.

[0086] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0087] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described retimer configuration method embodiments.

[0088] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described re-timer configuration method embodiments.

[0089] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0090] The configuration method and apparatus for a re-timer provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand the method and its core ideas. It should be noted that those skilled in the art can make several improvements and modifications to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A method for configuring a re-timer, characterized in that, The method includes: Determine the current configuration status of the retimer; In response to the current configuration state indicating that the retimer is not powered on, wait for a first time interval and then reacquire the configuration state of the retimer; In response to the current configuration status indicating that the retimer has been powered on, the configuration progress of the retimer is obtained; If the configuration progress is not configured, the re-timer is initialized. If the configuration progress indicates that initialization configuration has been completed, perform configuration operations on the channel-side receive link for the retimer; When the configuration progress indicates that the configuration operation of the channel-side receiving link has been completed and the system driver has been loaded, the configuration operation of the system-side receiving link is executed for the retimer.

2. The method according to claim 1, characterized in that, The initialization configuration of the retimer includes: Based on the identifier of the re-timer to be configured, determine the target level combination corresponding to the re-timer to be configured; Send the target level combination to the general-purpose input / output interface; After a second time interval delay, the actual level combination of the general-purpose input / output interface is determined; The re-timer that matches the actual level combination with the target level combination is initialized and configured.

3. The method according to claim 2, characterized in that, The initialization configuration of the retimer also includes: Determine the initialization configuration mode based on the preset configuration file; The target retimer is initialized and configured based on the initialization configuration mode, which includes any one of the following: retimer mode, bit multiplexing mode, remote loopback mode, broadcast mode, and mixed mode.

4. The method according to claim 2, characterized in that, The method further includes: In response to a discrepancy between the actual level combination and the target level combination, a retry mechanism is initiated. The target level combination is resent to the general input / output interface, and the level combination is checked again after the second time interval is delayed; if the level combination is inconsistent after a preset number of consecutive checks, a configuration error prompt signal is output.

5. The method according to claim 1, characterized in that, The initialization configuration of the retimer when the configuration progress is not configured includes: In response to a restart of the configuration control unit during configuration, the current configuration status and configuration progress of the retimer are redefined; If the configuration progress is not configured, and the configuration progress is not in a state of not started, the initialization configuration operation is continued from the unfinished node corresponding to the configuration progress.

6. The method according to claim 1, characterized in that, When the configuration progress indicates that initialization configuration is complete, the step of performing channel-side receive link configuration operations on the retimer includes: When the configuration progress indicates that initialization configuration has been completed, the channel-side receivers of each of the retimers are turned off sequentially. After all the channel-side receivers of the retimer are turned off, after waiting for a third time interval, all the channel-side receivers of each retimer are turned on in sequence. Update the configuration progress of the re-timer.

7. The method according to claim 1, characterized in that, When the configuration progress indicates that the configuration operation of the channel-side receiving link has been completed and the system driver has been loaded, the execution of the system-side receiving link configuration operation for the retimer includes: When the configuration progress indicates that the channel-side receiving link configuration operation has been completed and the system driver has been loaded, but the system-side receiving link configuration operation has not been executed, the system-side receivers of each of the retimers are sequentially shut down and restarted. In response to the system-side receivers of each of the retimers completing a restart operation, the system driver status and the configuration progress of the retimers are updated.

8. The method according to claim 1, characterized in that, The method further includes: Upon completion of each stage of configuration, a corresponding configuration feedback signal is sent. The configuration status and configuration progress are updated synchronously based on the configuration feedback signal.

9. The method according to claim 1, characterized in that, The method further includes: The current configuration status and configuration progress of the retimer are read from the configuration status register and the configuration progress register.

10. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the retimer configuration method as described in any one of claims 1 to 9 when executing the computer program.

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