Network-on-chip based adaptive congestion prevention flow control system, method and chip

Abstract

The disclosure provides a network-on-chip based adaptive congestion prevention flow control system, method and chip, and the system comprises: a network-on-chip provided with a service flow convergence node, a plurality of flow control components arranged at a plurality of service flow input nodes before the service flow convergence node, and a load monitoring component arranged at the service flow convergence node. The flow control component controls the bus bandwidth used by the service flow transmitted by the corresponding functional module through the network-on-chip according to the flow control signal sent by the load monitoring component; the load monitoring component performs flow monitoring on the plurality of service flows, obtains the bus load, and sends the flow control signal to the flow control component according to the bus load and the preset congestion parameter. The scheme of the disclosure does not need to optimize the bus architecture, feeds back the monitored bus load to the flow control component in a closed loop, adaptively adjusts the flow of the service flow input node, avoids bus congestion or bus idling, and improves the data transmission effect.

Description

Technical Field

[0001] This disclosure relates to the field of chip technology, and in particular to an adaptive anti-congestion flow control system, method, and chip based on on-chip network. Background Technology

[0002] In large-scale chip systems, such as system-on-a-chip (SoC), as chip integration increases, the system becomes increasingly complex. Numerous functional modules and components within a chip system need to communicate and exchange data via a bus, and different functional modules and components have different requirements for service flows, such as varying bandwidth and latency.

[0003] When multiple functional modules or components simultaneously initiate a large number of data transmission requests, these requests may exceed the parallel processing capacity of the bus, causing data transmission requests to be interfered with or even leading to system congestion.

[0004] Currently, to prevent system bus congestion, methods such as optimizing the bus architecture or flow control can be used. However, due to the increasing complexity and integration of systems, the requirements for bus architecture design are also becoming more stringent, making it difficult to optimize the bus architecture and effectively solve the bus congestion problem. On the other hand, using flow control may result in high-bandwidth services only occupying a portion of the system bandwidth when there is no bus contention, leading to resource waste and poor effectiveness in preventing bus congestion. Summary of the Invention

[0005] In view of this, the present disclosure provides an adaptive anti-congestion flow control system, method and chip based on on-chip network, which reduces the difficulty of preventing bus congestion, adaptively adjusts the bus bandwidth used by service flow, avoids bus congestion or bus bandwidth waste, and improves the efficiency of data transmission.

[0006] According to a first aspect of the present disclosure, an adaptive congestion prevention flow control system based on a network-on-a-chip (NAT) is provided, comprising: an NAT including a service flow aggregation node where multiple service flows are aggregated; multiple flow control components respectively disposed at multiple service flow input nodes preceding the service flow aggregation node; each flow control component being configured to control the bus bandwidth used by a functional module corresponding to the flow control component for transmitting service flows through the NAT based on a flow control signal sent by a load monitoring component; a load monitoring component being disposed at the service flow aggregation node; the load monitoring component being configured to monitor the flow of the multiple service flows aggregated at the service flow aggregation node, obtain the bus load, and send the flow control signal to the flow control component based on the bus load and a preset congestion parameter.

[0007] According to a second aspect of the present disclosure, an adaptive congestion prevention flow control method based on a network-on-chip (NIC) is provided, comprising: monitoring the flow of multiple service flows aggregated at a service flow aggregation node in a NIC to obtain a bus load; sending a flow control signal to a flow control component based on the bus load and preset congestion parameters; and controlling the bus bandwidth used by the functional module corresponding to the flow control component for the service flows transmitted through the NIC according to the flow control signal.

[0008] According to a third aspect of the present disclosure, a chip is provided, including an adaptive congestion prevention flow control system based on a network-on-chip as provided in the first aspect.

[0009] According to a fourth aspect of the present disclosure, an electronic device is provided, including an adaptive congestion prevention flow control system based on a network-on-a-chip as provided in the first aspect, or including a chip as provided in the third aspect.

[0010] According to a fifth aspect of the present disclosure, an electronic device is provided, including a processor, a memory, a communication interface, and a communication bus, wherein the processor, the memory, and the communication interface communicate with each other via the communication bus; the memory is used to store at least one executable instruction, which causes the processor to perform the method provided in the second aspect.

[0011] The adaptive congestion prevention flow control system based on on-chip network provided in this disclosure includes an on-chip interconnect network, multiple flow control components, and a load monitoring component. The on-chip interconnect network is used to transmit service flows, which are aggregated at a service flow aggregation node. The load monitoring component is located at the service flow aggregation node and obtains the bus load by monitoring the flow of multiple service flows aggregated at the aggregation node. Based on the bus load and preset congestion parameters, it sends a flow control signal to the flow control component. The flow control component is located at the service flow input node of the on-chip interconnect network and controls the bus bandwidth used by the service flow based on the flow control signal fed back by the load monitoring component. The adaptive congestion prevention flow control system based on on-chip network provided in this disclosure does not require optimization of the bus architecture. It forms a closed-loop flow monitoring and adjustment system through the flow control component and the load monitoring component, achieving adaptive adjustment of the flow at the service flow input node, avoiding bus congestion or bus idleness, and improving data transmission efficiency. Attached Figure Description

[0012] To more clearly illustrate the technical solutions in the embodiments or related technologies of this disclosure, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments recorded in the embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings.

[0013] Figure 1 A schematic diagram of an adaptive congestion prevention flow control system based on on-chip network provided in an embodiment of this disclosure;

[0014] Figure 2 Another schematic diagram of the adaptive congestion prevention flow control system based on on-chip network provided in the embodiments of this disclosure;

[0015] Figure 3 A schematic diagram of the structure of a load monitoring component provided in an embodiment of this disclosure;

[0016] Figure 4A A schematic diagram of a flow control component provided in an embodiment of this disclosure;

[0017] Figure 4B A schematic diagram of the relevant signals when the flow control component provided in the embodiments of this disclosure is in operation;

[0018] Figure 5 A flowchart of an adaptive congestion prevention flow control method based on on-chip network provided in an embodiment of this disclosure;

[0019] Figure 6 This is a schematic diagram of the structure of a chip or electronic device provided in an embodiment of this disclosure. Detailed Implementation

[0020] To enable those skilled in the art to better understand the technical solutions in the embodiments of this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art should fall within the protection scope of this disclosure.

[0021] Figure 1 This is a schematic diagram of a structure for an adaptive congestion prevention and flow control system based on an on-chip network provided in an embodiment of this disclosure. Figure 1 As shown, the adaptive congestion prevention and flow control system based on on-chip network provided in this embodiment includes:

[0022] The on-chip Internet 11 includes a service flow aggregation node 12, where multiple service flows are aggregated.

[0023] Multiple flow control components 13. Each flow control component 13 is configured at multiple service flow input nodes preceding the service flow aggregation node 12. The flow control components 13 are used to control the bus bandwidth used by the service flows transmitted through the on-chip interconnect network 11 by the functional module 21 corresponding to the flow control component 13 according to the flow control signals sent by the load monitoring component 14.

[0024] The load monitoring component 14 is located at the service flow aggregation node 12. The load monitoring component 14 is used to monitor the traffic of multiple service flows aggregated at the service flow aggregation node 12, obtain the bus load, and send a flow control signal to the flow control component 13 according to the bus load and preset congestion parameters.

[0025] It should be noted that this embodiment does not limit the structure of the on-chip Internet 11, the type of service flow transmitted in the on-chip Internet 11, the number and location of the service flow aggregation nodes 12 in the on-chip Internet 11, or the number and type of service flows aggregated at the service flow aggregation nodes 12.

[0026] An on-chip interconnect, also known as an interconnect, is used in computer systems to connect different components (also called functional modules) to ensure efficient data transmission and communication. This connection can be physical or logical, depending on the system design and requirements. The primary function of an on-chip interconnect is to manage and coordinate the data flow between various components in the system, ensuring accurate information transmission and processing.

[0027] For example, Figure 2 This is another schematic diagram of the adaptive congestion prevention flow control system based on on-chip network provided in this disclosure embodiment. Compared to Figure 1 , Figure 2 The on-chip interconnect network 11 shown has a multi-level transmission structure, including a front-end bus, a second-level bus, and a back-end bus. There are two service flow aggregation nodes 12, each equipped with a load monitoring component 14. Optionally, in... Figure 2 In the structure of the front-end bus and the second-level bus, there may also be a service flow aggregation node, which is equipped with a load monitoring component.

[0028] The types of on-chip interconnects 11 include, but are not limited to, at least one of the following: Network on Chip (NoC) bus, Network Interface Card (NIC) bus, CCN bus (CoreLink Cache Coherent Network Interconnect), Cache Coherent Interconnect (CCI) bus, etc. A NoC bus is a mesh bus. A NIC bus is a crossbar (cross-connected switch matrix) structured bus interconnect, generally used when there are few master and slave devices, and data can reach the slave device within a few clock cycles.

[0029] Optionally, at least two service flows being aggregated at service flow aggregation node 12 may be of different types. It is understood that when bus congestion or bus bandwidth contention exists, high-bandwidth, high-latency service data may consume a significant amount of bus bandwidth, thus blocking the data transmission of low-bandwidth, low-latency services. The adaptive anti-congestion flow control system based on on-chip network provided in this embodiment is particularly suitable for this scenario.

[0030] The adaptive congestion prevention and flow control system based on on-chip network provided in this embodiment works as follows:

[0031] The service stream sent by functional module 21 is transmitted through the on-chip interconnect network 11. Service streams have various types. In one implementation, from the perspective of transmission latency, the types of service streams include, but are not limited to: low-latency services, medium-high latency services, and high-latency services. Here, "high" and "low" latency are relative concepts. Low-latency services have high latency requirements, meaning they require relatively small transmission latency. Correspondingly, high-latency services have low latency requirements and can tolerate larger transmission latency. This embodiment does not limit the specific latency range for different types of service streams; the latency range can be set according to actual needs to classify services of different latency types. In another implementation, from the perspective of service bandwidth usage, the types of service streams include, but are not limited to: high-bandwidth services, medium-bandwidth services, and low-bandwidth services. High bandwidth and low bandwidth are relative terms. This embodiment does not limit the specific bandwidth range for different bandwidth types of service streams; the bandwidth range can be set according to actual needs to classify services of different bandwidth types. Generally, medium-high latency services are characterized by high bandwidth, while low-latency services are characterized by low bandwidth. For example, direct memory access (DMA) data transfer and high-speed interface data such as peripheral component interconnect express (PCIE) belong to high bandwidth and high latency services; instruction / data spoofing of central processing unit (CPU) core users belongs to low latency services.

[0032] In some implementations, preset high-bandwidth or low-bandwidth service types are defined, and the type of service determines whether it is a high-bandwidth or low-bandwidth service. In other implementations, a preset bandwidth value is set, and the bus bandwidth used by the service flow is compared with the preset bandwidth value to determine whether it is a high-bandwidth or low-bandwidth service. For example, if the bus bandwidth used by the service flow is greater than the preset bandwidth value, it is a high-bandwidth service.

[0033] The on-chip interconnect network 11 includes multiple service flow aggregation nodes 12, where multiple service flows converge. A load monitoring component 14 is installed at each service flow aggregation node 12. The load monitoring component 14 obtains the bus load by monitoring the traffic of the multiple service flows converged at the aggregation node 12. The bus load reflects whether the bus is congested and, if so, the degree of congestion. The load monitoring component 14 sends a flow control signal to the flow control component 13 based on the bus load and preset congestion parameters. If the bus load indicates that the bus is not congested or the risk of congestion is very low, the flow control signal can instruct the service flows to use a larger bus bandwidth to avoid wasting bus resources. If the bus load indicates bus congestion, the flow control signal can instruct the service flows to use different bus bandwidths depending on the degree of congestion to avoid bus congestion.

[0034] The flow control component 13 is located at the service flow input node, which is situated before the service flow aggregation node 12. The flow control component 13 receives flow control signals from the load monitoring component 14 and controls the bus bandwidth used by the corresponding functional module of the flow control component for service flows transmitted via the on-chip interconnect network based on these signals.

[0035] As can be seen, the adaptive congestion prevention flow control system based on on-chip network provided in this embodiment sets up a flow control component at the service flow input node of the on-chip interconnect network and a load monitoring component at the service flow aggregation node where multiple service flows converge. Without optimizing the bus architecture, a closed-loop flow monitoring and adjustment system is formed through the flow control component and the load monitoring component. The bus load monitored by the load monitoring component is fed back to the flow control component in a closed loop, realizing adaptive adjustment of the flow at the service flow input node, avoiding bus congestion or bus idleness, and improving data transmission efficiency.

[0036] Optionally, in one implementation, the bus load is an outstanding parameter.

[0037] In computer science, the "outstanding" parameter is a type of bus parameter, representing the number of pending transactions. Related parameters include burst length, which plays a crucial role in data transmission. Burst length determines how many data items can be transferred at once within a memory transaction. A well-chosen burst length can significantly improve memory throughput, especially for large-scale data read / write operations. "Outstanding" indicates the number of incomplete requests that can be submitted to memory simultaneously within a given time period, or the number of unfinished requests allowed on the path. By appropriately setting the outstanding parameter, the parallelism of memory can be fully utilized, thereby achieving efficient data read / write operations in the system.

[0038] In this implementation, the load monitoring component 14 monitors the traffic of multiple service flows aggregated at the service flow aggregation node 12 to obtain the "outstanding" value at that node. During data transmission, a large "outstanding" value may lead to resource contention and bus congestion. That is, if multiple service flows (or data transmission requests) are waiting for a response at the service flow aggregation node 12 simultaneously, it may increase the latency of the service flows, especially since high-bandwidth services can easily block low-bandwidth services. The larger the "outstanding" value, the higher the risk of bus congestion. Therefore, based on the "outstanding" value and preset congestion parameters, the load monitoring component 14 can determine the degree of risk of bus congestion and send a flow control signal to the flow control component 13, enabling the flow control component 13 to adaptively adjust the traffic of the service flow input nodes according to the flow control signal.

[0039] Optionally, in one implementation, the bus load can be bandwidth. Generally, the greater the bandwidth used by the service flow, the higher the probability of resource contention and bus congestion.

[0040] Optionally, the bus load can be the sum of the bus bandwidth used by multiple service flows that are converged at the service flow convergence node 12.

[0041] In this implementation, the bus load is the sum of the bus bandwidth used by the service flows. The load monitoring component can determine the risk level of bus congestion based on the sum of the bus bandwidth used by the service flows and the preset congestion parameters, and send a flow control signal to the flow control component.

[0042] Optionally, in one implementation, the bus load can be transmission delay. Generally, a larger transmission delay indicates a higher probability of resource contention and bus congestion.

[0043] Optionally, in one implementation, the bus load can be the backpressure rate. During data processing, when the rate at which upstream nodes produce data exceeds the rate at which downstream nodes consume data, the accumulated data reaching the downstream nodes will increase, resulting in backpressure. The backpressure rate reflects the system's degree of control over the upstream data production rate. Generally, a higher backpressure rate indicates a higher probability of resource contention and bus congestion.

[0044] For ease of explanation, this embodiment uses bus load as the over-transmission parameter as an example.

[0045] It should be noted that different bus loads correspond to different preset congestion parameters. For example, if the bus load is the sum of the bus bandwidth used by the service flows, then the preset congestion parameter will be a different value of the bus bandwidth.

[0046] Optionally, in one implementation, the load monitoring component 14 is used for:

[0047] A first flow control component is determined among multiple flow control components 13. The first service flow transmitted by the functional module corresponding to the first flow control component is a preset high-bandwidth service type or the bus bandwidth used by the first service flow is greater than a preset bandwidth value.

[0048] Based on the bus load and preset congestion parameters, a flow control signal is sent to the first flow control component.

[0049] In this implementation, the functional module corresponding to the first flow control component transmits high-bandwidth services. Among multiple flow control components, the first flow control component is determined, and it generates flow control signals for high-bandwidth services. Since high-bandwidth services occupy a large amount of bus bandwidth, adjusting the actual bus bandwidth used by these services is easier to change the bus congestion situation, even when the bus is not congested or congested to varying degrees, thereby improving the efficiency of bus transmission regulation.

[0050] Optionally, in one implementation, the preset congestion parameters include multiple threshold values, with different threshold values ​​indicating different levels of bus congestion. The flow control component 13 has multiple preset bandwidth levels.

[0051] The load monitoring component 14 is used to determine the flow control signal based on the bus load and multiple threshold values, and send the flow control signal to the first flow control component.

[0052] The first flow control component is used to determine the target bandwidth level among multiple bandwidth levels based on the flow control signal, and to control the bus bandwidth used by the first service flow based on the target bandwidth level.

[0053] In this implementation, the load monitoring component compares the bus load with multiple threshold values ​​to determine the flow control signal. This flow control signal is then sent to the first flow control component to adjust the actual bus bandwidth used by high-bandwidth services. The flow control signal corresponds to multiple preset bandwidth levels in the flow control component. Therefore, based on the target bandwidth level corresponding to the flow control signal, the actual bus bandwidth used by the first service is adjusted, improving the efficiency of bus transmission regulation.

[0054] Optionally, in one implementation, the flow control component 13 has multiple bandwidth levels preset according to the preset high-bandwidth service type.

[0055] The first flow control component is used to determine the target bandwidth level among multiple bandwidth levels corresponding to the type of the first service flow based on the flow control signal.

[0056] For example, suppose there are two types of high-bandwidth services: Type 1 and Type 2. Type 1 high-bandwidth services have four bandwidth tiers, from tier 11 to tier 14. Type 2 high-bandwidth services have four bandwidth tiers, from tier 21 to tier 24. Assume that flow control component A transmits Type 1 service flows, and flow control component B transmits Type 2 service flows.

[0057] Then, the flow control component A is used to determine the target bandwidth level among the levels 11 to 14 corresponding to the high bandwidth service of type 1 based on the flow control signal fed back by the load monitoring component. For example, if it is level 12, the flow control component A is used to control the bus bandwidth used by the service flow of type 1 according to level 12.

[0058] Similarly, the flow control component B is used to determine the target bandwidth level among levels 21 to 24 corresponding to the high bandwidth service of type 2 based on the flow control signal fed back by the load monitoring component. For example, if it is level 22, the flow control component B is used to control the bus bandwidth used by the service flow of type 2 based on level 22.

[0059] By setting multiple bandwidth levels corresponding to different service types in the flow control component, the actual bus bandwidth used by high-bandwidth services is adjusted according to the target bandwidth level corresponding to the flow control signal fed back by the load monitoring component for different service types, thereby further improving the efficiency of bus transmission regulation.

[0060] Optionally, in one implementation, the multiple threshold values ​​include a first threshold value, a second threshold value, and a third threshold value that increase sequentially, and the multiple bandwidth levels include a first bandwidth level, a second bandwidth level, and a third bandwidth level that decrease sequentially.

[0061] When the first threshold value < bus load < second threshold value, the flow control signal corresponds to the first bandwidth level.

[0062] When the second threshold value is less than the bus load and the third threshold value is less than the third threshold value, the flow control signal corresponds to the second bandwidth level.

[0063] When the bus load is greater than the third threshold, the flow control signal corresponds to the third bandwidth level.

[0064] Specifically, the first threshold < the second threshold < the third threshold, and the first bandwidth level > the second bandwidth level > the third bandwidth level.

[0065] If the first threshold value is less than the bus load value and less than the second threshold value, it indicates that the system is under medium load and the risk of bus congestion is moderate. The flow control component sets the flow control to the first bandwidth level and controls the bus bandwidth used by the service flow based on the higher value of the first bandwidth level. For example, if the bus bandwidth used by the service flow does not exceed the value of the first bandwidth level, it can meet the high-performance scenarios of high-bandwidth services.

[0066] If the second threshold is less than the bus load and less than the third threshold, it indicates that the system is under heavy load and the risk of bus congestion is high. The flow control component sets the flow control to the second bandwidth level, and controls the bus bandwidth used by the service flow according to the lower value of the second bandwidth level, which can meet the normal performance requirements of high-bandwidth services.

[0067] A bus load exceeding the third threshold indicates that the system is under heavy load, with an extremely high risk of bus congestion. The flow control component sets the flow control to the third bandwidth level, controlling the bus bandwidth used by transmitted service flows based on the lower third bandwidth level. This sacrifices the performance of high-bandwidth services while still meeting basic functional requirements.

[0068] Optionally, in one implementation, the multiple bandwidth tiers may also include a fourth bandwidth tier, which indicates the bus bandwidth used without limiting the traffic flow.

[0069] When the bus load is less than the first threshold, the flow control signal corresponds to the fourth bandwidth level.

[0070] Specifically, if the bus load is less than the first threshold, it indicates that the system is under light load and the risk of bus congestion is very low. The flow control component sets the flow control to the fourth bandwidth level, which means that the bus bandwidth used by the transmitted service flow is not limited, or in other words, the flow control function is turned off, and high-bandwidth services can use the bus bandwidth without restriction.

[0071] It should be noted that this embodiment does not limit the values ​​of the above-mentioned thresholds and bandwidth levels.

[0072] It should be noted that in this embodiment, the bus bandwidth can also be referred to as the system bandwidth.

[0073] The structure of the load monitoring component and the flow control component in this embodiment will be described below. For example, the bus load is the overload parameter.

[0074] For example, Figure 3 This is a schematic diagram of a load monitoring component provided in an embodiment of this disclosure. Figure 3 As shown, the load monitoring component includes: a read cache module 141, a write cache module 142, a monitoring module 143, and a decision module 144.

[0075] The read cache module 141 is used to cache the over-issue requests of read data services in multiple business flows that are aggregated at the business flow aggregation node 12.

[0076] The write cache module 142 is used to cache the over-issue requests of write data services in multiple business flows that are aggregated at the business flow aggregation node 12.

[0077] The monitoring module 143 is used to monitor the over-sending requests in the read cache module 141 and the write cache module 142 to obtain the bus load.

[0078] The decision module 144 is used to send the flow control signal to the flow control component based on the bus load and preset congestion parameters.

[0079] Specifically, the on-chip interconnect network includes a read bus and a write bus. For multiple service flows aggregated at the service flow aggregation node 12, if the service flow is a read data service flow, it is transmitted through the read bus; if the service flow is a write data service flow, it is transmitted through the write bus. The read cache module 141 caches over-transmission requests for read data services from multiple service flows. Over-transmission requests include commands and data. The read cache module 141 has a storage capacity limit; the more over-transmission requests stored in the read cache module 141, the higher the probability of congestion. The monitoring module 143 monitors the over-transmission requests stored in the read cache module 141 to obtain a first load value, which is the first over-transmission parameter for the read data service. Similarly, the write cache module 142 caches over-transmission requests for write data services from multiple service flows. The monitoring module 143 monitors the over-transmission requests stored in the write cache module 142 to obtain a second load value, which is the second over-transmission parameter for the write data service. The monitoring module 143 obtains the bus load based on the first and second over-transmission parameters. Optionally, the bus load can be determined based on a first over-transmission parameter, for example, the bus load is specifically the first over-transmission parameter; or, the bus load can be determined based on a second over-transmission parameter, for example, the bus load is specifically the second over-transmission parameter; or, the bus load can be determined based on both the first and second over-transmission parameters, for example, the bus load is the sum of the first and second over-transmission parameters; or, the bus load is the average or weighted average determined based on the first and second over-transmission parameters. In this embodiment, the weighting coefficient is not limited. After obtaining the bus load, the decision module 144 sends the flow control signal to the flow control component based on the bus load and the preset congestion parameters.

[0080] For example, Figure 4A This is a schematic diagram of a flow control component provided in an embodiment of this disclosure. Figure 4A As shown, the flow control component includes a timer 131 and a flow limiter 132.

[0081] Timer 131 is used to receive flow control signals from load monitoring component 14 and request signals from the bus, and to send timing signals to current limiter 132 according to the flow control signals and request signals. The request signal indicates that there is a requesting service flow initiating transmission on the on-chip interconnection network in the current period, and the start or stop of timer 131 can be controlled by the request signal.

[0082] The current limiter 132 receives flow control signals from the load monitoring component 14 and timing signals from the timer 131, generates a response signal corresponding to the request signal based on the flow control signals and timing signals, and sends the response signal to the bus. The response signal is used to control the bus bandwidth used by the functional module corresponding to the flow control component to transmit service flows through the on-chip interconnect network.

[0083] Specifically, the bus refers to the part of the on-chip interconnect network corresponding to the flow control component. Timer 131 counts according to the clock cycle. Taking the flow control signals corresponding to the first and second bandwidth levels as an example, combined with... Figure 4B The working principle of the flow control component is illustrated by an example, wherein the first bandwidth level is greater than the second bandwidth level. For example... Figure 4A and Figure 4B As shown, when the request signal is high, it indicates that a requesting service flow has initiated transmission on the on-chip interconnect. Timer 131 counts according to the clock cycle. If the flow control signal received by timer 131 from the load monitoring component 14 corresponds to the first bandwidth level, timer 131 counts according to the clock cycle and outputs a timing signal, represented as timing signal 1. Timing signal 1 counts cyclically every 4 clock cycles. Current limiter 132 generates response signal 1 based on timing signal 1, and outputs a high-level signal in the last clock cycle of the cyclic counting of timing signal 1 every 4 clock cycles. When response signal 1 is high, data flow is allowed to be transmitted through the on-chip interconnect. Similarly, if the flow control signal received by timer 131 from the load monitoring component 14 corresponds to the second bandwidth level, timer 131 counts according to the clock cycle and outputs a timing signal, represented as timing signal 2. Timing signal 2 counts cyclically every 8 clock cycles. The current limiter 132 generates a response signal 2 based on the timing signal 2. It outputs a high-level signal in the last clock cycle of the cyclic counting of the timing signal 2 every 8 clock cycles. When the response signal 2 is a high-level signal, the data stream is allowed to be transmitted through the on-chip interconnect network.

[0084] like Figure 4B As shown, response signal 1 outputs a high-level signal cyclically for 3 clock cycles, and response signal 2 outputs a high-level signal cyclically for 7 clock cycles. Compared to response signal 2, response signal 1 has a shorter output period for its high-level signal, meaning it allows for a longer transmission time of the data stream through the on-chip interconnect. This enables the control of the bus bandwidth used by the functional modules corresponding to the flow control component to transmit service flows through the on-chip interconnect.

[0085] Figure 5 This is a flowchart illustrating an adaptive congestion-prevention flow control method based on on-chip networks provided in an embodiment of this disclosure. Figure 5 As shown, the adaptive congestion prevention flow control method based on on-chip network provided in this embodiment includes:

[0086] S301. Perform traffic monitoring on multiple service flows aggregated at the service flow aggregation node in the on-chip interconnect network to obtain the bus load.

[0087] S302. Send a flow control signal to the flow control component based on the bus load and preset congestion parameters.

[0088] S303. Through the flow control component, the bus bandwidth used by the service flow transmitted through the on-chip interconnect network is controlled according to the flow control signal.

[0089] Optionally, sending a flow control signal to the flow control component based on the bus load and preset congestion parameters includes:

[0090] A first flow control component is determined among multiple flow control components; wherein, the type of the first service flow transmitted by the functional module corresponding to the first flow control component is a preset high bandwidth service type or the bus bandwidth used by the first service flow is greater than a preset bandwidth value.

[0091] Based on the bus load and preset congestion parameters, the flow control signal is sent to the first flow control component.

[0092] Optionally, the preset congestion parameters include multiple threshold values, with different threshold values ​​indicating different bus congestion levels; the flow control component has multiple preset bandwidth levels;

[0093] The step of basing the bus load on the preset congestion parameters includes:

[0094] The flow control signal is determined based on the bus load and the plurality of threshold values;

[0095] The step of controlling the bus bandwidth used by the functional module corresponding to the flow control component to transmit service flows through the on-chip interconnect network according to the flow control signal includes:

[0096] The target bandwidth level is determined from the plurality of bandwidth levels according to the flow control signal, and the bus bandwidth used by the first service flow is controlled according to the target bandwidth level.

[0097] Optionally, determining the target bandwidth level among the plurality of bandwidth levels based on the flow control signal includes:

[0098] The target bandwidth level is determined from multiple bandwidth levels corresponding to the type of the first service flow based on the flow control signal.

[0099] Optionally, the plurality of threshold values ​​include a first threshold value, a second threshold value, and a third threshold value that increase sequentially, and the plurality of bandwidth levels include a first bandwidth level, a second bandwidth level, and a third bandwidth level that decrease sequentially.

[0100] When the first threshold value is less than the bus load and the second threshold value, the flow control signal corresponds to the first bandwidth level;

[0101] When the second threshold value is less than the bus load and the third threshold value, the flow control signal corresponds to the second bandwidth level.

[0102] When the bus load is greater than the third threshold, the flow control signal corresponds to the third bandwidth level.

[0103] Optionally, the plurality of bandwidth levels may further include a fourth bandwidth level, which is used to indicate the bus bandwidth used without limiting the service flow.

[0104] When the bus load is less than the first threshold, the flow control signal corresponds to the fourth bandwidth level.

[0105] Optionally, the bus load is an overload parameter.

[0106] Optionally, the bus load is the sum of the bus bandwidths used by multiple service flows that are converged at the service flow convergence node.

[0107] The adaptive congestion prevention flow control method based on on-chip network provided in this embodiment can be applied to the adaptive congestion prevention flow control system based on on-chip network provided in this disclosure embodiment. The technical principles and technical effects are similar, and will not be repeated here.

[0108] Figure 6 This is a schematic diagram of the structure of a chip or electronic device provided in an embodiment of this disclosure. For example... Figure 6 As shown, the chip or electronic device may include the adaptive congestion prevention flow control system 512 based on on-chip network provided in the embodiments of this disclosure.

[0109] Optional, refer to Figure 6 The chip or electronic device may also include: processor 502, communications interface 504, memory 506, and communications bus 508.

[0110] in:

[0111] The processor 502, communication interface 504, and memory 506 communicate with each other via communication bus 508.

[0112] Communication interface 504 is used to communicate with other electronic devices or servers.

[0113] Processor 502 is used to execute program 510.

[0114] Specifically, program 510 may include program code that includes computer operation instructions.

[0115] Processor 502 may be a CPU, an Application Specific Integrated Circuit (ASIC), or one or more integrated circuits configured to implement embodiments of this disclosure. The smart device may include one or more processors of the same type, such as one or more CPUs; or it may include processors of different types, such as one or more CPUs and one or more ASICs.

[0116] Memory 506 is used to store program 510. Memory 506 may include high-speed RAM memory, and may also include non-volatile memory, such as at least one disk storage device.

[0117] Program 510 may include multiple computer instructions.

[0118] It should be noted that, depending on the implementation needs, the various components / steps described in the embodiments of this disclosure can be broken down into more components / steps, or two or more components / steps or parts of the operation of components / steps can be combined into new components / steps to achieve the purpose of the embodiments of this disclosure.

[0119] The methods described above according to embodiments of this disclosure can be implemented in hardware, firmware, or as software or computer code that can be stored in a recording medium (such as a CD-ROM, RAM, floppy disk, hard disk, or magneto-optical disk), or as computer code originally stored on a remote recording medium or a non-transitory machine-readable medium and subsequently stored on a local recording medium, downloaded over a network. Thus, the methods described herein can be stored on a recording medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware (such as an Application Specific Integrated Circuit (ASIC) or a Field Programmable Gate Array (FPGA)). It is understood that the computer, processor, microprocessor controller, or programmable hardware includes storage components (e.g., Random Access Memory (RAM), Read-Only Memory (ROM), Flash Memory, etc.) capable of storing or receiving software or computer code, which, when accessed and executed by the computer, processor, or hardware, implements the methods described herein. Furthermore, when a general-purpose computer accesses code used to implement the methods shown herein, the execution of the code transforms the general-purpose computer into a dedicated computer for performing the methods shown herein.

[0120] Those skilled in the art will recognize that the units and method steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the embodiments disclosed herein.

[0121] The above embodiments are only used to illustrate the embodiments of this disclosure, and are not intended to limit the embodiments of this disclosure. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the embodiments of this disclosure. Therefore, all equivalent technical solutions also fall within the scope of the embodiments of this disclosure, and the patent protection scope of the embodiments of this disclosure should be defined by the claims.

Claims

1. An adaptive congestion prevention flow control system based on on-chip network, characterized in that, include: An on-chip interconnection network, the on-chip interconnection network including a service flow aggregation node, at which multiple service flows are aggregated; Multiple flow control components are respectively located at multiple service flow input nodes before the service flow aggregation node; each flow control component is used to control the bus bandwidth used by the functional module corresponding to the flow control component to transmit the service flow through the on-chip interconnection network according to the flow control signal sent by the load monitoring component. The load monitoring component is located at the service flow aggregation node; the load monitoring component is used to monitor the traffic of multiple service flows aggregated at the service flow aggregation node, obtain the bus load, and send the traffic control signal to the traffic control component according to the bus load and preset congestion parameters.

2. The system according to claim 1, characterized in that, The load monitoring component is used for: A first flow control component is determined among the plurality of flow control components; wherein, the type of the first service flow transmitted by the functional module corresponding to the first flow control component is a preset high bandwidth service type or the bus bandwidth used by the first service flow is greater than a preset bandwidth value. Based on the bus load and preset congestion parameters, the flow control signal is sent to the first flow control component.

3. The system according to claim 2, characterized in that, The preset congestion parameters include multiple threshold values, with different threshold values ​​indicating different bus congestion levels; the flow control component has multiple preset bandwidth levels; The load monitoring component is used to determine the flow control signal based on the bus load and the plurality of threshold values, and send the flow control signal to the first flow control component. The first flow control component is used to determine a target bandwidth level among the plurality of bandwidth levels according to the flow control signal, and to control the bus bandwidth used by the first service flow according to the target bandwidth level.

4. The system according to claim 3, characterized in that, The flow control component has multiple bandwidth levels preset according to the preset high-bandwidth service types; The first flow control component is used to determine the target bandwidth level among multiple bandwidth levels corresponding to the type of the first service flow based on the flow control signal.

5. The system according to claim 3, characterized in that, The plurality of threshold values ​​include a first threshold value, a second threshold value, and a third threshold value that increase sequentially, and the plurality of bandwidth levels include a first bandwidth level, a second bandwidth level, and a third bandwidth level that decrease sequentially; When the first threshold value is less than the bus load and the second threshold value, the flow control signal corresponds to the first bandwidth level; When the second threshold value is less than the bus load and the third threshold value, the flow control signal corresponds to the second bandwidth level. When the bus load is greater than the third threshold, the flow control signal corresponds to the third bandwidth level.

6. The system according to claim 5, characterized in that, The plurality of bandwidth levels also includes a fourth bandwidth level, which is used to indicate the bus bandwidth used without limiting the service flow. When the bus load is less than the first threshold, the flow control signal corresponds to the fourth bandwidth level.

7. An adaptive congestion-prevention flow control method based on on-chip networks, characterized in that, include: Traffic monitoring is performed on multiple service flows aggregated at the service flow aggregation node in the on-chip interconnect network to obtain the bus load; The flow control signal is sent to the flow control component according to the bus load and the preset congestion parameters. The flow control component controls the bus bandwidth used by the service flow transmitted through the on-chip interconnect network by the corresponding functional module of the flow control component according to the flow control signal.

8. The method according to claim 7, characterized in that, Sending a flow control signal to the flow control component based on the bus load and preset congestion parameters includes: A first flow control component is determined among multiple flow control components; wherein, the type of the first service flow transmitted by the functional module corresponding to the first flow control component is a preset high bandwidth service type or the bus bandwidth used by the first service flow is greater than a preset bandwidth value. Based on the bus load and preset congestion parameters, the flow control signal is sent to the first flow control component.

9. The method according to claim 8, characterized in that, The preset congestion parameters include multiple threshold values, with different threshold values ​​indicating different bus congestion levels; the flow control component has multiple preset bandwidth levels; The step of basing the bus load on the preset congestion parameters includes: The flow control signal is determined based on the bus load and the plurality of threshold values; The step of controlling the bus bandwidth used by the functional module corresponding to the flow control component to transmit service flows through the on-chip interconnect network according to the flow control signal includes: The target bandwidth level is determined from the plurality of bandwidth levels according to the flow control signal, and the bus bandwidth used by the first service flow is controlled according to the target bandwidth level.

10. A chip, characterized in that, include: The adaptive congestion prevention flow control system based on on-chip network as described in any one of claims 1-6.

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