Sub-pixel, display panel and display device comprising the same

Abstract

The present application relates to a sub-pixel, a display panel, and a display device including the same. The present application discloses a display panel capable of eliminating dark spots without repair and a display device including the same. The display panel includes a plurality of sub-pixels disposed at intersections of a plurality of gate lines and a plurality of data lines, a first light emitting element and a second light emitting element disposed in each of the sub-pixels, a first pixel circuit configured to individually drive the first light emitting element, and a second pixel circuit configured to individually drive the second light emitting element.

Description

Technical Field

[0001] This disclosure relates to a display device, and more specifically, for example, but not limited to, a subpixel, a display panel capable of eliminating dark spots in a display device without repair, and a display device including the display panel. Background Technology

[0002] Image display devices that display various types of information on screens are a core technology of the information and communication age, and are evolving into thinner, lighter, more portable, and higher-performance display devices. Therefore, display devices that can be manufactured with a lightweight and thin structure have become the focus.

[0003] Specific examples of such display devices include liquid crystal display (LCD) devices, quantum dot display (QD) devices, field emission display (FED) devices, and organic light-emitting diode (OLED) display devices.

[0004] OLED displays are self-emissive display devices, and they are not only advantageous in terms of power consumption due to low-voltage operation, but also superior in terms of color reproduction, response speed, viewing angle and contrast ratio (CR).

[0005] Recently, a light-emitting display device has been developed in which a first light-emitting element and a second light-emitting element are arranged in parallel for each sub-pixel, such that even if one of the light-emitting elements fails to emit light due to a defect, the other will still emit light, thereby reducing or preventing reliability degradation caused by defective pixels.

[0006] The descriptions provided in the Background section should not be assumed to be prior art simply because they are mentioned in or associated with the Background section. The Background section may include information describing one or more aspects of the subject matter art. Summary of the Invention

[0007] Therefore, this disclosure relates to a display panel and a display device including the display panel, which substantially eliminates one or more problems caused by the limitations and disadvantages of related technologies.

[0008] The purpose of this disclosure is to provide a display panel capable of eliminating dark spots in a display panel without repair, and a display device including the display panel, wherein a first light-emitting element and a second light-emitting element are provided for each sub-pixel in the display panel.

[0009] Additional advantages, objects, and features of this disclosure will be set forth in part in the description which follows, and will also be apparent in part to those skilled in the art upon examination of the following, or may be learned from practice of this disclosure. The objects and other advantages of this disclosure may be realized and obtained by means of the structures particularly pointed out in the written description, its claims, and the accompanying drawings.

[0010] To achieve these objectives and other advantages and in accordance with the purposes of this disclosure, as embodied and broadly described herein, the display panel includes a plurality of sub-pixels disposed at the intersection of a plurality of gate lines and a plurality of data lines, a first light-emitting element and a second light-emitting element disposed in each of the sub-pixels, a first pixel circuit configured to individually drive the first light-emitting element, and a second pixel circuit configured to individually drive the second light-emitting element.

[0011] In another exemplary aspect of this disclosure, a display device includes: a display panel; a controller configured to process externally input image data to adapt to the size and resolution of the display panel, and to generate a gating drive control signal and a data drive control signal using an external timing signal; a gating drive circuit configured to operate according to the gating drive control signal and to sequentially provide gating signals to a plurality of gating lines of the display panel; and a data drive circuit configured to convert the image data processed by the controller to generate a data voltage in response to the data drive control signal, and to provide the data voltage to a plurality of data lines of the display panel synchronously with the gating signal.

[0012] Specific details of other exemplary embodiments are included in the detailed embodiments and accompanying drawings.

[0013] It should be understood that the foregoing general description and the following detailed description of this disclosure are exemplary and illustrative, and are intended to provide further explanation of the claimed disclosure. Attached Figure Description

[0014] The accompanying drawings, included to provide a further understanding of this disclosure and incorporated in and forming part of this application, illustrate embodiments of this disclosure and, together with the description, serve to explain the principles of this disclosure. In the drawings:

[0015] Figure 1 This is a block diagram illustrating a display device according to an exemplary embodiment of the present disclosure;

[0016] Figure 2 This is a circuit diagram illustrating a sub-pixel circuit in a display device according to an exemplary embodiment of the present disclosure;

[0017] Figure 3 This is a circuit diagram illustrating a sub-pixel circuit in a display device according to another exemplary embodiment of the present disclosure; and

[0018] Figure 4 This is a diagram illustrating the layout of subpixels in a display device according to another exemplary embodiment of the present disclosure.

[0019] Throughout the accompanying drawings and detailed description, unless otherwise described, the same reference numerals should be understood to refer to the same elements, features, and structures. For clarity, illustration, and convenience, the relative dimensions and depictions of these elements may be exaggerated. Detailed Implementation

[0020] In the following description, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. Throughout the specification, the same reference numerals refer to substantially the same parts.

[0021] In the following description, detailed descriptions of known technologies associated with this disclosure will be omitted if they would unnecessarily obscure the gist of this disclosure. Additionally, the component names used in the following description are chosen for ease of writing and may differ from the names of parts in the actual product.

[0022] The advantages and features of this disclosure, and its implementation methods, will be illustrated by the following exemplary embodiments described with reference to the accompanying drawings. However, this disclosure may be embodied in different forms and should not be construed as limited to the exemplary embodiments set forth herein. Rather, these exemplary embodiments are provided to make this disclosure sufficiently thorough and complete to assist those skilled in the art in fully understanding its scope. Furthermore, this disclosure is limited only by the scope of the claims.

[0023] The shapes (e.g., dimensions, lengths, widths, heights, thicknesses, positions, radii, diameters, and areas), ratios, angles, quantities, etc., shown in the drawings to describe various embodiments of this disclosure are given by way of example only, and therefore, this disclosure is not limited to the illustrations in the drawings. Throughout the specification, the same reference numerals refer to substantially the same parts.

[0024] In the following description, detailed descriptions of known techniques associated with this disclosure will be omitted if they would unnecessarily obscure the gist of this disclosure.

[0025] In this disclosure, when the terms "comprising," "including," etc., are used, other elements may be added unless the term "only" is used. Unless the context clearly indicates otherwise, the singular form is intended to include the plural form as well.

[0026] In the explanation of components included in the various embodiments of this disclosure, unless explicitly described otherwise, the component is to be interpreted as including a range of error. Any embodiment described herein as "example" is not necessarily to be construed as preferred or advantageous over other embodiments.

[0027] In describing various embodiments of this disclosure, when describing positional relationships, for example, when using terms such as "above," "over," "below," "side," etc. to describe the positional relationship between two parts, one or more other parts may be located between the two parts, unless the terms "directly" or "immediately adjacent" are used.

[0028] In describing various embodiments of this disclosure, when describing temporal relationships, for example, when using terms such as "after," "next," "next," "before," etc., to describe temporal sequence relationships, discontinuous cases may also be included, unless "immediately following" or "directly" is used.

[0029] Terms such as “below,” “lower,” “above,” and “upper” may be used herein to describe the relationships between items as shown in the accompanying figures. It should be understood that these terms are spatially relative and based on the orientation depicted in the figures.

[0030] In the description of the various embodiments of this disclosure, although terms such as "first," "second," "A," "B," "(a)," and "(b)" may be used to describe various elements, these terms are only used to distinguish the same or similar elements from each other. Therefore, in this specification, unless otherwise stated, within the scope of the technology of this disclosure, an element modified by "first" may be the same as an element modified by "second."

[0031] The term “at least one” should be understood to include any and all combinations of one or more of the related listed items. For example, “at least one of the first, second and third elements” means a combination of all three listed elements, a combination of any two of the three elements, and each individual element, the first element, the second element or the third element.

[0032] The features in the various embodiments of this disclosure can be combined in whole or in part, and can be operated technically or in combination, and the various embodiments can be implemented independently of each other or can be implemented in combination.

[0033] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which the exemplary embodiments pertain. It should also be understood that terms such as those defined in common dictionaries shall be interpreted as having a meaning consistent, for example, with their meaning in the context of the relevant field, and shall not be interpreted in an idealized or overly formal sense unless expressly defined herein. For example, the terms “part” or “unit” may be applied to, for example, a single circuit or structure, an integrated circuit, a computational block of a circuit device, or any structure configured to perform the described functions, as would be understood by one of ordinary skill in the art.

[0034] In the following description, a display device according to an exemplary embodiment of the present disclosure will be described with reference to the accompanying drawings.

[0035] Figure 1 This is a block diagram illustrating a display device according to an exemplary embodiment of the present disclosure.

[0036] like Figure 1 As shown, an exemplary embodiment of the present disclosure of a light-emitting display device includes: a light-emitting display panel 110, which includes a plurality of pixels; a controller 120; a gating drive circuit 140, which provides a gating signal to each of the plurality of pixels; a data drive circuit 130, which provides a data signal to each of the plurality of pixels; and a power supply (not shown), which provides a high-level drive voltage and a low-level drive voltage, etc.

[0037] Display panel 110 may include active regions containing a plurality of pixels, and passive regions configured to completely or partially surround the active regions. As an example, the passive regions may extend from the active regions. As an example, the passive regions may be at least partially or completely invisible from the front side of display panel 110, for example, by bending towards the rear side of display panel 110, but are not limited thereto. As another example, the entire passive region may be flat. As an example, gating drive circuit 140 or data drive circuit 130 may be disposed in the passive regions, but are not limited thereto.

[0038] Display panel 110 includes multiple gate lines GL1 to GLm and multiple data lines DL1 to DLn intersecting the multiple gate lines GL1 to GLm. As an example, each of the multiple pixels is connected to one of the multiple gate lines GL1 to GLm and one of the multiple data lines DL1 to DLn. For example, each pixel receives a gating signal from gating drive circuit 140 via a gating line and receives a data signal from data drive circuit 130 via a data line.

[0039] Here, scan signals or emission control signals can be provided through gating lines GL1 to GLm, and data voltage Vdata can be provided through data lines DL1 to DLn. Furthermore, according to various exemplary embodiments, each gating line may include multiple scan lines providing scan signals and emission control lines providing emission control signals. Additionally, as an example, multiple pixels may receive a reference voltage and an initialization voltage, but are not limited thereto.

[0040] Display panel 110 can be implemented as a non-transparent display panel or a transparent display panel. A transparent display panel can be applied to a transparent display device in which an image is displayed on the screen and the actual background is visible. Display panel 110 can be manufactured as a flexible light-emitting display panel or a rigid light-emitting display panel. Flexible display panels can be implemented as OLED display panels using a plastic substrate or a thin glass substrate, but are not limited thereto. As an example, the plastic substrate can be made of any of polyethylene terephthalate (PET), polycarbonate (PC), acrylonitrile-butadiene-styrene copolymer (ABS), polymethyl methacrylate (PMMA), polyimide (PI), etc., but is not limited thereto.

[0041] The plurality of pixels of the display panel 110 may include at least a first pixel, a second pixel, and a third pixel. The first pixel, the second pixel, and the third pixel may emit light of different colors. For example, the first pixel may be a red pixel, the second pixel may be a green pixel, and the third pixel may be a blue pixel. The implementation is not limited thereto. As an example, pixels of other colors such as white, cyan, magenta, or yellow may be included alternatively or additionally. As an example, the plurality of pixels of the display panel 110 may include three, four, or more pixels capable of emitting light of different colors.

[0042] Multiple pixels can have the same color or different colors. Considering factors such as the lifetime or color balance of the light-emitting elements (OLEDs) included in each of the first, second, and third pixels, the sizes of the first, second, and third pixels can be designed differently, or they can be designed to be the same.

[0043] A touch sensor may be optionally disposed on the display panel 110. Touch input may be sensed using a separate touch sensor or by pixels. The touch sensor may be implemented as an on-cell or additional type touch sensor disposed on the screen of the OLED display panel, or as an in-cell type touch sensor built into the OLED display panel 110.

[0044] The controller 120 processes externally input image data (RGB) to suit the size and resolution of the display panel 110, and provides it to the data driving circuit 130. The controller 120 uses externally input timing signals CS (such as dot clock signals, data enable signals, horizontal sync signals, and vertical sync signals) to generate a gating drive control signal GDC and a data drive control signal DDC. By providing the generated gating drive control signal GDC and data drive control signal DDC to the gating drive circuit 140 and the data drive circuit 130, the controller 120 controls the gating drive circuit 140 and the data drive circuit 130.

[0045] Depending on the device to be installed in the display device, the controller 120 can be configured to be combined with various processors (such as microprocessors, mobile processors, and application processors).

[0046] The host system can be any of the following: TV system, set-top box, navigation system, personal computer (PC), home theater system, mobile device, wearable device, and vehicle system.

[0047] As an example, controller 120 can multiply the input frame frequency by i and control the operation timing of the OLED display panel driver at a frame frequency of input frame frequency × i (i is a positive integer greater than 0) Hz. As an example, the input frame frequency can be 60 Hz in the case of NTSC (National Television Standards Committee) and 50 Hz in the case of PAL (Phase Alternating Line), but is not limited to these.

[0048] As an example, controller 120 generates signals that allow pixels to be driven at various refresh rates. As an example, controller 120 may generate drive-related signals that allow pixels to be driven in a variable refresh rate (VRR) mode, or to switch between a first refresh rate and a second refresh rate. For example, controller 120 may drive pixels at various refresh rates by simply changing the rate of a clock signal, generating a synchronization signal to create horizontal or vertical spacing, or driving the gating drive circuit 140 in a masked manner, but is not limited to these methods.

[0049] The data driving circuit 130 receives image data DATA and a data driving control signal DDC from the controller 120. In response to the data driving control signal DDC from the controller 120, the data driving circuit 130 converts the image data DATA into a gamma-compensated voltage to generate a data voltage Vdata, and supplies the data voltage Vdata to the data lines DL1 to DLn of the display panel 110 synchronously with the scan signal. As an example, the data driving circuit 130 can be connected to the data lines of the display panel 110 via COG (Chip-on-Glass) technology, TAB (Tab with Auto-Deposition) technology, COP (Chip-on-Plate) technology, or COF (Chip-on-Film) technology, or it can be directly formed on the display panel, but is not limited to these methods.

[0050] The gating drive circuit 140 operates according to the gating drive control signal GDC to generate gating signals. Then, the gating drive circuit 140 sequentially provides gating signals to gating lines GL1 to GLm. As an example, the gating drive circuit 140 can be directly formed on the lower substrate of the display panel 110 in a GIP (Gating In-Panel Driver) structure, or it can be separately disposed in a separate panel and connected to the display panel 110 (e.g., a pad portion) using, for example, a tape-on-board (TAB) method, a chip-on-glass (COG) method, a chip-on-panel (COP) method, or a chip-on-film (COF) method, but is not limited thereto. As an example, the gating drive circuit 140 can be formed in an active area where an image is displayed on the display panel 110, or it can be formed in a non-active area outside the active area. The non-active area can include a border area, or it can be the same as the border area.

[0051] Figure 2 This is a circuit diagram illustrating a sub-pixel circuit in a display device according to an exemplary embodiment of the present disclosure.

[0052] To reduce or prevent reliability degradation due to defective pixels, sub-pixels according to exemplary embodiments of this disclosure may include a first light-emitting element LED1 and a second light-emitting element LED2 connected in parallel.

[0053] For example, a sub-pixel according to an exemplary embodiment of this disclosure may include a switching transistor TR1, a sensing transistor TR2, a driving transistor DR, a first light-emitting element LED1 and a second light-emitting element LED2, and a storage capacitor Cst. The embodiment is not limited thereto. As an example, depending on the design, at least one of the above components (e.g., the sensing transistor TR2) may be omitted. As an example, one or more components (e.g., one or more transistors or one or more capacitors) may also be included, but this is not a limitation.

[0054] The first light-emitting element LED1 and the second light-emitting element LED2 can be connected in parallel and operate to emit light according to the drive current generated by the drive transistor DR. Each of the first light-emitting element LED1 and the second light-emitting element LED2 may include an anode, a cathode, and a light-emitting layer inserted between the anode and the cathode.

[0055] The switching transistor TR1 can perform a switching operation in response to the scan signal Scan provided via the gate line GL, causing the data voltage Vdata provided via the data line DL to be stored in the storage capacitor Cst. The storage capacitor Cst can maintain the data voltage for a specific period (e.g., one frame).

[0056] The driving transistor DR can operate in response to the data voltage stored in the storage capacitor Cst, causing a constant driving current to flow between the high-level power line EVDD and the low-level power line EVSS.

[0057] The sensing transistor TR2 can be operated to sense the threshold voltage of the driving transistor DR.

[0058] As an example, the transistor constituting each sub-pixel can be implemented as an oxide thin-film transistor including an oxide semiconductor layer. Oxide thin-film transistors are advantageous for large-area display panels 110 when considering electron mobility, process variations, etc. This disclosure is not limited thereto, and the semiconductor layer of the transistor can be formed of amorphous silicon or polycrystalline silicon, compound semiconductors, organic semiconductors, etc. As an example, the transistor constituting each sub-pixel can be implemented as an N-type thin-film transistor or a P-type thin-film transistor.

[0059] Each subpixel can be divided into red, green, and blue subpixels for color implementation, but is not limited to this. Each subpixel may also include a white subpixel.

[0060] In the display device according to the exemplary embodiment of this disclosure configured as described above, a first light-emitting element LED1 and a second light-emitting element LED2 are provided in parallel for each sub-pixel. Therefore, even if one of the first light-emitting element LED1 and the second light-emitting element LED2 fails to emit light due to a defect, the other can still emit light. Thus, reliability degradation caused by defective pixels can be reduced or prevented. Furthermore, due to the improved reliability, increases in manufacturing costs and manufacturing time caused by repair processes can be reduced or prevented.

[0061] However, in the case of a top-emitting display panel, a short circuit may occur between the anode and cathode of the light-emitting element because the transparent electrode is used as the cathode.

[0062] If a short circuit occurs between the anode and cathode of one of the first light-emitting elements LED1 and the second light-emitting element LED2 connected in parallel, neither LED1 nor LED2 may emit light. For example, the driving current passes through the light-emitting element with its anode and cathode short-circuited, so the driving current is not supplied to the other light-emitting element. Therefore, neither LED1 nor LED2 will emit light.

[0063] Furthermore, even if the repair process successfully performs the repair process that cuts off the path of the driving current supplied to the light-emitting elements that are short-circuited between the anode and cathode in the first light-emitting element LED1 and the second light-emitting element LED2, half-darkening will occur, and darkening will occur if the repair process fails.

[0064] To address this problem, a display device according to another exemplary embodiment of the present disclosure may have sub-pixels that each include a first light-emitting element LED1 and a second light-emitting element LED2, and may drive the first light-emitting element LED1 and the second light-emitting element LED2 respectively.

[0065] Figure 3 This is a circuit diagram illustrating a sub-pixel circuit in a display device according to another exemplary embodiment of the present disclosure.

[0066] like Figure 3 As shown, a sub-pixel of a display device according to another exemplary embodiment of the present disclosure may include a first light-emitting element LED1 and a second light-emitting element LED2 that operate separately, a first pixel circuit (DR1, TR1, TR2 and Cst1) that drives the first light-emitting element LED1 separately, and a second pixel circuit (DR2, TR3, TR4 and Cst2) that drives the second light-emitting element LED2 separately.

[0067] The first light-emitting element LED1 is operable to emit light according to the drive current generated by the first drive transistor DR1. The second light-emitting element LED2 is operable to emit light according to the drive current generated by the second drive transistor DR2.

[0068] Each of the first light-emitting element LED1 and the second light-emitting element LED2 may include an anode, a cathode, and a light-emitting layer inserted between the anode and the cathode.

[0069] The first switching transistor TR1 can perform a switching operation in response to the scan signal Scan provided by the gating line GL, such that the data voltage Vdata provided by the data line DL is stored in the first storage capacitor Cst1. The second switching transistor TR3 can perform a switching operation in response to the scan signal Scan provided by the gating line GL, such that the data voltage Vdata provided by the data line DL is stored in the second storage capacitor Cst2.

[0070] The first storage capacitor Cst1 and the second storage capacitor Cst2 can maintain the data voltage for a specific period (e.g., one frame).

[0071] The first driving transistor DR1 can operate in response to the data voltage stored in the first storage capacitor Cst1 to allow a constant driving current to flow between the high-level power line EVDD and the low-level power line EVSS. Therefore, the first driving transistor DR1 can provide driving current to the first light-emitting element LED1.

[0072] The second driving transistor DR2 can operate in response to the data voltage stored in the second storage capacitor Cst2 to allow a constant drive current to flow between the high-level power line EVDD and the low-level power line EVSS. Therefore, the second driving transistor DR2 can provide drive current to the second light-emitting element LED2.

[0073] The first sensing transistor TR2 is operable to sense the threshold voltage of the first driving transistor DR1. For example, the first sensing transistor TR2 can operate in response to a sensing signal Sense provided via the gate line GL to sense the threshold voltage of the first driving transistor DR1.

[0074] The second sensing transistor TR4 can be operated to sense the threshold voltage of the second driving transistor DR2. For example, the second sensing transistor TR4 can operate in response to a sensing signal Sense provided via a gate line GL to sense the threshold voltage of the second driving transistor DR2. Although it is shown that the sensing signal Sense and the scan signal Scan are provided via the same gate line GL, the implementation is not limited to this. As an example, the sensing signal Sense and the scan signal Scan can be provided via separate gate lines GL. As an example, the first switching transistor TR1 and the second switching transistor TR3 can operate in response to a scan signal Scan provided via one gate line, while the first sensing transistor TR2 and the second sensing transistor TR4 can operate in response to a sensing signal Sense provided via another gate line, but are not limited to this.

[0075] This will be described in more detail below.

[0076] The first driving transistor DR1 has a gate electrode electrically connected to the first node N1, a first electrode electrically connected to the high-level power supply line EVDD, and a second electrode electrically connected to the second node N2.

[0077] A first storage capacitor Cst1 is electrically connected between a first node N1 and a second node N2. A first light-emitting element LED1 is electrically connected between the second node N2 and a low-level power line (e.g., ground) EVSS. A first switching transistor TR1 has a gate electrode electrically connected to a gating line GL, a first electrode electrically connected to a data line DL, and a second electrode electrically connected to the first node N1.

[0078] The first sensing transistor TR2 has a gate electrode electrically connected to the gate line GL, a first electrode electrically connected to the reference voltage line Vref, and a second electrode electrically connected to the second node N2.

[0079] The second driving transistor DR2 has a gate electrode electrically connected to the third node N3, a first electrode electrically connected to the high-level power line EVDD, and a second electrode electrically connected to the fourth node N4.

[0080] The second storage capacitor Cst2 is electrically connected between the third node N3 and the fourth node N4.

[0081] The second light-emitting element LED2 is electrically connected between the fourth node N4 and the low-level power line (e.g., ground) EVSS.

[0082] The second switching transistor TR3 has a gate electrode electrically connected to the gate line GL, a first electrode electrically connected to the data line DL, and a second electrode electrically connected to the third node N3.

[0083] The second sensing transistor TR4 has a gate electrode electrically connected to the gate line GL, a first electrode electrically connected to the reference voltage line Vref, and a second electrode electrically connected to the fourth node N4.

[0084] The layout of subpixels of a display device according to another exemplary embodiment of the present disclosure, configured in this manner, will now be described.

[0085] Figure 4 This is a diagram illustrating the layout of subpixels of a display device according to another exemplary embodiment of the present disclosure.

[0086] like Figure 4 As shown, the high-level power line EVDD, the data line DL, and the reference voltage line Vref are connected in parallel. For example, the high-level power line EVDD, the data line DL, and the reference voltage line Vref can be arranged in the Y-axis direction (e.g., extended).

[0087] The gating line GL is positioned (e.g., extended) in a direction perpendicular to the high-level power line EVDD, the data line DL, and the reference voltage line Vref. For example, the gating line GL can be positioned (e.g., extended) in the X-axis direction.

[0088] As an example, the first light-emitting element LED1 and the second light-emitting element LED2 can be respectively positioned on the upper and lower sides in the Y-axis direction, but are not limited thereto. As an example, the first light-emitting element LED1 and the second light-emitting element LED2 can be positioned on the upper and lower sides of the center line of the sub-pixel, but are not limited thereto. As an example, the first light-emitting element LED1 and the second light-emitting element LED2 can be arranged in a line in the Y-axis direction, or they can be arranged to intersect in the X-axis direction, but are not limited thereto. As an example, the first light-emitting element LED1 and the second light-emitting element LED2 can be arranged in directions other than the Y-axis direction, but are not limited thereto.

[0089] The first switching transistor TR1 and the second switching transistor TR3 can be arranged side-by-side in the Y-axis direction (e.g., the vertical direction relative to the center line of the sub-pixel), and the first sensing transistor TR2 and the second sensing transistor TR4 can also be arranged side-by-side in the Y-axis direction, but are not limited thereto. As an example, the first switching transistor TR1 and the first sensing transistor TR2 can be arranged side-by-side in the X-axis direction, and the second switching transistor TR3 and the second sensing transistor TR4 can also be arranged side-by-side in the X-axis direction, but are not limited thereto. As an example, the first switching transistor TR1 and the second switching transistor TR3, as well as the first sensing transistor TR2 and the second sensing transistor TR4, can be disposed between the first light-emitting element LED1 and the second light-emitting element LED2, but are not limited thereto. As an example, the first switching transistor TR1 and the second switching transistor TR3 can share the same active layer, and the first sensing transistor TR2 and the second sensing transistor TR4 can also share the same active layer, but are not limited thereto.

[0090] The first driving transistor DR1 and the second driving transistor DR2 can be positioned on the upper and lower sides in the Y-axis direction. As an example, the first driving transistor DR1 and the second driving transistor DR2 can be positioned on the upper and lower sides of the center line of the sub-pixel, but are not limited thereto. As an example, the first driving transistor DR1 can be positioned on the upper side of the first light-emitting element LED1, and the second driving transistor DR2 can be positioned on the lower side of the second light-emitting element LED2, but are not limited thereto.

[0091] The reference voltage line Vref can be electrically connected to the first electrode of the first sensing transistor TR2 and the first electrode of the second sensing transistor TR4 via the reference voltage bridge line Vref-Br.

[0092] The data line DL can be electrically connected to the first electrode of the first switching transistor TR1 and the first electrode of the second switching transistor TR3 via the data bridge wiring DL-Br.

[0093] The gate line GL can be electrically connected to the gate electrodes of the first switching transistor TR1, the second switching transistor TR3, the first sensing transistor TR2, and the second sensing transistor TR4 via the gate bridge wire GL-Br.

[0094] The high-level power line EVDD can be electrically connected to the first electrode of the first driving transistor DR1 and the first electrode of the second driving transistor DR2 via the high-level power line EVDD-Br.

[0095] The second electrode of the first switching transistor TR1 can be electrically connected to the gate electrode of the first driving transistor DR1, and the second electrode of the second switching transistor TR3 can be electrically connected to the gate electrode of the second driving transistor DR2.

[0096] The second electrode of the first driving transistor DR1 and the second electrode of the first sensing transistor TR2 can be formed integrally, and the second electrode of the second driving transistor DR2 and the second electrode of the second sensing transistor TR4 can be formed integrally, but not limited thereto.

[0097] The second electrode of the first switching transistor TR1 and the second electrode of the first driving transistor DR1 and the first sensing transistor TR2 can overlap to form the first storage capacitor Cst1, and the second electrode of the second switching transistor TR3 and the second electrode of the second driving transistor DR2 and the second sensing transistor TR4 can overlap to form the second storage capacitor Cst2, but not limited thereto.

[0098] The first light-emitting element LED1 can be electrically connected to the second electrode formed integrally with the first driving transistor DR1 and the first sensing transistor TR2, and the second light-emitting element LED2 can be electrically connected to the second electrode formed integrally with the second driving transistor DR2 and the second sensing transistor TR4.

[0099] For example, the anode of the first light-emitting element LED1 can be electrically connected to a second electrode integrally formed by the first driving transistor DR1 and the first sensing transistor TR2, and the cathode of the first light-emitting element LED1 can be electrically connected to a low-level power supply line. Figure 4 Not shown in the image, see reference. Figure 3 (Grounding terminal).

[0100] The anode of the second light-emitting element LED2 can be electrically connected to the second electrode integrally formed by the second driving transistor DR2 and the second sensing transistor TR4, and the cathode of the second light-emitting element LED2 can be electrically connected to a low-level power supply line. Figure 4 Not shown in the image, see reference. Figure 3 (Grounding terminal).

[0101] As described above, since the first light-emitting element LED1 and the second light-emitting element LED2 are disposed in each sub-pixel, and the first light-emitting element LED1 and the second light-emitting element LED2 are driven by different pixel circuits, the display panel according to another exemplary embodiment of the present disclosure can eliminate dark spots without a separate repair process.

[0102] According to this disclosure, a first light-emitting element and a second light-emitting element are provided in each sub-pixel, and the first and second light-emitting elements are driven by different pixel circuits. Therefore, even if a short circuit occurs between the anode and cathode of one of the first and second light-emitting elements, the other light-emitting element will still operate, thus eliminating dark spots without a separate repair process. Furthermore, as an example, in normal operation, the first and second light-emitting elements provided in each sub-pixel can operate simultaneously or individually, but are not limited to this. Moreover, although two light-emitting elements are described or shown in each sub-pixel, the implementation is not limited to this. As an example, there can be three or more light-emitting elements in each sub-pixel. As an example, the three or more light-emitting elements included in each sub-pixel can be driven individually by corresponding pixel circuits, or at least two of the three or more light-emitting elements included in each sub-pixel can be driven jointly by the same pixel circuit.

[0103] It will be apparent to those skilled in the art that various modifications and variations can be made to this disclosure without departing from its spirit or scope. Therefore, this disclosure is intended to cover such modifications and variations as long as they fall within the scope of the appended claims and their equivalents.

[0104] Cross-references to related applications

[0105] This application claims priority and benefit to Korean Patent Application No. 10-2024-0180312, filed on December 6, 2024, which is incorporated herein by reference in its entirety for all purposes, as if fully set forth herein.

Claims

1. A display panel, the display panel comprising: Multiple sub-pixels, wherein the multiple sub-pixels are disposed at the intersection of multiple gate lines and multiple data lines; A first light-emitting element and a second light-emitting element are disposed in each of the sub-pixels; A first pixel circuit, configured to drive the first light-emitting element independently; as well as The second pixel circuit is configured to drive the second light-emitting element independently.

2. The display panel according to claim 1, wherein, The first pixel circuit includes: A first switching transistor, configured to store a data voltage in a first storage capacitor in response to a scan signal; and A first driving transistor is configured to provide a driving current to the first light-emitting element in response to the data voltage stored in the first storage capacitor.

3. The display panel according to claim 2, wherein, The second pixel circuit includes: A second switching transistor, configured to store a data voltage in a second storage capacitor in response to the scan signal; and A second driving transistor is configured to provide a driving current to the second light-emitting element in response to the data voltage stored in the second storage capacitor.

4. The display panel according to claim 3, wherein, The first light-emitting element and the second light-emitting element are respectively positioned on the upper and lower sides of the center line of each sub-pixel in the vertical direction.

5. The display panel according to claim 3, wherein, The first pixel circuit further includes a first sensing transistor configured to sense a threshold voltage of the first driving transistor in response to a sensing signal. The second pixel circuit also includes a second sensing transistor configured to operate in response to the sensing signal to sense a threshold voltage of the second driving transistor.

6. The display panel according to claim 5, wherein, The first switching transistor and the second switching transistor are arranged side by side in the vertical direction. The first sensing transistor and the second sensing transistor are arranged side by side in the vertical direction, and The first driving transistor and the second driving transistor are disposed on the upper and lower sides in the vertical direction.

7. The display panel according to claim 5, wherein, The first switching transistor and the first sensing transistor are arranged side by side in a horizontal direction. The second switching transistor and the second sensing transistor are arranged side by side in the horizontal direction, and A gate bridge wire branching from the gate line extending in the horizontal direction extends between the first switching transistor and the first sensing transistor and between the second switching transistor and the second sensing transistor, to be electrically connected to the gate electrode of the first switching transistor, the gate electrode of the second switching transistor, the gate electrode of the first sensing transistor, and the gate electrode of the second sensing transistor.

8. The display panel according to claim 5, wherein, The first switching transistor, the second switching transistor, the first sensing transistor, and the second sensing transistor are disposed between the first light-emitting element and the second light-emitting element.

9. The display panel according to claim 5, further comprising: A reference voltage line is provided parallel to the data line and is electrically connected to the first electrode of the first sensing transistor and the first electrode of the second sensing transistor via a reference voltage bridge wire. as well as A high-level power line is provided, which is parallel to the data line and electrically connected to the gate electrode of the first driving transistor and the gate electrode of the second driving transistor via a high-level power bridge connection. One of the data lines is electrically connected to the first electrode of the first switching transistor and the first electrode of the second switching transistor via a data bridge connection. The gate line is arranged perpendicular to the data line, and one of the gate lines is electrically connected to the gate electrode of the first switching transistor, the gate electrode of the second switching transistor, the gate electrode of the first sensing transistor, and the gate electrode of the second sensing transistor through a gate bridge connection.

10. The display panel according to claim 9, wherein, The second electrode of the first switching transistor is electrically connected to the gate electrode of the first driving transistor, and the second electrode of the second switching transistor is electrically connected to the gate electrode of the second driving transistor.

11. The display panel according to claim 10, wherein, The second electrode of the first driving transistor and the second electrode of the first sensing transistor are integrally formed, and the second electrode of the second driving transistor and the second electrode of the second sensing transistor are integrally formed.

12. The display panel according to claim 11, wherein, The first storage capacitor is configured by overlapping the second electrode of the first switching transistor with the second electrode integrally formed by the first driving transistor and the first sensing transistor, and the second storage capacitor is configured by overlapping the second electrode of the second switching transistor with the second electrode integrally formed by the second driving transistor and the second sensing transistor.

13. The display panel according to claim 11, wherein, The first light-emitting element is electrically connected to a second electrode integrally formed by the first driving transistor and the first sensing transistor, and the second light-emitting element is electrically connected to a second electrode integrally formed by the second driving transistor and the second sensing transistor.

14. The display panel according to claim 1, in, The first pixel circuit and the second pixel circuit share the same data line and the same gate line.

15. A display device, the display device comprising: The display panel according to any one of claims 1 to 14; A controller configured to process externally input image data to fit the size and resolution of the display panel, and to generate gating drive control signals and data drive control signals using external timing signals; A gating drive circuit is configured to operate according to the gating drive control signal and sequentially provide gating signals to multiple gating lines of the display panel; as well as A data driving circuit configured to convert the image data processed by the controller to generate a data voltage in response to the data driving control signal, and to provide the data voltage to multiple data lines of the display panel in synchronization with the strobe signal.

16. A sub-pixel, the sub-pixel comprising: First light-emitting element and second light-emitting element; A first driving transistor, the first driving transistor having a second electrode and a first electrode connected to the first light-emitting element; The second driving transistor has a first electrode connected to the second light-emitting element and a second electrode connected to the second electrode of the first driving transistor. A first switching transistor, the first switching transistor having a first electrode connected to the gate electrode of the first driving transistor; as well as The second switching transistor has a first electrode connected to the gate electrode of the second driving transistor. Wherein, the second electrode of the first switching transistor is connected to the second electrode of the second switching transistor, and The gate electrode of the first switching transistor is connected to the gate electrode of the second switching transistor.

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