Converter and low-power control circuit and method thereof, synchronous rectification chip

Abstract

This application relates to the field of switching power supply technology, and discloses a converter and its low-power control circuit and method, as well as a synchronous rectification chip. The converter includes a synchronous rectification chip and a protocol chip disposed on the secondary side. The secondary rectification turn-on determination pin of the synchronous rectification chip is connected to the sleep control pin of the protocol chip. The low-power control circuit includes: a detection unit connected to the secondary rectification turn-on determination pin and configured to detect whether the secondary rectification turn-on determination pin receives a low-level sleep signal; and a control unit configured to control the converter to enter sleep mode when a low-level sleep signal is received, and configured to have a rectification turn-on determination threshold that is inversely correlated with the voltage of the secondary rectification turn-on determination pin, so as to prevent the synchronous rectification chip from mistakenly turning on the rectifier switch. This application, by multiplexing the sleep detection function on the secondary rectification turn-on determination pin, eliminates the need for additional PAD positions and fullmask modifications, greatly reducing costs and shortening the development cycle.

Description

Technical Field

[0001] This application relates to the field of switching power supply technology, and in particular to a low-power control circuit for a converter, a synchronous rectification chip, a converter, and a low-power control method for a converter. Background Technology

[0002] With the rapid development of power electronics technology, the market demand for low standby power consumption in switching converters is increasing, with some manufacturers even demanding zero standby power consumption (e.g., less than 5mW). In fast-charging adapter (flyback converter) applications, there are typically primary chips, secondary synchronous rectifier chips, and protocol chips. To meet the zero standby power consumption requirement, the protocol chip needs a sleep mode enable pin (SM) to communicate with the secondary synchronous rectifier chip, notifying it to enter sleep mode. Figure 1 As shown.

[0003] However, secondary synchronous rectifier chips are generally packaged in SOT23-6, with all six pins (VO, VCC, VT, GND, SW, GT) fully utilized. If an additional pin SM is added, for example, using an SOP8 package, it will increase the packaging cost and size, and also require increasing the PAD position and redesigning the full mask, which greatly increases the cost and time of research and development. Summary of the Invention

[0004] The purpose of this application is to provide a low-power control circuit, method, synchronous rectification chip, and converter for a converter. By multiplexing the sleep detection function of the secondary rectification turn-on determination pin of the synchronous rectification chip and configuring the rectification turn-on determination threshold to be inversely correlated with the voltage of the secondary rectification turn-on determination pin, it is possible to avoid the increase in the loss of the rectification turn-on determination resistor caused by the protocol chip giving a sleep signal. At the same time, it can also prevent the synchronous rectification chip from accidentally turning on the rectifier switch. It also eliminates the need to add additional PAD positions and modify the fullmask, greatly reducing costs and shortening the development cycle.

[0005] To achieve the above objectives, the main technical solutions adopted in this application include:

[0006] In a first aspect, embodiments of this application provide a low-power control circuit for a converter. The converter includes a synchronous rectifier chip and a protocol chip disposed on the secondary side. The secondary rectifier turn-on determination pin of the synchronous rectifier chip is connected to the sleep control pin of the protocol chip. The low-power control circuit includes: a detection unit connected to the secondary rectifier turn-on determination pin, configured to detect whether the secondary rectifier turn-on determination pin receives a low-level sleep signal sent by the protocol chip based on the sleep control pin; and a control unit configured to control the converter to enter a sleep mode when the secondary rectifier turn-on determination pin receives the low-level sleep signal, and to configure the rectifier turn-on determination threshold to be inversely correlated with the voltage of the secondary rectifier turn-on determination pin, so as to prevent the synchronous rectifier chip from mistakenly turning on the rectifier switch based on the low-level sleep signal.

[0007] According to the low-power control circuit of the converter provided in this application embodiment, by multiplexing the secondary rectification turn-on determination pin of the synchronous rectifier chip with the sleep detection function, when a low-level sleep signal is received from the protocol chip based on the sleep control pin, it can not only control the converter to enter sleep mode and achieve zero standby power consumption, but also reduce the loss of the rectification turn-on determination resistor based on the low-level sleep signal, avoiding the increase in loss of the rectification turn-on determination resistor after the protocol chip gives the sleep signal. At the same time, by configuring the rectification turn-on determination threshold to be inversely correlated with the voltage of the secondary rectification turn-on determination pin, it can also prevent the synchronous rectifier chip from mistakenly turning on the rectifier switch due to the low-level sleep signal. Therefore, this application can achieve zero standby power consumption of the converter without adding pins, thus avoiding the need to increase the PAD position and modify the fullmask, greatly reducing costs and shortening the development cycle.

[0008] Optionally, in some embodiments of this application, the detection unit includes a comparison circuit that receives a signal sent by the sleep control pin. When the signal received from the sleep control pin is a low-level sleep signal, the comparison circuit outputs a sleep enable control signal to the control unit; when the signal received from the sleep control pin is a high-level exit signal, the comparison circuit outputs a sleep disable control signal to the control unit.

[0009] Optionally, in some other embodiments of this application, the detection unit includes: a first comparator, the positive input terminal of the first comparator being adapted to be connected to a first reference voltage, the negative input terminal of the first comparator being connected to the secondary rectification turn-on determination pin, the first comparator outputting a sleep enable control signal to the control unit when the secondary rectification turn-on determination pin receives the low-level sleep signal; a second comparator, the positive input terminal of the second comparator being adapted to be connected to a second reference voltage, the negative input terminal of the second comparator being connected to the secondary rectification turn-on determination pin, the second comparator outputting a sleep disable control signal to the control unit when the secondary rectification turn-on determination pin receives a high-level exit signal sent by the protocol chip based on the sleep control pin, so that the control unit controls the converter to exit the sleep mode, wherein the second reference voltage is greater than the first reference voltage.

[0010] Optionally, in some embodiments of this application, the control unit includes a controller configured to start timing when receiving the sleep enable control signal, and control the converter to enter the sleep mode when a first timing time reaches a first preset time, and to start timing when receiving the sleep disable control signal, and control the converter to exit the sleep mode when a second timing time reaches a second preset time.

[0011] Optionally, in some embodiments of this application, the secondary rectification turn-on determination pin is grounded through a rectification turn-on determination resistor, and the rectification turn-on determination threshold is inversely correlated with the resistance value of the rectification turn-on determination resistor.

[0012] Optionally, in some embodiments of this application, the control unit further includes: a rectification turn-on determination threshold generation module, the rectification turn-on determination threshold generation module being connected to the secondary rectification turn-on determination pin, the rectification turn-on determination threshold generation module generating the rectification turn-on determination threshold based on the opposite voltage value of the secondary rectification turn-on determination pin.

[0013] Specifically, the rectification turn-on determination threshold generation module includes: a subtractor, the negative input terminal of which is connected to the secondary rectification turn-on determination pin, and the positive input terminal of which is adapted to connect to a third reference voltage. The subtractor is configured to subtract the third reference voltage from the voltage of the secondary rectification turn-on determination pin, so that the rectification turn-on determination threshold is inversely correlated with the resistance value of the rectification turn-on determination resistor.

[0014] Optionally, in some embodiments of this application, the control unit further includes: a third comparator, the positive input terminal of which is adapted to be connected to the secondary rectification turn-on determination voltage, the negative input terminal of which is connected to the output terminal of the subtractor, the third comparator outputting a secondary rectification turn-on determination signal when the secondary rectification turn-on determination voltage is greater than the rectification turn-on determination threshold, wherein the secondary rectification turn-on determination voltage is determined based on the tube voltage drop of the rectifier switch and the output voltage of the converter, and the secondary rectification turn-on determination signal is used to instruct the rectifier switch to turn on.

[0015] Secondly, embodiments of this application provide a synchronous rectification chip, including the low-power control circuit described in the above embodiments.

[0016] According to the synchronous rectification chip provided in the embodiments of this application, based on the above-mentioned low-power control circuit, no additional pins are needed, thereby avoiding the need to increase the PAD position and modify the fullmask. This enables the converter to achieve zero standby power consumption, greatly reducing costs and shortening the R&D cycle. Furthermore, by multiplexing the secondary rectification turn-on determination pin with the sleep detection function, when a low-level sleep signal is received from the protocol chip based on the sleep control pin, the loss of the rectification turn-on determination resistor can be reduced based on the low-level sleep signal. This avoids the increase in loss of the rectification turn-on determination resistor caused by the protocol chip providing the sleep signal. At the same time, by configuring the rectification turn-on determination threshold to be inversely correlated with the voltage of the secondary rectification turn-on determination pin, the phenomenon of erroneous turn-on of the rectifier switch caused by the low-level sleep signal can also be prevented.

[0017] Thirdly, embodiments of this application also provide a converter, including: the low-power control circuit described in the above embodiments; or the synchronous rectification chip described in the above embodiments.

[0018] According to the converter provided in this application embodiment, there is no need to add pins to the synchronous rectification chip, thereby avoiding the need to increase the PAD position and modify the fullmask. The converter can achieve zero standby power consumption, which greatly reduces costs and shortens the R&D cycle. Furthermore, by multiplexing the secondary rectification turn-on determination pin with the sleep detection function, when a low-level sleep signal is received from the protocol chip based on the sleep control pin, the loss of the rectification turn-on determination resistor can be reduced based on the low-level sleep signal. This avoids the increase in loss of the rectification turn-on determination resistor caused by the protocol chip giving a sleep signal. At the same time, by configuring the rectification turn-on determination threshold to be inversely correlated with the voltage of the secondary rectification turn-on determination pin, the phenomenon of erroneous turn-on of the rectifier switch caused by the low-level sleep signal can also be prevented.

[0019] Fourthly, embodiments of this application also provide a low-power control method for a converter. The converter includes a synchronous rectification chip and a protocol chip disposed on the secondary side. The secondary rectification turn-on determination pin of the synchronous rectification chip is connected to the sleep control pin of the protocol chip. The low-power control method includes: detecting whether the secondary rectification turn-on determination pin receives a low-level sleep signal sent by the protocol chip based on the sleep control pin; when the secondary rectification turn-on determination pin receives the low-level sleep signal, controlling the converter to enter a sleep mode, and configuring the rectification turn-on determination threshold to be inversely correlated with the voltage of the secondary rectification turn-on determination pin, so as to prevent the synchronous rectification chip from mistakenly turning on the rectifier switch based on the low-level sleep signal.

[0020] According to the low-power control method for converters provided in this application, by multiplexing the secondary rectifier turn-on determination pin of the synchronous rectifier chip with the sleep detection function, when a low-level sleep signal is received from the protocol chip based on the sleep control pin, the converter can not only be controlled to enter sleep mode to achieve zero standby power consumption, but also the loss of the rectifier turn-on determination resistor can be reduced based on the low-level sleep signal, avoiding the increase in loss of the rectifier turn-on determination resistor after the protocol chip gives the sleep signal. At the same time, by configuring the rectifier turn-on determination threshold to be inversely correlated with the voltage of the secondary rectifier turn-on determination pin, it can also prevent the synchronous rectifier chip from mistakenly turning on the rectifier switch due to the low-level sleep signal, thereby avoiding the need to increase the PAD position and modify the fullmask, thus achieving zero standby power consumption of the converter, greatly reducing costs and shortening the development cycle.

[0021] Optionally, in some embodiments of this application, when the secondary rectification turn-on determination pin receives the low-level sleep signal, the method further includes: starting a timer so as to control the converter to enter the sleep mode when the first timer reaches a first preset time.

[0022] Optionally, in some embodiments of this application, when the secondary rectification turn-on determination pin receives a high-level exit signal sent by the protocol chip based on the sleep control pin, the method further includes: controlling the converter to exit the sleep mode.

[0023] Optionally, in some embodiments of this application, when the secondary rectification turn-on determination pin receives the high-level exit signal, the method further includes: starting a timer so as to control the converter to exit the sleep mode when the second timer reaches the second preset time.

[0024] Optionally, in some embodiments of this application, the low-power control method described above further includes: obtaining the voltage drop across the rectifier switch and the output voltage of the converter; determining a secondary rectification turn-on determination voltage based on the voltage drop across the rectifier switch and the output voltage of the converter; and outputting a secondary rectification turn-on determination signal when the secondary rectification turn-on determination voltage is greater than the rectification turn-on determination threshold, wherein the secondary rectification turn-on determination signal is used to instruct the rectifier switch to turn on. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0026] Figure 1 This is a circuit diagram of a flyback converter in related technologies;

[0027] Figure 2 This is a schematic diagram of the volt-second threshold value as a function of the resistance Rvt in a related technology.

[0028] Figure 3 This is a schematic diagram illustrating the determination of the volt-second product in a flyback converter in a related technology.

[0029] Figure 4 A schematic diagram of a low-power control circuit for a converter provided in one embodiment of this application;

[0030] Figure 5 A block diagram of a low-power control circuit for a converter provided in one embodiment of this application;

[0031] Figure 6 A schematic diagram of the volt-second threshold versus resistance Rvt provided in another embodiment of this application;

[0032] Figure 7 A block diagram of a low-power control circuit for a converter provided in another embodiment of this application;

[0033] Figure 8 A block diagram illustrating a synchronous rectification chip provided in one embodiment of this application;

[0034] Figure 9 This is a block diagram of a converter provided in one embodiment of this application;

[0035] Figure 10 A block diagram of a converter provided in another embodiment of this application;

[0036] Figure 11 This is a flowchart illustrating a low-power control method for a converter provided in one embodiment of this application. Detailed Implementation

[0037] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0038] In related technologies, in the application of fast charging adapters, in order to meet the requirement of zero standby power consumption, the protocol chip needs to be configured with a sleep mode enable pin SM to send an enable signal to enter sleep mode, and the secondary synchronous rectifier chip needs to be configured with a sleep mode detection pin to receive the enable signal. Thus, the protocol chip and the secondary synchronous rectifier chip communicate to enable the adapter to enter sleep mode. Figure 1 As shown.

[0039] However, secondary synchronous rectifier chips are generally packaged in SOT23-6, with each of the six pins (VO, VCC, VT, GND, SW, GT) having its own purpose. If an additional pin SM is added, for example, using an SOP8 package, it will increase the packaging cost and size, and also require increasing the PAD position and redesigning the full mask, which greatly increases the cost and time of research and development.

[0040] To address the issue of continuing to use SOT23-6 packages for secondary synchronous rectifier chips without requiring additional PADs, thus saving R&D costs and time, the inventors of this application, through extensive research and experimentation, discovered that sleep mode detection can be achieved by reusing the VT pin (secondary rectifier turn-on determination pin) of the secondary synchronous rectifier chip. However, when setting the volt-second threshold through the VT pin of the secondary synchronous rectifier chip, a current source (e.g., 10uA) typically charges a resistor Rvt (e.g., 100kΩ), and the voltage drop V of resistor Rvt... T This is the volt-second threshold, and as the resistance Rvt increases, the volt-second threshold also increases, such as... Figure 2 and Figure 3 As shown.

[0041] Furthermore, to prevent the converter from ringing accidentally after the secondary freewheeling circuit ends, the resistance of resistor Rvt is typically set to tens of kΩ to 100 kΩ, i.e., V of the normal system. TThe voltage is approximately 1V. At this point, if the protocol chip's SM pin does not send an enable signal to enter sleep mode, it is in a high-impedance state, which does not affect the volt-second threshold setting. However, when the protocol chip's SM pin sends a high-level (e.g., above 5V) enable signal, and the secondary synchronous rectifier chip's VT pin receives this high-level enable signal, even if it enters low-power standby mode, there will still be approximately 0.5mW of additional power consumption across the resistor Rvt due to the presence of a resistor Rvt (e.g., 100kΩ). Considering the power consumption of the primary chip and the protocol chip, it is difficult to meet the zero-power standby requirement of less than 5mW. If the protocol chip instead sends a low-level enable signal through its SM pin, the additional power consumption across the resistor Rvt can be avoided. However, this would pull the VT pin of the secondary synchronous rectifier chip low, making the volt-second threshold too small, thus causing the secondary rectifier switch to turn on incorrectly.

[0042] Therefore, the low-power control circuit of the converter, the synchronous rectifier chip with the low-power control circuit, the low-power control method of the converter and the converter provided in this application embodiment, by multiplexing the sleep detection function of the secondary rectifier turn-on determination pin of the synchronous rectifier chip, and configuring the rectifier turn-on determination threshold to be inversely correlated with the voltage of the secondary rectifier turn-on determination pin, can avoid the increase in loss of the rectifier turn-on determination resistor caused by the protocol chip giving a sleep signal, and can also prevent the synchronous rectifier chip from accidentally turning on the rectifier switch. It also eliminates the need to add PAD positions and modify the fullmask, greatly reducing costs and shortening the development cycle.

[0043] The low-power control circuit of the converter, the synchronous rectifier chip having the low-power control circuit, the low-power control method of the converter, and the converter provided in the embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0044] refer to Figure 4 The diagram shown is a schematic of a low-power control circuit for a converter according to an embodiment of this application. Figure 4 As shown, the converter includes a transformer Tr, a synchronous rectifier chip 10 and a protocol chip 20 disposed on the secondary side, and a rectifier switch Q1. The secondary rectification turn-on determination pin VT of the synchronous rectifier chip 10 is connected to the sleep control pin SM of the protocol chip 20. The low-power control circuit 30 includes a detection unit 301 and a control unit 302.

[0045] The detection unit 301 is connected to the secondary rectifier turn-on determination pin VT. The detection unit 301 is configured to detect whether the secondary rectifier turn-on determination pin VT receives a low-level sleep signal sent by the protocol chip 20 based on the sleep control pin SM. The control unit 302 is configured to control the converter to enter sleep mode when the secondary rectifier turn-on determination pin VT receives a low-level sleep signal, and to configure the rectifier turn-on determination threshold V.T The voltage of the secondary rectifier turn-on determination pin VT is inversely correlated to prevent the synchronous rectifier chip 10 from mistakenly turning on the rectifier switch Q1 based on the low-level sleep signal.

[0046] In some embodiments of this application, the protocol chip 20 can pull the sleep control pin SM low when no load is detected. At this time, the secondary rectification turn-on determination pin VT is low, and no additional power consumption is generated on the rectification turn-on determination resistor Rvt. Simultaneously, the synchronous rectification chip 10 can detect the low-level sleep signal and control the converter to enter sleep mode, achieving zero standby power consumption, for example, less than 5mW. Furthermore, due to the configuration of the rectification turn-on determination threshold V... T The voltage of the secondary rectification turn-on determination pin VT is inversely correlated with the voltage of the secondary rectification turn-on determination pin. Therefore, when the secondary rectification turn-on determination pin VT is low, the rectification turn-on determination threshold V... T The increased size can prevent the synchronous rectifier chip 10 from mistakenly turning on the rectifier switch Q1 based on the low-level sleep signal, thereby avoiding the converter from ringing and turning on mistakenly after the secondary freewheeling ends, and ensuring that the converter works reliably and stably.

[0047] like Figure 5 As shown, the detection unit 301 includes a first comparator 3011. The positive input terminal of the first comparator 3011 is adapted to be connected to the first reference voltage V1. The negative input terminal of the first comparator 3011 is connected to the secondary rectification turn-on determination pin VT. When the secondary rectification turn-on determination pin VT receives a low-level sleep signal, the first comparator 3011 outputs a sleep enable control signal to the control unit 302.

[0048] In other words, when the protocol chip 20 pulls the sleep control pin SM low to send a low-level sleep signal to the synchronous rectifier chip 10 through the sleep control pin SM, the secondary rectifier turn-on determination pin VT is low, the first comparator 3011 outputs a high level, and the enable control unit 302 controls the converter to enter sleep mode.

[0049] Furthermore, such as Figure 5 As shown, the detection unit 301 also includes a second comparator 3012. The positive input terminal of the second comparator 3012 is adapted to be connected to the second reference voltage V2, and the negative input terminal of the second comparator 3012 is connected to the secondary rectification turn-on determination pin VT. When the secondary rectification turn-on determination pin VT receives a high-level exit signal sent by the protocol chip 20 based on the sleep control pin SM, the second comparator 3012 outputs a sleep turn-off control signal to the control unit 302 so that the control unit 302 controls the converter to exit the sleep mode. The second reference voltage V2 is greater than the first reference voltage V1.

[0050] Specifically, when the protocol chip 20 determines that the system needs to exit the sleep mode, it pulls the sleep control pin SM high to send a high-level exit signal to the synchronous rectifier chip 10 through the sleep control pin SM. At this time, the voltage of the secondary rectifier turn-on determination pin VT is obtained by charging the rectifier turn-on determination resistor Rvt with the current source. The secondary rectifier turn-on determination pin VT is high, which is greater than the second reference voltage V2. The output of the second comparator 3012 is low, thus turning off the sleep mode. The control unit 302 controls the converter to exit the sleep mode.

[0051] Therefore, in the embodiments of this application, the detection unit 301 can detect the high and low levels of the secondary rectification turn-on determination pin VT by configuring two comparators, thereby realizing the sleep detection function of the secondary rectification turn-on determination pin VT of the synchronous rectification chip 10.

[0052] Optionally, in some other embodiments of this application, the detection unit 301 may further include a comparison circuit, which is used to receive a signal sent by the sleep control pin. When the signal sent by the sleep control pin is a low-level sleep signal, the comparison circuit outputs a sleep enable control signal to the control unit; when the signal sent by the sleep control pin is a high-level exit signal, the comparison circuit outputs a sleep disable control signal to the control unit.

[0053] Furthermore, the comparison circuit can be constructed using a hysteresis comparator. By comparing the signal of the sleep control pin with the hysteresis signal based on the hysteresis comparator, the high and low levels of the secondary rectification turn-on determination pin VT can be detected, thereby enabling the secondary rectification turn-on determination pin VT of the synchronous rectification chip 10 to be multiplexed for sleep detection function.

[0054] Optionally, in some embodiments of this application, such as Figure 5 As shown, the control unit 302 includes a controller 3021, which is configured to start timing when a sleep enable control signal is received, and control the converter to enter sleep mode when a first timing time reaches a first preset time T1, and to start timing when a sleep disable control signal is received, and control the converter to exit sleep mode when a second timing time reaches a second preset time T2.

[0055] In other words, when the controller 3021 detects a high-level signal output from the first comparator 3011, it starts timing. When the high-level signal is detected for a duration of a first preset time T1, the controller controls the converter to enter sleep mode, achieving standby. When the controller 3021 detects a low-level signal output from the second comparator 3012, it starts timing. When the low-level signal is detected for a duration of a second preset time T2, the controller controls the converter to exit sleep mode, and sleep mode is disabled.

[0056] By setting a first preset time T1 and a second preset time T2, false triggering caused by disturbances can be prevented.

[0057] Optionally, in one embodiment of this application, such as Figure 4 As shown, the secondary rectifier turn-on determination pin VT is grounded through the rectifier turn-on determination resistor Rvt, and the rectifier turn-on determination threshold, i.e., the volt-second product, is inversely correlated with the resistance value of the rectifier turn-on determination resistor Rvt, as follows. Figure 6 As shown.

[0058] When the rectification turn-on threshold and the resistance value of the rectification turn-on resistor Rvt are inversely correlated, the smaller the resistance value of the rectification turn-on resistor Rvt, the larger the rectification turn-on threshold. Therefore, the resistance value of the rectification turn-on resistor Rvt can be configured to 200kΩ-300kΩ, and the voltage of the secondary rectification turn-on pin VT can be 2V-3V. Since the rectification turn-on threshold and the voltage of the secondary rectification turn-on pin VT are inversely correlated, it can also be configured to be around 1V. In this way, when the secondary rectification turn-on pin VT is at a low level, the rectification turn-on threshold V... T The increased size can prevent the synchronous rectifier chip 10 from mistakenly turning on the rectifier switch Q1 based on the low-level sleep signal, thereby avoiding the converter from ringing and turning on mistakenly after the secondary freewheeling ends, ensuring that the converter works reliably and stably, and at the same time reducing the loss on the rectifier turn-on determination resistor Rvt.

[0059] refer to Figure 7 As shown, the control unit 302 also includes a rectification turn-on determination threshold generation module 3022. The rectification turn-on determination threshold generation module 3022 is connected to the secondary rectification turn-on determination pin VT. The rectification turn-on determination threshold generation module 3022 generates a rectification turn-on determination threshold based on the opposite value of the voltage of the secondary rectification turn-on determination pin VT.

[0060] Therefore, it can be seen that the rectification turn-on judgment threshold is inversely correlated with the voltage of the secondary rectification turn-on judgment pin VT.

[0061] Specifically, in one embodiment of this application, such as Figure 7 As shown, the rectification turn-on determination threshold generation module 3022 includes a subtractor 30221. The negative input terminal of the subtractor 30221 is connected to the secondary rectification turn-on determination pin VT, and the positive input terminal of the subtractor 30221 is adapted to connect to a third reference voltage. The third reference voltage can be obtained according to the configuration of the reference current source and the reference resistor. The subtractor 30221 is configured to subtract the third reference voltage from the voltage of the secondary rectification turn-on determination pin VT, so that the rectification turn-on determination threshold is inversely correlated with the resistance value of the rectification turn-on determination resistor Rvt.

[0062] In this embodiment, by setting a subtractor 30221, the rectification turn-on determination threshold is made to decrease as the resistance value of the rectification turn-on determination resistor Rvt increases.

[0063] And, as Figure 7 As shown, the control unit 302 also includes a third comparator 3023. The positive input terminal of the third comparator 3023 is adapted to be connected to the secondary rectification turn-on determination voltage, which can be calculated by the volt-second product calculation unit. The negative input terminal of the third comparator 3023 is connected to the output terminal of the subtractor 30221. When the secondary rectification turn-on determination voltage is greater than the rectification turn-on determination threshold, the third comparator 3023 outputs a secondary rectification turn-on determination signal. The secondary rectification turn-on determination voltage is based on the voltage drop V of the rectifier switch Q1. SW and the output voltage V of the converter O It is confirmed that the volt-second product calculation unit is based on the voltage drop V of the rectifier switch Q1. SW and the output voltage V of the converter O The secondary rectifier turn-on determination voltage is determined, and when the secondary rectifier turn-on determination voltage is greater than the rectifier turn-on determination threshold, the third comparator 3023 outputs a high level to determine that the volt-second product is satisfied, and the rectifier switch Q1 is turned on. That is, the secondary rectifier turn-on determination signal is used to indicate that the rectifier switch Q1 is turned on.

[0064] In the embodiments of this application, by configuring the rectifier turn-on determination resistor Rvt to 200kΩ-300kΩ, the rectifier turn-on determination threshold can be about 1V, which can avoid the converter from ringing and turning on accidentally after the secondary freewheeling ends, and can also reduce the loss on the rectifier turn-on determination resistor Rvt.

[0065] According to the low-power control circuit of the converter provided in this application embodiment, by multiplexing the secondary rectification turn-on determination pin of the synchronous rectifier chip with the sleep detection function, when a low-level sleep signal is received from the protocol chip based on the sleep control pin, it can not only control the converter to enter sleep mode and achieve zero standby power consumption, but also reduce the loss of the rectification turn-on determination resistor based on the low-level sleep signal, avoiding the increase in loss of the rectification turn-on determination resistor after the protocol chip gives the sleep signal. At the same time, by configuring the rectification turn-on determination threshold to be inversely correlated with the voltage of the secondary rectification turn-on determination pin, it can also prevent the synchronous rectifier chip from mistakenly turning on the rectifier switch due to the low-level sleep signal. Therefore, this application can achieve zero standby power consumption of the converter without adding pins, thus avoiding the need to increase the PAD position and modify the fullmask, greatly reducing costs and shortening the development cycle.

[0066] Optionally, in some embodiments of this application, such as Figure 8As shown, the synchronous rectifier chip 10 includes the low-power control circuit 30 described in the above embodiments.

[0067] In other words, the low-power control circuit 30 described in the above embodiments can be integrated and packaged in the synchronous rectification chip 10.

[0068] According to the synchronous rectification chip 10 provided in the embodiments of this application, based on the low-power control circuit 30, no additional pins are needed, thereby avoiding the need to increase the PAD position and modify the fullmask. This enables the converter to achieve zero standby power consumption, greatly reducing costs and shortening the R&D cycle. Furthermore, by multiplexing the secondary rectification turn-on determination pin with the sleep detection function, when a low-level sleep signal is received from the protocol chip based on the sleep control pin, the loss of the rectification turn-on determination resistor can be reduced based on the low-level sleep signal. This avoids the increase in loss of the rectification turn-on determination resistor caused by the protocol chip giving a sleep signal. At the same time, by configuring the rectification turn-on determination threshold to be inversely correlated with the voltage of the secondary rectification turn-on determination pin, the phenomenon of erroneous turn-on of the rectifier switch caused by the low-level sleep signal can also be prevented.

[0069] like Figure 9 As shown, in some embodiments of this application, a converter 100 is also provided, which includes the low-power control circuit 30 described in the above embodiments.

[0070] According to the converter 100 provided in the embodiments of this application, based on the low-power control circuit 30, no additional pins are needed, thereby avoiding the need to increase the PAD position and modify the fullmask. The converter can achieve zero standby power consumption, which greatly reduces costs and shortens the development cycle. Furthermore, by multiplexing the secondary rectifier turn-on determination pin with the sleep detection function, when a low-level sleep signal is received from the protocol chip based on the sleep control pin, the loss of the rectifier turn-on determination resistor can be reduced based on the low-level sleep signal. This avoids the increase in loss of the rectifier turn-on determination resistor after the protocol chip provides the sleep signal. At the same time, by configuring the rectifier turn-on determination threshold to be inversely correlated with the voltage of the secondary rectifier turn-on determination pin, the phenomenon of erroneous turn-on of the rectifier switch caused by the low-level sleep signal can also be prevented.

[0071] like Figure 10 As shown, in some other embodiments of this application, a converter 100 is also provided, which includes the synchronous rectification chip 10 described in the above embodiments.

[0072] According to the converter 100 provided in the embodiments of this application, there is no need to add pins to the synchronous rectification chip, thereby avoiding the need to increase the PAD position and modify the fullmask. The converter can achieve zero standby power consumption, which greatly reduces the cost and shortens the development cycle. Furthermore, by multiplexing the secondary rectification turn-on determination pin with the sleep detection function, when a low-level sleep signal is received from the protocol chip based on the sleep control pin, the loss of the rectification turn-on determination resistor can be reduced based on the low-level sleep signal. This avoids the increase in loss of the rectification turn-on determination resistor caused by the protocol chip giving the sleep signal. At the same time, by configuring the rectification turn-on determination threshold to be inversely correlated with the voltage of the secondary rectification turn-on determination pin, the phenomenon of erroneous turn-on of the rectifier switch caused by the low-level sleep signal can also be prevented.

[0073] In addition, such as Figure 11 As shown in the figure, this application embodiment also provides a low-power control method for a converter, wherein the converter includes a synchronous rectification chip and a protocol chip disposed on the secondary side, the secondary rectification turn-on determination pin of the synchronous rectification chip is connected to the sleep control pin of the protocol chip, and the low-power control method includes the following steps:

[0074] S1, detect whether the secondary rectification turn-on determination pin receives a low-level sleep signal sent by the protocol chip based on the sleep control pin.

[0075] Optionally, the protocol chip can pull the sleep control pin SM low when it detects that there is no load connection. At this time, the secondary rectification turn-on determination pin VT is low, and no additional power consumption is generated on the rectification turn-on determination resistor Rvt. At the same time, the low-level sleep signal can be detected by the synchronous rectification chip.

[0076] S2, when the secondary rectifier turn-on determination pin receives a low-level sleep signal, controls the converter to enter sleep mode, and configures the rectifier turn-on determination threshold to be inversely correlated with the voltage of the secondary rectifier turn-on determination pin, so as to prevent the synchronous rectifier chip from mistakenly turning on the rectifier switch based on the low-level sleep signal.

[0077] For example, when the synchronous rectifier chip detects a low-level sleep signal on the secondary rectifier turn-on determination pin, it controls the converter to enter sleep mode, achieving zero standby power consumption, for example, less than 5mW. Furthermore, due to the configured rectifier turn-on determination threshold V... T The voltage of the secondary rectification turn-on determination pin VT is inversely correlated with the voltage of the secondary rectification turn-on determination pin. Therefore, when the secondary rectification turn-on determination pin VT is low, the rectification turn-on determination threshold V... T The increased size can prevent the synchronous rectifier chip from mistakenly turning on the rectifier switch Q1 based on the low-level sleep signal, thereby avoiding the converter from ringing and turning on mistakenly after the secondary freewheeling ends, and ensuring that the converter works reliably and stably.

[0078] Optionally, in some embodiments of this application, when the secondary rectification turn-on determination pin receives a low-level sleep signal, the above-mentioned low-power control method further includes: starting a timer so as to control the converter to enter a sleep mode when the first timer reaches a first preset time.

[0079] In other words, when the protocol chip pulls the sleep control pin SM low and the secondary rectifier turn-on determination pin VT is at a low level, the level signal of the secondary rectifier turn-on determination pin VT can be controlled by the first comparator. When the first comparator outputs a high level signal, the timing starts, and when the high level signal is detected for a period of time T1, the converter is controlled to enter sleep mode to achieve standby.

[0080] Optionally, in some embodiments of this application, when the secondary rectification turn-on determination pin receives a high-level exit signal sent by the protocol chip based on the sleep control pin, the above-mentioned low-power control method further includes: controlling the converter to exit the sleep mode.

[0081] For example, when the secondary rectifier turn-on determination pin VT receives a high-level exit signal sent by the protocol chip based on the sleep control pin SM, the level signal of the secondary rectifier turn-on determination pin VT can be compared by the second comparator, and a sleep shutdown control signal can be output to control the converter to exit the sleep mode.

[0082] Furthermore, when the secondary rectification turn-on determination pin receives a high-level exit signal, the aforementioned low-power control method also includes: starting a timer so that the converter exits the sleep mode when the second timer reaches the second preset time.

[0083] Specifically, when the protocol chip determines that the system needs to exit sleep mode, it pulls the sleep control pin SM high to send a high-level exit signal to the synchronous rectifier chip through the sleep control pin SM. At this time, the voltage of the secondary rectifier turn-on determination pin VT is obtained by charging the rectifier turn-on determination resistor Rvt with the current source. The secondary rectifier turn-on determination pin VT is high, which is greater than the second reference voltage V2. The output of the second comparator is low, thus turning off the sleep mode and controlling the converter to exit the sleep mode.

[0084] Therefore, this application realizes the detection of the high and low levels of the secondary rectification turn-on determination pin VT, thereby realizing the sleep detection function of the secondary rectification turn-on determination pin VT of the synchronous rectification chip.

[0085] Optionally, in some embodiments of this application, the low-power control method described above further includes: obtaining the voltage drop of the rectifier switch and the output voltage of the converter; determining the secondary rectification turn-on determination voltage based on the voltage drop of the rectifier switch and the output voltage of the converter; and outputting a secondary rectification turn-on determination signal when the secondary rectification turn-on determination voltage is greater than the rectification turn-on determination threshold, wherein the secondary rectification turn-on determination signal is used to instruct the rectifier switch to turn on.

[0086] In other words, the volt-second product calculation unit can be based on the voltage drop V of the rectifier switch Q1. SW and the output voltage V of the converter O The secondary rectification turn-on determination voltage is determined, and when the secondary rectification turn-on determination voltage is greater than the rectification turn-on determination threshold, the third comparator outputs a high level to determine that the volt-second product is satisfied, and the rectifier switch Q1 can be turned on. In other words, the secondary rectification turn-on determination signal is used to instruct the rectifier switch Q1 to be turned on.

[0087] In the embodiments of this application, by configuring the rectifier turn-on determination resistor Rvt to 200kΩ-300kΩ, the rectifier turn-on determination threshold can be about 1V, which can avoid the converter from ringing and turning on accidentally after the secondary freewheeling ends, and can also reduce the loss on the rectifier turn-on determination resistor Rvt.

[0088] According to the low-power control method for converters provided in this application, by multiplexing the secondary rectifier turn-on determination pin of the synchronous rectifier chip with the sleep detection function, when a low-level sleep signal is received from the protocol chip based on the sleep control pin, the converter can not only be controlled to enter sleep mode to achieve zero standby power consumption, but also the loss of the rectifier turn-on determination resistor can be reduced based on the low-level sleep signal, avoiding the increase in loss of the rectifier turn-on determination resistor after the protocol chip gives the sleep signal. At the same time, by configuring the rectifier turn-on determination threshold to be inversely correlated with the voltage of the secondary rectifier turn-on determination pin, it can also prevent the synchronous rectifier chip from mistakenly turning on the rectifier switch due to the low-level sleep signal, thereby avoiding the need to increase the PAD position and modify the fullmask, thus achieving zero standby power consumption of the converter, greatly reducing costs and shortening the development cycle.

[0089] In the description of this specification, the terms "one embodiment," "some embodiments," "embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0090] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make modifications, alterations, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A low-power control circuit for a converter, characterized in that, The converter includes a synchronous rectification chip and a protocol chip disposed on the secondary side. The secondary rectification turn-on determination pin of the synchronous rectification chip is connected to the sleep control pin of the protocol chip. The low-power control circuit includes: A detection unit is connected to the secondary rectifier enable determination pin, and the detection unit is configured to detect whether the secondary rectifier enable determination pin receives a low-level sleep signal sent by the protocol chip based on the sleep control pin; The control unit is configured to control the converter to enter a sleep mode when the secondary rectifier turn-on determination pin receives the low-level sleep signal, and to configure the rectifier turn-on determination threshold to be inversely correlated with the voltage of the secondary rectifier turn-on determination pin, so as to prevent the synchronous rectifier chip from mistakenly turning on the rectifier switch based on the low-level sleep signal.

2. The low-power control circuit according to claim 1, characterized in that, The detection unit includes a comparison circuit that receives a signal sent by the sleep control pin, wherein... When the signal sent by the sleep control pin is a low-level sleep signal, the comparator circuit outputs a sleep enable control signal to the control unit; When the signal sent by the sleep control pin is a high-level exit signal, the comparator circuit outputs a sleep shutdown control signal to the control unit.

3. The low-power control circuit according to claim 1, characterized in that, The detection unit includes: A first comparator, the positive input of which is adapted to be connected to a first reference voltage, and the negative input of which is connected to the secondary rectifier turn-on determination pin. When the secondary rectifier turn-on determination pin receives the low-level sleep signal, the first comparator outputs a sleep enable control signal to the control unit. The second comparator has a positive input terminal adapted to be connected to a second reference voltage, and a negative input terminal connected to the secondary rectification turn-on determination pin. When the secondary rectification turn-on determination pin receives a high-level exit signal sent by the protocol chip based on the sleep control pin, the second comparator outputs a sleep turn-off control signal to the control unit so that the control unit can control the converter to exit the sleep mode. The second reference voltage is greater than the first reference voltage.

4. The low-power control circuit according to claim 3, characterized in that, The control unit includes a controller configured to start timing upon receiving the sleep enable control signal, and control the converter to enter the sleep mode when a first timing period reaches a first preset time; and to start timing upon receiving the sleep disable control signal, and control the converter to exit the sleep mode when a second timing period reaches a second preset time.

5. The low-power control circuit according to any one of claims 1-4, characterized in that, The secondary rectifier turn-on determination pin is grounded through the rectifier turn-on determination resistor, and the rectifier turn-on determination threshold is inversely correlated with the resistance value of the rectifier turn-on determination resistor.

6. The low-power control circuit according to claim 5, characterized in that, The control unit further includes: A rectification turn-on determination threshold generation module is connected to the secondary rectification turn-on determination pin. The rectification turn-on determination threshold generation module generates the rectification turn-on determination threshold based on the opposite voltage value of the secondary rectification turn-on determination pin.

7. The low-power control circuit according to claim 6, characterized in that, The rectification activation threshold generation module includes: A subtractor, wherein the negative input terminal of the subtractor is connected to the secondary rectifier turn-on determination pin, and the positive input terminal of the subtractor is adapted to be connected to a third reference voltage, the subtractor being configured to subtract the third reference voltage from the voltage of the secondary rectifier turn-on determination pin, so that the rectifier turn-on determination threshold is inversely correlated with the resistance value of the rectifier turn-on determination resistor.

8. The low-power control circuit according to claim 7, characterized in that, The control unit further includes: A third comparator has a positive input terminal adapted to receive a secondary rectification turn-on determination voltage, and a negative input terminal connected to the output terminal of the subtractor. When the secondary rectification turn-on determination voltage is greater than the rectification turn-on determination threshold, the third comparator outputs a secondary rectification turn-on determination signal. The secondary rectification turn-on determination voltage is determined based on the voltage drop across the rectifier switch and the output voltage of the converter. The secondary rectification turn-on determination signal is used to instruct the rectifier switch to turn on.

9. A synchronous rectification chip, characterized in that, Includes the low-power control circuit according to any one of claims 1-8.

10. A converter, characterized in that, include: The low-power control circuit according to any one of claims 1-8; or The synchronous rectification chip according to claim 9.

11. A low-power control method for a converter, characterized in that, The converter includes a synchronous rectification chip and a protocol chip disposed on the secondary side. The secondary rectification turn-on determination pin of the synchronous rectification chip is connected to the sleep control pin of the protocol chip. The low-power control method includes: Detect whether the secondary rectification turn-on determination pin receives a low-level sleep signal sent by the protocol chip based on the sleep control pin; When the secondary rectifier turn-on determination pin receives the low-level sleep signal, the converter is controlled to enter sleep mode, and the rectifier turn-on determination threshold is configured to be inversely correlated with the voltage of the secondary rectifier turn-on determination pin, so as to prevent the synchronous rectifier chip from mistakenly turning on the rectifier switch based on the low-level sleep signal.

12. The low-power control method according to claim 11, characterized in that, When the secondary rectification turn-on determination pin receives the low-level sleep signal, the method further includes: Start timing so that when the first timing period reaches the first preset time, control the converter to enter the sleep mode.

13. The low-power control method according to claim 11, characterized in that, When the secondary rectification enable pin receives a high-level exit signal sent by the protocol chip based on the sleep control pin, the method further includes: Control the converter to exit the sleep mode.

14. The low-power control method according to claim 13, characterized in that, When the secondary rectification turn-on determination pin receives the high-level exit signal, the method further includes: Start timing so that when the second timing period reaches the second preset time, control the converter to exit the sleep mode.

15. The low-power control method according to any one of claims 11-14, characterized in that, Also includes: Obtain the voltage drop across the rectifier switch and the output voltage of the converter; The secondary rectifier turn-on determination voltage is determined based on the voltage drop across the rectifier switch and the output voltage of the converter. When the secondary rectifier turn-on determination voltage is greater than the rectifier turn-on determination threshold, a secondary rectifier turn-on determination signal is output, wherein the secondary rectifier turn-on determination signal is used to instruct the rectifier switch to turn on.

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