Control circuit and electronic device

Abstract

This application discloses a control circuit and an electronic device, belonging to the field of imaging technology for electronic devices. The control circuit includes: a single-photon avalanche diode dynamic vision sensing pixel array, comprising multiple single-photon avalanche diode dynamic vision sensing pixels, which are used to detect brightness change events in a scene and output event-related information; a global shutter readout circuit, coupled to the single-photon avalanche diode dynamic vision sensing pixel array, used to receive the event-related information and perform high-speed global shutter imaging on the event-related region; and a control module, coupled to both the single-photon avalanche diode dynamic vision sensing pixel array and the global shutter readout circuit, used to control the imaging area and operating mode of the global shutter readout circuit according to the event-related information, wherein the imaging area is the area where the event-related region is imaged.

Description

Technical Field

[0001] This application belongs to the field of imaging technology for electronic devices, specifically relating to a control circuit and an electronic device. Background Technology

[0002] Currently, most electronic devices are equipped with imaging devices. Traditional imaging devices often use rolling shutters, which can easily produce a rolling shutter effect when shooting fast-moving objects, affecting image quality. When imaging high-speed dynamic scenes, the large amount of data and full-frame output will put a lot of pressure on the platform's data throughput, making it difficult to achieve high frame rate imaging. This results in a low success rate for recognizing high-speed dynamic targets such as gestures and rapid limb movements, leading to a poor user experience. Summary of the Invention

[0003] The purpose of this application is to provide a control circuit and electronic device that can solve the problems of easy image distortion, low success rate of dynamic target recognition, and poor user experience in high-speed motion scenarios.

[0004] In a first aspect, embodiments of this application provide a control circuit, including: a single-photon avalanche diode dynamic visual sensing pixel array, the single-photon avalanche diode dynamic visual sensing pixel array including a plurality of single-photon avalanche diode dynamic visual sensing pixels, the single-photon avalanche diode dynamic visual sensing pixels being used to detect brightness change events in a scene and output event association information;

[0005] The global shutter readout circuit is coupled to the single-photon avalanche diode dynamic vision sensor pixel array to receive event-related information and perform global shutter high-speed imaging of the event-related region.

[0006] The control module is coupled to the single-photon avalanche diode dynamic vision sensor pixel array and the global shutter readout circuit, respectively. It is used to control the imaging area and working mode of the global shutter readout circuit according to the event association information. The imaging area is the area that images the event association area.

[0007] Secondly, embodiments of this application provide an electronic device including the control circuit described in the first aspect above.

[0008] In this embodiment, the control circuit employs a single-photon avalanche diode dynamic visual sensing pixel array, which can perceive brightness changes in a scene with high sensitivity and high response speed, quickly capturing dynamic targets such as gestures and rapid limb movements, thereby improving the response speed and positioning accuracy of the imaging system. Pixel detection of brightness change events and output of event-related information can accurately locate dynamically changing areas, providing a reliable basis for subsequent imaging and further improving the accuracy of high-speed dynamic target recognition. By setting a global shutter readout circuit, synchronous exposure and readout of pixels in the same area can be achieved, maintaining image integrity and distortion-free performance in high-speed dynamic scenes, effectively avoiding the rolling shutter effect caused by traditional rolling shutters, and improving the imaging quality and image stability of high-speed moving objects. The global shutter readout circuit receives event-related information, enabling the imaging action to be synchronized with the brightness change event, improving the coordination between event detection and imaging output, and ensuring a high degree of matching between the imaging time and the dynamic change time. The circuit performs global shutter high-speed imaging for the event-related area, focusing on the effective event-related area, reducing invalid data processing, improving effective imaging capabilities, and making the imaging of high-speed dynamic targets clearer and smoother. Meanwhile, by setting up a control module, a unified and coordinated control logic is provided for the imaging system, ensuring orderly cooperation between dynamic visual sensing and global shutter imaging, and improving the overall stability and reliability of the circuit operation. The control module controls the imaging area and working mode according to the event correlation information, and can adaptively limit the imaging range to the dynamically changing area to achieve precise local imaging, further reducing the amount of data processing, alleviating the frame rate limitation caused by the platform throughput, improving imaging efficiency and response speed, ensuring a high degree of matching between the imaging range and the event correlation area, improving the effectiveness and relevance of imaging, making the identification of high-speed dynamic targets more accurate and reliable, and improving the overall adaptability of the imaging system and the user experience. Attached Figure Description

[0009] Figure 1 This is a schematic diagram of the structure of a control circuit proposed in an embodiment of this application;

[0010] Figure 2 This is a schematic diagram of the structure of a single-photon avalanche diode dynamic visual sensing pixel array proposed in an embodiment of this application;

[0011] Figure 3 This is a schematic diagram of an application scenario for a single-photon avalanche diode dynamic visual sensing pixel proposed in an embodiment of this application;

[0012] Figure 4 This is one of the schematic diagrams of a front-end circuit proposed in the embodiments of this application;

[0013] Figure 5 This is a second schematic diagram of a front-end circuit proposed in an embodiment of this application;

[0014] Figure 6 This is a schematic diagram of the structure of a global shutter imaging branch proposed in an embodiment of this application;

[0015] Figure 7 This is a schematic diagram of the pixel circuit structure of a rolling shutter mode in related technologies;

[0016] Figure 8 This is a structural block diagram of an electronic device proposed in an embodiment of this application.

[0017] Figure reference numerals: 1. Control circuit; 10. Single-photon avalanche diode dynamic vision sensor pixel array; 100. Single-photon avalanche diode dynamic vision sensor pixel; 20. Global shutter readout circuit; 30. Control module; 110. Front-end circuit; SPAD, Single-photon avalanche diode; RST, Reset transistor; 111. NOT gate amplifier; 112. Adjustable delay circuit; 160. Delay control unit; 170. Voltage adjustment unit; VD1, First control voltage terminal; VD2, Second control voltage terminal; 161. First-stage NOR gate; 162. Second-stage gate control circuit; 163. Third-stage NOT gate; MD1, First N-type metal... Metal-oxide-semiconductor transistor (MOST); MD2, second N-type MOST; MD3, first P-type MOST; MD4, second P-type MOST; 120, digital counter; 130, event-triggered logic module; 131, NOT gate; 132, AND gate; CP, automatic clock module; 140, global shutter imaging branch; TG, charge transfer transistor; FD, floating diffusion node; A1, first amplifier; Hold, holding transistor; C_gs, global storage capacitor; A2, second amplifier; R_SET, first select transistor; G_SET, second select transistor; 2. Electronic equipment. Detailed Implementation

[0018] The technical solutions of the embodiments of this application will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application are within the scope of protection of this application.

[0019] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0020] The control circuits and electronic devices provided in this application will be described in detail below with reference to the accompanying drawings, through specific embodiments and application scenarios.

[0021] like Figure 1 and Figure 2 As shown, the first aspect of this application discloses a control circuit 1, comprising:

[0022] The single-photon avalanche diode dynamic vision sensing pixel array 10 includes multiple single-photon avalanche diode dynamic vision sensing pixels 100, which are used to detect brightness change events in the scene and output event association information.

[0023] The global shutter readout circuit 20 is coupled to the single-photon avalanche diode dynamic vision sensor pixel array 10, and is used to receive event-related information and perform global shutter high-speed imaging on the event-related area.

[0024] The control module 30 is coupled to the single-photon avalanche diode dynamic visual sensing pixel array 10 and the global shutter readout circuit 20, respectively. It is used to control the imaging area and working mode of the global shutter readout circuit 20 according to the event association information. The imaging area is the area that images the event association area.

[0025] In the above embodiments, the control circuit 1 employs a single-photon avalanche diode dynamic visual sensing pixel array 10, which can perceive brightness changes in the scene with high sensitivity and high response speed, quickly capture dynamic targets such as gestures and rapid limb movements, and improve the response speed and positioning accuracy of the imaging system. The single-photon avalanche diode dynamic visual sensing pixels detect brightness change events and output event-related information, which can accurately locate the dynamic change area, providing a reliable basis for subsequent imaging and further improving the recognition accuracy of high-speed dynamic targets. By setting a global shutter readout circuit 20, synchronous exposure and readout of pixels in the same area can be achieved, maintaining the integrity and distortion-free image in high-speed dynamic scenes, effectively avoiding the rolling shutter effect caused by traditional rolling shutters, and improving the imaging quality and image stability of high-speed moving objects. The global shutter readout circuit 20 receives event-related information, which can keep the imaging action and brightness change events synchronized, improve the coordination between event detection and imaging output, and ensure that the imaging time is highly matched with the dynamic change time. The circuit performs global shutter high-speed imaging for the event-related area, which can focus on the effective event-related area, reduce invalid data processing, improve effective imaging capabilities, and make the imaging of high-speed dynamic targets clearer and smoother. Meanwhile, by setting up the control module 30, a unified and coordinated control logic is provided for the imaging system, ensuring that dynamic visual sensing and global shutter imaging work in an orderly manner, thereby improving the overall stability and reliability of the circuit operation. The control module 30 controls the imaging area and working mode according to the event association information, and can adaptively limit the imaging range to the dynamically changing area to achieve precise local imaging, further reducing the amount of data processing, alleviating the frame rate limitation caused by the platform throughput, improving imaging efficiency and response speed, ensuring that the imaging range is highly matched with the event association area, improving the effectiveness and relevance of imaging, making the identification of high-speed dynamic targets more accurate and reliable, and improving the overall adaptability of the imaging system and the user experience.

[0026] It should be noted that, to address the technical problems of traditional imaging devices using rolling shutters, such as the rolling shutter effect, poor image quality, and difficulty in accurately recognizing high-speed dynamic targets like gestures and rapid body movements, related technologies typically employ image cropping to increase the imaging frame rate, or optimize imaging effects by increasing pixel size and using global exposure. However, image cropping reduces the imaging field of view, affecting the user experience; increasing pixel size and using global exposure increase hardware costs, and global exposure, still a full-frame imaging output mode, generates a large amount of invalid data, making it difficult to overcome the bottleneck of high frame rate imaging. Furthermore, traditional imaging systems have relatively fixed imaging areas and operating modes, resulting in weak adaptability to dynamic scenes, high data processing pressure, and difficulty in balancing image quality, response speed, and accuracy in dynamic target recognition, thus failing to meet the precise imaging and recognition requirements in high-speed dynamic scenes. The control circuit 1 proposed in this application, through the coordinated operation of the single-photon avalanche diode dynamic visual sensing pixel array 10, the global shutter readout circuit 20 and the control module 30, can achieve accurate recognition of high-speed dynamic targets without sacrificing the field of view or increasing hardware costs, while avoiding the rolling shutter effect and improving image quality. It balances imaging efficiency, response speed and user experience, and better adapts to the imaging and recognition needs in high-speed dynamic scenes.

[0027] For example, such as Figure 3 As shown, the single-photon avalanche diode dynamic vision sensing pixel array 10 adopts a pixel array arrangement design, with a 16×16 pixel array as the smallest unit to form the overall image sensor. The overall image sensor can be realized by splicing multiple smallest units. For example, an image sensor with 4032×3024 pixels can be spliced ​​by 252×189 16×16 smallest units.

[0028] For example, a 16×16 pixel array is configured with single-photon avalanche diode dynamic visual sensing pixels 100 and conventional pixels, wherein the density of single-photon avalanche diode dynamic visual sensing pixels 100 is 6.25%, and the density of single-photon avalanche diode dynamic visual sensing pixels 100 can be appropriately adjusted within the range of 1% to 25% according to actual needs and image quality effects. Too many single-photon avalanche diode dynamic visual sensing pixels 100 will affect the image quality performance of conventional pixels.

[0029] For example, the single-photon avalanche diode dynamic visual sensing pixels 100 in the 16×16 pixel array can be arranged in the G channel (Green Channel) of the regular pixels, or they can occupy part of the R / B channel (Red / Blue Channel). The specific arrangement of the single-photon avalanche diode dynamic visual sensing pixels 100 in each 16×16 pixel array can be flexibly adjusted without fixed arrangement restrictions.

[0030] For example, if the single-photon avalanche diode dynamic vision sensor pixel 100 detects a brightness change that reaches a preset threshold, it will output a control signal to the global shutter control circuit, which will control the regular pixels within a 16×16 range around the single-photon avalanche diode dynamic vision sensor pixel 100 to read out the signal in a global shutter mode, while the regular pixels around the single-photon avalanche diode dynamic vision sensor pixel 100 that do not reach the preset threshold will read out the signal in a rolling shutter mode.

[0031] For example, such as Figure 1 As shown, Figure 1 DC is the DC bias terminal, VDD is the internal power supply terminal, and VSS is the internal ground terminal.

[0032] like Figure 1 , Figure 4 and Figure 5 As shown, in some embodiments of this application, optionally, the single-photon avalanche diode dynamic vision sensing pixel 100 includes a front-end circuit 110, which includes:

[0033] Single-photon avalanche diode (SPAD) is used to convert incident photons into avalanche current pulse signals;

[0034] The reset transistor RST is coupled to the single-photon avalanche diode SPAD and is used to reset the single-photon avalanche diode SPAD after it generates an avalanche current pulse signal.

[0035] The NOT gate amplifier 111 is coupled to the single-photon avalanche diode SPAD and is used to shape the avalanche current pulse signal into a standard digital square wave signal.

[0036] The adjustable delay circuit 112, coupled to the NAND gate amplifier 111, is used to adjust the output delay of the standard digital square wave signal.

[0037] In the above embodiment, the single-photon avalanche diode dynamic visual sensing pixel 100 includes a front-end circuit 110, which includes a single-photon avalanche diode SPAD, a reset transistor RST, a NOT gate amplifier 111, and an adjustable delay circuit 112. The single-photon avalanche diode SPAD can convert incident photons into avalanche current pulse signals, realizing accurate perception of light signals and providing a basis for brightness change event detection. The reset transistor RST is coupled to the single-photon avalanche diode SPAD and can reset the single-photon avalanche diode SPAD after it generates an avalanche current pulse signal, ensuring the single-photon avalanche diode... The SPAD tube can continuously and stably detect photons, improving the continuity and reliability of the single-photon avalanche diode dynamic vision sensing pixel 100. The NOT gate amplifier 111 is coupled to the single-photon avalanche diode SPAD, which can shape the avalanche current pulse signal into a standard digital square wave signal, standardize the signal format, improve the accuracy of signal transmission and anti-interference ability, and facilitate signal processing by subsequent circuits. The adjustable delay circuit 112 is coupled to the NOT gate amplifier 111, which can adjust the output delay of the standard digital square wave signal, so that the signal output timing matches the working timing of subsequent circuits, improving the coordination between the single-photon avalanche diode dynamic vision sensing pixel 100 and the overall circuit.

[0038] For example, a standard digital square wave signal can be a rectangular pulse signal adapted to a +5V power supply voltage. Its standard characteristics and specification format can adopt the following schemes: Scheme 1: High level 3.3V to 5.0V, low level 0V to 0.8V, rise and fall times ≤10ns, duty cycle 50%, period 20ns. Scheme 2: High level 4.0V to 5.0V, low level 0V to 0.5V, rise and fall times ≤8ns, duty cycle 50%, period 50ns. Scheme 3: High level 3.5V to 5.0V, low level 0V to 0.6V, rise and fall times ≤9ns, duty cycle 50%, period 80ns, avoiding the uncertain level range of 1.5V to 3.5V, and adapting to the signal recognition and transmission requirements of subsequent adjustable delay circuits and digital counters. For example, such as... Figure 4 As shown, the event triggering logic module 130 includes an event output switch and a counter output switch. The counter output switch controls the output of the count value of the digital counter 120 and can be selected to output the current count value according to system requirements, which is convenient for subsequent data processing or storage. The event output switch controls the output of the event trigger signal. When the count value of the digital counter 120 reaches a preset threshold, the event triggering logic module 130 generates an event signal, which is output externally after being selected by the event output switch, realizing real-time response to dynamic visual events.

[0039] For example, the sensitivity of the single-photon avalanche diode dynamic visual sensing pixel 100 can be adjusted by the adjustable delay circuit 112. The bias voltage can be adjusted by the voltage adjustment unit 170 to change the time distance between the pulse square waves in the adjustable delay circuit 112, thereby realizing the adjustment of the sensitivity of the single-photon avalanche diode dynamic visual sensing pixel 100.

[0040] For example, when the single-photon avalanche diode dynamic visual sensing pixel 100 is working, there is a cycle process of reset stage and exposure stage. In the reset stage, the single-photon avalanche diode SPAD is reset and cleared by controlling the reset transistor RST to close through the control signal. In the exposure stage, the control signal controls the reset transistor RST to open, the single-photon avalanche diode SPAD starts to receive photons and generate avalanche current pulse signal. After the exposure is completed, it re-enters the reset stage and completes one working cycle.

[0041] like Figure 1 and Figure 5 As shown, in some embodiments of this application, optionally, the adjustable delay circuit 112 includes:

[0042] The delay control unit 160 has a control terminal and is used to perform delay processing on a standard digital square wave signal.

[0043] The voltage regulation unit 170 is coupled to the control terminal of the delay control unit 160. The voltage regulation unit 170 is used to control the delay time of the delay control unit 160 by adjusting the input voltage.

[0044] In the above embodiment, the adjustable delay circuit 112 includes a delay control unit 160 and a voltage adjustment unit 170. The delay control unit 160 has a control terminal and can perform delay processing on the standard digital square wave signal to achieve controllable adjustment of the signal output time. The voltage adjustment unit 170 is coupled to the control terminal of the delay control unit 160 and can control the delay time of the delay control unit 160 by adjusting the input voltage, so that the delay time can be flexibly adjusted to adapt to the timing requirements of different scenarios, improve the flexibility and control accuracy of the adjustable delay circuit 112, and thus ensure the timing accuracy of the output signal of the single-photon avalanche diode dynamic visual sensing pixel 100.

[0045] For example, the adjustable delay circuit 112 is a three-level gated delay circuit composed of three gate circuits connected in series. The delay time of the circuit is extremely short. Its core function is not to achieve long delay, but to control the relationship between the control signals and avoid timing disorder during the operation of the circuit.

[0046] like Figure 1 and Figure 5As shown, in some embodiments of this application, optionally, the delay control unit 160 includes a first-level NOR gate 161, a second-level gate circuit 162, and a third-level NOT gate 163;

[0047] The secondary gate circuit 162 includes a first N-type metal-oxide-semiconductor transistor MD1, a second N-type metal-oxide-semiconductor transistor MD2, a first P-type metal-oxide-semiconductor transistor MD3, and a second P-type metal-oxide-semiconductor transistor MD4;

[0048] The first input terminal of the first-stage NOR gate 161 is used to receive the output signal of the NOT gate amplifier 111. The second input terminal of the first-stage NOR gate 161 is coupled to the output terminal of the third-stage NOT gate 163. The output terminal of the first-stage NOR gate 161 is coupled to the input terminal of the second-stage gate circuit 162.

[0049] The drain of the first N-type metal oxide semiconductor transistor MD1 is connected to the power supply voltage, and the source of the first N-type metal oxide semiconductor transistor MD1 is coupled to the drain of the second N-type metal oxide semiconductor transistor MD2.

[0050] The source of the first P-type metal oxide semiconductor transistor MD3 is grounded, and the drain of the first P-type metal oxide semiconductor transistor MD3 is coupled to the drain of the second P-type metal oxide semiconductor transistor MD4.

[0051] The source of the second N-type metal-oxide-semiconductor transistor MD2 is coupled to the source of the second P-type metal-oxide-semiconductor transistor MD4, and serves as the output of the second-level gate circuit 162, which is connected to the input of the third-level NOT gate 163.

[0052] The gate of the second N-type metal-oxide-semiconductor MD2 is interconnected with the gate of the second P-type metal-oxide-semiconductor MD4, serving as the input terminal of the secondary gate circuit 162.

[0053] The voltage regulation unit 170 includes a first control voltage terminal VD1 and a second control voltage terminal VD2. The first control voltage terminal VD1 is connected to the gate of the first N-type metal oxide semiconductor transistor MD1, and the second control voltage terminal VD2 is connected to the gate of the first P-type metal oxide semiconductor transistor MD3.

[0054] In the above embodiments, the delay control unit 160 includes a first-stage NOR gate 161, a second-stage gate circuit 162, and a third-stage NOT gate 163. The second-stage gate circuit 162 includes a first N-type metal-oxide-semiconductor transistor MD1, a second N-type metal-oxide-semiconductor transistor MD2, a first P-type metal-oxide-semiconductor transistor MD3, and a second P-type metal-oxide-semiconductor transistor MD4. The first input terminal of the first-stage NOR gate 161 is used to receive the output signal of the NOT gate amplifier 111, and the second input terminal of the first-stage NOR gate 161 is coupled to the output terminal of the third-stage NOT gate 163. The output of the first-stage NOR gate 161 is coupled to the input of the second-stage gate circuit 162, enabling preliminary logic processing of the input signal and ensuring signal transmission stability. The drain of the first N-type metal-oxide-semiconductor transistor MD1 is connected to the power supply voltage, the source of the first N-type metal-oxide-semiconductor transistor MD1 is coupled to the drain of the second N-type metal-oxide-semiconductor transistor MD2, the source of the first P-type metal-oxide-semiconductor transistor MD3 is grounded, and the drain of the first P-type metal-oxide-semiconductor transistor MD3 is coupled to the drain of the second P-type metal-oxide-semiconductor transistor MD4. The source of the second N-type metal-oxide-semiconductor (MOSFET) MD2 is coupled to the source of the second P-type MOSFET MD4 and serves as the output of the second-level gate circuit 162. This output is connected to the input of the third-level NOT gate 163, forming a stable signal transmission path for smooth signal transmission and delay adjustment. The gates of the second N-type MOSFET MD2 and the second P-type MOSFET MD4 are interconnected and serve as the input of the second-level gate circuit 162, ensuring the control consistency of the second-level gate circuit 162. The voltage adjustment unit 170 includes a first control voltage terminal VD1 and a second control voltage terminal VD2. The first control voltage terminal VD1 is connected to the gate of the first N-type MOSFET MD1, and the second control voltage terminal VD2 is connected to the gate of the first P-type MOSFET MD3. By adjusting the input voltages of the two control voltage terminals, the conduction state and conduction speed of the corresponding MOSFETs can be precisely controlled, thereby achieving fine adjustment of the delay time of the delay control unit 160, improving the accuracy and reliability of delay control. Simultaneously, the circuit structure is regular and easy to integrate.

[0055] For example, the delay control circuit of the single-photon avalanche diode dynamic visual sensing pixel 100 has a logic switch between an initial state and an operating state during operation. In the initial state, the reset transistor RST is turned on to clear the single-photon avalanche diode SPAD. In the operating state, according to the change of electrical signal after the single-photon avalanche diode SPAD receives the optical signal, the output and shutdown of the single-photon avalanche diode SPAD are controlled in an orderly manner by the voltage output by the first control voltage terminal VD1 and the second control voltage terminal VD2, so as to realize the accurate detection and transmission of optical signal.

[0056] For example, through signal closed-loop feedback between gate circuits and voltage regulation of the first control voltage terminal VD1 and the second control voltage terminal VD2, precise control of the operating timing of the single-photon avalanche diode SPAD is achieved. The specific action logic of its initial state and working state is as follows: In the initial state, the reset transistor RST is turned on to clear the single-photon avalanche diode SPAD. At this time, the input of the first-stage NOR gate 161 is the low-level output of the NOT gate amplifier 111 and the feedback output of the third-stage NOT gate 163. The first-stage NOR gate 161 outputs a high level; VD2 outputs a high voltage to control the second P-type metal-oxide-semiconductor transistor MD4 to turn on. The second-stage gate circuit 162 outputs a low level. After receiving the low-level signal, the third-stage NOT gate 163 outputs a high level, driving the charge transfer transistor TG to turn on. After the single-photon avalanche diode SPAD is cleared, the reset transistor RST is turned off, and the charge transfer transistor TG is turned off synchronously. After the single-photon avalanche diode (SPAD) enters the working state, it receives the optical signal and converts it into an electrical signal. The voltage across the SPAD drops, and the reset transistor RST remains off. The output of the first-stage NOR gate 161 remains high. The second control voltage terminal VD2 continuously controls the second P-type metal-oxide-semiconductor transistor MD4 to conduct, and the charge transfer transistor TG conducts again. The electrical signal of the SPAD is transmitted to the back-end trigger via the charge transfer transistor TG. After the charge transfer transistor TG conducts, it triggers a change in the input signal of the first-stage NOR gate 161, and the output of the first-stage NOR gate 161 flips to a low level. At this time, the first control voltage terminal VD1 outputs a low voltage to control the first N-type metal-oxide-semiconductor transistor MD1 to conduct, and the output of the second-stage gate circuit 162 flips to a high level. After receiving the high-level signal, the third-stage NOT gate 163 outputs a low level, and the charge transfer transistor TG turns off and controls the SPAD to stop outputting. Subsequently, by alternating voltage regulation of the first N-type metal oxide semiconductor diode MD1, the second N-type metal oxide semiconductor diode MD2, the first P-type metal oxide semiconductor diode MD3, and the second P-type metal oxide semiconductor diode MD4 through the first control voltage terminal VD1 and the second control voltage terminal VD2, the on and off of the charge transfer diode TG can be controlled in an orderly manner, thereby realizing the cyclic operation of output and shutdown of the single-photon avalanche diode SPAD.

[0057] For example, the single-photon avalanche diode dynamic vision sensing pixel 100 typically has a power supply voltage of +5V and a ground level of 0V; a high level is logic "1", with a level range of 65% to 100% of the power supply voltage, or a power supply voltage of -1.5V to +5V; a low level is logic "0", with a level range of no more than 35% of the power supply voltage, or a level range of 0V to 1.5V; +1.5V to +3.5V is an indeterminate level, and this level range should be avoided in hardware design.

[0058] like Figure 1 , Figure 4 and Figure 5 As shown, in some embodiments of this application, optionally, the single-photon avalanche diode dynamic visual sensing pixel 100 further includes:

[0059] The digital counter 120 is coupled to the adjustable delay circuit 112. The digital counter 120 is used to count up or down according to the number of triggers of the standard digital square wave signal to characterize the direction and amplitude of brightness change in the corresponding area of ​​the single-photon avalanche diode dynamic visual sensing pixel 100.

[0060] In the above embodiments, the single-photon avalanche diode dynamic visual sensing pixel 100 also includes a digital counter 120, which is coupled to an adjustable delay circuit 112. The digital counter 120 can count up or down according to the number of triggers of the standard digital square wave signal to characterize the direction and amplitude of brightness change in the corresponding area of ​​the single-photon avalanche diode dynamic visual sensing pixel 100, converting brightness change into quantifiable counting information, making the detection of brightness change more intuitive and accurate, providing precise data support for subsequent event triggering and imaging control, and improving the reliability of brightness change event recognition.

[0061] For example, the digital counter 120 is a digital up / down counter based on a D-type flip-flop, which can perform up or down counting operations according to the time difference between standard digital square wave signals. If the time difference between two pulse square waves is less than a preset threshold (e.g., 10ns), up counting is performed; if the time difference between two pulse square waves is greater than a preset threshold (e.g., 15ns), down counting is performed.

[0062] In some embodiments of this application, optionally, upward counting is used to characterize a change event of increased brightness in the corresponding area, and downward counting is used to characterize a change event of decreased brightness in the corresponding area.

[0063] In the above embodiments, upward counting is used to characterize the change event of increased brightness in the corresponding area, and downward counting is used to characterize the change event of decreased brightness in the corresponding area. This clarifies the correspondence between the counting direction of the digital counter 120 and the direction of brightness change, enabling the counting results to directly reflect the specific trend of brightness change, avoiding confusion in the judgment of the direction of brightness change, further improving the accuracy and clarity of brightness change event recognition, and providing a clear directional basis for the generation of subsequent event association information.

[0064] In some embodiments of this application, the single-photon avalanche diode dynamic visual sensing pixel 100 may optionally include an event triggering logic module 130, which is coupled to a digital counter 120 and is used to generate and output event-related information when the count value of the digital counter 120 exceeds a preset upward triggering threshold or falls below a preset downward triggering threshold.

[0065] In the above embodiments, the single-photon avalanche diode dynamic visual sensing pixel 100 also includes an event triggering logic module 130. The event triggering logic module 130 is coupled to the digital counter 120. When the count value of the digital counter 120 exceeds a preset upward triggering threshold or falls below a preset downward triggering threshold, the event triggering logic module 130 generates and outputs event-related information, realizes the automatic identification and reporting of valid brightness change events, can filter noise and interference caused by small brightness fluctuations, avoids false triggering of invalid events, reduces the generation of invalid data, improves the stability and reliability of event detection, and at the same time reduces the system data processing pressure and improves the response speed of the imaging system.

[0066] In some embodiments of this application, optionally, the event association information includes the location coordinates of the brightness change event, the direction of the brightness change, the change timestamp, and the brightness change amplitude. The event triggering logic module 130 is used to transmit the event association information to the control module 30.

[0067] In the above embodiments, the event association information includes the location coordinates of the brightness change event, the direction of the brightness change, the timestamp of the change, and the magnitude of the brightness change. The event triggering logic module 130 is used to transmit the event association information to the control module 30, which can provide the control module 30 with complete and comprehensive brightness change event information. This enables the control module 30 to accurately locate the occurrence of the brightness change event, determine the specific trend of the brightness change, and grasp the time and intensity of the event. This provides sufficient basis for the control module 30 to formulate accurate imaging control strategies, improves the rationality and accuracy of imaging control, and thus ensures the accuracy of imaging in the event-related area.

[0068] In some embodiments of this application, optionally, the control module 30 is specifically used for:

[0069] Receive event correlation information output by the single-photon avalanche diode dynamic visual sensing pixel array 10 to locate the center coordinates of the brightness change event;

[0070] The event-related region with a preset geometric shape is determined with the center coordinates as the origin, and the global shutter readout circuit 20 is controlled to perform global shutter imaging on the event-related region;

[0071] The global shutter readout circuit 20 controls the rolling shutter mode to be maintained in areas outside the event-related region.

[0072] In the above embodiments, the control module 30 is specifically used to receive event-related information output by the single-photon avalanche diode dynamic visual sensing pixel array 10, locate the center coordinates of the brightness change event, accurately lock the core area of ​​the brightness change event, and provide an accurate basis for the determination of the subsequent imaging area; determine the event-related area with a preset geometric shape using the center coordinates as the origin, and control the global shutter readout circuit 20 to perform global shutter imaging on the event-related area, which can specifically perform high-quality imaging of the dynamically changing area, ensuring that the imaging of the event-related area is distortion-free, clear and smooth; control the global shutter readout circuit 20 to maintain the rolling shutter mode for areas outside the event-related area, which can maintain the overall imaging field of view while ensuring the imaging quality of the event-related area, taking into account both imaging quality and system operating efficiency, and avoiding the problems of increased power consumption and excessive data volume caused by full-frame global shutter imaging.

[0073] In some embodiments of this application, optionally, the event triggering logic module 130 is specifically used for:

[0074] When the count value of digital counter 120 is greater than the preset upward trigger threshold or less than the preset downward trigger threshold, an event is reported.

[0075] In the above embodiments, the event triggering logic module 130 is specifically used to trigger event reporting when the count value of the digital counter 120 is greater than the preset upward triggering threshold or less than the preset downward triggering threshold. This clarifies the specific conditions for event triggering, further filtering out minor interference signals and ineffective brightness changes, avoiding false event triggering, improving the accuracy and robustness of event detection, ensuring that only real and significant brightness change events trigger imaging control actions, and guaranteeing the stability and efficiency of the imaging system.

[0076] like Figure 1 As shown, in some embodiments of this application, optionally, the event triggering logic module 130 includes:

[0077] NOT gate 131, the input terminal of NOT gate 131 is coupled to the output terminal of digital counter 120, and is used to invert the count value output by digital counter and the comparison signals of preset upward trigger threshold and preset downward trigger threshold;

[0078] AND gate 132 has its first input terminal coupled to the output terminal of NOT gate 131, its second input terminal connected to a clock signal, and its output terminal used to output an event reporting trigger signal.

[0079] In the above embodiments, the event triggering logic module 130 includes a NOT gate circuit 131 and an AND gate circuit 132. The input terminal of the NOT gate circuit 131 is coupled to the output terminal of the digital counter 120 and is used to invert the comparison signal between the count value output by the digital counter 120 and the preset upward trigger threshold and the preset downward trigger threshold. This can adjust the logic state of the comparison signal so that the signal meets the logic requirements of event triggering. The first input terminal of the AND gate circuit 132 is coupled to the output terminal of the NOT gate circuit 131, and the second input terminal is connected to the clock signal. The output terminal of the AND gate circuit 132 is used to output the event reporting trigger signal. Under the synchronization of the clock signal, it can output a stable and synchronous event reporting trigger signal, improve the timing consistency and anti-interference capability of event triggering, ensure the accuracy and reliability of event reporting, and ensure that the imaging system can respond to effective brightness change events in a timely manner.

[0080] For example, the event triggering logic module 130 also includes an automatic clock module CP, which generates and outputs a stable clock signal. The second input terminal of the AND gate circuit 132 is coupled to the output terminal of the automatic clock module CP to receive the clock signal output by the automatic clock module CP. Under the synchronization of the clock signal output by the automatic clock module CP, the event reporting trigger signal output by the AND gate circuit 132 has higher timing stability and anti-interference capability, which can further improve the accuracy and reliability of event reporting and ensure that the imaging system can respond to effective brightness change events in a timely manner.

[0081] like Figure 1 and Figure 6 As shown, in some embodiments of this application, optionally, the single-photon avalanche diode dynamic vision sensing pixel 100 further includes a global shutter imaging branch 140, which includes:

[0082] The charge transfer diode TG is coupled to a single-photon avalanche diode SPAD at one end and to a floating diffusion node FD at the other end, and is used to transfer the charge generated by the single-photon avalanche diode SPAD to the floating diffusion node FD.

[0083] The first amplifier A1 is coupled to the floating diffusion node FD at its input terminal and is used to amplify the voltage signal of the floating diffusion node FD.

[0084] Hold transistor is coupled to the output of the first amplifier A1 at one end and to the global storage capacitor C_gs at the other end. It is used to control the signal path between the first amplifier A1 and the global storage capacitor C_gs.

[0085] The global storage capacitor C_gs is coupled to the other end of the holding transistor Hold and is used to temporarily store the large voltage signal.

[0086] The second amplifier A2 has its input terminal coupled to the global storage capacitor C_gs, which is used to amplify the temporarily stored voltage signal again.

[0087] The reset transistor RST is also coupled to the floating diffusion node FD, and is used to reset and clear the floating diffusion node FD.

[0088] In the above embodiments, the single-photon avalanche diode dynamic visual sensing pixel 100 further includes a global shutter imaging branch 140. The global shutter imaging branch 140 includes a charge transfer transistor TG, a first amplifier A1, a holding transistor Hold, a global storage capacitor C_gs, and a second amplifier A2. One end of the charge transfer transistor TG is coupled to the single-photon avalanche diode SPAD, and the other end is coupled to the floating diffusion node FD. It is used to transfer the charge generated by the single-photon avalanche diode SPAD to the floating diffusion node FD, realizing the effective transfer of photogenerated charge and avoiding charge residue affecting imaging accuracy. The input terminal of the first amplifier A1 is coupled to the floating diffusion node FD, which is used to amplify the voltage signal of the floating diffusion node FD, improve the signal strength, and facilitate subsequent signal processing and readout. One end of the holding transistor Hold is coupled to the output terminal of the first amplifier A1, and the other end is coupled to the global storage capacitor C_gs. It is used to control the first... The signal path between amplifier A1 and global storage capacitor C_gs is switched on and off to achieve controllable transmission of the amplified voltage signal. Global storage capacitor C_gs is coupled to the other end of holding transistor Hold to temporarily store the amplified voltage signal, ensuring synchronous temporary storage of all pixel signals in global shutter mode, and achieving synchronous exposure and readout of pixels in the same area. The input terminal of second amplifier A2 is coupled to global storage capacitor C_gs to amplify the temporarily stored voltage signal again, further improving the signal driving capability and signal-to-noise ratio, and ensuring the clarity of the output image signal. Among them, reset transistor RST is also coupled to floating diffusion node FD to reset and clear floating diffusion node FD, avoiding residual charge on floating diffusion node FD from affecting the next signal acquisition, improving the accuracy and stability of imaging, and ensuring that global shutter imaging branch 140 can stably and efficiently complete signal acquisition, temporary storage and readout.

[0089] For example, when the charge transfer transistor TG of the global shutter imaging branch 140 performs charge transfer operation, the operation logic is different in different imaging modes. In the rolling shutter mode, the charge transfer transistor TG is activated first, and then the first selection transistor R_SET is activated to transmit the electrical signal of the floating diffusion node FD to the first amplifier A1 and select the output. In the global shutter mode, the charge transfer transistor TG is activated first, and after the first selection transistor R_SET is kept off, the holding transistor Hold is activated to inject the electrical signal of the floating diffusion node FD into the global storage capacitor C_gs for temporary storage. When it is necessary to read, the second selection transistor G_SET is activated.

[0090] like Figure 1 and Figure 6 As shown, in some embodiments of this application, optionally, the global shutter imaging branch 140 further includes:

[0091] The first selector R_SET has its input coupled to the floating diffuser node FD, and its output is used to output the image signal of the rolling shutter mode.

[0092] The second selector G_SET has its input terminal coupled to the output terminal of the second amplifier A2, and its output terminal is used to output the image signal of the global shutter mode.

[0093] In the above embodiment, the global shutter imaging branch 140 further includes a first selection transistor R_SET and a second selection transistor G_SET. The input terminal of the first selection transistor R_SET is coupled to the floating diffusion node FD, and the output terminal is used to output the image signal of the rolling shutter mode, which can realize the independent output of the image signal in the rolling shutter mode. The input terminal of the second selection transistor G_SET is coupled to the output terminal of the second amplifier A2, and the output terminal is used to output the image signal of the global shutter mode, which can realize the independent output of the image signal in the global shutter mode. By setting the two selection transistors, the image signals of the two imaging modes are output separately, ensuring clear switching between the two imaging modes without interference, improving the mode adaptability and usage flexibility of the imaging system, and enabling the imaging system to flexibly select the appropriate imaging mode according to the needs of the scene.

[0094] For example, such as Figure 6 As shown, SF1 is the first source follower and SF2 is the second source follower; the first amplifier A1 includes the first source follower SF1, which is used to amplify the voltage signal of the floating diffusion node FD; the second amplifier A2 includes the second source follower SF2, which is used to buffer and amplify the signal on the global storage capacitor C_gs.

[0095] It should be noted that in related technologies, the pixel circuit of the rolling shutter mode is as follows: Figure 7 As shown, the global shutter imaging branch 140 proposed in this application, as... Figure 6 As shown, the adaptive selection of rolling shutter mode and global shutter mode can be realized according to the application. Compared with the rolling shutter circuit of related technologies, this branch achieves dual-mode switching by adding devices such as holding tube and global storage capacitor, without additional hardware cost.

[0096] For example, the workflow of the global shutter imaging branch 140 includes three stages: pixel exposure, charge transfer, and analog voltage quantization. By controlling the on / off timing of devices such as the reset transistor RST, charge transfer transistor TG, and holding transistor Hold, adaptive switching between rolling shutter and global shutter modes is achieved. Specifically, before pixel exposure, the reset transistor RST, charge transfer transistor TG, and holding transistor Hold are simultaneously turned on to clear the residual charge in the single-photon avalanche diode SPAD, the floating diffusion node FD, and the global storage capacitor C_gs. After clearing, these devices are simultaneously turned off, and the single-photon avalanche diode SPAD enters the exposure state. Electron-hole pairs generated by the light signal are separated under the influence of the internal electric field of the single-photon avalanche diode SPAD, achieving the accumulation of photogenerated charge. After entering the charge transfer stage, if it is the rolling shutter mode, the charge transfer transistor TG is activated first to clear the photogenerated charge in the single-photon avalanche diode SPAD. Charge is transferred to the floating diffusion node FD, causing its voltage to drop. Then, the first selector transistor R_SET is activated, and the electrical signal from the floating diffusion node FD is amplified by the first source follower SF1 and then output. In global shutter mode, the charge transfer transistor TG is activated first to complete the charge transfer from the single-photon avalanche diode SPAD to the floating diffusion node FD. While keeping the first selector transistor R_SET off, the holding transistor Hold is activated, and the electrical signal from the floating diffusion node FD is injected into the global storage capacitor C_gs via the first amplifier A1 for temporary storage. When reading is needed, the second selector transistor G_SET is activated, and the signal in the global storage capacitor C_gs is amplified by the second source follower SF2 and then output. During the analog voltage quantization stage, the analog exposure signals output in both modes are transmitted to the analog-to-digital converter module for processing, converted into digital signals to form image data, and finally transmitted to the backend application processor for further processing via the mobile industry processor interface. Figure 1 As shown, R_sig is the image signal output terminal for rolling shutter mode; G_sig is the image signal output terminal for global shutter mode.

[0097] like Figure 1 As shown, in some embodiments of this application, optionally, the output terminal of the adjustable delay circuit 112 is coupled to the control terminal of the charge transfer transistor TG, and is used to control the conduction timing of the charge transfer transistor TG according to the delay adjustment signal to match the exposure timing of the global shutter.

[0098] In the above embodiment, the output terminal of the adjustable delay circuit 112 is coupled to the control terminal of the charge transfer transistor TG, and is used to control the conduction timing of the charge transfer transistor TG according to the delay adjustment signal to match the exposure timing of the global shutter. This enables the conduction time of the charge transfer transistor TG to be precisely synchronized with the exposure timing of the global shutter, avoiding problems such as incomplete charge transfer and signal acquisition distortion caused by timing deviations. This improves the accuracy of signal acquisition in the global shutter imaging branch 140, thereby ensuring the imaging quality in the global shutter mode and making the imaging of the event-related area clearer and more stable.

[0099] Optionally, in some embodiments of this application, the global shutter readout circuit 20 has a global shutter mode and a rolling shutter mode;

[0100] In the absence of a detected brightness change event, the global shutter readout circuit 20 is in rolling shutter mode;

[0101] When a brightness change event is detected, the global shutter readout circuit 20 switches to global shutter mode under the control of the control module 30 and performs global shutter imaging on the event-related area corresponding to the event-related information.

[0102] In the above embodiments, the global shutter readout circuit 20 has a global shutter mode and a rolling shutter mode. When no brightness change event is detected, the global shutter readout circuit 20 is in the rolling shutter mode, which can maintain the imaging requirements in normal scenes and reduce system power consumption. When a brightness change event is detected, the global shutter readout circuit 20 switches to the global shutter mode under the control of the control module 30 and performs global shutter imaging on the event-related area corresponding to the event-related information. This can specifically improve the imaging quality of the event-related area and avoid the rolling shutter effect. Through the adaptive switching between the two modes, the low power consumption requirements of normal scenes and the high-quality imaging requirements of dynamic scenes are taken into account, thereby improving the overall performance and adaptability of the imaging system.

[0103] like Figure 8 As shown, the second aspect of this application proposes an electronic device 2, including a control circuit 1 as provided in any of the first aspects of this application. Therefore, all the same technical effects can be achieved, and to avoid repetition, further details are omitted here.

[0104] For example, the analog voltage quantization stage of control circuit 1 transmits the exposure signal level to the analog-to-digital converter (ADC) for processing, converts the analog signal into a digital signal value and forms an image, and finally transmits the image data to the back-end application processor (AP) for subsequent processing through the Mobile Industry Processor Interface (MIPI).

[0105] For example, a single-photon avalanche diode (SPAD) operates in Geiger mode, with a bias voltage higher than its breakdown voltage. After receiving a single photon, the photogenerated carriers are accelerated by a strong electric field and undergo collisional ionization, generating a large number of carriers to form an avalanche effect, which in turn generates an observable reverse current, thus enabling the detection of a single photon.

[0106] For example, the imaging module equipped with control circuit 1 can adopt a conventional structural design, including components such as a protective film, lens, voice coil motor (VCM), holder, infrared filter (IR), sensor, flexible printed circuit (FPC), and connector, which can achieve mass production.

[0107] It is understood that the electronic device 2 in this application embodiment can be a terminal or other devices besides a terminal. For example, the electronic device 2 can be a mobile phone, tablet computer, laptop computer, handheld computer, in-vehicle electronic device, mobile internet device (MID), augmented reality (AR) / virtual reality (VR) device, robot, wearable device, ultra-mobile personal computer (UMPC), netbook, or personal digital assistant (PDA) and other devices with image acquisition and imaging control functions. It can also be a server, network attached storage (NAS), personal computer (PC), television (TV), ATM, or self-service machine and other devices with image data processing and imaging control functions. This application embodiment does not specifically limit the scope of the electronic device 2.

[0108] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0109] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A control circuit, characterized in that, include: A single-photon avalanche diode dynamic visual sensing pixel array, comprising multiple single-photon avalanche diode dynamic visual sensing pixels, wherein the single-photon avalanche diode dynamic visual sensing pixels are used to detect brightness change events in a scene and output event correlation information; A global shutter readout circuit, coupled to the single-photon avalanche diode dynamic visual sensing pixel array, is used to receive the event association information and perform global shutter high-speed imaging on the event association area; The control module is coupled to the single-photon avalanche diode dynamic visual sensing pixel array and the global shutter readout circuit, respectively, and is used to control the imaging area and working mode of the global shutter readout circuit according to the event association information, wherein the imaging area is the area for imaging the event association area.

2. The control circuit according to claim 1, characterized in that, The single-photon avalanche diode dynamic vision sensing pixel includes a front-end circuit, which includes: Single-photon avalanche diode is used to convert incident photons into avalanche current pulse signals; A reset transistor, coupled to the single-photon avalanche diode, is used to reset the single-photon avalanche diode after the single-photon avalanche diode generates an avalanche current pulse signal; An NOT gate amplifier, coupled to the single-photon avalanche diode, is used to shape the avalanche current pulse signal into a standard digital square wave signal; An adjustable delay circuit, coupled to the NOT gate amplifier, is used to adjust the output delay of the standard digital square wave signal.

3. The control circuit according to claim 2, characterized in that, The adjustable delay circuit includes: A delay control unit has a control terminal, and the delay control unit is used to perform delay processing on the standard digital square wave signal; A voltage regulation unit is coupled to the control terminal of the delay control unit, and the voltage regulation unit is used to control the delay time of the delay control unit by adjusting the input voltage.

4. The control circuit according to claim 2, characterized in that, The single-photon avalanche diode dynamic vision sensing pixel also includes: A digital counter, coupled to the adjustable delay circuit, is used to count up or down according to the number of triggers of the standard digital square wave signal, so as to characterize the direction and magnitude of brightness change in the corresponding area of ​​the single-photon avalanche diode dynamic visual sensing pixel.

5. The control circuit according to claim 4, characterized in that, The digital counter counts upwards to represent events where the brightness of the corresponding area increases, and counts downwards to represent events where the brightness of the corresponding area decreases.

6. The control circuit according to claim 4, characterized in that, The single-photon avalanche diode dynamic visual sensing pixel also includes an event triggering logic module, which is coupled to the digital counter and is used to generate and output the event association information when the count value of the digital counter exceeds a preset upward triggering threshold or falls below a preset downward triggering threshold.

7. The control circuit according to claim 6, characterized in that, The event association information includes the location coordinates of the brightness change event, the direction of the brightness change, the change timestamp, and the brightness change amplitude. The event triggering logic module is used to transmit the event association information to the control module.

8. The control circuit according to claim 7, characterized in that, The control module is specifically used for: Receive the event association information output by the single-photon avalanche diode dynamic visual sensing pixel array, and locate the center coordinates of the brightness change event; The event association region with a preset geometric shape is determined with the center coordinates as the origin, and the global shutter readout circuit is controlled to perform global shutter imaging on the event association region; The global shutter readout circuit is controlled to maintain the rolling shutter mode for areas outside the event-related region.

9. The control circuit according to claim 2, characterized in that, The single-photon avalanche diode dynamic vision sensing pixel further includes a global shutter imaging branch, which includes: A charge transfer transistor, with one end coupled to the single-photon avalanche diode and the other end coupled to a floating diffusion node, is used to transfer the charge generated by the single-photon avalanche diode to the floating diffusion node. The first amplifier, with its input terminal coupled to the floating diffusion node, is used to amplify the voltage signal of the floating diffusion node. The holding tube is coupled to the output of the first amplifier at one end and to the global storage capacitor at the other end, and is used to control the on / off of the signal path between the first amplifier and the global storage capacitor. The global storage capacitor is coupled to the other end of the holding tube and is used to temporarily store the voltage signal after it has been enlarged. The second amplifier, with its input terminal coupled to the global storage capacitor, is used to amplify the temporarily stored voltage signal again. The reset transistor is also coupled to the floating diffusion node and is used to reset and clear the floating diffusion node.

10. An electronic device, characterized in that, Includes the control circuit as described in any one of claims 1 to 9.

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