Analog counting device based on feedback charge injection, ranging device and electronic device

Abstract

The application discloses a kind of analog counting device based on feedback charge injection, ranging device and electronic equipment, analog counting device includes single-photon avalanche diode, single-photon avalanche diode exports initial signal corresponding with avalanche event;Quenching and reset circuit, quenching and reset circuit quench initial signal and output count trigger signal;Analog counter, after receiving count trigger signal, a fixed charge packet is released to integration node by feedback charge injection, so that the corresponding step change of output voltage is generated to carry out analog field accumulation to photon counting event.The application can realize the step length stability and linearity promotion of analog counter in event accumulation process;To avoid output saturation and expand dynamic range, the application also introduces self-flipping and chopping control in analog counter, automatically flips when output voltage is close to threshold value, so high dynamic range is obtained, and can be used for indirect time-of-flight ranging.

Description

Technical Field

[0001] This application relates to the field of photon counting, and in particular to an analog counting device, ranging device and electronic device based on feedback charge injection. Background Technology

[0002] Single-photon avalanche diodes (SPADs) possess single-photon sensitivity and are commonly used in time-of-flight (ToF) ranging, low-light imaging, and photon counting systems. In related technologies, intra-pixel counting typically employs a digital counter or a combination of a time-to-digital converter (TDC) / histogram structure to acquire time information. However, implementing digital counters and TDCs within a pixel results in significant area and power consumption, and also presents challenges in readout bandwidth and resource allocation for large arrays. To reduce pixel complexity and improve fill factor, some solutions employ analog counting, converting each trigger event into a voltage increase / decrease, accumulating the voltage, and then reading it out using an ADC.

[0003] In related technologies, the disadvantage of analog counters is that the output step size is prone to drift during event accumulation, which leads to a deterioration in linearity. Summary of the Invention

[0004] This application proposes an analog counting device, ranging device, and electronic device based on feedback charge injection, which can achieve step size stability and linearity improvement of the analog counter during event accumulation.

[0005] The analog counting device based on feedback charge injection according to the first aspect of this application includes: A single-photon avalanche diode is used to generate an avalanche event triggered by an incident photon and output an initial signal corresponding to the avalanche event. A quenching and reset circuit is provided, wherein the input terminal of the quenching and reset circuit is connected to the single-photon avalanche diode for quenching the initial signal after detecting the initial signal, and for resetting the state of the single-photon avalanche diode and outputting a counting trigger signal after quenching according to a preset holding time. An analog counter, the input of which is connected to the output of the quenching and reset circuit, after receiving the counting trigger signal, releases a fixed charge packet to the integration node through feedback charge injection, causing the output voltage to change in a corresponding step to perform analog domain accumulation of photon counting events.

[0006] According to some embodiments of this application, the single-photon avalanche diode includes: P-type substrate; A photosensitive active region, comprising an overlapping P+ region and an N-well region to form a P+ / N-well avalanche junction, wherein the photosensitive active region is disposed on the P-type substrate; A shallow trench isolation zone surrounds the P+ region; A deep N-well is disposed between the photosensitive active region and the P-type substrate.

[0007] According to some embodiments of this application, the photosensitive active region has a circular layout, and the single-photon avalanche diode further includes: P-well protection ring, wherein the P-well protection ring is disposed around the N-well region; and / or The edge of the P+ region extends outward by a certain distance.

[0008] According to some embodiments of this application, the quenching and reset circuit includes: power supply; Transistor M1, transistor M2, and transistor M3 are provided. One end of transistor M1 is connected to the power supply, the other end of transistor M1 is connected to one end of transistor M2, the other end of transistor M2 is connected to one end of transistor M3, the other end of transistor M3 is grounded, and the common terminal of transistor M2 and transistor M3 is connected to the cathode of the single-photon avalanche diode. A first inverter with a low threshold voltage is provided. The input terminal of the first inverter is connected to the common terminal of transistors M2 and M3, and the output terminal of the first inverter is connected to the control terminal of transistor M2. The power supply terminal of the first inverter is connected to the power supply, and the ground terminal of the first inverter is grounded. A programmable delay buffer, wherein the input terminal of the programmable delay buffer is connected to the output terminal of the first inverter, the power supply terminal of the programmable delay buffer is connected to the power supply, and the ground terminal of the programmable delay buffer is grounded; The programmable delay buffer is connected to the first input of the NOR gate and the input of the fixed delay buffer. The output of the programmable delay buffer is connected to the second input of the NOR gate and the control terminals of transistor M1 and transistor M3, respectively. A pulse shaping circuit is provided, wherein the output terminal of the fixed delay buffer is connected to the input terminal of the pulse shaping circuit, and the output terminal of the pulse shaping circuit is used to output a counting trigger signal.

[0009] According to some embodiments of this application, the analog counter includes: First capacitor module; A first switch module, the input terminal of which is connected to the first capacitor module; The second switch module has its input terminal connected to the output terminal of the first switch module, and its control terminal connected to the output terminal of the quenching and reset circuit. The second capacitor module is connected to the output terminal of the second switch module; A feedback charge injection circuit, wherein the input terminal of the feedback charge injection circuit is connected to the second capacitor module, and the output terminal of the feedback charge injection circuit is connected to the control terminal of the first switch module; An analog counting output terminal is connected to the input terminal of the first switch module. Specifically, when the quenching and reset circuit does not output a counting trigger signal, the second switch module is turned off and the first switch module is turned on; when the quenching and reset circuit outputs a counting trigger signal, the second switch module is turned on, causing the charge of the first capacitor module to be transferred to the second capacitor module via the first switch module and the second switch module. When the feedback charge injection circuit detects that the capacitor voltage of the second capacitor module rises to a preset reference threshold, the first switch module is turned off to release a fixed charge packet at the integration node, causing the output voltage of the analog counting output terminal to produce a corresponding step change to perform analog domain accumulation of photon counting events.

[0010] According to some embodiments of this application, a first virtual transistor is provided in the first switch module; and / or, a second virtual transistor is provided in the second switch module.

[0011] According to some embodiments of this application, the first capacitor module includes a common voltage terminal and a first capacitor. The common voltage terminal is connected to the input terminal of the first switch module via a first switch CH1A and a second switch CH2A connected in series. The common voltage terminal is also connected to the input terminal of the first switch module via a third switch CH2B and a fourth switch CH1B connected in series. One end of the first capacitor is connected to the common terminal of the first and second switches, and the other end of the first capacitor is connected to the common terminal of the third and fourth switches. The analog counter further includes: An upper threshold detection link and a lower threshold detection link are provided, wherein the input terminals of the upper threshold detection link and the lower threshold detection link are both connected to the analog counting output terminal, and the switching states of the upper threshold detection link and the lower threshold detection link are complementary. A latch, the input of which is connected to the output of the upper threshold detection link and the lower threshold detection link, respectively; A flip-over chopper circuit, the input of which is connected to the output of the latch, is used to output complementary control signals CH1 and CH2. The switching states of the first switch CH1A, the third switch CH2B, and the upper threshold detection link are controlled by the control signal CH1, while the switching states of the second switch CH2A, the fourth switch CH1B, and the lower threshold detection link are controlled by the control signal CH2. The upper threshold detection link is used to perform upper threshold detection on the output voltage of the analog counting output terminal, and the lower threshold detection link is used to perform lower threshold detection on the output voltage of the analog counting output terminal. When the output voltage of the analog counting output terminal reaches the lower threshold or the upper threshold, the latch updates its toggle state and switches the corresponding states of the control signals CH1 and CH2.

[0012] According to some embodiments of this application, the flip-over chopper circuit includes: An OR gate, wherein the first input terminal of the OR gate is connected to the output terminal of the latch, and the second input terminal of the OR gate is used to input an OR gate enable signal; The AND gate has its first input connected to the output of the OR gate, and its second input is used to input a chopper control signal. The first control signal output terminal is connected to the first control signal output terminal through the AND gate via the NOT gate. The first control signal output terminal is used to output the control signal CH1. The second control signal output terminal is connected to the output terminal of the AND gate through a transmission gate. The second control signal output terminal is used to output the control signal CH2.

[0013] The ranging device according to a second aspect of this application includes a modulated light emission module, an analog counting device based on feedback charge injection as described in the first aspect embodiment, and a controller; The controller is connected to the modulated light emission module and the analog counting device, respectively. The controller emits modulated light through the modulated light emission module and receives the echo signal corresponding to the modulated light through the analog counting device. It switches the chopping state according to the phase window boundary of the modulation period to form two sets of differential correlation quantities within the complementary phase window. The phase delay is calculated and the distance is converted based on the two sets of differential correlation quantities.

[0014] An electronic device according to a third aspect of this application includes an analog counting device based on feedback charge injection as described in the first aspect embodiment.

[0015] The analog counting device, ranging device, and electronic device based on feedback charge injection according to the embodiments of this application have at least the following beneficial effects: In this embodiment, an avalanche event is generated by a single-photon avalanche diode triggered by incident photons, and an initial signal corresponding to the avalanche event is output. Then, a quenching and reset circuit detects the initial signal, quenches it, resets the state of the single-photon avalanche diode according to a preset hold time, and outputs a counting trigger signal. After receiving the counting trigger signal, the analog counter releases a fixed charge packet to the integration node through feedback charge injection, causing a corresponding step change in the output voltage to accumulate the photon counting event in the analog domain. This application uses feedback charge injection in the analog counter to make the equivalent charge packet of a single event closer to constant, reducing the impact of input pulse width variations on the output step size, improving differential and integral nonlinear performance, and achieving step size stability and improved linearity of the analog counter during event accumulation. This application also introduces self-flipping and chopper control into the analog counter, automatically flipping when the output voltage approaches a threshold, thereby obtaining a high dynamic range and can be used for indirect time-of-flight ranging.

[0016] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0017] The present application will be further described below with reference to the accompanying drawings and embodiments, wherein: Figure 1 This is a schematic block diagram of the analog counting device based on feedback charge injection in the embodiments of this application; Figure 2 This is a cross-sectional view of the single-photon avalanche diode in an embodiment of this application; Figure 3 This is a circuit diagram of the quenching and reset circuit in an embodiment of this application; Figure 4 This is a circuit diagram of the analog counter in the embodiments of this application; Figure 5 This is a timing diagram of the analog counter in the embodiments of this application; Figure 6 This is a circuit diagram of the self-flipping and chopper control circuit in an embodiment of this application; Figure 7 This is a schematic diagram illustrating the automatic flipping behavior of dynamic range expansion in an embodiment of this application; Figure 8 This is a schematic diagram of the ranging principle of indirect time-of-flight ranging in the embodiments of this application. Detailed Implementation

[0018] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0019] In the description of this application, it should be understood that the orientation descriptions, such as up, down, etc., are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0020] In the description of this application, "multiple" refers to two or more. The use of "first" and "second" is for the purpose of distinguishing technical features only and should not be construed as indicating or implying relative importance, or implicitly indicating the number of technical features indicated, or the order in which the technical features are indicated.

[0021] In the description of this application, unless otherwise expressly defined, terms such as "setup," "installation," and "connection" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this application in conjunction with the specific content of the technical solution.

[0022] Reference Figure 1 As shown, an analog counting device based on feedback charge injection includes: A single-photon avalanche diode is used to generate an avalanche event triggered by an incident photon and output an initial signal corresponding to the avalanche event. The quenching and reset circuit is connected to the input of a single-photon avalanche diode to quench the initial signal after it is detected, and to reset the state of the single-photon avalanche diode and output a counting trigger signal after quenching according to a preset holding time. The analog counter's input is connected to the output of the quenching and reset circuit. After receiving the counting trigger signal, the analog counter releases a fixed charge packet to the integration node through feedback charge injection, causing the output voltage to change in steps to perform analog domain accumulation of photon counting events.

[0023] Specifically, the function of a single-photon avalanche diode is to generate an avalanche event upon triggering by an incident photon and output an initial signal corresponding to the avalanche event. This initial signal serves as the input to the quenching and reset circuit, indicating the occurrence of an avalanche and triggering the subsequent quenching and reset process.

[0024] The quenching and reset circuit quenches the avalanche after it is detected, stopping the avalanche current and reducing the risk of afterpulse. After the hold time ends, the quenching and reset circuit resets the single-photon avalanche diode, restoring it to a state where it can detect photons again. Simultaneously, the quenching and reset circuit generates and outputs a digital pulse signal as a counting trigger signal to the analog counter.

[0025] The analog counter receives the counting trigger signal and performs analog domain accumulation on photon counting events. Whenever the counting trigger signal arrives, the analog counter releases a fixed charge packet at the integration node through feedback charge injection, causing a corresponding step change in the output voltage, thereby accumulating and counting photon events. The analog counter uses feedback charge injection to improve the consistency of single charge packets and enhance accumulation linearity.

[0026] It should be noted that the output of the analog counter is an analog voltage corresponding to the accumulation result, which is used for on-chip reading and subsequent processing.

[0027] In this embodiment, an avalanche event is generated by a single-photon avalanche diode triggered by incident photons, and an initial signal corresponding to the avalanche event is output. Then, a quenching and reset circuit detects the initial signal, quenches it, resets the state of the single-photon avalanche diode according to a preset hold time, and outputs a counting trigger signal. After receiving the counting trigger signal, the analog counter releases a fixed charge packet to the integration node through feedback charge injection, causing a corresponding step change in the output voltage to accumulate the photon counting event in the analog domain. This application uses feedback charge injection in the analog counter to make the equivalent charge packet of a single event closer to constant, reducing the impact of input pulse width variations on the output step size, improving differential and integral nonlinear performance, and achieving step size stability and improved linearity of the analog counter during event accumulation.

[0028] In some implementations, a single-photon avalanche diode may include: P-type substrate; The photosensitive active region includes overlapping P+ and N-well regions to form a P+ / N-well avalanche junction, and the photosensitive active region is disposed on a P-type substrate. Shallow trench isolation zone, surrounding the P+ zone; A deep N-well is positioned between the photosensitive active region and the P-type substrate.

[0029] For details, please refer to Figure 2As shown, the P-type substrate is a semiconductor substrate doped with acceptor impurities. The photosensitive active region is an 11 µm active region defined by the overlap of the central P+ injection region and the N-well, forming a P+ / N-well avalanche junction as the main junction region for photon-triggered avalanche. The shallow trench isolation (STI) region surrounds the P+ region to achieve electrical isolation between devices. The deep N-well (DNW) further isolates the remaining devices of the SPAD from the P-type substrate, reducing substrate coupling and noise interference.

[0030] In addition to the above structure, a single-photon avalanche diode also includes an outer metal layer, an N+ region, a P-well region, and an N-well region.

[0031] For example, in this embodiment, the photosensitive active area adopts a circular layout of 11µm. It should be noted that the photosensitive active area can adopt a circular layout or other shapes. The photosensitive active area can be set to 11µm or other sizes.

[0032] In some embodiments, the photosensitive active region is arranged in a circular pattern, and the single-photon avalanche diode may further include: P-well protection ring, the P-well protection ring is arranged around the N-well region; and / or The edge of the P+ region extends outward by a certain distance.

[0033] refer to Figure 2 As shown, in this embodiment, a P-well protection ring is arranged around the N-well region to reduce the concentration of the edge electric field and suppress premature edge breakdown, and a circular layout is adopted to improve the edge electric field distribution.

[0034] In this embodiment, extending the P+ region outward can move the shallow trench isolation region away from the high electric field depletion region, thereby reducing the impact of shallow trench isolation interface defects on dark count and reducing the dark count rate.

[0035] In some implementations, the quenching and reset circuit may include: power supply; Transistor M1, transistor M2, and transistor M3 are connected to a power source at one end, and to one end of transistor M2 at the other end. Transistor M2 is connected to one end of transistor M3 at the other end, and to ground at the other end. The common terminal of transistors M2 and M3 is connected to the cathode of a single-photon avalanche diode. The first inverter has a low threshold voltage. Its input is connected to the common terminal of transistors M2 and M3, and its output is connected to the control terminal of transistor M2. Its power supply is connected to the power supply, and its ground is grounded. The programmable delay buffer has its input terminal connected to the output terminal of the first inverter, its power supply terminal connected to the power supply, and its ground terminal grounded. The NOR gate and the fixed delay buffer are connected. The output of the programmable delay buffer is connected to the first input of the NOR gate, the output of the NOR gate is connected to the input of the fixed delay buffer, and the output of the fixed delay buffer is connected to the second input of the NOR gate, the control terminals of transistor M1 and transistor M3, respectively. The output of the pulse shaping circuit is connected to the input of the fixed delay buffer, and the output of the pulse shaping circuit is used to output the counting trigger signal.

[0036] In this embodiment, the quenching and reset circuit uses an active quenching and reset (AQR) circuit composed of a power supply, transistors M1, M2 and M3, a first inverter, a programmable delay buffer, a NOR gate and a fixed delay buffer, and a pulse shaping circuit to quickly quench and controllably reset the SPAD avalanche event, thereby improving the consistency of the event output and reducing the after-pulse.

[0037] For details, please refer to Figure 3 As shown, transistors M1, M2, and M3 constitute the core of the quenching and reset mechanism. Power supply VDD is connected to the source of transistor M1, the drain of transistor M1 is connected to the source of transistor M2, the drain of transistor M2 is connected to the drain of transistor M3, and the source of transistor M3 is grounded. The common terminal of transistors M2 and M3 is designated as node A, which is connected to the cathode of the SPAD via a diode. Initially, node A is in a high-impedance state of 0 V. At this time, transistors M2 and M3 are turned off, and a high voltage is applied to the cathode of the SPAD. The SPAD is biased above the breakdown voltage. When photons or dark carriers trigger the SPAD to generate a self-sustaining avalanche, the voltage at node A begins to rise to the over-bias level. During this initial rise, transistor M3 remains off and exhibits a large resistance, thereby providing a certain passive quenching effect on the avalanche current.

[0038] To achieve early detection of the rising state of node A, the first inverter INV L Designed with a low threshold, the first inverter INV L Composed of transistors M4 and M5, the power supply VDD is connected to the drain of transistor M4, the source of transistor M4 is connected to the drain of transistor M5, and the source of transistor M5 is grounded. Node A is connected to the gates of transistors M4 and M5 respectively. The common terminal of the source of transistor M4 and the drain of transistor M5 is set as node B, and node B is connected to the gate of transistor M2. Since the first inverter... Designed with a low threshold, the decision can be made as soon as node A begins to rise; then the voltage of node B changes from high to low and turns on transistor M2, introducing positive feedback to accelerate the quenching process, so that node A is quickly charged through transistors M1 and M2, thereby rapidly pulling the SPAD terminal voltage below the breakdown level to complete the active quenching.

[0039] In this embodiment, transistors M6, M7, and M8, along with the second inverter, constitute a programmable delay buffer, Delay. c The power supply VDD is connected to the source of transistor M6, the drain of transistor M6 is connected to the source of transistor M7, the drain of transistor M7 is connected to the drain of transistor M8 and the input of the second inverter, the source of transistor M8 is grounded, node B is connected to the gates of transistors M7 and M8, and the gate of transistor M6 is used to input the control voltage. The output of the second inverter is set at node C. Specifically, the output of the fixed delay buffer is set at node D. While performing active quenching, the delay path from node B to node C is set through the programmable delay buffer Delayc, controlling the voltage. An adjustment of the delay amount is applied to the gate of M6 to achieve a programmable hold time. During the hold time, the SPAD cathode-to-anode voltage remains below breakdown, releasing trapped carriers without triggering avalanche again, thus further reducing the probability of a subsequent pulse. After the hold time ends, a reset process is triggered by the falling transition at node C. The NOR gate and the fixed delay buffer generate a reset pulse at node D. This pulse turns off transistor M1 and turns on transistor M3, returning node A to 0 V and restoring the over-bias voltage to enter the next photon detection cycle. Simultaneously, this reset pulse is fed to the pulse shaping circuit, outputting... The digital signal serves as the counting trigger signal for the subsequent analog counter.

[0040] In some implementations, the analog counter may include: First capacitor module; The first switch module has its input terminal connected to the first capacitor module. The second switch module has its input terminal connected to the output terminal of the first switch module, and its control terminal connected to the output terminal of the quenching and reset circuit. The second capacitor module is connected to the output terminal of the second switch module; The feedback charge injection circuit has its input terminal connected to the second capacitor module and its output terminal connected to the control terminal of the first switching module. The analog counting output terminal is connected to the input terminal of the first switch module. Specifically, when the quenching and reset circuit does not output a counting trigger signal, the second switch module is turned off and the first switch module is turned on; when the quenching and reset circuit outputs a counting trigger signal, the second switch module is turned on, causing the charge of the first capacitor module to be transferred to the second capacitor module via the first and second switch modules. When the feedback charge injection circuit detects that the capacitor voltage of the first capacitor module has risen to a preset reference threshold, the first switch module is turned off to release a fixed charge packet at the integration node, causing the output voltage of the analog counting output terminal to produce a corresponding step change to perform analog domain accumulation of photon counting events.

[0041] For details, please refer to Figure 4 As shown, the first capacitor module includes capacitors. The second capacitor module includes capacitors. The control terminal of the second switch module SW2 is input through terminal P1. The signal terminal P1 is also connected to the control terminal of the second capacitor module through a delay buffer circuit. The DIS signal generated by the delay buffer circuit can clear the capacitor. The capacitance. The photon counting pulse of the analog counter moves a fixed charge packet from the capacitor. Transfer to integrating capacitor Completion: Each photon event input triggers a charge transfer action. The charge transfer path is controlled by a first switching module SW1 and a second switching module SW2. Before the photon arrives, the first switching module SW1 is turned on and the second switching module SW2 is turned off to establish initial conditions. When the photon pulse arrives, the second switching module SW2 is turned on, while the first switching module SW1 remains on for a short period. This brief overlap window between the two switching modules allows a fixed charge packet to transfer from the photon pulse to the second switching module SW2. Reliable transfer to Subsequently, under the feedback charge injection effect of the feedback charge injection circuit, the first switching module SW1 is quickly turned off to suppress additional step disturbances and improve the consistency of single transfer; the finally transferred charge is stored in... The data is stored above and then cleared and reset by the subsequent DIS signal. The transferred charge.

[0042] In this embodiment, the delay buffer circuit can be a fixed delay buffer. The signal is delayed by a preset time to generate a DIS signal. The second capacitor module includes capacitors connected in parallel. The output of the OR gate is connected to the gate of transistor M9. The DIS signal controls the conduction of transistor M9, thereby clearing the capacitor. .

[0043] In this embodiment, the feedback charge injection circuit uses a comparator as the core to form a closed-loop control. The comparator controls the turning off and on of the first switching module SW1, thereby improving the consistency of single charge packet transfer and optimizing linearity.

[0044] Figure 5 The timing diagram of the analog counter is shown, illustrating the conversion process of each control signal and node voltage during the counting cycle. At the beginning of the counting cycle, the capacitor is controlled via the RST and DIS signals respectively. With capacitor A reset is performed, and simultaneously, the first switching module SW1 is turned on; when the AQR circuit outputs a photon event, the second switching module SW2 is turned on and charge transfer is initiated, making... It gradually increases with migration. When detected... Exceeding the reference voltage At that time, the output of the feedback charge injection circuit causes FB to flip from high to low, and accordingly turns off the first switching module SW1, so that the charge transfer stops at that moment, thereby realizing controlled charge transfer.

[0045] In some implementations, a first virtual transistor is provided in the first switching module; and / or, a second virtual transistor is provided in the second switching module.

[0046] refer to Figure 4 As shown, in this embodiment, the first switching module SW1 consists of transistor M7 and virtual transistor M7. dummy The second switching module SW2 consists of transistor M8 and virtual transistor M8. dummy The purpose of setting up a dummy transistor is to reduce the disturbance of the transmitted charge packet by switching charge injection and clock feedthrough.

[0047] In some embodiments, the first capacitor module includes a common voltage terminal and a first capacitor. The common voltage terminal is connected to the input terminal of the first switch module via a first switch CH1A and a second switch CH2A connected in series. The common voltage terminal is also connected to the input terminal of the first switch module via a third switch CH2B and a fourth switch CH1B connected in series. One end of the first capacitor is connected to the common terminal of the first and second switches, and the other end of the first capacitor is connected to the common terminal of the third and fourth switches. The analog counter further includes: The upper threshold detection link and the lower threshold detection link are connected to the analog counting output. The switching states of the upper threshold detection link and the lower threshold detection link are complementary. The latch has its input terminals connected to the output terminals of the upper threshold detection link and the lower threshold detection link, respectively. The input of the flip-over chopper circuit is connected to the output of the latch. The flip-over chopper circuit is used to output complementary control signals CH1 and CH2. The switching states of the first switch CH1A, the third switch CH2B, and the upper threshold detection link are controlled by the control signal CH1, while the switching states of the second switch CH2A, the fourth switch CH1B, and the lower threshold detection link are controlled by the control signal CH2. The upper threshold detection link is used to detect the upper threshold of the output voltage at the analog counting output terminal, and the lower threshold detection link is used to detect the lower threshold of the output voltage at the analog counting output terminal. When the output voltage at the analog counting output terminal reaches the lower threshold or the upper threshold, the latch updates its flip state and switches the corresponding states of the control signals CH1 and CH2.

[0048] Specifically, in this embodiment, a self-flipping and chopping control circuit is constructed by an upper threshold detection link, a lower threshold detection link, a latch, and a flip-over chopping circuit, which can realize the self-flipping and chopping control functions.

[0049] Specifically, the flip-over chopper circuit may also include: The OR gate's first input is connected to the latch's output, and its second input is used to input the OR gate's enable signal. The AND gate has its first input connected to the output of the OR gate, and its second input is used to input the chopper control signal. The first control signal output terminal is connected to the first control signal output terminal through an AND gate via a NOT gate. The first control signal output terminal is used to output the control signal CH1. The output of the second control signal is connected to the output of the AND gate through the transmission gate. The second control signal output is used to output the control signal CH2.

[0050] Specifically, see section 4 and... Figure 6 As shown, the common voltage terminal is used to input the common mode voltage. Both the upper threshold detection link and the lower threshold detection link output analog counters. As input, the upper threshold detection link includes a switch controlled by the control signal CH1 and a comparator, and the lower threshold detection link includes a switch controlled by the control signal CH2 and another comparator; the two comparators have different decision thresholds, used for upper and lower threshold detection respectively, and their thresholds are determined by an external reference voltage. and The comparator's effective path is selected by control signals CH1 / CH2, allowing the circuit to operate under different chopping states. The corresponding threshold monitoring is performed; the outputs of the two detection links form two decision signals and are sent to the RS latch. The latch output is used to generate a toggle control state to drive the subsequent toggle / chopper switch network.

[0051] Specifically, the second input of the OR gate is the OR_CTRL port, and the second input of the AND gate is the CHOP control port, used for external intervention in the chopping state. In this embodiment, the self-flipping and chopping control circuit also includes a CLK port for latch state initialization, and OR_CTRL and CHOP control ports for external intervention in the chopping state, to support the chopping control required for background light suppression and indirect time-of-flight (iToF) measurement. Control signals CH1 and CH2 are generated by the same control logic and are complementary signals with matched delays, thereby ensuring the timing symmetry and consistency of chopping switching.

[0052] The following is a specific embodiment of this application, including: The SPAD sensor generates an avalanche event upon triggering by incident photons and outputs a raw signal corresponding to the avalanche event. This raw signal serves as the input to the AQR circuit, indicating the occurrence of an avalanche and triggering the subsequent quenching and reset process. Specifically, the 11 µm active region of the SPAD sensor is defined by the overlap between the central P+ injection region and the N-well, forming a P+ / N-well avalanche junction as the main junction region for photon-triggered avalanche. A P-well guard ring is set around the active region, and a circular layout is adopted to improve the edge electric field distribution. In addition, the P+ region is extended outward to keep the shallow trench isolation region away from the high electric field depletion region. A deep N-well is also set to further isolate the rest of the SPAD device from the P-type substrate.

[0053] The Active Quenching Reset Circuit (AQR) is connected to the SPAD sensor and is used to actively quench an avalanche after it is detected, stopping the avalanche current and reducing the risk of afterpulse. After the hold time ends, the AQR circuit resets the SPAD, restoring it to a state where it can detect photons again. Simultaneously, the AQR circuit generates and outputs a counting trigger signal to the analog counter module.

[0054] This self-flipping chopper analog counter connects to the digital pixel output of an AQR circuit. It receives a count trigger signal and performs analog-domain accumulation of photon counting events. Each time a count trigger signal arrives, the analog counter releases a fixed charge packet at the integration node, causing a corresponding step change in the output voltage, thus accumulating the photon count. The counter employs feedback charge injection to improve the consistency of single charge packets and enhance accumulation linearity; it also features flip / chopper control to extend the effective dynamic range and support relevant ranging modes. The counter output is an analog voltage corresponding to the accumulation result, used for on-chip readout and subsequent processing.

[0055] Specifically, the self-flipping chopper analog counter includes a first capacitor module, a first switch module, a second switch module, a second capacitor module, a feedback charge injection circuit, an analog counting output terminal, an upper threshold detection link, a lower threshold detection link, a latch, and a flipping chopper circuit.

[0056] It should be noted that the single-photon avalanche diode in this application is not limited to... Figure 2 The specific cross-section and layout structure shown are all acceptable; any SPAD implementation capable of generating an avalanche event under single-photon triggering and outputting a detectable event signal can be adopted. The construction of its avalanche junction, edge electric field suppression structure, isolation structure, and device geometry can all be equivalently replaced according to different process rules; at the same time, SPADs can also be implemented using different material systems or heterogeneous integration, as long as they meet the requirements for single-photon avalanche detection and event output.

[0057] It should be noted that the circuit configuration used for avalanche quenching and reset in this application is not limited to an AQR circuit; the quenching and reset circuit can also employ passive quenching, active quenching, hybrid quenching, or equivalent quenching and reset schemes implemented by other devices / circuits. Any circuit that can effectively shut down after an avalanche occurs and complete reset under preset conditions, allowing the SPAD to enter the next detection cycle, can be used as an alternative.

[0058] It should be noted that the feedback charge injection circuit in this application is not limited to... Figure 6 The specific comparator structure shown can be replaced with other types of comparators or equivalent threshold decision circuits.

[0059] It should be noted that the modules in this application are not limited to being integrated entirely on the same chip; they can be implemented using a combination of on-chip and off-chip methods. For example, some functional circuits can be arranged outside the chip / board-level module / external control unit and work in coordination with the SPAD or counter inside the chip through interface signals, as long as the overall functional objectives of this application are still achieved.

[0060] This application also relates to a ranging device, including a modulated light emission module, an analog counting device based on feedback charge injection, and a controller as described in the above embodiments; The controller is connected to the modulated light emission module and the analog counting device, respectively. The controller transmits modulated light through the modulated light emission module and receives the echo signal corresponding to the modulated light through the analog counting device. It switches the chopping state according to the phase window boundary of the modulation period to form two sets of differential correlation quantities within the complementary phase window. The phase delay is calculated and the distance is converted based on the two sets of differential correlation quantities.

[0061] It should be noted that the ranging device of this application is used to realize indirect time-of-flight ranging (iToF).

[0062] This application also relates to an electronic device, including the analog counting device based on feedback charge injection of the above embodiments.

[0063] The workflow of this application is explained in detail below with two examples: Example 1: Photon Counting and Auto-Flip High Dynamic Range Readout. The aim is to simulate and accumulate SPAD events under strong background light or long exposure conditions, and to avoid output saturation through auto-flip and chopping coordination, thus achieving high dynamic range readout. The specific steps are as follows: S101. Initialization and Parameter Setting: Apply SPAD operating bias to place it in the over-bias operating region above breakdown; set the feedback cutoff threshold voltage. Set the automatic window flipping threshold. and ; Generate RST signal for reset Reset using DIS signal Use the CLK signal to reset the RS latch to its initial state.

[0064] S102, One counting cycle operation process: Figure 5 The timing diagram for single photon counting in the analog technology is shown. RST and DIS reset the capacitor node, the counter enters a waiting state, and the relevant switches are set to the initial combination: P1 is low, P2 is high, and SW1 is connected while SW2 is disconnected. When a photon event occurs, the quenching and reset circuit triggers the counter to enter the charge transfer phase. At this time, the complementary switch signals P1 and P2 flip, and SW2 is connected. As the charge transfer proceeds... Gradually rising; when detected Exceeding the reference threshold At this time, the feedback signal FB flips and turns off the corresponding switch SW1, stopping the charge transfer and thus limiting the single equivalent charge packet. The final transferred charge is stored in... Upon completion, the system returns to a waiting state to respond to the next photon event.

[0065] S103, Automatic Flipping Implementation Process: During the accumulation of continuous photon events, the analog counter outputs... It will gradually shift with each accumulation of a fixed charge packet; when When the value approaches a preset threshold, automatic flipping is initiated, such as... Figure 7 As shown, It exhibits periodic fluctuations within the threshold window. Simultaneously, upper and lower threshold detection links are connected, but at any given time only one comparator path is in a valid state, and this valid path is determined by the current state of CH1 / CH2. When The corresponding threshold condition is reached under the current valid path (e.g., touched). or When CH1 / CH2 is switched, the comparator output drives the RS latch to update its toggle state, thus causing CH1 and CH2 to switch at the next moment. The switching of CH1 / CH2 not only switches the comparison path but also simultaneously reverses the internal connection relationship of the counter, enabling... Around common mode voltage The flip occurs, pulling the output back from the window boundary to the usable range and continuing subsequent accumulation, thus achieving dynamic range expansion and avoiding saturation.

[0066] S104, Readout process: Sampling and readout at the end of exposure / frame. Furthermore, the accumulated result can be obtained by processing with an analog-to-digital converter (ADC); at the same time, the switching of CH1 / CH2 can be used as a toggle flag, a digital counter is introduced at the readout end to record the number of toggles, and the number of toggles and the ADC result are used together as the final output to obtain a higher equivalent dynamic range.

[0067] Example 2: Implementing iToF ranging with a chopped signal. The goal is to manually control the chopping process and statistically analyze photon events within a complementary phase window to generate relevant outputs for iToF phase estimation and distance conversion. The specific steps are as follows: S201. Initialization and parameter settings: Set the OR_CTRL signal input to high and use the CHOP input to control the chopper. The rest of the initialization settings are the same as in Example 1.

[0068] S202, Reference Figure 8 As shown, in this embodiment, the modulated emitted laser is used as a reference, and the echo signal has a phase delay relative to the emission. In this embodiment, a modulation period is divided into two complementary phase windows: an in-phase group (0° and 180°) and a quadrature group (90° and 270°). Within each complementary window, the phase counter alternately selects the complementary accumulation state using chopping control signals CH1 / CH2: during the 0° window, CH1 is active for accumulation, and during the 180° window, CH2 is active for complementary accumulation. Finally, at the end of the in-phase group, the differential correlation quantity (Q1) is formed. Q2); Similarly, CH1 is effectively accumulated during the 90° window, and CH2 is effectively and complementaryly accumulated during the 270° window, forming a differential correlation at the end of the orthogonal group (Q3). Q4). Therefore, the direct readout of this design is the result of two sets of differential correlation (Q1). Q2) and (Q3) Q4), the backend uses these two sets of differential correlation quantities to calculate the phase delay, satisfying... Then by Convert the distance to achieve iToF ranging.

[0069] In summary, this application discloses an analog counting device, a ranging device, and an electronic device based on feedback charge injection. This analog counting device injects an approximately constant charge packet into the integrating node through feedback charge injection each time a SPAD trigger event occurs, causing the output voltage to decrease in fixed steps, thereby realizing the analog counting of photon events. To avoid output saturation and expand the dynamic range, this application introduces self-flipping control, which automatically flips the integrating capacitor voltage when the output voltage approaches the upper / lower threshold, ensuring that the counting process always operates within the effective voltage range, thus achieving a high dynamic range. Compared to in-pixel digital counter schemes, this application can complete event accumulation with a smaller area and lower power consumption, and reduces the amount of readout data. Furthermore, this application combines chopper control to perform forward and reverse accumulation within a complementary phase window to obtain a correlation difference for iToF ranging calculation. This application expands the output dynamic range through the synergy of self-flipping control and chopper control, and supports iToF correlation ranging output.

[0070] This application offers adjustable step size and flexible range settings: It provides an adjustable step size mechanism, allowing matching of the output step size and range through reference voltage selection. For example, the range can be configured with three operating modes: 8-bit, 9-bit, and 10-bit (each range includes lower and upper segments). In practical implementation, the operating mode is not limited to these three modes. The range is primarily determined by the selected reference voltage, facilitating the selection of appropriate operating settings based on different background light intensities, exposure times, and readout link range requirements, and simplifying cross-scene calibration and system configuration.

[0071] This application achieves step size stability and improved linearity: by using a feedback charge injection circuit, the equivalent charge packet of a single event is made closer to constant, reducing the impact of input pulse width variations on the output step size; and by using symmetrical switches and dummy devices, the switching charge injection and clock feedthrough errors are reduced, ultimately improving differential nonlinearity (DNL) and integral nonlinearity (INL) performance. Based on post-layout simulation, under three range settings (8-bit, 9-bit, and 10-bit, with each range including both lower and upper levels), the peak INL satisfies the following: 8-bit < 0.3 LSB, 9-bit < 0.4 LSB, and 10-bit < 1 LSB, respectively; simultaneously, under the above range settings, the peak DNL is less than 0.01 LSB.

[0072] This application features dynamic range extension and strong light suppression: it employs a self-flipping mechanism, which flips the accumulated voltage value when it approaches the upper / lower limit, allowing subsequent counting to continue from the flipped voltage, thereby avoiding output saturation and significantly extending the effective dynamic range. This method does not rely on simply increasing the integrating capacitor to obtain a larger range, thus reducing the area overhead caused by large capacitors while maintaining small step size resolution; under strong background light or long exposure conditions, the usable counting range can be further improved and counting availability maintained through multiple automatic flips or combined with chopping signal control.

[0073] This application directly supports distance measurement: based on the photon event accumulation of an analog counter, chopper control is introduced, enabling the counter to not only output photon counting results but also directly generate phase-related information for distance measurement, without relying on in-pixel TDC or large-scale digital time-domain processing circuits. This significantly reduces pixel area and power consumption, alleviates readout bandwidth pressure and resource allocation complexity in large-scale arrays, and improves system scalability and availability in complex lighting environments such as strong background light.

[0074] This application enables the same chopper flip control to be reused in different operating modes: in high dynamic range operating mode, the control is used for foldback limiting within the output window to avoid saturation; in ranging operating mode, by switching the chopper state according to the phase window boundary of the modulation period, two sets of differential correlation quantities are formed within the complementary phase window and used for phase calculation and distance conversion, thereby realizing iToF ranging without introducing in-pixel TDC.

[0075] This application constructs a coupling mechanism between event-triggered fixed charge packet accumulation and threshold cutoff feedback: each event trigger drives a charge packet transfer / injection to form voltage step accumulation, and the effective transfer amount of a single charge packet is limited by the threshold decision and feedback cutoff mechanism. That is, the charge transfer process is terminated when the detection node reaches the reference threshold, so that the event accumulation process and the feedback cutoff process are coupled, thereby stabilizing the single step size and reducing the source of cumulative nonlinearity.

[0076] The embodiments of this application have been described in detail above with reference to the accompanying drawings. However, this application is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of this application.

Claims

1. An analog counting device based on feedback charge injection, characterized in that, include: A single-photon avalanche diode is used to generate an avalanche event triggered by an incident photon and output an initial signal corresponding to the avalanche event. A quenching and reset circuit is provided, wherein the input terminal of the quenching and reset circuit is connected to the single-photon avalanche diode for quenching the initial signal after detecting the initial signal, and for resetting the state of the single-photon avalanche diode and outputting a counting trigger signal after quenching according to a preset holding time. An analog counter, the input of which is connected to the output of the quenching and reset circuit, after receiving the counting trigger signal, releases a fixed charge packet to the integration node through feedback charge injection, causing the output voltage to change in a corresponding step to perform analog domain accumulation of photon counting events.

2. The analog counting device based on feedback charge injection according to claim 1, characterized in that, The single-photon avalanche diode includes: P-type substrate; A photosensitive active region, comprising an overlapping P+ region and an N-well region to form a P+ / N-well avalanche junction, wherein the photosensitive active region is disposed on the P-type substrate; A shallow trench isolation zone surrounds the P+ region; A deep N-well is disposed between the photosensitive active region and the P-type substrate.

3. The analog counting device according to claim 2, characterized in that, The photosensitive active region has a circular layout, and the single-photon avalanche diode further includes: P-well protection ring, wherein the P-well protection ring is disposed around the N-well region; and / or The edge of the P+ region extends outward by a certain distance.

4. The analog counting device according to claim 1, characterized in that, The quenching and reset circuit includes: power supply; Transistor M1, transistor M2, and transistor M3 are provided. One end of transistor M1 is connected to the power supply, the other end of transistor M1 is connected to one end of transistor M2, the other end of transistor M2 is connected to one end of transistor M3, the other end of transistor M3 is grounded, and the common terminal of transistor M2 and transistor M3 is connected to the cathode of the single-photon avalanche diode. A first inverter with a low threshold voltage is provided. The input terminal of the first inverter is connected to the common terminal of transistors M2 and M3, and the output terminal of the first inverter is connected to the control terminal of transistor M2. The power supply terminal of the first inverter is connected to the power supply, and the ground terminal of the first inverter is grounded. A programmable delay buffer, wherein the input terminal of the programmable delay buffer is connected to the output terminal of the first inverter, the power supply terminal of the programmable delay buffer is connected to the power supply, and the ground terminal of the programmable delay buffer is grounded; The programmable delay buffer is connected to the first input of the NOR gate and the input of the fixed delay buffer. The output of the programmable delay buffer is connected to the second input of the NOR gate and the control terminals of transistor M1 and transistor M3, respectively. A pulse shaping circuit is provided, wherein the output terminal of the fixed delay buffer is connected to the input terminal of the pulse shaping circuit, and the output terminal of the pulse shaping circuit is used to output a counting trigger signal.

5. The analog counting device based on feedback charge injection according to claim 1, characterized in that, The analog counter includes: First capacitor module; A first switch module, the input terminal of which is connected to the first capacitor module; The second switch module has its input terminal connected to the output terminal of the first switch module, and its control terminal connected to the output terminal of the quenching and reset circuit. The second capacitor module is connected to the output terminal of the second switch module; A feedback charge injection circuit, wherein the input terminal of the feedback charge injection circuit is connected to the second capacitor module, and the output terminal of the feedback charge injection circuit is connected to the control terminal of the first switch module; An analog counting output terminal is connected to the input terminal of the first switch module. Specifically, when the quenching and reset circuit does not output a counting trigger signal, the second switch module is turned off and the first switch module is turned on; when the quenching and reset circuit outputs a counting trigger signal, the second switch module is turned on, causing the charge of the first capacitor module to be transferred to the second capacitor module via the first switch module and the second switch module. When the feedback charge injection circuit detects that the capacitor voltage of the second capacitor module rises to a preset reference threshold, the first switch module is turned off to release a fixed charge packet at the integration node, causing the output voltage of the analog counting output terminal to produce a corresponding step change to perform analog domain accumulation of photon counting events.

6. The analog counting device based on feedback charge injection according to claim 1, characterized in that, The first switch module is provided with a first virtual transistor; and / or, the second switch module is provided with a second virtual transistor.

7. The analog counting device based on feedback charge injection according to claim 5, characterized in that, The first capacitor module includes a common voltage terminal and a first capacitor. The common voltage terminal is connected to the input terminal of the first switch module through a first switch CH1A and a second switch CH2A connected in series. The common voltage terminal is also connected to the input terminal of the first switch module through a third switch CH2B and a fourth switch CH1B connected in series. One end of the first capacitor is connected to the common terminal of the first and second switches, and the other end of the first capacitor is connected to the common terminal of the third and fourth switches. The analog counter also includes: An upper threshold detection link and a lower threshold detection link are provided, wherein the input terminals of the upper threshold detection link and the lower threshold detection link are both connected to the analog counting output terminal, and the switching states of the upper threshold detection link and the lower threshold detection link are complementary. A latch, the input of which is connected to the output of the upper threshold detection link and the lower threshold detection link, respectively; A flip-over chopper circuit, the input of which is connected to the output of the latch, is used to output complementary control signals CH1 and CH2. The switching states of the first switch CH1A, the third switch CH2B, and the upper threshold detection link are controlled by the control signal CH1, while the switching states of the second switch CH2A, the fourth switch CH1B, and the lower threshold detection link are controlled by the control signal CH2. The upper threshold detection link is used to perform upper threshold detection on the output voltage of the analog counting output terminal, and the lower threshold detection link is used to perform lower threshold detection on the output voltage of the analog counting output terminal. When the output voltage of the analog counting output terminal reaches the lower threshold or the upper threshold, the latch updates its toggle state and switches the corresponding states of the control signals CH1 and CH2.

8. The analog counting device based on feedback charge injection according to claim 7, characterized in that, The flip-choke circuit includes: An OR gate, wherein the first input terminal of the OR gate is connected to the output terminal of the latch, and the second input terminal of the OR gate is used to input an OR gate enable signal; The AND gate has its first input connected to the output of the OR gate, and its second input is used to input a chopper control signal. The first control signal output terminal is connected to the first control signal output terminal through the AND gate via the NOT gate. The first control signal output terminal is used to output the control signal CH1. The second control signal output terminal is connected to the output terminal of the AND gate through a transmission gate. The second control signal output terminal is used to output the control signal CH2.

9. A ranging device, characterized in that, Includes a modulated light emission module, an analog counting device based on feedback charge injection as described in claim 7 or 8, and a controller; The controller is connected to the modulated light emission module and the analog counting device, respectively. The controller emits modulated light through the modulated light emission module and receives the echo signal corresponding to the modulated light through the analog counting device. It switches the chopping state according to the phase window boundary of the modulation period to form two sets of differential correlation quantities within the complementary phase window. The phase is calculated and the distance is converted based on the two sets of differential correlation quantities.

10. An electronic device, characterized in that, The analog counting device based on feedback charge injection as described in any one of claims 1 to 8.

Images