CMOS transmission gate sampling switch circuit, charge injection compensation method, electronic equipment and storage medium

By introducing compensation transistors MN2, MN3, MP2, and MP3 into the CMOS transmission gate sampling switch circuit, the signal jump and ripple problems caused by charge injection effect are solved, and high linearity and accuracy signal transmission are achieved.

CN122137379BActive Publication Date: 2026-06-30ONSAI MICROELECTRONICS (SHANGHAI) CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
ONSAI MICROELECTRONICS (SHANGHAI) CO LTD
Filing Date
2026-05-08
Publication Date
2026-06-30

AI Technical Summary

Technical Problem

Existing CMOS transmission gate sampling switch circuits suffer from charge injection effects when the input voltage changes, leading to sampling signal jumps and output ripple, which affects the linearity and accuracy of signal transmission.

Method used

In the CMOS transmission gate sampling switch circuit, compensation transistors MN2, MN3, MP2, and MP3 are introduced. By controlling their size and timing, it is ensured that the charge in the channel is accurately absorbed after the switching transistor is turned off, thus eliminating the interference of charge injection on the sampling signal.

Benefits of technology

It effectively suppresses the charge injection effect, improves the linearity and accuracy of signal transmission, and avoids sampling signal jumps and output ripples caused by input voltage changes.

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Abstract

This invention discloses a CMOS transmission gate sampling switch circuit, a charge injection compensation method, an electronic device, and a storage medium. The CMOS transmission gate sampling switch circuit includes: a CMOS transmission gate, an output compensation circuit, and an input compensation circuit. The CMOS transmission gate includes a first NMOS transistor MN1 and a first PMOS transistor MP1. The gate of MP1 is connected to a second logic signal, and the gate of MN1 is connected to a first logic signal. The output compensation circuit includes MP2 for compensating for charge injection in the MP1 channel and MN2 for compensating for charge injection in the MN1 channel. The input compensation circuit includes MP3 for compensating for charge injection in the MP1 channel and MN3 for compensating for charge injection in the MN1 channel. The CMOS transmission gate sampling switch circuit, charge injection compensation method, electronic device, and storage medium proposed in this invention can effectively suppress injection errors while maintaining a miniaturized structure, overcoming the performance limitations caused by charge injection in existing designs.
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