A current sampling circuit and a switching circuit

Abstract

The application provides a current sampling circuit and a switching circuit, comprising two operational amplifiers for rotating control of a first transistor, when one operational amplifier is used for control of the first transistor, the other operational amplifier performs self-calibration, the first input end and the second input end of the operational amplifier performing self-calibration are short-circuited, and a second voltage is output, the first input end of the operational amplifier used for control of the first transistor is connected with the first end of the first transistor, the second end thereof is connected with an output end, and the second voltage is output to the control end of the first transistor, so as to control the current flowing through the first transistor, and the calibration unit in the operational amplifier performing self-calibration is used for receiving the first voltage and the second voltage and generating a calibration signal, so as to compensate and calibrate the offset voltage of the operational amplifier performing self-calibration. Since the comparison reference for calibration adopts the output voltage of another normal operational amplifier, that is, the real-time voltage in the loop, system errors can be dynamically eliminated, and higher sampling precision is obtained.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to a current sampling circuit and a switching circuit. Background Technology

[0002] In load switches or high-current efuse chips, a high-precision high-side current sampling circuit is generally required. This circuit requires a high-precision calibration op-amp with low offset voltage. However, due to the limited gain of the op-amp itself, the output voltage of the op-amp may change by about 2V when the power current changes from no load to full load. This change will introduce additional system error, and this system error cannot be eliminated by the calibration of the op-amp itself, thus leading to a decrease in sampling accuracy.

[0003] In existing technologies, one approach is to minimize the offset voltage of the sampling operational amplifier itself, leaving more room for system error. However, this method is difficult and costly to implement in circuits. Another approach is to increase the size of the MOSFETs in the operational amplifier to reduce the range of output voltage variation, thereby reducing the system offset voltage. However, while this method can reduce the impact of offset voltage to a certain extent, it comes at the cost of significantly increasing the chip area and the parasitic capacitance of the MOSFETs, which in turn affects the sampling speed. Summary of the Invention

[0004] The purpose of this invention is to provide a current sampling circuit and a switching circuit that can eliminate system errors and improve sampling accuracy.

[0005] In a first aspect, the present invention provides a current sampling circuit for sampling a target current flowing through a target circuit. The current sampling circuit includes a first transistor, a sampling element, and two operational amplifiers (op-amps) for rotating control of the first transistor. When one of the two op-amps controls the first transistor, the other op-amp performs self-calibration. A first terminal of the first transistor is connected to the input terminal of the target circuit through the sampling element, and a second terminal of the first transistor is grounded through a first sampling resistor. The voltage of the first sampling resistor is obtained to obtain a current sampling signal characterizing the target current. The first input terminal of the self-calibrating op-amp is short-circuited with its second input terminal and outputs a first voltage. The first input terminal of the op-amp controlling the first transistor is connected to the first terminal of the first transistor, and its second terminal is connected to the output terminal of the target circuit. It outputs a second voltage to the control terminal of the first transistor to control the current flowing through the first transistor. Each of the two op-amps includes a calibration unit. The calibration unit of the self-calibrating op-amp receives the first voltage and the second voltage and generates a calibration signal to compensate and calibrate the offset voltage of the self-calibrating op-amp.

[0006] Preferably, the calibration unit in the self-calibrating operational amplifier includes: a comparison unit, a first input terminal for receiving the first voltage, a second input terminal for receiving the second voltage, comparing the first voltage and the second voltage to obtain a comparison signal; and an adjustment unit for generating a current adjustment signal based on the comparison signal to adjust the differential current of the self-calibrating operational amplifier.

[0007] Preferably, the adjustment unit is further configured to adjust the reference current signal according to the comparison signal to generate the current adjustment signal; the reference current signal is a pre-given initial current signal or the current adjustment signal previously generated by the adjustment unit.

[0008] Preferably, the calibration signal is used to guide the difference between the second voltage and the first voltage to be reduced to a preset value.

[0009] Preferably, the calibration signal includes a first adjustment current and a second adjustment current, and the differential current of the operational amplifier performing self-calibration is adjusted according to the first adjustment current and the second adjustment current.

[0010] Preferably, if the target circuit includes a power transistor, the sampling element is a sampling transistor, the sampling transistor and the power transistor share a common gate, and the gates of the sampling transistor and the power transistor receive a driving voltage.

[0011] Preferably, the target circuit includes a second sampling resistor, and the sampling element is a third sampling resistor.

[0012] Preferably, the first and second input terminals of the operational amplifier performing self-calibration are connected to the input terminals of the target circuit.

[0013] Preferably, the calibration unit for controlling the operational amplifier of the first transistor is used to output a calibration compensation signal so that the operational amplifier for controlling the first transistor outputs a second voltage without offset; the compensation calibration signal is a calibration signal generated when the operational amplifier controlling the first transistor performs self-calibration.

[0014] Preferably, the self-calibration time of any operational amplifier is equal to the time for controlling the first transistor.

[0015] Secondly, the present invention also provides a switching circuit, including a current sampling circuit and a target circuit as described above; the target circuit is used to convert an input voltage into an output voltage; the current sampling circuit is used to sample a target current flowing through the target circuit.

[0016] The present invention provides a current sampling circuit and a switching circuit. The current sampling circuit includes two operational amplifiers (op-amps) used to control a first transistor in rotation. When one op-amp controls the first transistor, the other op-amp performs self-calibration. The first input terminal and the second input terminal of the op-amp performing self-calibration are shorted, and it outputs a first voltage. The first input terminal of the op-amp used to control the first transistor is connected to the first terminal of the first transistor, and its second terminal is connected to the output terminal of the target circuit, and it outputs a second voltage to the control terminal of the first transistor to control the current flowing through the first transistor. The calibration unit in the op-amp performing self-calibration receives the first voltage and the second voltage and generates a calibration signal to compensate for the offset voltage of the op-amp performing self-calibration. Since the comparison reference for calibrating the op-amp is the output voltage of another normally operating op-amp, i.e., the comparison reference is the real-time voltage in the loop, the offset voltage of the op-amp can be compensated and calibrated in real time, dynamically eliminating system errors and obtaining higher sampling accuracy. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of a current sampling circuit according to the present invention;

[0018] Figure 2 This is a schematic diagram of the operational amplifier in the current sampling circuit according to the present invention;

[0019] Figure 3 This is a schematic diagram of the current sampling circuit according to one embodiment of the present invention;

[0020] Figure 4 This is a schematic diagram of the current sampling circuit according to another embodiment of the present invention. Detailed Implementation

[0021] The preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings, but the present invention is not limited to these embodiments. The present invention covers any substitutions, modifications, equivalent methods, and solutions made within the spirit and scope of the present invention.

[0022] To provide the public with a thorough understanding of the present invention, specific details are described in detail in the following preferred embodiments of the invention, but those skilled in the art can fully understand the invention without these details.

[0023] The invention is described in more detail below by way of example with reference to the accompanying drawings. It should be noted that the drawings are simplified and use non-precise proportions to facilitate and clearly illustrate the embodiments of the invention.

[0024] refer to Figure 1 This is a schematic diagram of a current sampling circuit according to the present invention, as shown below. Figure 1As shown, the current sampling circuit is used to sample the target current flowing through the target circuit 11. It includes a sampling element 12, a first operational amplifier OPA1, a second operational amplifier OPA2, a first transistor M1, and a first sampling resistor R1.

[0025] In this circuit, the input terminal of the target circuit 11 is connected to the input voltage VIN, and the output terminal is connected to the output voltage VOUT. The first terminal of the sampling element 12 is connected to the input terminal of the target circuit 11 to receive the input voltage VIN, and the second terminal is connected to the first terminal of the first transistor M1. The second terminal of the first transistor M1 is grounded through the first sampling resistor R1. The current sampling circuit obtains the current sampling signal characterizing the target current 11 by acquiring the voltage of the first sampling resistor R1.

[0026] The first operational amplifier OPA1 and the second operational amplifier OPA2 are used to control the first transistor M1 in turn and to perform self-calibration. That is, when the first operational amplifier OPA1 is used to control the first transistor M1, the second operational amplifier OPA2 performs self-calibration; when the first operational amplifier OPA1 performs self-calibration, the second operational amplifier OPA2 is used to control the first transistor M1.

[0027] Furthermore, the time during which the first op-amp OPA1 or the second op-amp OPA2 controls the first transistor M1 is equal to the time during which self-calibration is performed.

[0028] When the first op-amp OPA1 is connected to the loop and operating normally (i.e., when the first op-amp OPA1 controls the first transistor M1) and the second op-amp OPA2 is performing self-calibration, the first and second input terminals of the first op-amp OPA1 are shorted and both connected to the input voltage VIN. The first input terminal of the second op-amp OPA2 is connected between the second terminal of the sampling element 12 and the first terminal of the first transistor M1, and the second input terminal is connected between the output terminal of the target circuit 11 and the output voltage VOUT. When the first op-amp OPA1 is performing self-calibration and the second op-amp OPA2 is operating normally, the first input terminal of the first op-amp OPA1 is connected between the second terminal of the sampling element 12 and the first terminal of the first transistor M1, and the second input terminal is connected between the output terminal of the target circuit 11 and the output voltage VOUT. The first and second input terminals of the second op-amp OPA2 are shorted and both connected to the input voltage VIN.

[0029] Preferably, a switch K1 can be connected between the output terminal of the first operational amplifier OPA1 and the control terminal of the first transistor M1, and a switch K2 can be connected between the output terminal of the second operational amplifier OPA2 and the control terminal of the first transistor M1. When the first operational amplifier OPA1 is working normally and the second operational amplifier OPA2 is performing self-calibration, switch K1 is turned on and switch K2 is turned off. The first operational amplifier OPA1 outputs voltage VA1 to the control terminal of the first transistor M1 to control the current flowing through the first transistor M1. When the first operational amplifier OPA1 is performing self-calibration and the second operational amplifier OPA2 is working normally, switch K1 is turned off and switch K2 is turned on. The second operational amplifier OPA2 outputs voltage VA2 to the control terminal of the first transistor M1 to control the current flowing through the first transistor M1.

[0030] A switch S1 is connected between the first input terminal and the second input terminal of the first operational amplifier OPA1. The first input terminal is connected to the input voltage VIN through switch S2 and is connected between the second terminal of the sampling element 12 and the first terminal of the first transistor M1 through switch S3. The second input terminal is connected between the output terminal of the target circuit 11 and the output voltage VOUT through switch S4. A switch S5 is connected between the first input terminal and the second input terminal of the second operational amplifier OPA2. The first input terminal is connected to the input voltage VIN through switch S6 and is connected between the second terminal of the sampling element 12 and the first terminal of the first transistor M1 through switch S7. The second input terminal is connected between the output terminal of the target circuit 11 and the output voltage VOUT through switch S8.

[0031] When the first op-amp OPA1 performs self-calibration and the second op-amp OPA2 operates normally, switches S1, S2, S7, and S8 are turned on, and switches S3, S4, S5, and S6 are turned off, shorting the first and second input terminals of the first op-amp OPA1 and connecting them to the input voltage VIN. When the second op-amp OPA2 performs self-calibration and the first op-amp OPA1 operates normally, switches S3, S4, S5, and S6 are turned on, and switches S1, S2, S7, and S8 are turned off, shorting the first and second input terminals of the second op-amp OPA2 and connecting them to the input voltage VIN.

[0032] The first op-amp OPA1 and the second op-amp OPA2 each include a calibration unit, such as Figure 2 The diagram shows a schematic of an operational amplifier in a current sampling circuit, which is either the first operational amplifier OPA1 or the second operational amplifier OPA2.

[0033] The left side of the op-amp features a basic folded cascode op-amp structure, where the first stage consists of transistors MP1, MP2, MP3, MP4, MN3, and MN4, and the second stage consists of transistors MN1 and MN2 and a current source I0. The op-amp also includes a calibration unit consisting of a comparator unit COMP and an adjustment unit 21.

[0034] When the first op-amp OPA1 performs self-calibration and the second op-amp OPA2 operates normally, the control terminals of transistors MN1 and MN2 in the first op-amp OPA1 can be used as the first and second input terminals of the first op-amp OPA1, and both are connected to the input voltage VIN; the control terminals of transistors MN1 and MN2 in the second op-amp OPA2 can be used as the first and second input terminals of the second op-amp OPA2, and are connected to the loop for normal operation.

[0035] The calibration unit 20 in the first operational amplifier OPA1 receives the voltage Vo1 output by the first operational amplifier OPA1 and the voltage Vo2 output by the second operational amplifier OPA2 and generates a calibration signal to compensate for the offset voltage of the first operational amplifier OPA1. Specifically, the first input terminal of the comparator unit COMP in the first operational amplifier OPA1 receives the voltage Vo1, and the second input terminal receives the voltage Vo2. The voltages Vo1 and Vo2 are compared to obtain a comparison signal. The adjustment unit 21 in the first operational amplifier OPA1 generates current adjustment signals IC1 and IC2 based on the comparison signal to adjust the differential current of the first operational amplifier OPA1. That is, the current adjustment signals IC1 and IC2 are used to adjust the differential current of the input pair transistors—transistors MN1 and MN2. The cascode structure is folded and connected in parallel with the original input pair transistors to regulate the total differential current flowing to the second stage.

[0036] Optionally, when voltage Vo1 is greater than voltage Vo2, the comparator COMP outputs a comparator signal CP1, so that the adjustment voltage 21 generates a current adjustment signal IC1 and IC2 to pull down voltage Vo1, causing voltage Vo1 to drop to be close to voltage Vo2, thus eliminating the offset voltage in the first operational amplifier OPA1; when voltage Vo1 is less than voltage Vo2, the comparator COMP outputs a comparator signal CP2, so that the adjustment voltage 21 generates a current adjustment signal IC1 and IC2 to pull up voltage Vo1, causing voltage Vo1 to rise to be close to voltage Vo2, thus eliminating the offset voltage in the first operational amplifier OPA1.

[0037] Optionally, when the first operational amplifier OPA1 performs self-calibration, the current magnitudes of current adjustment signals IC1 and IC2 can be preset. Then, the comparison unit COMP is used to compare voltage Vo1 and voltage Vo2. After that, the current adjustment signals IC1 and IC2 are adjusted according to the comparison result to guide the difference between voltage Vo1 and voltage Vo2 to be reduced to the preset value.

[0038] Optionally, during the self-calibration of the first op-amp OPA1, the current adjustment signals IC1 and IC2 generated during the previous self-calibration of the first op-amp OPA1 can also be adjusted based on the comparison result of the comparison unit COMP comparing voltage Vo1 and voltage Vo2.

[0039] When the second operational amplifier OPA2 is in normal operation to control the first transistor M1, the comparator unit COMP in the second operational amplifier OPA2 does not function. The current adjustment signals IC1 and IC2 generated by the adjustment unit 21 maintain the current adjustment signals IC1 and IC2 generated when the second operational amplifier OPA2 performs self-calibration, thereby making the second operational amplifier OPA2 output a voltage Vo2 without offset.

[0040] When the first op-amp OPA1 is working normally and the second op-amp OPA2 is performing self-calibration, the offset voltage of the second op-amp OPA2 is compensated and calibrated by the calibration unit in the second op-amp OPA2. The circuit connection and calibration logic are similar to those when the first op-amp OPA1 is performing self-calibration and the second op-amp OPA2 is working normally, and will not be described in detail here.

[0041] Compared to the current sampling circuit in the prior art, which is a scheme where the input voltage of the op-amp is short-circuited and the output voltage VA is compared with a voltage V1 by the comparison unit COMP during the self-calibration of the op-amp, and then the adjustment unit 21 generates current adjustment signals IC1 and IC2 to calibrate the op-amp based on the comparison result.

[0042] Because the voltage of the operational amplifier (op-amp) varies considerably when the sampling current changes, and is not necessarily equal to voltage V1, it introduces additional offset voltage. Therefore, the current sampling circuit provided in this application changes the comparison reference of the op-amp's comparator unit COMP from the fixed voltage V1 to the output voltage VB of another op-amp that is currently operating during op-amp self-calibration. That is, it compares voltage VA with voltage VB. Since voltage VB represents the op-amp output voltage required for the loop to operate at this time, using this voltage as a reference can eliminate the system offset error caused by current changes in real time, thereby achieving higher sampling accuracy.

[0043] In some embodiments, such as Figure 3As shown, the target circuit 11 can be a power transistor MP, the sampling element 12 can be a sampling transistor MSNS, and the current sampling circuit is used to sample the current of the power transistor MP. The sampling transistor MSNS and the power transistor MP share a common gate, and the gates of both the sampling transistor MSNS and the power transistor MP are connected to a driving voltage VP, which can be provided by a charge pump circuit.

[0044] In other embodiments, such as Figure 4 As shown, the target circuit 11 can also be the second sampling resistor R2, and the sampling element 12 can be the third sampling resistor R3. The current sampling circuit is used to sample the current flowing through the second sampling resistor R2.

[0045] The current sampling circuit proposed in this application can be used in various scenarios that require current sampling, such as current sampling of the upper transistor of DC-DC converter, current sampling of the charging and discharging transistor of BMS, and current sampling of the efuse chip. This application does not limit it.

[0046] This application also provides a switching circuit, which may include the aforementioned current sampling circuit and target circuit 11. The target circuit 11 is used to convert the input voltage VIN into an output voltage VOUT, and the aforementioned current sampling circuit is used to sample the current flowing through the target circuit 11.

[0047] Although the embodiments are described and illustrated separately above, some common technologies are involved. Those skilled in the art can replace and integrate them between the embodiments. If there is any content not explicitly described in one embodiment, then another embodiment that is described can be referred to.

[0048] The embodiments described above do not constitute a limitation on the scope of protection of this technical solution. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the above embodiments should be included within the scope of protection of this technical solution.

Claims

1. A current sampling circuit, characterized in that, The current sampling circuit is used to sample the target current flowing through the target circuit. The current sampling circuit includes a first transistor, a sampling element, and two operational amplifiers for rotating control of the first transistor. When one of the two operational amplifiers is used to control the first transistor, the other operational amplifier performs self-calibration. The first terminal of the first transistor is connected to the input terminal of the target circuit through the sampling element, and the second terminal of the first transistor is grounded through the first sampling resistor. The voltage of the first sampling resistor is obtained to obtain a current sampling signal characterizing the target current. The first input terminal of the self-calibrating op-amp is shorted to the second input terminal, and the first voltage is output. The first input terminal of the operational amplifier used to control the first transistor is connected to the first terminal of the first transistor, and its second terminal is connected to the output terminal of the target circuit, and outputs a second voltage to the control terminal of the first transistor to control the current flowing through the first transistor. Each of the two operational amplifiers includes a calibration unit. The calibration unit of the self-calibrating operational amplifier is used to receive the first voltage and the second voltage and generate a calibration signal to compensate and calibrate the offset voltage of the self-calibrating operational amplifier.

2. The current sampling circuit according to claim 1, characterized in that, The calibration unit in the operational amplifier that performs self-calibration includes: The comparison unit has a first input terminal for receiving the first voltage and a second input terminal for receiving the second voltage, and compares the first voltage and the second voltage to obtain a comparison signal. An adjustment unit is configured to generate a current adjustment signal based on the comparison signal to adjust the differential current of the self-calibrated operational amplifier.

3. The current sampling circuit according to claim 2, characterized in that, The adjustment unit is further configured to adjust the reference current signal according to the comparison signal to generate the current adjustment signal; the reference current signal is a pre-given initial current signal or the current adjustment signal previously generated by the adjustment unit.

4. The current sampling circuit according to claim 1, characterized in that, The calibration signal is used to guide the difference between the second voltage and the first voltage to be reduced to a preset value.

5. The current sampling circuit according to claim 1, characterized in that, The calibration signal includes a first adjustment current and a second adjustment current, and the differential current of the operational amplifier performing self-calibration is adjusted according to the first adjustment current and the second adjustment current.

6. The current sampling circuit according to claim 1, characterized in that, If the target circuit includes a power transistor, then the sampling element is a sampling transistor. The sampling transistor and the power transistor share a common gate, and the gates of the sampling transistor and the power transistor receive a driving voltage.

7. The current sampling circuit according to claim 1, characterized in that, The target circuit includes a second sampling resistor, and the sampling element is a third sampling resistor.

8. The current sampling circuit according to claim 1, characterized in that, The first and second input terminals of the operational amplifier that performs self-calibration are connected to the input terminals of the target circuit.

9. The current sampling circuit according to claim 1, characterized in that, The calibration unit for controlling the operational amplifier of the first transistor is used to output a calibration compensation signal so that the operational amplifier for controlling the first transistor outputs a second voltage without offset; the compensation calibration signal is a calibration signal generated when the operational amplifier controlling the first transistor performs self-calibration.

10. The current sampling circuit according to any one of claims 1-9, characterized in that, The time for any operational amplifier to perform self-calibration is equal to the time for controlling the first transistor.

11. A switching circuit, characterized in that, The device includes a current sampling circuit as described in any one of claims 1-10 and a target circuit; the target circuit is used to convert an input voltage into an output voltage; and the current sampling circuit is used to sample a target current flowing through the target circuit.

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