A chip thermal characteristic detection apparatus, and a method, system and storage medium thereof

Abstract

Embodiments of the present application disclose a chip thermal characteristic detection device, a method thereof, a system and a storage medium. The device comprises a test mainboard configured to provide a test signal of a chip to be tested; a probe module comprising a plurality of test probes; the chip to be tested comprising a plurality of pads corresponding to the test probes one by one; a first connector fixed to the test mainboard, the first connector being provided with a first opening configured to accommodate the probe module and the chip to be tested and expose the chip to be tested; a second connector detachably fixed to the first connector, the second connector comprising a press head configured to press the chip to be tested against the test probes, the second connector being provided with a second opening penetrating through the press head; and an infrared camera module configured to capture an infrared image of the chip to be tested in a working state. The chip thermal characteristic detection device improves the test efficiency.

Description

Technical Field

[0001] The present invention relates to the field of chip testing, and more particularly to a chip thermal characteristic testing device, method, system and storage medium thereof. Background Technology

[0002] The power management integrated circuit (PMIC) is the core of power supply and safety for dual in-line memory modules (DIMMs), directly determining the stability, performance, and lifespan of the memory. Typically, the PMIC is positioned on the circuit board close to heat-generating components such as inductors and capacitors. In high-temperature environments, localized overheating can trigger protection mechanisms and even lead to permanent damage. However, current technologies for measuring PMIC temperatures primarily rely on single-point measurement methods (such as thermocouples), which only obtain localized temperature information and cannot reflect the overall heat distribution, hotspot locations, and dynamic temperature rise processes of the chip. This can easily lead to biased test results and difficulties in fault location. Furthermore, current technologies often employ contact temperature measurement for PMICs. The sensor's contact with the PMIC's heat-generating surface introduces interference, affecting the accuracy of subsequent chip qualification tests. Additionally, the PMIC chip needs to stabilize its output voltage within a very short time; otherwise, data errors will occur. This places extremely high demands on the control loop bandwidth and power stage design. Even so, the test data obtained by existing testing methods has a long time dimension, making it difficult to determine the dynamic test data of PMIC chips in real time, which affects the accuracy of subsequent chip qualification test results.

[0003] The prior art CN121633106A discloses a chip package defect detection method, which sets up a feeding position, a visible light detection position, a material transfer position, an infrared light detection position, and a discharging position side by side on a rack. A first conveying module lifts the carrier plate at the visible light detection position so that the scanning head can perform line scanning imaging on each carrier plate unit, and a second conveying module lifts the carrier plate at the infrared light detection position so that the infrared system can image it. This achieves physical separation and process relay of visible light and infrared detection. On this basis, positional offset and surface defects are obtained based on the visible light images of each carrier plate unit. Although the method uses visible and non-visible light fusion detection to achieve more accurate detection of physical defects, it mainly analyzes the static incoming material quality and cannot determine the quality of the chip when it is in operation.

[0004] Existing technology CN121559288A discloses a method for rapid chip fault location, which collects temperature sensing data and time-series signals during chip operation; performs multi-index deviation calculations on the temperature sensing data and time-series signals to generate a state deviation index; and performs real-time comparison and detection of the state deviation index based on a preset first deviation threshold. When the state deviation of the index deviation curve exceeds the preset first deviation threshold, a fault warning mode is triggered. However, because the generated deviation curve corresponds to one or more selected nodes, it still falls under the category of single-point temperature measurement. Therefore, it cannot accurately determine problems occurring at random locations on the chip, and thus cannot provide timely alarms for faults outside of designated nodes. Summary of the Invention

[0005] This invention provides a chip thermal characteristic detection device that achieves high efficiency in collecting vibration energy.

[0006] According to one aspect of the present invention, a chip thermal characteristic detection device is provided, comprising:

[0007] The test motherboard is used to provide test signals to the chip under test.

[0008] A probe module, comprising multiple pins connected to the test motherboard and multiple test probes;

[0009] The chip under test includes a pad surface and a package surface, wherein multiple pads on the pad surface are configured to correspond one-to-one with the test probes;

[0010] A first connector is fixed to the test motherboard. The first connector is provided with a first opening, which is used to accommodate the probe module and the chip under test and expose the package surface.

[0011] The second connector is detachably fixed to the first connector. The second connector includes a connecting body and a pressure head extending from the body. The pressure head is used to press the chip under test against the test probe. The second connector is provided with a second opening through the pressure head.

[0012] An infrared camera module is used to capture infrared images of the chip under test exposed to the second opening in its working state.

[0013] Optionally, the indenter profile has a first shape, and the second opening has a second shape, wherein the first shape is the same as or different from the second shape.

[0014] Optionally, the contact area between the pressure head and the chip under test accounts for 5%-10% of the package surface; or the area of ​​the chip under test exposed by the second opening accounts for 5%-10% of the package surface.

[0015] Optionally, the pressure head is configured to correspond to the packaging area of ​​the chip under test, and the second opening is configured to correspond to the functional area of ​​the chip under test.

[0016] Optionally, the first opening includes a first receiving portion and a second receiving portion, the first receiving portion being used to receive the chip under test, the second receiving portion being used to receive the pressure head, and the cross-sectional area of ​​the opening of the second receiving portion gradually increases in the direction away from the test probe.

[0017] Optionally, the second opening includes a first light-transmitting part and a second light-transmitting part, the first light-transmitting part is disposed on the pressure head, the second light-transmitting part is disposed on the main body, and the aperture of the first light-transmitting part is smaller than the aperture of the second light-transmitting part.

[0018] Optionally, the first connector includes a first connecting member, and the second connector includes a second connecting member, the first connecting member and the second connecting member cooperating with each other to detachably secure the second connector to the first connector.

[0019] Optionally, the first connector is a protrusion, a fixed hook, or a slot, and the second connector is a movable hook or a flexible hook.

[0020] Optionally, the first connector includes a limiting frame and a limiting back plate, which are fixed to both sides of the test motherboard and clamp the test motherboard.

[0021] Optionally, a heat insulation layer is further provided at the end of the pressure head, the heat insulation layer being used to block the heat of the chip under test from being conducted to the pressure head.

[0022] Optionally, the infrared camera module is a macro infrared lens, the macro infrared lens has a shooting distance of 80-150 mm from the chip under test, and the angle between the optical axis of the macro infrared lens and the surface of the chip under test is in the range of 85-95°.

[0023] According to another aspect of the present invention, a chip thermal characteristic detection method is provided, applied to the above-described chip thermal characteristic detection apparatus, the method comprising:

[0024] Obtain the first global infrared image of the standard sample chip in the preset working mode;

[0025] Acquire the second global infrared image of the chip under test in a preset operating mode;

[0026] Spatial registration is performed between the second global infrared image and the first global infrared image based on preset alignment marks;

[0027] Calculate the pixel difference between the registered first global infrared image and the second global infrared image to generate the temperature difference matrix of the chip under test;

[0028] The chips to be tested are screened based on the temperature difference matrix.

[0029] Optionally, the chip is a power management chip, and the preset operating modes include:

[0030] The power management chip operates within a preset input voltage range; and / or

[0031] The power management chip is used to provide a preset output voltage; and / or

[0032] The power management chip controls the number of active ports to output voltage; and / or

[0033] The power management chip is used to drive a preset load power; and / or

[0034] The power management chip is used to drive a preset number of loads.

[0035] Optionally, the chip is a power management chip, and the preset operating modes include:

[0036] Perform ascending / descending steady-state step or transient step adjustments on one or more parameters among input voltage, output voltage, and load power to obtain multiple sets of first test parameters; and / or

[0037] The number of effective ports and the number of loads are adjusted in ascending / descending steady-state stepwise order to obtain multiple sets of second test parameters;

[0038] Preset working modes corresponding to different test scenarios are generated based on the first test parameters and / or the second test parameters.

[0039] Optionally, the length or width of the pixels in the first global infrared image and the second global infrared image is less than 0.05-0.15 mm per pixel.

[0040] Optionally, the spatial registration of the second global infrared image and the first global infrared image based on a preset alignment mark includes:

[0041] Identify the second feature point on the chip edge in the second global infrared image;

[0042] The translation compensation amount is calculated based on the first feature point of the chip edge on the first global infrared image;

[0043] Based on the translation compensation amount, all pixels of the second global infrared image are mapped to the coordinate system of the first global infrared image to generate the measured temperature matrix.

[0044] Optionally, the calculation of the pixel difference between the registered first global infrared image and the second global infrared image includes:

[0045] The measured temperature matrix is ​​used as the registered second global infrared image;

[0046] Calculate the pixel difference between the measured temperature matrix and the first global infrared image.

[0047] Optionally, the step of screening the chip under test based on the temperature difference matrix includes:

[0048] Perform connected component analysis on the temperature difference matrix to calculate the effective anomaly area of ​​each connected component;

[0049] If the effective abnormal area is greater than the preset tolerance area, then the connected region is confirmed as an effective abnormal hot spot.

[0050] The chips to be tested are screened based on the area or number of the effective abnormal heat spots.

[0051] Optionally, the step of screening the chip under test based on the temperature difference matrix includes:

[0052] Confirm the high-temperature pixel group within the effective abnormal heat spot;

[0053] Calculate the position of the second centroid of the high-temperature pixel group;

[0054] The high-temperature drift within the effective abnormal heat spot is calculated based on the second centroid position and the first centroid position of the high-temperature zone corresponding to the first global infrared image.

[0055] Based on the aforementioned high-temperature drift, the chips to be tested are screened.

[0056] According to another aspect of the present invention, a chip thermal characteristic detection system is provided, comprising:

[0057] One or more processors;

[0058] Memory, used to store one or more programs;

[0059] When the one or more programs are executed by the one or more processors, the one or more processors implement the chip thermal characteristic detection method described above.

[0060] According to another aspect of the present invention, a storage medium is provided on which a computer program is stored, which, when executed by a processor, implements the above-described chip thermal characteristic detection method.

[0061] Compared to existing technologies, the chip thermal characteristic detection device in the above embodiment employs a pressure head with through holes. This head detachably presses the chip under test (DUT) onto the test probes for electrical connection. This not only facilitates the placement and removal of the DUT, but the through holes also allow for continuous infrared image capture during the testing process. This enables the capture of high-definition infrared images of the DUT's heat generation under various operating modes and scenarios, and allows for pixel-level frame-by-frame heat analysis. This facilitates the screening of abnormal DUT chips, improving screening accuracy. Furthermore, the funnel-shaped side of the second receiving section enhances the efficiency of replacing and placing the DUT, and the addition of a heat insulation layer at the end of the pressure head reduces temperature transfer, further improving screening accuracy. This embodiment uses a full-domain infrared image to inspect the chip under test. The entire detection process performs pixel-level high-precision temperature analysis on the exposed packaging surface of the chip under test. The area, number, and / or high temperature offset of the heat spot are calculated by the temperature difference matrix. The chip under test can be analyzed and detected in real time under preset working modes in different test scenarios to more accurately determine whether the input voltage range, output voltage range, number of effective ports, load driving capability, load driving capability, and / or internal circuit path of the chip under test are abnormal. Attached Figure Description

[0062] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0063] Figure 1 This is a three-dimensional exploded view of another chip thermal characteristic detection device provided in an embodiment of the present invention;

[0064] Figure 2 This is a top view of a chip thermal characteristic detection device provided in an embodiment of the present invention;

[0065] Figure 3 yes Figure 2 Schematic diagram of the cross-sectional structure along line AA;

[0066] Figure 4 yes Figure 3 A schematic diagram of the cross-sectional structure along line CC;

[0067] Figure 5 yes Figure 3 An enlarged structural diagram of the first connector in the middle;

[0068] Figure 6 yes Figure 3 Enlarged structural diagram of the second connector;

[0069] Figure 7 This is a schematic diagram of a chip thermal characteristic detection method provided in an embodiment of the present invention;

[0070] Figure 8 This is a schematic diagram of a chip thermal characteristic detection system provided in an embodiment of the present invention. Detailed Implementation

[0071] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0072] In the description of this invention, unless otherwise explicitly specified and limited, the terms "connected," "linked," and "fixed" should be interpreted broadly. For example, they can refer to a fixed connection or a detachable connection; a mechanical connection or an electrical connection; a direct connection or an indirect connection through an intermediate medium; or the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0073] In the description of this invention, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0074] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data used can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0075] Example 1

[0076] See Figures 1-6 This embodiment provides a schematic diagram of a chip thermal characteristic detection device, as shown below. Figure 1 As shown, the chip thermal characteristic detection device 1 includes:

[0077] Test motherboard 11 is used to provide test signals to chip 13 under test;

[0078] The probe module 12 includes multiple pins 121 connected to the test motherboard 11, and multiple test probes 122.

[0079] The chip under test 13 includes an opposite pad surface and a package surface, and a plurality of pads on the pad surface are configured to correspond one-to-one with the test probes 122.

[0080] The first connector 14 is fixed to the test motherboard 11. The first connector 14 is provided with a first opening 141, which is used to accommodate the probe module 12 and the chip under test 13 and expose the package surface.

[0081] The second connector 15 is detachably fixed to the first connector 14. The second connector 15 includes a connecting body 151 and a pressure head 152 extending from the body 151. The pressure head 152 is used to press the chip under test 13 against the test probe 122. The second connector 15 is provided with a second opening 153 penetrating the pressure head 152.

[0082] An infrared camera module is used to capture infrared images of the chip under test 13 exposed to the second opening 153 in its working state.

[0083] In one embodiment, the pressure head 152 has a first shape, and the second opening 153 has a second shape, wherein the first shape may be the same as or different from the second shape. In one embodiment, the profile (first shape) of the pressure head 152 is square. Figure 4 As shown), the cross-sectional shape (second shape) of the second opening 153 is a circular through hole. Figure 4 (as shown) or a curved square through-hole (not shown). Preferably, the first shape matches the edge contour of the chip under test 13 so that the chip under test 13 can be effectively pressed against the test probe 122 during the test and an electrical connection can be established between the chip under test 13 and the test probe 122. The second shape is square, which can further increase the exposed area of ​​the package surface of the chip under test 13 and reduce the contact area between the pressure head 152 and the chip under test 13, avoiding inaccurate testing due to heat transfer caused by excessive contact area. The second shape is circular, which can form a pressure head structure with an inner circle and an outer square, which can increase the structural strength of the four corners of the pressure head 152, extend the working life of the pressure head 152, and at the same time fully expose the heat-generating working area of ​​the package surface of the chip under test 13.

[0084] In one embodiment, the contact area between the pressure head 152 and the chip under test 13 accounts for 5%-10% of the package surface, for example, 8%; or the area of ​​the chip under test 13 exposed by the second opening 153 accounts for 5%-10% of the package surface, for example, 8%.

[0085] In one embodiment, the pressure head 152 is set to the packaging area of ​​the chip under test 13, and the second opening 153 is set to the functional area of ​​the chip under test 13 where the working state generates significant heat.

[0086] In one embodiment, the first opening 141 includes a first receiving portion 141A and a second receiving portion 141B. The first receiving portion 141A is used to receive the chip under test 13, and the second receiving portion 141B is used to receive the pressure head 152. The cross-sectional area of ​​the opening of the second receiving portion 141B gradually increases in the direction away from the test probe. That is, the side of the second receiving portion 141B is a guide surface that surrounds the pressure head 152 and is inclined to the extension direction of the pressure head 152. In one embodiment, the side of the second receiving portion 141B is a square funnel shape or a circular funnel shape. This configuration allows the pressure head 152 to automatically align with the chip under test 13 during the pressing process. At the same time, the square funnel shape or circular funnel shape of the side of the second receiving portion 141B can also automatically align the test probe 122 and the pads of the chip under test 13 when the chip under test 13 is placed. In this way, during the pressing process of the pressure head 152, multiple pads on the surface of the pads of the chip under test 13 can be accurately and reliably pressed together with the test probe one by one to achieve electrical connection testing.

[0087] In one embodiment, the second opening 153 includes a first light-transmitting part 153A and a second light-transmitting part 153B. The first light-transmitting part 153A is disposed on the pressure head 152, and the second light-transmitting part 153B is disposed on the main body 151. The aperture of the first light-transmitting part 153A is smaller than the aperture of the second light-transmitting part 153B to avoid light being blocked during the shooting process from the top.

[0088] In one embodiment, the second light-transmitting portion 153B can be used to embed a macro infrared lens. When the pressure head 152 presses down, the package surface of the chip under test 13 completely seals the first light-transmitting portion 153A, thus avoiding the influence of external stray light on the imaging results. Preferably, the imaging distance of the macro infrared lens to the chip under test 13 is 80-150 mm, for example, 100 mm, and the angle between the optical axis of the macro infrared lens and the surface of the chip under test 13 is in the range of 85-95°, for example, 90°. In an alternative embodiment, the macro infrared lens can also be fixedly mounted above the second light-transmitting portion 153B using a third-party bracket, thus avoiding installation difficulties caused by the mismatch between the aperture of the second light-transmitting portion 153B and the shape of the macro infrared lens.

[0089] In one embodiment, the first connector 14 includes a limiting frame 146 and a limiting back plate 145, which are fixed to both sides of the test motherboard 11 and clamp the test motherboard 11. The limiting frame 146 is used to fix and protect the probe module 12.

[0090] In one embodiment, the first connector 14 includes a first connector 148, and the second connector 15 includes a second connector 158. The first connector 148 and the second connector 158 cooperate with each other to detachably fix the second connector 15 to the first connector 14.

[0091] In one embodiment, the first connector 148 is a protrusion ( Figure 5As shown in the figure, a fixed hook or slot (not shown) is used, and the second connecting member 158 is a movable hook or an elastic hook. In this embodiment, the movable hook includes a pressing part 158A and a hook end 158B, which are rotatably connected to the main body 151 through a pivot 156. The pressing part 158A and the hook end 158B are located on both sides of the pivot 156, and the extending direction of the hook end 158B is consistent with the extending direction of the pressing head 152. The pressing part 158A is connected to the main body 151 through a spring 159. When the user presses both pressing parts 158A simultaneously, the spring 159 is compressed. At this time, the distance between the two hook ends 158B is greater than the distance between the two protrusions. The pressing head 152 can be pressed down to contact the chip under test 13 and then the pressing part 158A is released. The spring 159 rebounds and pushes the two pressing parts 158A outward. The distance between the two hook ends 158B is less than the distance between the two protrusions. The two hook ends 158B are locked to the two protrusions to fix the second connector 15 to the first connector 14.

[0092] In one embodiment, a heat insulation layer is further provided at the end of the pressure head 152. The heat insulation layer is used to block the heat of the chip under test 13 from being conducted to the pressure head 152, which further reduces the test error and improves the test accuracy.

[0093] Compared to existing technologies, the chip thermal characteristic detection device in the above embodiment employs a pressure head 152 with through holes, which detachably presses the chip under test (DUT) onto the test probe 122 for electrical connection. This not only facilitates the placement and removal of the DUT 13, but the through holes also allow for the capture of infrared images throughout the testing process. This enables the capture of high-definition infrared images of the DUT 13 under various operating modes and allows for pixel-level frame-by-frame thermal analysis, enabling the screening of abnormal DUT chips and improving screening accuracy. Furthermore, the funnel-shaped side of the second receiving section 141B improves the efficiency of replacing and placing the DUT chip, and the end of the pressure head 152 is further provided with a heat insulation layer to reduce temperature transfer, further improving screening accuracy.

[0094] Example 2

[0095] Figure 7 This is a flowchart of a chip thermal characteristic detection method provided in an embodiment of the present invention. This embodiment can be applied to the aforementioned chip thermal characteristic detection device for execution. This device can be implemented in software and / or hardware and is generally integrated into a chip thermal characteristic detection system. Correspondingly, such as… Figure 1 As shown, the method includes the following operations:

[0096] S110. Obtain the first global infrared image of the standard sample chip in the preset working mode.

[0097] In one embodiment, the chip is a power management chip (PMIC), and the standard sample chip is a standard sample (Golden Sample) of a PMIC chip with excellent performance in all aspects. The standard sample is placed in the first opening 141, and the pressure head 152 is pressed and locked. Then, under a constant temperature test environment, within the VBULK input voltage range, the adjustable range of output voltages such as SWA~SWD, and the load capacity limit of the PMIC chip, the parameters are adjusted by the host computer software in ascending and descending steady-state step and transient step input / output and load regulation, as well as single-channel and multi-channel load combination tests, to obtain multiple sets of test parameters. Different sets of test parameters correspond to different test scenarios.

[0098] In one embodiment, the preset operating mode includes:

[0099] The power management chip operates within a preset input voltage range; and / or

[0100] The power management chip is used to provide a preset output voltage; and / or

[0101] The power management chip controls the number of active ports to output voltage; and / or

[0102] The power management chip is used to drive a preset load power; and / or

[0103] The power management chip is used to drive a preset number of loads.

[0104] In one embodiment, the method for generating the preset operating mode includes: performing an ascending / descending steady-state step adjustment or transient step adjustment on one or more parameters among the input voltage, output voltage, and load power to obtain multiple sets of first test parameters; and / or performing an ascending / descending steady-state step adjustment on the number of effective ports and the number of loads to obtain multiple sets of second test parameters; and generating preset operating modes corresponding to different test scenarios based on the first test parameters and / or the second test parameters.

[0105] In one embodiment, a high-speed infrared thermal imager is controlled to acquire full-domain distribution images of the PMIC chip (first full-domain infrared image) corresponding to each test scenario operating mode. To ensure uniform temperature field and accurate hotspot positioning, the high-speed infrared thermal imager is installed vertically from above, so that the camera optical axis is 90° perpendicular to the PMIC chip surface (angle deviation controlled within ±5°), and the shooting distance is set to 80 mm to 150 mm, for example 100 mm. By configuring a macro infrared lens with a focal length of 25 mm or 50 mm, the pixel resolution of the acquired image is ensured to be less than or equal to 0.05-0.15 mm per pixel, for example 0.1 mm per pixel.

[0106] S120. Obtain the second global infrared image of the chip under test in the preset working mode.

[0107] In one embodiment, the chip under test is an incoming power management chip. The chip under test is placed in the first opening 141, and the pressure head 152 is pressed and locked. Then, under constant temperature test environment, according to different test scenarios, the corresponding test parameters are obtained to drive the chip under test 13 to power on, start up, and work in different preset working modes.

[0108] In one embodiment, the preset operating mode includes:

[0109] The power management chip operates within a preset input voltage range; and / or

[0110] The power management chip is used to provide a preset output voltage; and / or

[0111] The power management chip controls the number of active ports to output voltage; and / or

[0112] The power management chip is used to drive a preset load power; and / or

[0113] The power management chip is used to drive a preset number of loads.

[0114] In one embodiment, the preset operating mode includes: performing ascending / descending steady-state step adjustment or transient step adjustment on one or more parameters among the input voltage, output voltage, and load power to obtain multiple sets of first test parameters; and / or performing ascending / descending steady-state step adjustment on the number of effective ports and the number of loads to obtain multiple sets of second test parameters; and generating preset operating modes corresponding to different test scenarios based on the first test parameters and / or the second test parameters.

[0115] In one embodiment, a high-speed infrared thermal imager is controlled to acquire the global distribution image (second global infrared image) of the chip under test corresponding to each test scenario working mode.

[0116] S130 spatially registers the second global infrared image and the first global infrared image based on a preset alignment mark.

[0117] In one embodiment, the spatial registration of the second global infrared image and the first global infrared image based on a preset alignment mark includes: identifying a second feature point on the chip edge in the second global infrared image; calculating a translation compensation amount based on a first feature point on the chip edge in the first global infrared image; and mapping all pixels of the second global infrared image to the coordinate system of the first global infrared image based on the translation compensation amount to generate a measured temperature matrix.

[0118] Specifically, set This is the start time of the test. For The second global infrared image of the chip under test is acquired at real time. Edge feature points of the chip under test are extracted. Spatial resampling of the image is performed using an affine transformation matrix to make it consistent with the target image. The first global infrared image collected at any time is perfectly aligned in the physical coordinate system.

[0119] The spatial registration formula is as follows:

[0120]

[0121] in, The reference coordinates are for the first global infrared image (standard thermal image). The pixel coordinates (measured temperature matrix) are mapped from the second global infrared image (measured thermal image). For translation compensation, These are the rotation and scaling factors.

[0122] S140 calculates the pixel difference between the registered first global infrared image and the second global infrared image to generate the temperature difference matrix of the chip under test.

[0123] In one embodiment, the calculation of the pixel difference between the registered first global infrared image and the second global infrared image includes:

[0124] The measured temperature matrix is ​​used as the registered second global infrared image;

[0125] Calculate the pixel difference between the measured temperature matrix and the first global infrared image.

[0126] Specifically, The second global infrared image of the test subject was collected at all times and After the first global infrared image acquired at any time is registered, the pixel difference between the aligned first global infrared image (standard thermal image) and the second global infrared image (measured temperature matrix) is calculated and used as the measured temperature difference matrix. The specific calculations are as follows:

[0127]

[0128] in, Let be the measured temperature matrix at time t. This represents the standard heatmap matrix at time t. In this embodiment, time t is the duration from when the chip receives the instruction and enters the working mode to when it begins calculating the execution of the corresponding test scenario's working mode.

[0129] S150 filters the chips under test based on the temperature difference matrix.

[0130] In one embodiment, the step of screening the chip under test based on the temperature difference matrix includes: performing connected component analysis on the temperature difference matrix to calculate the effective abnormal area of ​​each connected component; if the effective abnormal area is greater than a preset tolerance area, the connected component is confirmed as an effective abnormal heat spot; and screening the chip under test according to the area or number of the effective abnormal heat spots.

[0131] In one embodiment, to filter out background noise from the thermal imager and accurately locate abnormal areas, the system introduces a temperature difference threshold. Perform binarization to generate an abnormal state matrix. The specific calculations are as follows:

[0132]

[0133] Subsequently, on the matrix Perform connected component analysis. Let the connected components be... Calculate its effective anomaly area The specific calculations are as follows:

[0134]

[0135] like Larger than the set minimum tolerance area If a region exhibits a valid abnormal heat spot, it is considered a true and effective abnormal heat spot. A chip under test with a valid abnormal heat spot can be identified as a defective chip. Alternatively, under a preset operating mode, within a preset operating time interval, within a preset operating area corresponding to the chip under test, the area of ​​each heat spot is greater than the basic heat area but less than or equal to the set minimum tolerable area. However, if the number of heat spots exceeds the minimum tolerance limit, the chip under test can also be considered a defective chip. In this example, the heat-generating area is slightly smaller than the minimum tolerance area.

[0136] In one embodiment, if the minimum tolerance area and the number of hot spots are sometimes insufficient to determine whether the chip under test has an abnormality in the current path or packaging structure, then the high temperature drift within the effective abnormal hot spots is further calculated to screen the chip under test 13.

[0137] In one embodiment, the step of screening the chip under test based on the temperature difference matrix includes: identifying the high-temperature pixel group within the effective abnormal heat spot; calculating the second centroid position of the high-temperature pixel group; calculating the high-temperature drift within the effective abnormal heat spot based on the second centroid position and the first centroid position of the high-temperature area corresponding to the first global infrared image; and screening the chip under test based on the presence of high-temperature drift.

[0138] Specifically, the feature pixel group with the highest temperature in the abnormal region is extracted, and the second centroid is calculated. The position is determined using the following formula:

[0139] ,

[0140] Calculate the position of the first centroid Use the same formula as above:

[0141]

[0142] Based on the position of the first center of gravity Second center of gravity position Calculate the Euclidean drift distance of the high-temperature drift within the effective abnormal heat spot. The specific calculations are as follows:

[0143]

[0144] like If the threshold is exceeded, a hotspot shift is determined, and the chip under test can be identified as a defective chip that has undergone a variation in the current path or packaging structure.

[0145] In the prior art, the above-described embodiment method uses a full-domain infrared image to inspect the chip under test. The entire detection process performs pixel-level high-precision temperature analysis on the exposed packaging surface of the chip under test. The area, number, and / or high temperature offset of the heat spot are calculated through the temperature difference matrix. In preset working modes of different test scenarios, the working performance of the chip under test can be analyzed and detected in real time and comprehensively. It can more accurately determine whether the input voltage range, output voltage range, number of effective ports, load driving capability, load driving capability, and / or internal circuit path of the chip under test are abnormal.

[0146] Example 3

[0147] Figure 8 A schematic diagram of a chip thermal characteristic detection system according to Embodiment 3 of the present invention is shown. Figure 8As shown, the chip thermal characteristic detection system 300 includes at least one processor 311 and a memory communicatively connected to the at least one processor 311. The memory stores a computer program executable by the at least one processor. The processor 311 can perform various appropriate actions and processes based on the computer program stored in the read-only memory (ROM) 312 or loaded from the storage unit 318 into the random access memory (RAM) 313. The RAM 313 can also store various programs and data required for the operation of the chip thermal characteristic detection system 300. The processor 311, ROM 312, and RAM 313 are interconnected via a bus 314. An input / output (I / O) interface 315 is also connected to the bus 314.

[0148] Multiple components of the chip thermal characteristic detection system 300 are connected to the I / O interface 315, including: an input unit 316, such as a keyboard or mouse; an output unit 317, such as various types of displays or speakers; a storage unit 318, such as a disk or optical disk; and a communication unit 319, such as a network card, modem, or wireless transceiver. The communication unit 319 allows the chip thermal characteristic detection system 300 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0149] Processor 311 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 311 include, but are not limited to, central processing unit (CPU), graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, digital signal processors (DSPs), and any suitable processor, controller, microcontroller, etc. Processor 311 performs the various methods and processes described above, such as chip thermal characteristic detection methods.

[0150] In some embodiments, the chip thermal characteristic detection method may be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 318. In some embodiments, part or all of the computer program may be loaded and / or installed on the chip thermal characteristic detection system 300 via ROM 312 and / or communication unit 319. When the computer program is loaded into RAM 313 and executed by processor 311, one or more steps of the chip thermal characteristic detection method described above may be performed. Alternatively, in other embodiments, processor 311 may be configured to perform the chip thermal characteristic detection method by any other suitable means (e.g., by means of firmware).

[0151] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0152] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0153] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0154] To provide interaction with a user, the systems and techniques described herein can be implemented on a mobile terminal having: a display device for displaying information to the user (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor); and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the mobile terminal. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0155] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or middleware components (e.g., application servers), or frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0156] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0157] Example 4

[0158] Embodiment 8 of the present invention also provides a computer storage medium for storing a computer program, which, when executed by a computer processor, is used to perform the chip thermal characteristic detection method described in any of the above embodiments of the present invention.

[0159] The computer storage medium of this invention can be any combination of one or more computer-readable media. A computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM, or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this document, a computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0160] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media may also be any computer-readable medium other than computer-readable storage media, capable of sending, propagating, or transmitting programs for use by or in connection with an instruction execution system, apparatus, or device.

[0161] Program code contained on a computer-readable medium may be transmitted using any suitable medium, including but not limited to wireless, wire, optical fiber, radio frequency (RF), or any suitable combination thereof.

[0162] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A chip thermal characteristic detection device, characterized in that, include: Test motherboard (11) is used to provide test signals for the chip under test; The probe module (12) includes multiple pins connected to the test motherboard (11) and multiple test probes (122). The chip under test (13) includes a pad surface and a package surface, and the multiple pads on the pad surface are set one-to-one with the test probe (122). The first connector (14) is fixed to the test motherboard (11). The first connector (14) is provided with a first opening (141). The first opening (141) is used to accommodate the probe module (12) and the chip under test (13) and expose the package surface. The second connector (15) is detachably fixed to the first connector (14). The second connector (15) includes a connecting body (151) and a pressure head (152) extending from the body. The pressure head (152) is used to press the chip under test (13) against the test probe (122). The second connector (15) is provided with a second opening (153) through the pressure head (152). An infrared camera module is used to capture infrared images of the chip under test (13) exposed to the second opening (153) in its working state.

2. The chip thermal characteristic detection device according to claim 1, characterized in that, The indenter (152) has a first shape, and the second opening has a second shape, the first shape being the same as or different from the second shape.

3. The chip thermal characteristic detection device according to claim 1, characterized in that, The contact area between the pressure head (152) and the chip under test (13) accounts for 5%-10% of the package surface; or the area of ​​the chip under test exposed by the second opening accounts for 5%-10% of the package surface.

4. The chip thermal characteristic detection device according to claim 1, characterized in that, The pressure head (152) is set in the packaging area of ​​the chip under test (13), and the second opening (153) is set in the functional area of ​​the chip under test (13).

5. The chip thermal characteristic detection device according to claim 1, characterized in that, The first opening (141) includes a first receiving portion (141A) and a second receiving portion (141B). The first receiving portion (141A) is used to receive the chip under test (13), and the second receiving portion (141B) is used to receive the pressure head (152). The cross-sectional area of ​​the opening of the second receiving portion (141B) gradually increases in the direction away from the test probe (122).

6. The chip thermal characteristic detection device according to claim 1, characterized in that, The second opening (153) includes a first light-transmitting part (153A) and a second light-transmitting part (153B). The first light-transmitting part (153A) is disposed on the pressure head (152), and the second light-transmitting part (153B) is disposed on the main body (151). The aperture of the first light-transmitting part (153A) is smaller than the aperture of the second light-transmitting part (153B).

7. The chip thermal characteristic detection device according to claim 1, characterized in that, The first connector (14) includes a first connector (148), and the second connector (15) includes a second connector (158). The first connector (148) and the second connector (158) cooperate with each other to detachably secure the second connector (15) to the first connector (14).

8. The chip thermal characteristic detection device according to claim 7, characterized in that, The first connector (148) is a protrusion, a fixed hook or a slot, and the second connector (158) is a movable hook or an elastic hook.

9. The chip thermal characteristic detection device according to claim 1, characterized in that, The first connector (14) includes a limiting frame (146) and a limiting back plate (145), which are fixed to both sides of the test motherboard and clamp the test motherboard.

10. The chip thermal characteristic detection device according to claim 1, characterized in that, The end of the pressure head (152) is further provided with a heat insulation layer, which is used to block the heat of the chip under test (13) from being conducted to the pressure head (152).

11. The chip thermal characteristic detection device according to claim 1, characterized in that, The infrared camera module is a macro infrared lens. The macro infrared lens has a shooting distance of 80-150 mm from the chip under test (13). The angle between the optical axis of the macro infrared lens and the surface of the chip under test (13) is 85-95°.

12. A method for detecting the thermal characteristics of a chip, applied to the chip thermal characteristic detection apparatus according to any one of claims 1-11, characterized in that, The method includes: Obtain the first global infrared image of the standard sample chip in the preset working mode; Acquire the second global infrared image of the chip under test in a preset operating mode; Spatial registration is performed between the second global infrared image and the first global infrared image based on preset alignment marks; Calculate the pixel difference between the registered first global infrared image and the second global infrared image to generate the temperature difference matrix of the chip under test; The chips to be tested are screened based on the temperature difference matrix.

13. The chip thermal characteristic detection method according to claim 12, characterized in that, The chip is a power management chip, and the preset operating modes include: The power management chip operates within a preset input voltage range; and / or The power management chip is used to provide a preset output voltage; and / or The power management chip controls the number of active ports to output voltage; and / or The power management chip is used to drive a preset load power; and / or The power management chip is used to drive a preset number of loads.

14. The chip thermal characteristic detection method according to claim 12, characterized in that, The chip is a power management chip, and the preset operating mode is generated in the following ways: Perform ascending / descending steady-state step or transient step adjustments on one or more parameters among input voltage, output voltage, and load power to obtain multiple sets of first test parameters; and / or The number of effective ports and the number of loads are adjusted in ascending / descending steady-state stepwise order to obtain multiple sets of second test parameters; Preset working modes corresponding to different test scenarios are generated based on the first test parameters and / or the second test parameters.

15. The chip thermal characteristic detection method according to claim 12, characterized in that, The length or width of the pixels in the first global infrared image and the second global infrared image is less than 0.05-0.15 mm per pixel.

16. The chip thermal characteristic detection method according to claim 12, characterized in that, The spatial registration of the second global infrared image and the first global infrared image based on preset alignment marks includes: Identify the second feature point on the chip edge in the second global infrared image; The translation compensation amount is calculated based on the first feature point of the chip edge on the first global infrared image; Based on the translation compensation amount, all pixels of the second global infrared image are mapped to the coordinate system of the first global infrared image to generate the measured temperature matrix.

17. The chip thermal characteristic detection method according to claim 16, characterized in that, The calculated pixel difference between the registered first and second global infrared images includes: The measured temperature matrix is ​​used as the registered second global infrared image; Calculate the pixel difference between the measured temperature matrix and the first global infrared image.

18. The chip thermal characteristic detection method according to claim 12, characterized in that, The process of screening the chip under test based on the temperature difference matrix includes: Perform connected component analysis on the temperature difference matrix to calculate the effective anomaly area of ​​each connected component; If the effective abnormal area is greater than the preset tolerance area, then the connected region is confirmed as an effective abnormal hot spot. The chips to be tested are screened based on the area or number of the effective abnormal heat spots.

19. The chip thermal characteristic detection method according to claim 18, characterized in that, The process of screening the chip under test based on the temperature difference matrix includes: Confirm the high-temperature pixel group within the effective abnormal heat spot; Calculate the position of the second centroid of the high-temperature pixel group; The high-temperature drift within the effective abnormal heat spot is calculated based on the second centroid position and the first centroid position of the high-temperature zone corresponding to the first global infrared image. The chips to be tested are screened based on the high-temperature drift.

20. A chip thermal characteristic detection system, characterized in that, include: One or more processors; Memory, used to store one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the chip thermal characteristic detection method as described in any one of claims 12-19.

21. A storage medium having a computer program stored thereon, characterized in that, When executed by the processor, the program implements the chip thermal characteristic detection method as described in any one of claims 12-19.

Images