Method, device and chip for identifying an access location

Abstract

The application relates to a method, device, equipment and chip for identifying an access position. The method comprises the following steps: in response to an identification request for an access position of a register in a chip, obtaining an assembly text file corresponding to software code of the chip; the assembly text file comprises access records of each register in the chip; based on a to-be-detected register address carried by the identification request, querying a memory access instruction matched with the to-be-detected register address from the assembly text file; and based on the memory access instruction, determining an access position of the to-be-detected register in the software code. The method can improve the identification efficiency of the access position of the register.

Description

Technical Field

[0001] This application relates to the field of chip testing technology, and in particular to a method, apparatus, device and chip for identifying access locations. Background Technology

[0002] As the scale of System on Chip (SOC) and its supporting software continues to increase, the operations of the underlying software controlling the operation of the SOC on the registers in the chip are becoming increasingly complex.

[0003] In the process of collaborative development of SOC chip software and hardware, when analyzing the register trampling problem, the relevant technologies usually rely on a combination of global address search and line-by-line verification to identify the specific code line location in the software where the register is read or modified. Then, based on the located code, further analysis is conducted to determine whether there is a trampling risk, and then a corresponding repair plan is formulated.

[0004] However, the methods for identifying the location of register access codes in related technologies suffer from low identification efficiency. Summary of the Invention

[0005] Therefore, it is necessary to provide a method, apparatus, device, and chip for identifying access locations to address the aforementioned technical problems and improve the efficiency of register access code location identification.

[0006] Firstly, this application provides an access location identification method, the method comprising:

[0007] In response to a request to identify the location of register accesses in the chip, a disassembled text file corresponding to the chip's software code is obtained; the disassembled text includes access records of each register in the chip.

[0008] Based on the address of the register to be detected carried in the identification request, query the disassembled text file for memory access instructions that match the address of the register to be detected;

[0009] Based on memory access instructions, the access location of the register to be tested in the software code is determined.

[0010] In one embodiment, based on the address of the register to be detected carried in the identification request, a memory access instruction matching the address of the register to be detected is queried from the disassembled text file, including:

[0011] Based on the preset load constant instruction type, query at least one set of target code lines that match the load constant instruction type from the disassembled text file, and record the register identifier and constant value in each set of target code lines;

[0012] Based on the register identifiers and constant values ​​in each group of target code lines, multiple memory access instructions and the corresponding register addresses of each memory access instruction are determined from the disassembled text file.

[0013] From the access register addresses corresponding to each memory access instruction, determine the target register address that matches the register address to be detected;

[0014] The memory access instruction corresponding to the target register address is determined to be the memory access instruction that matches the register address to be detected.

[0015] In one embodiment, the disassembled text file includes multiple lines of code; it records register identifiers and constant values ​​in each group of target code lines, including:

[0016] For any set of target code lines, the content at the first preset position of the target code line is determined as the register identifier in the target code line; and...

[0017] Obtain the content type at the second preset position in the target code line, and determine the constant value in the target code line based on the content type.

[0018] In one embodiment, determining the constant value in the target code line based on the content type includes:

[0019] When the content type is constant, the content at the second preset position in the target code line is determined as a constant value;

[0020] When the content type is an address type, the content at the second preset position in the target code line is determined as the storage address of the constant value, and the constant corresponding to the storage address is determined from the preset correspondence and used as the constant value in the target code line; the correspondence includes the mapping relationship between address and constant.

[0021] In one embodiment, based on the register identifiers and constant values ​​in each group of target code lines, multiple memory access instructions and the corresponding register addresses for each memory access instruction are determined from the disassembled text file, including:

[0022] For each group of target lines of code, the range between the next line of the target line of code and the end line of the current function is determined as the tracing range of the target line of code.

[0023] Within the tracing scope, based on register identifiers in the target code, at least one memory access instruction whose register identifier is used as an access address is identified from the disassembled text file; each memory access instruction includes an address offset;

[0024] The constant value corresponding to the register identifier is superimposed with the address offset in each group of memory access instructions to obtain the register address corresponding to each memory access instruction.

[0025] In one embodiment, the method further includes:

[0026] For each group of target code lines, check if there are any instructions in the disassembled text file that modify the register identifiers;

[0027] If it exists, then stop the operation of determining which memory access instruction matches the address of the register to be detected in the disassembled text file.

[0028] In one embodiment, the access location of the register to be detected in the software code includes the access line of code; the method further includes:

[0029] When the memory access instruction is a write instruction, mark the access code line as the code line for writing to the register to be tested;

[0030] When the memory access instruction is a read instruction, the access code line is marked as the code line for reading the register to be detected.

[0031] Secondly, this application also provides an access location identification device, comprising:

[0032] The disassembled text acquisition module is used to obtain the disassembled text file corresponding to the software code of the chip in response to the identification request for the location of register access in the chip; the identification request carries the address of the register to be detected;

[0033] The disassembly text query module is used to query memory access instructions that match the address of the register to be detected from the disassembled text file.

[0034] The location determination module is used to determine the access location of the register to be detected in the software code based on memory access instructions.

[0035] Thirdly, this application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the method steps in the embodiments of the first aspect described above.

[0036] Fourthly, this application also provides a chip, including a processor and a communication interface, wherein the processor is configured to cause the chip to execute the method steps described in the embodiments of the first aspect above.

[0037] Fifthly, this application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method steps described in the embodiments of the first aspect above.

[0038] Sixthly, this application also provides a computer program product, including a computer program that, when executed by a processor, implements the method steps described in the embodiments of the first aspect above.

[0039] The aforementioned method, apparatus, device, and chip for identifying access locations respond to a request to identify the access location of a register in the chip by acquiring a disassembled text file corresponding to the chip's software code. The disassembled text file includes access records for each register in the chip. Based on the address of the register to be detected carried in the identification request, the disassembled text file is used to query for memory access instructions that match the address of the register to be detected. Based on the memory access instructions, the access location of the register to be detected in the software code is determined. In this way, by using the address of the register to be detected as an identifier, a query and matching operation is performed based on the disassembled text file, directly matching the corresponding memory access instructions in the disassembled text file, accurately locating the operation instructions on the target register in the software code. This eliminates the need for line-by-line analysis of the chip's software code, avoiding omissions and misjudgments, and improving the efficiency of register access code location identification. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 This is an internal structural diagram of a computer device in one embodiment;

[0042] Figure 2 This is a flowchart illustrating a method for identifying access locations in one embodiment;

[0043] Figure 3 This is a flowchart illustrating the memory access instruction determination step in one embodiment;

[0044] Figure 4 This is a flowchart illustrating the steps for determining register identifiers and constant values ​​in one embodiment;

[0045] Figure 5 This is a flowchart illustrating the register address determination step in one embodiment;

[0046] Figure 6 This is a flowchart illustrating a method for identifying access locations in another embodiment;

[0047] Figure 7This is a structural block diagram of an access location identification device in one embodiment;

[0048] Figure 8 This is an internal structure diagram of a chip module in one embodiment. Detailed Implementation

[0049] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0050] It should be noted that the terms "first," "second," etc., used in this application can be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from the second element. The terms "comprising" and "having," and any variations thereof, used in this application, are intended to cover non-exclusive inclusion. The term "multiple" used in this application refers to two or more. The term "and / or" used in this application refers to one of the embodiments, or any combination of multiple embodiments.

[0051] As the scale of System on Chip (SOC) and its supporting software continues to increase, the operations of the underlying software controlling the operation of the SOC on the registers in the chip are becoming increasingly complex.

[0052] In the process of collaborative development of SOC chip software and hardware, static code analysis is usually used to scan for code defects and vulnerabilities, identify problems in the code in advance, improve code quality from the source, and reduce subsequent development and maintenance costs.

[0053] However, static code detection methods in related technologies cannot identify the hardware attribute of register addresses. As a result, when problems occur, the code is found by "global address search + manual line-by-line verification" when analyzing register trampling problems. This method is time-consuming, labor-intensive, and prone to omissions.

[0054] Based on this, this application provides an access location identification method. By analyzing the disassembled text file corresponding to the chip software code, the method realizes the function of identifying the code line location for register reading and writing, thereby improving the efficiency of identifying the register access code location.

[0055] The access location identification method provided in this application can be applied to computer devices, which can be terminals, and their internal structure diagrams can be as follows. Figure 1As shown, the computer device includes a processor, memory, input / output interfaces, a communication interface, a display unit, and an input device. The processor, memory, and input / output interfaces are connected via a system bus, and the communication interface, display unit, and input device are also connected to the system bus via the input / output interfaces. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The input / output interfaces are used for exchanging information between the processor and external devices. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, Near Field Communication (NFC), or other technologies. When executed by the processor, the computer program implements an access location identification method. The display unit is used to form a visually visible image and can be a display screen, a projection device, or a virtual reality imaging device. The display screen can be an LCD screen or an e-ink screen. The input device of the computer device can be a touch layer covering the display screen, or buttons, trackballs, or touchpads set on the casing of the computer device, or external keyboards, touchpads, or mice, etc.

[0056] Those skilled in the art will understand that Figure 1 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0057] In one exemplary embodiment, such as Figure 2 As shown, an access location identification method is provided, the method including:

[0058] S201, in response to a request to identify the location of register access in the chip, obtains the disassembled text file corresponding to the software code of the chip; the disassembled text includes access records of each register in the chip.

[0059] A chip is a semiconductor device that integrates a large number of transistors and has its own hardware architecture, such as ARM, with built-in registers, arithmetic units, and memory units. The software code of a chip refers to text written in a programming language. By converting the software code into binary machine instructions that the chip can recognize, the chip can perform specific functions.

[0060] The disassembled text file includes assembly instructions generated by compiling the chip's software code (to obtain machine instructions) and then disassembling it. It contains instruction addresses, machine code, assembly instructions, registers, and memory address access records. In this embodiment, the disassembled text file serves as an intermediate file connecting the software code logic and the chip hardware execution. It reflects both the software code's intention to manipulate registers and accurately corresponds to the actual instruction behavior executed by the chip.

[0061] When troubleshooting a chip's functionality or analyzing register access issues, it's necessary to analyze specific registers to determine the line of code where those registers are being read or written. In this case, based on the need to analyze access to the specified registers, a register access location identification request is triggered.

[0062] For example, the disassembled text file corresponding to the software code is stored in a designated storage location and updated synchronously when the software code is updated. Based on this, in response to a register access location identification request, the disassembled text file corresponding to the chip's software code is read from the designated storage location.

[0063] For example, the disassembled text file corresponding to the software code is generated in real time. Based on this, in response to the registration access location identification request, the chip's software code is obtained, and the software code is compiled into machine code using a compilation tool. Then, the machine code is disassembled to obtain a disassembled text file.

[0064] S202, based on the address of the register to be detected carried in the identification request, queries the disassembled text file for memory access instructions that match the address of the register to be detected.

[0065] It's important to note that register address access is typically not written directly in memory access instructions. Instead, it's achieved through a process of loading constants, transferring data to registers, and then accessing the memory. Therefore, we can first search for constant loading instructions in the disassembled text file, then find the associated memory access instructions based on those instructions, then deduce the corresponding register addresses from the memory access instructions, and finally match the deduced addresses with the addresses of the registers to be detected to identify the memory access instructions that match.

[0066] S203, based on memory access instructions, determines the access location of the register to be tested in the software code.

[0067] Memory access instructions correspond to a unique execution location in software code, such as a line number, binary address, or function name. Optionally, the binary address of the memory access instruction can be extracted, and then the line number of the register to be checked can be located in the software code based on the binary address to obtain the access location.

[0068] In this embodiment, in response to a request to identify the location of register access in a chip, a disassembled text file corresponding to the chip's software code is obtained. The disassembled text file includes access records of each register in the chip. Based on the address of the register to be detected carried in the identification request, a memory access instruction matching the address of the register to be detected is queried from the disassembled text file. Based on the memory access instruction, the access location of the register to be detected in the software code is determined. Thus, by using the address of the register to be detected as an identifier, a query and matching operation is performed based on the disassembled text file, directly matching the corresponding memory access instruction in the disassembled text file, accurately locating the operation instruction on the target register in the software code. This eliminates the need for line-by-line analysis of the chip's software code, avoiding omissions and misjudgments, and improving the efficiency of register access code location identification.

[0069] Next, the access process based on register address includes the steps of loading constants, register transfer, and memory access. One feasible query method for querying memory access instructions in the aforementioned embodiments will be described.

[0070] In one exemplary embodiment, such as Figure 3 As shown, based on the address of the register to be detected carried in the identification request, the memory access instructions matching the address of the register to be detected are queried from the disassembled text file, including:

[0071] S301, based on a preset load constant instruction type, queries the disassembled text file for at least one set of target code lines that match the load constant instruction type, and records the register identifier and constant value in each set of target code lines.

[0072] It should be noted that in software code, register read and write operations are usually performed by directly reading and writing the physical address of the register. This address exists as a constant in the software code and also as a constant in the disassembled text file.

[0073] Furthermore, in the disassembled text file, the constant loading instruction types include two major series: ldr and mov. The ldr series includes ldr, ldrb, and ldrh; the mov series includes mov, movw, mov.w, movt, and movk.

[0074] Based on this, the instruction types in the disassembled text file are judged, the target code lines that load constants in the disassembled text file are identified, and then the memory in each group of target code lines is parsed to obtain the register identifiers and constant values ​​in that group of code lines.

[0075] S302 determines multiple memory access instructions and their corresponding register addresses from the disassembled text file based on the register identifiers and constant values ​​in each group of target code lines.

[0076] For each group of target code lines, based on the register identifier in that group of code lines, the memory access instruction with that register identifier as the access address is determined from the disassembled text file, and the register address corresponding to the memory access instruction is determined according to the offset address carried in the memory access instruction and the constant value in the target code line.

[0077] S303 determines the target register address that matches the address of the register to be detected from the access register addresses corresponding to each memory access instruction.

[0078] The access register address corresponding to each memory access instruction is compared with the address of the register to be detected, and the access register address that matches the address of the register to be detected is determined, which is the target register address.

[0079] S304 determines the memory access instruction corresponding to the target register address as the memory access instruction that matches the address of the register to be detected.

[0080] The target register address matches the address of the register to be detected. Accordingly, the memory access instruction corresponding to the target register address is the memory access instruction that matches the address of the register to be detected.

[0081] In this embodiment, based on the register identifier and constant value in the constant instruction code loaded in the disassembled text file, multiple memory access instructions and the register address corresponding to each memory access instruction are determined from the disassembled text file. The memory access instruction that matches the address of the register to be detected is determined as the memory access instruction that matches the address of the register to be detected. This can solve the instruction identification problem in complex scenarios such as register address offset and register reuse, and accurately and comprehensively obtain the memory access instructions that operate on the address of the register to be detected.

[0082] In one exemplary embodiment, such as Figure 4 As shown, the disassembled text file contains multiple lines of code; the aforementioned step S301, "recording the register identifiers and constant values ​​in each group of target code lines," includes:

[0083] S401, for any set of target code lines, determine the content at the first preset position of the target code line as the register identifier in the target code line.

[0084] The first preset position refers to the position in the target code line adjacent to the load constant instruction identifier.

[0085] For example, taking the code line corresponding to the ldr instruction as an example, the memory in the first curly brace after the ldr instruction is the content of the first preset position, and the corresponding code line type is: "... ldr {CPU register X}, ...{constant value}", then {CPU register X} is the register identifier in the target code line.

[0086] For example, taking the code line corresponding to the mov instruction as an example, the memory in the first curly brace after the mov instruction is the content of the first preset position, and the corresponding code line type is: "... mov {CPU register X},{constant value}...", then {CPU register X} is the register identifier in the target code line.

[0087] S402, obtain the content type of the target code line at the second preset position, and determine the constant value of the target code line based on the content type.

[0088] If the content at the second preset position in the target code line is a constant type, then the content at the second preset position is determined as a constant value; otherwise, the constant value is determined from the mapping relationship based on the content at the second preset position.

[0089] In one exemplary embodiment, determining the constant value in the target code line based on the content type includes:

[0090] When the content type is a constant, the content at the second preset position in the target code line is determined as the constant value; when the content type is an address, the content at the second preset position in the target code line is determined as the storage address of the constant value, and the constant corresponding to the storage address is determined from the preset correspondence and used as the constant value in the target code line; the correspondence includes the mapping relationship between address and constant.

[0091] Optionally, the code line type corresponding to the ldr instruction is: "... ldr {CPU register X}, ...{constant value}", where the second preset position is the position of {constant value} and the content type is constant, thus directly determining the content in {constant value}.

[0092] Optionally, the code line type corresponding to the ldr instruction is: "... ldr {CPU register X}, ... {word address}...", the second preset position is the position of {word address}, and the content type is address type. Then, "{word address} ... {constant value}" is extracted from the disassembled text file to determine the constant value corresponding to {word address}.

[0093] Optionally, the code line type corresponding to mov is "... mov {CPU register X},{constant value}...", the second preset position is the position of {constant value}, and the content type is constant, then the content in {constant value} is directly determined.

[0094] In addition, for instructions with shift operations such as movt and movk, the extracted {constant value} needs to be shifted accordingly to obtain the corresponding constant value.

[0095] In this embodiment, register identifiers in the target code line are directly extracted from preset locations, and constant values ​​are parsed specifically according to content type. This achieves standardized, automated, and high-precision extraction of register and constant information from disassembled text files, providing accurate and stable data support for subsequent association with memory access instructions and deduction of actual register addresses, ensuring the automation level and reliability of the entire register access instruction identification process. Furthermore, when parsing constant values, the constant values ​​are parsed differently based on the syntax features of different constant loading instructions, adapting to the differences in constant storage and expression between different instructions.

[0096] In one exemplary embodiment, such as Figure 5 As shown, the aforementioned step S302, "based on the register identifiers and constant values ​​in each group of target code lines, determines multiple memory access instructions and the register addresses corresponding to each memory access instruction from the disassembled text file," includes:

[0097] S501, for each group of target code lines, the range between the next line of the target code line and the end line of the current function is determined as the tracing range of the target code line.

[0098] It's important to note that after a constant is loaded and assigned to a register, the register's valid value is only valid within the instruction stream of the current function, from the time of assignment until the function ends. Outside this range, the register may be reassigned or overwritten, and the associated memory access instructions will inevitably not correspond to the target constant value. Therefore, based on the function containing the target code, the range between the next line of the target code and the last line of the current function—that is, the code interval corresponding to the current function—is determined as the valid tracing range.

[0099] S502, within the tracing range, identifies at least one memory access instruction from the disassembled text file based on the register identifier in the object code, where the register identifier is the access address; each memory access instruction includes an address offset.

[0100] Based on the standard format of memory access instructions, multiple initial memory access instructions matching the format are identified from the disassembled text file. Each initial memory access instruction includes a structure of [register identifier, #address offset]. Then, the memory access instruction matching the register identifier is determined from the initial memory access instructions.

[0101] It should be noted that the access address can be either a read address or a write address. Based on this, the memory access instruction corresponding to the same register identifier as the access address can be a single instruction: a write instruction or a read instruction, or it can be two instructions: a write instruction and a read instruction.

[0102] S503 adds the constant value corresponding to the register identifier to the address offset in each group of memory access instructions to obtain the register address corresponding to each memory access instruction.

[0103] For each memory access instruction, the register address corresponding to the memory access instruction is determined by superimposing the constant value corresponding to the register identifier and the address offset in the memory access instruction.

[0104] In this embodiment, for each group of target code lines, within the range between the next line of the target code line and the end line of the current function, based on the register identifier in the target code, at least one memory access instruction whose access address is the register identifier is identified from the disassembled text file. This avoids the erroneous association problem caused by cross-function register reuse and assignment overwriting. The constant value corresponding to the register identifier is superimposed with the address offset in each group of memory access instructions to obtain the register address corresponding to each memory access instruction. This achieves accurate mapping between memory access instructions and actual register addresses, improving the accuracy, completeness and analysis efficiency of register access instruction identification.

[0105] The foregoing embodiments described the query method for memory access instructions. However, in actual querying, register identifiers may be modified. Once modified, the binding relationship between the register identifier and the constant value is broken, requiring timely termination of the query to avoid deriving incorrect register addresses. In an exemplary embodiment, such as... Figure 6 As shown, the method also includes:

[0106] S601: For each group of target code lines, check if there are any instructions in the disassembled text file that modify the register identifiers.

[0107] Based on the register identifier modification instruction format, search the disassembled text file for the existence of register identifier modification instructions. For example, the format of a register identifier modification instruction is as follows: "...{not str instruction} {CPU register X},...".

[0108] S602, if present, then stop the operation of determining the memory access instruction that matches the address of the register to be detected from the disassembled text file.

[0109] If a register identifier modification instruction exists, it means that within the tracing range, there is an assignment or overwrite instruction that modifies the target register identifier, i.e., the binding relationship between the register identifier and the constant value is broken. In this case, the result obtained by continuing to query the instruction will also be invalid. Therefore, subsequent operations should be stopped in time to avoid generating incorrect matching results.

[0110] In this embodiment of the application, for the register identifier of each group of target code lines, if a modification instruction for the register identifier is detected in the disassembled text file, the operation of determining the memory access instruction that matches the address of the register to be detected from the disassembled text file is stopped. This avoids address derivation errors caused by the reassignment of registers and ensures the accuracy of the register access instruction identification results.

[0111] In one exemplary embodiment, the access location of the register to be detected in the software code includes the access code line; the method further includes:

[0112] When the memory access instruction is a write instruction, the access code line is marked as a write to the register to be checked code line; when the memory access instruction is a read instruction, the access code line is marked as a read to the register to be checked code line.

[0113] If the memory access instruction is a write instruction, it means that the access code line of the register to be checked is being written, so the access code line is marked as the write code line of the register to be checked; if the memory access instruction is a read instruction, it means that the access code line of the register to be checked is being read, so the access code line is marked as the read code line of the register to be checked.

[0114] In this embodiment, by distinguishing the read and write types of memory access instructions, the code lines that match the register address to be detected are marked differently, thereby achieving fine-grained classification and identification of register access behavior, and providing more accurate behavioral dimension information for the functional verification and fault location of chip registers.

[0115] In one exemplary embodiment, an access location identification method is provided, comprising the following steps:

[0116] (1) In response to a request to identify the location of register access in the chip, obtain the disassembled text file corresponding to the software code of the chip.

[0117] The disassembled text includes access records for each register in the chip.

[0118] (2) Based on the preset load constant instruction type, query at least one set of target code lines that match the load constant instruction type from the disassembled text file.

[0119] The target line of code can be: "... ldr {CPU register X}, ...{constant value}", "... ldr {CPU register X}, ... {word address} ...", "... mov {CPU register X},{constant value}...".

[0120] (3) Determine the content of the target code line at the first preset position as the register identifier in the target code line; obtain the content type of the target code line at the second preset position, and if the content type is a constant type, determine the content of the target code line at the second preset position as a constant value; if the content type is an address type, determine the content of the target code line at the second preset position as the storage address of the constant value, and determine the constant corresponding to the storage address from the mapping relationship between address and constant, as the constant value in the target code line.

[0121] (4) For any set of register identifiers and constant values, the range between the next line of the target code line and the end line of the current function is determined as the tracing range of the target code line.

[0122] (5) Within the tracing range, based on the register identifier in the target code, identify at least one memory access instruction from the disassembled text file that uses the register identifier as the access address; each memory access instruction includes an address offset.

[0123] (6) The constant value corresponding to the register identifier and the address offset in each group of memory access instructions are superimposed to obtain the register address corresponding to each memory access instruction.

[0124] (7) Determine the target register address that matches the register address to be detected from the access register addresses corresponding to each memory access instruction.

[0125] (8) Determine the memory access instruction corresponding to the target register address as the memory access instruction that matches the register address to be detected.

[0126] (9) Based on the memory access instruction, determine the access code line of the register to be detected in the software code.

[0127] (10) When the memory access instruction is a write instruction, mark the access code line as the write code line of the register to be tested; when the memory access instruction is a read instruction, mark the access code line as the read code line of the register to be tested.

[0128] For example, it detects whether {CPU register X} is written to memory by the str series of instructions, including str, strb, strh, etc. Taking str as an example, the str instruction format is as follows: ...str {CPU source register},[{CPU register X}, #{address offset}].... Based on {CPU register X}, it matches the above text. For each match, it checks whether the {constant value} corresponding to {CPU register X} plus the {address offset} is equal to the address of the register to be detected. If so, it outputs the source code line information corresponding to the str instruction and marks it as the code line that wrote to the register to be detected.

[0129] The `ldr` instruction is used to detect if `{CPU register X}` is used as an address to read memory. Taking `ldr` as an example, the `ldr` instruction format is as follows: ... `ldr {CPU destination register}, [{CPU register X}, #{address offset}]...`. Based on `{CPU register X}`, the instruction matches the above text. For each match, it checks if the `{constant value}` corresponding to `{CPU register X}` plus the `{address offset}` equals the address of the register to be read. If so, the source code line information corresponding to the `ldr` instruction is output and marked as the line that read the register to be read.

[0130] (11) Check if {CPU register X} has been modified. If it has been modified, {CPU register X} will no longer point to the address of the register to be detected. Exit the current tracing and stop the identification.

[0131] This application, targeting software based on the Arm CPU architecture, analyzes its disassembled text file to identify the line locations of register reads and writes. Furthermore, by using the address of the register to be detected as an identifier, a query and matching operation is performed based on the disassembled text file to directly match the corresponding memory access instructions. This accurately locates the software code's operation instructions on the target register, eliminating the need for line-by-line analysis of the chip's software code, avoiding omissions and misjudgments, and improving the efficiency of register access code location identification.

[0132] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps. It is understood that the steps in different embodiments can be freely combined as needed, and all non-contradictory solutions formed by such combinations are within the scope of protection of this application.

[0133] Based on the same inventive concept, this application also provides an access location identification device for implementing the access location identification method described above. This device can be applied to or integrated into a chip or chip module, for example. The solution provided by this device is similar to the implementation described in the above method; therefore, the specific limitations of one or more access location identification device embodiments provided below can be found in the limitations of the access location identification method described above, and will not be repeated here.

[0134] In one exemplary embodiment, such as Figure 7 As shown, an access location identification device is provided, comprising: a disassembled text acquisition module 701, a disassembled text query module 702, and a location determination module 703, wherein:

[0135] The disassembled text acquisition module 701 is used to acquire the disassembled text file corresponding to the software code of the chip in response to the identification request for the access location of the register in the chip; the identification request carries the address of the register to be detected;

[0136] The disassembly text query module 702 is used to query memory access instructions that match the address of the register to be detected from the disassembly text file.

[0137] The location determination module 703 is used to determine the access location of the register to be detected in the software code based on memory access instructions.

[0138] In an exemplary embodiment, the disassembly text query module 702 includes: a constant loading query unit, an access instruction determination unit, an address matching unit, and an instruction determination unit, wherein:

[0139] The constant loading query unit is used to query at least one set of target code lines that match the load constant instruction type from the disassembled text file based on a preset load constant instruction type, and record the register identifier and constant value in each set of target code lines;

[0140] The access instruction determination unit is used to determine multiple memory access instructions and the corresponding register addresses of each memory access instruction from the disassembled text file based on the register identifiers and constant values ​​in each group of target code lines.

[0141] The address matching unit is used to determine the target register address that matches the address of the register to be detected from the access register addresses corresponding to each memory access instruction.

[0142] The instruction determination unit is used to determine the memory access instruction corresponding to the target register address as a memory access instruction that matches the address of the register to be detected.

[0143] In an exemplary embodiment, the disassembled text file includes multiple lines of code; the access instruction determination unit is further configured to, for any set of target code lines, determine the content of the target code line at a first preset position as the register identifier in the target code line; and, obtain the content type of the target code line at a second preset position, and determine the constant value in the target code line according to the content type.

[0144] In an exemplary embodiment, the access instruction determining unit is further configured to: when the content type is a constant type, determine the content at the second preset position in the target code line as a constant value; when the content type is an address type, determine the storage address of the content at the second preset position in the target code line as a constant value, and determine the constant corresponding to the storage address from a preset correspondence as a constant value in the target code line; the correspondence includes a mapping relationship between addresses and constants.

[0145] In an exemplary embodiment, the access instruction determination unit is further configured to, for each group of target code lines, determine the range between the next line of the target code line and the end line of the current function as the tracing range of the target code line; within the tracing range, based on the register identifier in the target code, identify at least one memory access instruction from the disassembled text file whose register identifier is used as the access address; each memory access instruction includes an address offset; and superimpose the constant value corresponding to the register identifier and the address offset in each group of memory access instructions to obtain the register address corresponding to each memory access instruction.

[0146] In one exemplary embodiment, the location identification device further includes: a modification instruction detection module and a termination detection module, wherein:

[0147] The instruction modification detection module is used to detect whether there are any instructions to modify the register identifiers in the disassembled text file for each group of target code lines.

[0148] The termination detection module is used to stop the execution of the operation of determining the memory access instruction that matches the address of the register to be detected in the disassembled text file if it exists.

[0149] In an exemplary embodiment, the access location of the register to be detected in the software code includes the access code line; the access location identification device further includes: a write instruction marking module and a read instruction marking module, wherein:

[0150] The write instruction marking module is used to mark the access code line as a write to the register to be detected when the memory access instruction is a write instruction;

[0151] The read instruction marking module is used to mark the accessed code line as a read register code line when the memory access instruction is a read instruction.

[0152] Regarding the modules / units included in the various devices and products described in the above embodiments, they can be software modules / units, hardware modules / units, or a combination of both. For example, for various devices and products applied to or integrated into a chip, all of their modules / units can be implemented using hardware methods such as circuits, or at least some modules / units can be implemented using software programs that run on a processor integrated within the chip, while the remaining (if any) modules / units can be implemented using hardware methods such as circuits; for various devices and products applied to or integrated into a chip module, all of their modules / units can be implemented using hardware methods such as circuits, and different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or different components of the chip module, or at least some modules / units can be implemented using hardware methods such as circuits. The components can be implemented using software programs that run on the processor integrated within the chip module. The remaining (if any) modules / units can be implemented using hardware methods such as circuits. For various devices and products applied to or integrated into the terminal, each of its components / units can be implemented using hardware methods such as circuits. Different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or in different components within the terminal. Alternatively, at least some modules / units can be implemented using software programs that run on the processor integrated within the terminal, while the remaining (if any) modules / units can be implemented using hardware methods such as circuits.

[0153] In one exemplary embodiment, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to perform the following steps:

[0154] In response to a request to identify the location of register accesses in the chip, a disassembled text file corresponding to the chip's software code is obtained; the disassembled text includes access records of each register in the chip.

[0155] Based on the address of the register to be detected carried in the identification request, query the disassembled text file for memory access instructions that match the address of the register to be detected;

[0156] Based on memory access instructions, the access location of the register to be tested in the software code is determined.

[0157] In one exemplary embodiment, the processor performs the following steps when executing a computer program:

[0158] Based on the preset load constant instruction type, query at least one set of target code lines that match the load constant instruction type from the disassembled text file, and record the register identifier and constant value in each set of target code lines;

[0159] Based on the register identifiers and constant values ​​in each group of target code lines, multiple memory access instructions and the corresponding register addresses of each memory access instruction are determined from the disassembled text file.

[0160] From the access register addresses corresponding to each memory access instruction, determine the target register address that matches the register address to be detected;

[0161] The memory access instruction corresponding to the target register address is determined to be the memory access instruction that matches the register address to be detected.

[0162] In one exemplary embodiment, the disassembled text file includes multiple lines of code; when the processor executes the computer program, it performs the following steps:

[0163] For any set of target code lines, the content at the first preset position of the target code line is determined as the register identifier in the target code line; and...

[0164] Obtain the content type at the second preset position in the target code line, and determine the constant value in the target code line based on the content type.

[0165] In one exemplary embodiment, the processor performs the following steps when executing a computer program:

[0166] When the content type is constant, the content at the second preset position in the target code line is determined as a constant value;

[0167] When the content type is an address type, the content at the second preset position in the target code line is determined as the storage address of the constant value, and the constant corresponding to the storage address is determined from the preset correspondence and used as the constant value in the target code line; the correspondence includes the mapping relationship between address and constant.

[0168] In one exemplary embodiment, the processor performs the following steps when executing a computer program:

[0169] For each group of target lines of code, the range between the next line of the target line of code and the end line of the current function is determined as the tracing range of the target line of code.

[0170] Within the tracing scope, based on register identifiers in the target code, at least one memory access instruction whose register identifier is used as an access address is identified from the disassembled text file; each memory access instruction includes an address offset;

[0171] The constant value corresponding to the register identifier is superimposed with the address offset in each group of memory access instructions to obtain the register address corresponding to each memory access instruction.

[0172] In one exemplary embodiment, the processor performs the following steps when executing a computer program:

[0173] For each group of target code lines, check if there are any instructions in the disassembled text file that modify the register identifiers;

[0174] If it exists, then stop the operation of determining which memory access instruction matches the address of the register to be detected in the disassembled text file.

[0175] In one exemplary embodiment, the location of the register to be detected in the software code includes the line of code to be accessed; the processor performs the following steps when executing the computer program:

[0176] When the memory access instruction is a write instruction, mark the access code line as the code line for writing to the register to be tested;

[0177] When the memory access instruction is a read instruction, the access code line is marked as the code line for reading the register to be detected.

[0178] Based on the same inventive concept, this application also provides a chip, including a processor coupled to a memory, for executing a computer program or instructions stored in the memory, and implementing the steps in the above method embodiments when the processor executes the computer program or instructions.

[0179] It is understood that the chip involved in the embodiments of this application may be a field-programmable gate array (FPGA), may be an application-specific integrated circuit (ASIC), may be a system on chip (SoC), may be a central processor unit (CPU), may be a network processor (NP), may be a digital signal processor (DSP), may be a microcontroller unit (MCU), may be a programmable logic device (PLD), or other integrated chips, etc.

[0180] Based on the same inventive concept, this application also provides a chip module, such as... Figure 8 As shown, the chip module includes a communication module, a power module, a storage module, and a chip. Among them:

[0181] The power module is used to provide power to the chip module; the storage module is used to store data and instructions; the communication module is used for internal communication within the chip module, or for communication between the chip module and external devices; this chip corresponds to the chip in the above chip embodiment.

[0182] The implementation method of this chip module can be found in the relevant content of the above chip embodiment, and will not be repeated here.

[0183] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the steps in the above method embodiments.

[0184] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above method embodiments.

[0185] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of the relevant data must comply with relevant regulations.

[0186] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0187] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0188] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for identifying access locations, characterized in that, The method includes: In response to a request to identify the location of register access in the chip, a disassembled text file corresponding to the software code of the chip is obtained; the disassembled text file includes access records of each register in the chip; Based on the address of the register to be detected carried in the identification request, query the disassembled text file for memory access instructions that match the address of the register to be detected; Based on the memory access instructions, the access location of the register to be detected in the software code is determined.

2. The method according to claim 1, characterized in that, The step of querying the disassembled text file for memory access instructions that match the address of the register to be detected, based on the address of the register to be detected carried in the identification request, includes: Based on a preset load constant instruction type, at least one set of target code lines that match the load constant instruction type are queried from the disassembled text file, and the register identifier and constant value in each set of target code lines are recorded. Based on the register identifiers and constant values ​​in each group of target code lines, multiple memory access instructions and the register addresses corresponding to each memory access instruction are determined from the disassembled text file. From the access register addresses corresponding to each memory access instruction, determine the target register address that matches the register address to be detected; The memory access instruction corresponding to the target register address is determined to be the memory access instruction that matches the address of the register to be detected.

3. The method according to claim 2, characterized in that, The disassembled text file includes multiple lines of code; the record of register identifiers and constant values ​​in each group of target code lines includes: For any set of target code lines, the content at a first preset position in the target code line is determined as the register identifier in the target code line; and... Obtain the content type of the target code line at the second preset position, and determine the constant value of the target code line based on the content type.

4. The method according to claim 3, characterized in that, Determining the constant value in the target code line based on the content type includes: When the content type is a constant type, the content in the target code line at the second preset position is determined as the constant value; When the content type is an address type, the content at the second preset position in the target code line is determined as the storage address of the constant value, and the constant corresponding to the storage address is determined from the preset correspondence as the constant value in the target code line; the correspondence includes the mapping relationship between address and constant.

5. The method according to any one of claims 2-4, characterized in that, The step of determining multiple memory access instructions and their corresponding register addresses from the disassembled text file based on register identifiers and constant values ​​in each group of target code lines includes: For each group of target code lines, the range between the next line of the target code line and the end line of the current function is determined as the tracking range of the target code line; Within the tracing range, based on the register identifier in the target code, at least one memory access instruction is identified from the disassembled text file, with the register identifier serving as the access address; each memory access instruction includes an address offset; The constant value corresponding to the register identifier is superimposed with the address offset in each group of memory access instructions to obtain the register address corresponding to each memory access instruction.

6. The method according to any one of claims 2-4, characterized in that, The method further includes: For each group of target code lines, check whether there are any modification instructions for the register identifier in the disassembled text file; If it exists, then stop the operation of determining the memory access instruction that matches the address of the register to be detected from the disassembled text file.

7. The method according to any one of claims 1-4, characterized in that, The access location of the register to be detected in the software code includes the access code line; the method further includes: If the memory access instruction is a write instruction, the access code line is marked as a write to the register to be detected code line; When the memory access instruction is a read instruction, the access code line is marked as a read register to be detected code line.

8. An access location identification device, characterized in that, The device includes: The disassembly text acquisition module is used to acquire the disassembly text file corresponding to the software code of the chip in response to an identification request for the access location of the register in the chip; the disassembly text includes the access records of each register in the chip; The disassembly text query module is used to query the memory access instructions that match the address of the register to be detected from the disassembly text file based on the address of the register to be detected carried in the identification request. The location determination module is used to determine the access location of the register to be detected in the software code based on the memory access instruction.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 7.

10. A chip, characterized in that, The device includes a processor and a communication interface, the processor being configured to cause the chip to perform the steps of the method described in any one of claims 1 to 7.

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