Display device

Abstract

A display device according to the present specification can include a display panel having a recess and a circuit board connected to the display panel. The display panel includes a first substrate including a first area and a second area spaced apart from each other by the recess, a circuit layer disposed on the first area and including a transistor, a planarization layer extending in the circuit layer to be disposed over the recess, a curved wiring disposed on the planarization layer, a first protection layer disposed over the curved wiring, and a second substrate disposed over the first protection layer to overlap the first area and the second area of the first substrate.

Description

Technical Field

[0001] The embodiments relate to an apparatus, and more specifically, for example, but not limited to, a display panel and a display apparatus including the display panel. Background Technology

[0002] Display devices have been widely used as screens for various electronic devices, such as mobile communication terminals, electronic notebooks, e-books, portable multimedia players (PMPs), navigation devices, ultra-mobile personal computers (UMPCs), mobile phones, tablet PCs (PCs), watch phones, electronic boards, wearable devices, portable information devices, vehicle control display devices, televisions, laptops, monitors, etc.

[0003] Recently, research and development have been conducted on display devices that can achieve maximum screen size by reducing the bezel area where no image is displayed within the same display panel size. Summary of the Invention

[0004] The embodiments described herein provide a display panel and a display device including the display panel, which can achieve maximum screen size by structurally reducing the non-display area (or border area) where no image is displayed.

[0005] The embodiments of this specification provide a display panel and a display device including the display panel, which achieve a narrow bezel by applying pad components to one side of a substrate including a groove and by bending the portion of the substrate in which the pad components are arranged.

[0006] The embodiments of this specification provide a display panel and a display device including the display panel, which can prevent or minimize the possibility of damage to the connection wiring due to bending by using curved wiring arranged in a curved area.

[0007] The embodiments of this specification provide a display panel and a display device including the display panel, which can prevent or minimize the possibility of damage to the connection wiring due to bending by using a first protective layer located on the bending area.

[0008] The objectives to be achieved by the embodiments of this disclosure are not limited to those described above, and other objectives not mentioned will be clearly understood by those skilled in the art from the following description.

[0009] A display device according to an embodiment of this specification includes a display panel having a recess and a circuit board connected to the display panel. The display panel includes: a first substrate including a first region and a second region spaced apart from each other by the recess; a circuit layer disposed on the first region and including transistors; a planarization layer extending in the circuit layer and disposed above the recess; a curved wiring disposed on the planarization layer; a first protective layer disposed above the curved wiring; and a second substrate disposed above the first protective layer to overlap with the first region and the second region of the first substrate.

[0010] According to this specification, a first substrate and a second substrate having the same or similar size as the first substrate can reduce the size of the non-display area (or border area) to achieve the maximum screen size on which an image is displayed.

[0011] According to this specification, a narrow bezel can be achieved by applying the pad portion to one side of the substrate, including the groove, and by bending the substrate with the pad portion arranged thereon.

[0012] According to this specification, the curved wiring arranged in the curved area can prevent damage to the connecting wiring due to bending, or minimize or reduce the possibility of damage to the connecting wiring due to bending. Furthermore, the first protective layer arranged above the curved area can prevent damage to the curved wiring and connecting wiring, or minimize or reduce the possibility of damage to the curved wiring and connecting wiring. Therefore, according to the embodiments of this specification, the durability of the display panel can be improved by using curved wiring and the first protective layer, thereby increasing the lifespan of the display panel.

[0013] According to this specification, the rigidity of a substrate made of glass material can be maintained by using an etching process.

[0014] The various useful advantages and effects of the embodiments disclosed herein are not limited to those described above, and those skilled in the art will clearly understand, based on the following description, the effects not described above.

[0015] Other systems, methods, features, and advantages will be apparent to those skilled in the art upon examination of the following figures and detailed description. All such additional systems, methods, features, and advantages are intended to be included within this specification, within the scope of this disclosure, and protected by the appended claims. Nothing in this section should be construed as limiting those claims. Further aspects and advantages are discussed below in conjunction with embodiments of this disclosure.

[0016] It should be understood that both the foregoing general description and the following detailed description are exemplary and illustrative, and are intended to provide further explanation of the claimed inventive concept. Attached Figure Description

[0017] The above and other objects, features, and advantages of this disclosure will become more apparent to those skilled in the art from the detailed description of exemplary embodiments thereof with reference to the accompanying drawings, wherein:

[0018] Figure 1 This is a diagram illustrating a display device according to one embodiment of this specification;

[0019] Figure 2 This is a plan view illustrating the arrangement of connection wiring, curved wiring, and pad portions in a display panel according to one embodiment of this specification.

[0020] Figure 3 This is according to one embodiment of the present specification. Figure 2 A cross-sectional view taken from line I-I' in the diagram;

[0021] Figure 4 This is according to one embodiment of the present specification. Figure 3 A magnified view of region A in the image;

[0022] Figure 5 This is a diagram illustrating a curved neutral plane according to one embodiment of this specification;

[0023] Figures 6A to 6C This is a diagram illustrating the manufacturing process of a display panel according to an embodiment of this specification;

[0024] Figure 7 This is a diagram illustrating a coating arranged in a display panel according to an embodiment of this specification;

[0025] Figure 8 This is a diagram illustrating the arrangement relationship between the first protective layer and the planarization layer in a display panel according to another embodiment of this specification;

[0026] Figure 9 This is a diagram illustrating the curved appearance of a display device according to an embodiment of this specification;

[0027] Figure 10 This is a diagram illustrating the housing of a display device according to an embodiment of this specification;

[0028] Figure 11 This is a cross-sectional view illustrating a display panel according to another embodiment of this specification;

[0029] Figure 12This is according to another embodiment of the present specification. Figure 11 A magnified view of region B in the image;

[0030] Figure 13 This is a diagram illustrating the curved appearance of a display device that applies a display panel according to an embodiment of this specification;

[0031] Figure 14 This is a cross-sectional view illustrating a display panel according to another embodiment of this specification;

[0032] Figure 15 This is according to another embodiment of the present specification. Figure 14 A magnified view of region C in the image; and

[0033] Figure 16 This is a diagram illustrating the curved appearance of a display device that applies a display panel according to an embodiment of this specification.

[0034] List of reference numerals

[0035] 10, 10a, 10b: Display panels

[0036] 100: Substrate

[0037] 110: First District

[0038] 120: Second Zone

[0039] 200: Circuit layer

[0040] 240: Planarization layer

[0041] 300: Liquid Crystal Layer

[0042] 400a: First protective layer

[0043] 500: Second substrate

[0044] 600: Planarization layer

[0045] 700: Black Matrix

[0046] 800: Pattern layer

[0047] 900: Coating

[0048] BL: Bent wiring

[0049] G: Groove

[0050] LL: Connection wiring

[0051] PAD: Pad area Detailed Implementation

[0052] Reference will now be made in detail to embodiments of this disclosure, examples of which are illustrated in the accompanying drawings. In the following description, detailed descriptions of well-known functions or configurations relevant to this document will be omitted or may be briefly discussed where it is determined that such detailed descriptions would unnecessarily obscure the essential points of the inventive concept. The described process steps and / or order of operations are exemplary; however, the order of steps and / or operations is not limited to the order set forth herein and may be varied as is known in the art, except for steps and / or operations that must occur in a specific order. The same reference numerals always refer to the same elements. The names of the corresponding elements used in the following explanation may be chosen solely for the convenience of writing the specification and may therefore differ from those used in actual products.

[0053] The advantages and features of this disclosure, as well as the methods for implementing this disclosure, will become clearer from the embodiments described below with reference to the accompanying drawings. However, this disclosure is not limited to the following embodiments, but can be implemented in various different forms. In contrast, these embodiments will make the disclosure complete and allow those skilled in the art to fully understand the scope of this disclosure. This disclosure is limited only by the scope of the appended claims.

[0054] The shapes, sizes, ratios, angles, quantities, etc., disclosed in the accompanying drawings for describing embodiments of this disclosure are exemplary, and this disclosure is not limited to the illustrated items. The same reference numerals always refer to the same elements. Furthermore, in describing this disclosure, detailed descriptions of related known technologies will be omitted if it is determined that such detailed descriptions may unnecessarily obscure the subject matter of this disclosure.

[0055] Any implementation described in this article as an "example" is not necessarily to be interpreted as preferred or advantageous over other implementations.

[0056] Unless used with the word “only,” terms such as “comprising,” “including,” “having,” and “consisting of” are generally intended to allow for the addition of other components. Unless otherwise expressly stated, references to the singular should be interpreted to include the plural.

[0057] When interpreting components, even if there is no separate description, it is interpreted as including the error range.

[0058] When describing the location or interconnection between two components (e.g., "on top of", "above", "below", "next to", "connected or linked", "cross", "intersect", etc.), one or more other components may be inserted between them unless "immediately adjacent" or "directly" is used.

[0059] When describing temporal context (e.g., "after", "after", "next", or "before"), it may not be continuous on the time scale unless "immediately" or "directly" is used.

[0060] Terms such as "first" and "second" can be used to distinguish components from each other, but the function or structure of a component is not limited by the number preceding the component or the component name.

[0061] Furthermore, when a component or layer is “connected,” “joined,” or “adheded” to another component or layer, unless otherwise stated, the component or layer may not only be directly connected or adhered to the other component or layer, but also indirectly connected or attached to the other component or layer, with one or more intermediate components or layers “set” or “inserted” between the components or layers. This should be understood to mean that components may be arranged to be in direct contact with each other, or may be arranged to be in direct contact with each other.

[0062] The expressions "first element," "second element," and " / or" "third element" should be understood as one of the first element, the second element, and the third element, or any or all combinations of the first element, the second element, and the third element. For example, A, B, and / or C can refer to only A; only B; only C; any or some combinations of A, B, and C; or all of A, B, and C.

[0063] The term “at least one” should be understood to include any and all combinations of one or more associated listed items. For example, “at least one of the first element, the second element, and the third element” means a combination of all three listed elements, a combination of any two of the three elements, and each individual element (the first element, the second element, or the third element).

[0064] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which the example embodiments pertain. It should also be understood that terms such as those defined in common dictionaries should be interpreted as having a meaning consistent with, for example, their meaning in the context of the relevant field, and should not be interpreted in an idealized or overly formal sense unless explicitly defined herein. For example, as one of ordinary skill in the art will understand, the terms “component” or “unit” can be applied to, for example, a single circuit or structure, an integrated circuit, a computational block of a circuit device, or any structure configured to perform the described functions.

[0065] In contrast, these embodiments may be provided to make this disclosure sufficiently thorough and complete to assist those skilled in the art in fully understanding its scope. Furthermore, this disclosure is limited only by the scope of the claims.

[0066] The following implementations can be combined or associated with each other, in whole or in part, and various types of interlocks and drives are technically possible. Implementations can be implemented independently of each other or together in an interrelated relationship.

[0067] In the following, preferred embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0068] The display device according to the embodiments of this disclosure may include the display device itself in the narrow sense, an application product including a display in the narrow sense, or even a complete set of devices as an end consumer device.

[0069] The display device according to the embodiments of this specification can be implemented using liquid crystal display (LCD), plasma display panel (PDP), field emission display (FED), electroluminescent display (ELD), organic light-emitting diode (OLED), quantum dot display, micro light-emitting diode (micro LED) display, etc. For example, the display area DA of the display device according to the embodiments of this specification is exemplified by a liquid crystal display utilizing a liquid crystal layer, but it is not limited thereto. For example, the display area DA can be implemented using any of OLED, QLED, and micro LED.

[0070] Figure 1 This is a diagram illustrating a display device according to one embodiment of this specification. Figure 2 This is a plan view illustrating the arrangement of connection wiring, curved wiring, and pad portions in a display panel according to one embodiment of this specification. Figure 3 It is along Figure 2 The cross-sectional view taken from line I-I' in the diagram. Figure 4 yes Figure 3 An enlarged view of region A in the image.

[0071] Reference Figures 1 to 4 According to one embodiment of this specification, the display device may include a display panel 10 having a recess G, a circuit board 20 connected to a pad portion PAD of the display panel 10, and a light source 30 emitting light toward a liquid crystal layer 300 of the display panel 10. Furthermore, an input image can be visually reproduced on the display panel 10. The light source 30 may be a backlight unit.

[0072] Display panel 10 may include a display area DA for displaying images and a non-display area NA for not displaying images. Display panel 10 may be a panel with a rectangular structure having a width in the X-axis direction, a length in the Y-axis direction, and a thickness in the Z-axis direction. In this case, the width and length of display panel 10 can be set to various design values ​​depending on the application of the display device. The X-axis direction may refer to a width direction, a row direction, or a horizontal direction; the Y-axis direction may refer to a length direction, a column direction, or a vertical direction; and the Z-axis direction may refer to a top-bottom direction, a vertical direction, or a thickness direction. The X-axis, Y-axis, and Z-axis directions may be perpendicular to each other, but may also refer to different directions that are not perpendicular to each other. Therefore, each of the X-axis, Y-axis, and Z-axis directions can be described as any of a first direction, a second direction, and a third direction. A plane extending in the X-axis and Y-axis directions may refer to a horizontal plane.

[0073] The non-display area NA may include a first non-display area NA1, a curved area BA, and a second non-display area NA2.

[0074] The first non-display area NA1 can be an area surrounding at least a portion of the display area DA.

[0075] The curved region BA is an area adjacent to at least one of the multiple edges of the first non-display region NA1, and can be a flexible region. The display panel 10 can be easily bent by means of the groove G arranged in the curved region BA.

[0076] Reference Figure 2 and Figure 3 The curved region BA is located between the first non-display region NA1 and the second non-display region NA2, and various structures such as organic layers, inorganic layers and wiring arranged in the curved region BA can be bent.

[0077] The second non-display area NA2 is a region adjacent to at least one of the multiple edges of the curved area BA, and the pad portion PAD can be disposed in the second non-display area NA2. For example, the curved area BA can be in a curved state from a flat state, and the remaining area of ​​the first substrate 100 other than the curved area BA can be in a flat state. When the curved area BA is bent, the second non-display area NA2 can be positioned to overlap with the back surface of the display area DA. The pad portion PAD can be a pad electrode.

[0078] The circuit board 20 can be a flexible printed circuit board and can be connected to the display panel 10 via pads.

[0079] The liquid crystal layer 300 of the display area DA can be driven by receiving signals from one or more circuit boards 20 through the wiring of the display area DA and the connection wiring LL of the non-display area NA. For example, the wiring of the display area DA can be wiring used to send signals output from the circuit board 20 to the liquid crystal layer 300 of the display area DA together with multiple connection wiring LL.

[0080] When multiple connecting wires LL are provided in the bending region BA, a portion of the multiple connecting wires LL may also bend along with the bending region BA. Therefore, stress may be concentrated on a portion of the bent connecting wires LL, and cracks may appear in the connecting wires LL due to stress.

[0081] Therefore, when multiple connecting wires LL are arranged in a bending region BA, the possibility of damage to the connecting wires LL due to cracks or the like can be considered. For example, in order to prevent or reduce cracks that may appear in the multiple connecting wires LL during bending of the bending region BA, the connecting wires LL can be made of a conductive material with excellent ductility. In addition, the multiple connecting wires LL can be formed into various shapes to cope with cracks, etc. For example, at least a portion of the multiple connecting wires LL arranged in the bending region BA can have the following shape, wherein a conductive pattern having at least one shape selected from diamond shape, rhombus shape, trapezoidal wave shape, triangular wave shape, sawtooth wave shape, sine wave shape, circular shape, and ω (Ω) shape is repeatedly arranged.

[0082] According to one embodiment of this specification, a display device can stably connect multiple connecting wires LL and the wiring of the display area DA by using curved wiring BL arranged on the curved area BA.

[0083] Multiple connection lines LL can extend from multiple pad portions PAD of the second non-display area NA2 toward the curved area BA. The multiple connection lines LL can be electrically connected to the wiring of the display area DA via multiple curved lines BL, but are not limited to this. For example, considering the stability of the connection between the multiple connection lines LL and the wiring of the display area DA, the multiple connection lines LL can be electrically connected to the wiring of the display area DA, and the curved lines BL can be arranged to overlap with a portion of the connection lines LL. Therefore, even if the connection lines LL are damaged by bending of the display panel 10, the signal applied through the connection lines LL can still be transmitted to the wiring of the display area DA via the curved lines BL.

[0084] Therefore, by using double-arranged curved wiring BL on the curved area BA, the possibility of defects caused by the bending of the display panel 10 can be reduced. In this case, the display panel 10 according to one embodiment of this specification can protect the curved wiring BL by a first protective layer 400a and a pattern layer 800 arranged on the curved wiring BL. Therefore, the first protective layer 400a and the pattern layer 800 can further reduce the possibility of defects in the curved wiring BL. The connecting wiring LL can be a link wiring. The curved wiring BL can be a curved wiring.

[0085] The light source 30 can be arranged below the first region 110 to emit light toward the first region 110. For example, the light source 30 can emit light in the Z-axis direction. More specifically, the light source 30 can emit light toward the liquid crystal layer 300 arranged above the first region 110. Here, the light source 30 can be a backlight unit.

[0086] The display panel 10 can be manufactured based on a flexible plastic material such as polyimide or a flexible glass substrate with a thin thickness. For example, considering the etching process, the first substrate 100 of the display panel 10 can be formed of a transparent glass material.

[0087] Now refer to Figures 1 to 4 According to one embodiment of this specification, a display panel 10 may include: a first substrate 100, the first substrate 100 including a first region 110 and a second region 120 arranged adjacent to each other by a recess G; a circuit layer 200 disposed on the first substrate 100; a liquid crystal layer 300 disposed on the circuit layer 200; a pad portion PAD disposed on the second region 120 for connection to a circuit board 20; a curved wiring BL disposed above a planarization layer 240 extending in the circuit layer 200 above the upper portion of the recess G; a first protective layer 400a disposed above the curved wiring BL; and a second substrate 500 disposed above the first protective layer 400a to overlap with the first region 110 and the second region 120 of the first substrate 100. In addition, the display panel 10 may include a connection pad portion PAD and a connection wiring LL for the bent wiring BL.

[0088] Here, the circuit layer 200 may include a thin-film transistor 210, a gate insulating layer 220, a first interlayer dielectric layer 230, a planarization layer 240, a first electrode 250, a second interlayer dielectric layer 260, and a second electrode 270. The thin-film transistor 210 may include a gate electrode 211, an active layer 212, a source electrode 213, and a drain electrode 214. In this case, the planarization layer 240 may extend through the curved region BA to a portion of the second non-display region NA2 to be disposed above the upper part of the recess G. Therefore, when etching the first substrate 100 to form the recess G, the planarization layer 240 may be used as an etch resist layer, but is not limited thereto. For example, the display panel 10 according to the embodiments of this specification may also include a second protective layer 400b disposed above the recess G. Here, the planarization layer 240 of the circuit layer 200 may be a first planarization layer or a lower planarization layer.

[0089] Furthermore, the display panel 10 according to the embodiments of this specification may also include a planarization layer 600 disposed on the liquid crystal layer 300 and the first protective layer 400a. Here, the planarization layer 600 disposed on the first protective layer 400a may be a second planarization layer, an upper planarization layer, or an encapsulation layer covering the lower portion of the black matrix 700.

[0090] Additionally, the display panel 10 according to the embodiments of this specification may also include a seal 310 surrounding the liquid crystal layer 300, and at least one pillar 320 disposed between the circuit layer 200 and the planarization layer 600. Here, the seal 310 may be a sealing member or a sealing line.

[0091] Additionally, the display panel 10 according to the embodiments of this specification may also include a black matrix 700 disposed between the second substrate 500 and the planarization layer 600.

[0092] Furthermore, the display panel 10 according to the embodiments of this specification may also include a pattern layer 800 disposed on curved wiring BL. In this case, the first protective layer 400a may cover the pattern layer 800.

[0093] In addition, the display panel 10 according to the embodiments of this specification may also include a lower polarization layer DPOL disposed below the first region 110 and an upper polarization layer UPOL disposed above the second substrate 500.

[0094] The first substrate 100 may be made of glass, metal, plastic, etc., but is not limited to these. However, for the purpose of simplifying the process, the first substrate 100 may be made of a glass substrate with a predetermined strength for etching.

[0095] The first substrate 100 may include a first region 110 and a second region 120 separated by a groove G, and the second region 120 may overlap with the first region 110 by bending (see...). Figure 9 Furthermore, the first region 110 of the first substrate 100 can be disposed in the display region DA, and the second region 120 can be disposed in the non-display region NA. Therefore, the first region 110 can be a display region substrate, and the second region 120 can be a non-display region substrate or a curved substrate.

[0096] A groove G can be formed in the first substrate 100, and the first substrate 100 can be divided into a first region 110 and a second region 120 by the groove G.

[0097] The groove G can be arranged corresponding to the curved area BA of the display panel 10.

[0098] The groove G may be recessed into the lower surface of the first substrate 100. In addition, the groove G may be formed in a conical shape, but is not limited to this.

[0099] The groove G can be formed in the first substrate 100 by an etching process. In this case, a plurality of display panels 10 can be manufactured using a single mother substrate including glass, and a cutting process can be performed on the mother substrate after the etching process to divide it into each of the plurality of display panels 10.

[0100] Multiple grooves formed in the mother substrate by an etching process can be configured to correspond to groove G in each of the plurality of display panels 10. For example, multiple grooves can be formed in the mother substrate by etching a portion of the lower surface of the mother substrate using a patterned mask and an etching solution. Therefore, process optimization can be achieved by forming multiple grooves corresponding to groove G in each of the plurality of display panels 10 in the lower surface edge of the mother substrate using a single etching process. Here, phosphoric acid (HNO3), hydrofluoric acid (HF), etc., can be used as etching solutions.

[0101] When the groove G is formed by etching, the first interlayer dielectric layer 230 and the gate insulating layer 220 of the circuit layer 200 can be removed together with the mother substrate.

[0102] Since the gate insulating layer 220 and the first interlayer dielectric layer 230 are not disposed in the recess G, damage such as cracks caused by bending stress will not occur in the gate insulating layer 220 and the first interlayer dielectric layer 230. For example, even if the gate insulating layer 220 and the first interlayer dielectric layer 230 are made of a flexible inorganic insulating material, since the gate insulating layer 220 and the first interlayer dielectric layer 230 are not disposed in the bending region BA, they will not be damaged by bending stress. In this case, since the second interlayer dielectric layer 260, made of an inorganic insulating material, is also not disposed in the bending region BA, the second interlayer dielectric layer 260 will not be damaged by bending stress.

[0103] Furthermore, since the first substrate 100 made of glass is processed by an etching process to form the groove G, the reduction in stiffness of the glass substrate can be minimized or reduced. Therefore, the stiffness of the glass substrate can be maintained.

[0104] The first region 110 may include a display region DA and a first non-display region NA1, and may be made of a transparent glass material.

[0105] The first region 110 may include a first upper surface 111 of the contact circuit layer 200, a first lower surface 112 serving as the opposite surface of the first upper surface 111, and a first side surface 113 connecting the first upper surface 111 and the first lower surface 112. The first region 110 may include a first upper edge UE1 where the first upper surface 111 and the first side surface 113 meet, and a first lower edge DE1 where the first lower surface 112 and the first side surface 113 meet. The first side surface 113 may be an inclined surface with a predetermined slope relative to the first lower surface 112. Since the first side surface 113 is formed by an etching process, a curved surface can be formed at the first lower edge DE1 where the first lower surface 112 and the first side surface 113 meet.

[0106] The second region 120 can be arranged in the second non-display region NA2 and can be made of transparent glass material.

[0107] The second region 120 may include a second upper surface 121 that contacts the gate insulating layer 220, a second lower surface 122 that is the opposite surface of the second upper surface 121, and a second side surface 123 that connects the second upper surface 121 and the second lower surface 122. The second region 120 may include a second upper edge UE2 where the second upper surface 121 and the second side surface 123 meet each other, and a second lower edge DE2 where the second lower surface 122 and the second side surface 123 meet each other. The second side surface 123 may be an inclined surface with a predetermined slope relative to the second lower surface 122. Since the second side surface 123 is formed by an etching process, a curved surface can be formed at the second lower edge DE2 where the second lower surface 122 and the second side surface 123 meet each other.

[0108] The circuit layer 200 can be disposed in the display area DA, and some components of the circuit layer 200 can be disposed in the first non-display area NA1, the curved area BA, and the second non-display area NA2. For example, the circuit layer 200 can be disposed on the first upper surface 111 of the first area 110, and some components of the circuit layer 200 can extend through the first non-display area NA1 and the curved area BA to the second non-display area NA2. For example, the gate insulating layer 220 and the first interlayer dielectric layer 230 can be disposed in the first non-display area NA1 and the second non-display area NA2. In addition, the planarization layer 240 can be disposed in a portion of the first non-display area NA1, the curved area BA, and the second non-display area NA2. In addition, the second interlayer dielectric layer 260 can be disposed in the first non-display area NA1 and the second non-display area NA2.

[0109] The circuit layer 200 may include a thin-film transistor 210, a gate insulating layer 220 covering the gate electrode 211 of the thin-film transistor 210, a first interlayer dielectric layer 230 covering the active layer 212, the source electrode 213 and the drain electrode 214 of the thin-film transistor 210, a planarization layer 240 disposed on the first interlayer dielectric layer 230, a first electrode 250 disposed on the planarization layer 240, a second interlayer dielectric layer 260 disposed on the first electrode 250 and a second electrode 270 disposed on the second interlayer dielectric layer.

[0110] The thin-film transistor 210 may include a gate electrode 211, an active layer 212, a source electrode 213, and a drain electrode 214.

[0111] The gate electrode 211 can be disposed on the first upper surface 111 of the first region 110.

[0112] The gate electrode 211 can be made of a conductive material. For example, the gate electrode 211 can be made of a metallic material. For example, the gate electrode 211 can be a single layer or multiple layers made of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) or alloys thereof, but is not limited thereto.

[0113] The first pad layer PAD2a of the second pad portion PAD2 can be arranged on the second upper surface 121 of the second region 120.

[0114] The first pad layer PAD2a can be made of a conductive material. For example, the first pad layer PAD2a can be made of a metallic material. For example, the first pad layer PAD2a can be a single layer or multiple layers made of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) or their alloys, but is not limited thereto.

[0115] In addition, the first pad layer PAD2a can be formed together with the gate electrode 211 using the same mask process as that used to form the gate electrode 211.

[0116] The gate insulating layer 220 can be disposed on the first substrate 100 and etched in the display area DA, the first non-display area NA1, and the second non-display area NA2 by an etching process. For example, the gate insulating layer 220 can be disposed on the first area 110 to cover the gate electrode 211. The gate insulating layer 220 can also be disposed on the second area 120 to cover the first pad layer PAD2a of the second pad portion PAD2.

[0117] Since the gate insulating layer 220 can be made of inorganic insulating material, it can be etched by an etching process. Therefore, the gate insulating layer 220 can be divided into a gate insulating layer 220 disposed on the first region 110 and a gate insulating layer 220 disposed on the second region 120.

[0118] The gate insulating layer 220 can be made of materials such as silicon oxide (SiO2). x ) and silicon nitride (SiN) x The gate insulating layer 220 is made of inorganic insulating material. It can be a single layer or multiple layers made of inorganic insulating material, but is not limited thereto.

[0119] An active layer 212 may be disposed on the gate insulating layer 220 disposed on the first region 110. In addition, the active layer 212 may overlap with the gate electrode 211 in the Z-axis direction.

[0120] The active layer 212 can be made of amorphous silicon (a-Si), polycrystalline silicon (poly-Si), oxide semiconductor, organic semiconductor, etc., but is not limited to these.

[0121] A first pad portion PAD1 can be disposed on the gate insulating layer 220 disposed on the second region 120. For example, the first pad portion PAD1 can overlap with the second region 120. Alternatively, the gate insulating layer 220 can be disposed between the second region 120 and the first pad portion PAD1.

[0122] The first pad portion PAD1 can be made of a conductive material. For example, the first pad portion PAD1 can be made of a metallic material. For example, the first pad portion PAD1 can include metals such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), and tungsten (W).

[0123] The first pad portion PAD1 can be electrically connected to a chip (not shown) disposed on the first pad portion PAD1. For example, the first pad portion PAD1 can be electrically connected to the chip (not shown) via a connection wire LL disposed on the first pad portion PAD1. This is an example of the first pad portion PAD1 being connected to the chip (not shown) via the connection wire LL, but it is not a limitation. For example, the first pad portion PAD1 can also be directly connected to the chip (not shown) without the connection wire LL. The chip may include driver circuitry. The connection wire LL disposed on the first pad portion PAD1 can be a second connection wire LL2.

[0124] In addition, the first pad portion PAD1 can be formed together with the source electrode 213 and the drain electrode 214 using the same mask process as that used to form the source electrode 213 and the drain electrode 214.

[0125] A second pad layer PAD2b can be disposed on the gate insulating layer 220 disposed on the second region 120. For example, a portion of the second pad layer PAD2b can be disposed on the gate insulating layer 220. Furthermore, the second pad layer PAD2b can be electrically connected to the first pad layer PAD2a using contact holes formed in the gate insulating layer 220. Therefore, the second pad layer PAD2b of the second pad portion PAD2 can be disposed on and electrically connected to the first pad layer PAD2a.

[0126] The second pad layer PAD2b can be made of a conductive material. For example, the second pad layer PAD2b can be made of a metallic material. For example, the second pad layer PAD2b can include metals such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), and tungsten (W).

[0127] In addition, the second pad layer PAD2b can be formed together with the source electrode 213 and the drain electrode 214 using the same mask process as that used to form the source electrode 213 and the drain electrode 214.

[0128] Additionally, the second pad layer PAD2b can be electrically connected to the circuit board 20. For example, the second pad layer PAD2b can be connected to the circuit board 20 via connection wiring LL arranged on the second pad layer PAD2b. The connection wiring LL arranged on the second pad layer PAD2b can be a second connection wiring LL2.

[0129] The source electrode 213 can be disposed on the active layer 212. For example, the source electrode 213 can be located in a different layer than the gate electrode 211. The source electrode 213 can be insulated from the gate electrode 211 through the gate insulating layer 220.

[0130] The source electrode 213 can be electrically connected to the source region of the active layer 212, and the source electrode 213 may include a region overlapping with the source region of the active layer 212. For example, the source electrode 213 can directly contact the source region of the active layer 212.

[0131] The source electrode 213 may include a conductive material. For example, the source electrode 213 may include metals such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), and tungsten (W).

[0132] Drain electrode 214 can be disposed on active layer 212. For example, drain electrode 214 can be located in a different layer than gate electrode 211. Drain electrode 214 can be insulated from gate electrode 211 through gate insulating layer 220. Drain electrode 214 can be disposed in the same layer as source electrode 213. Drain electrode 214 can be disposed spaced apart from source electrode 213.

[0133] The drain electrode 214 can be electrically connected to the drain region of the active layer 212, and the drain electrode 214 can include a region overlapping with the drain region of the active layer 212. For example, the drain electrode 214 can directly contact the drain region of the active layer 212.

[0134] The drain electrode 214 may include a conductive material. For example, the drain electrode 214 may include metals such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), and tungsten (W).

[0135] The first interlayer dielectric layer 230 disposed on the first substrate 100 can be disposed on the display area DA, the first non-display area NA1, and the second non-display area NA2 by etching process. For example, the first interlayer dielectric layer 230 can be disposed on the first region 110 to cover the gate electrode 211, etc. Alternatively, the first interlayer dielectric layer 230 can be disposed on the second region 120 to cover the second pad layer PAD2b and the first pad portion PAD1 of the second pad portion PAD2.

[0136] The first interlayer dielectric layer 230 can be disposed on the active layer 212, the source electrode 213, and the drain electrode 214. In this case, the first interlayer dielectric layer 230 can cover the active layer 212, the source electrode 213, and the drain electrode 214 on the first region 110. Therefore, the first interlayer dielectric layer 230 can protect the active layer 212, the source electrode 213, and the drain electrode 214.

[0137] Alternatively, the first interlayer dielectric layer 230 can be disposed on the second pad layer PAD2b and the first pad layer PAD1 of the second pad portion PAD2. In this case, the first interlayer dielectric layer 230 can cover a portion of the first pad portion PAD1 and the second pad layer PAD2b on the second region 120.

[0138] The first interlayer dielectric layer 230 can be made of materials such as silicon oxide (SiO2). x ) and silicon nitride (SiN) x The first interlayer dielectric layer 230 can be a single layer or multiple layers made of inorganic insulating material, but is not limited thereto.

[0139] The planarization layer 240 can be disposed on the first interlayer dielectric layer 230. In this case, the planarization layer 240 of the circuit layer 200 can extend through the curved region BA to a portion of the non-display region NA2 to be disposed on the upper portion of the recess G. Therefore, the planarization layer 240 can overlap with the second region 120 in the second non-display region NA2.

[0140] The planarization layer 240 can be made of a transparent organic insulating material. For example, the planarization layer 240 can be made of one or more materials selected from, but not limited to, polyacrylate resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin, and benzocyclobutene. The planarization layer 240 can be a single layer or multiple layers made of organic insulating material.

[0141] Since the planarization layer 240 is made of an organic insulating material with relatively superior ductility compared to inorganic insulating materials, it can easily withstand bending of the display panel 10. For example, since the planarization layer 240 can be disposed in the bending region BA and is made of an organic insulating material with good ductility, the planarization layer 240 can be easily bent without damage such as cracks.

[0142] The planarization layer 240 can be disposed on the recess G. For example, since the planarization layer 240 can extend through the first non-display area NA1 and the curved area BA to a portion of the second non-display area NA2, the planarization layer 240 can cover the upper portion of the recess G.

[0143] Since the planarization layer 240 can be made of an organic insulating material that is highly resistant to etching solutions, no etching process is performed on the planarization layer 240. That is, the planarization layer 240 can be used as an etching barrier. Therefore, the groove G can be formed by etching up to the planarization layer 240, and a portion of the lower surface of the planarization layer 240 can be exposed through the groove G.

[0144] In the display device according to the embodiments of this specification, when the planarization layer 240 is used as an etching stop, it is not necessary to arrange a separate second protective layer 400b to cover the upper portion of the groove G, which can improve process productivity. Furthermore, when the planarization layer 240 is used as an etching stop, the curved wiring BL arranged above the planarization layer 240 can be protected from the etching solution.

[0145] When etching the first substrate 100 to form the groove G, the planarization layer 240 made of a highly corrosion-resistant organic insulating material can be used as an etching barrier, but is not limited to this.

[0146] The display device according to the embodiments of this specification may further include a second protective layer 400b disposed above the recess G. For example, when the second protective layer 400b is disposed above the recess G and covered by the planarization layer 240, the second protective layer 400b can serve as an etching barrier to resist etching solution.

[0147] The second protective layer 400b may be made of a material that is resistant to corrosion (or chemical resistance) to the etching solution used in the etching process. For example, the second protective layer 400b may include at least one of silicone-based organic materials, urethane, polyimide, and photoacrylic acid. In addition, the second protective layer 400b may include at least one of chromium (Cr), aluminum (Al), platinum (Pt), gold (Ag), and nickel (Ni).

[0148] Since the second protective layer 400b can be formed from an organic insulating material that is highly resistant to etching solutions, no further etching process is performed on the second protective layer 400b. Therefore, the groove G can be formed by etching up to the second protective layer 400b, and a portion of the lower surface of the second protective layer 400b can be exposed through the groove G.

[0149] The second protective layer 400b is intended to protect the configuration located above it during the process of forming the groove G in the first substrate 100, and the second protective layer 400b may have a larger size (or width) than the area overlapping with the groove G or the curved area BA. For example, based on the Y-axis direction, the width of the second protective layer 400b may be greater than the width W1 of the groove G.

[0150] The second protective layer 400b can be formed using a slot coater, inkjet printer, dispenser, etc. Alternatively, the second protective layer 400b can be formed using a patterning process with a photomask. Here, the second protective layer 400b can be an etch resist layer, an etch stop pattern, an etch block pattern, or an etch mask pattern.

[0151] The first electrode 250 can be disposed on the planarization layer 240. The first electrode 250 can be a common electrode.

[0152] The first electrode 250 can be made of a transparent conductive material or an opaque conductive material. For example, the first electrode 250 can be made of indium tin oxide (ITO), indium zinc oxide (IZO), or other conductive materials.

[0153] A voltage can be applied to the first electrode 250 and the second electrode 270. Therefore, the liquid crystal layer 300 can be driven to display an image. In this case, a voltage can be applied to the second electrode 270 through the drain electrode 214.

[0154] The curved wiring BL can be disposed on the planarization layer 240. In this case, the curved wiring BL can be disposed in the first non-display area NA1, the curved area BA, and the second non-display area NA2. For example, the curved wiring BL can be disposed on the planarization layer 240 disposed in the first non-display area NA1, the curved area BA, and the second non-display area NA2.

[0155] The curved wiring BL can be formed to have a predetermined first length L1 in the Y-axis direction. The curved wiring BL can overlap with the groove G in the Z-axis direction, and the first length L1 of the curved wiring BL in the Y-axis direction can be greater than the width W1 of the groove G. The first length L1 of the curved wiring BL in the Y-axis direction can be greater than the width W2 of the pattern layer 800. The width W1 of the groove G can be a first width, and the width W2 of the pattern layer 800 can be a second width.

[0156] The bent wiring BL can be made of conductive materials. For example, the bent wiring BL can be made of metallic materials. For example, the bent wiring BL can be a single layer or multiple layers made of one of indium tin oxide (ITO), indium zinc oxide (IZO), molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or alloys thereof, but is not limited to these. For example, the bent wiring BL can be formed into a double-layer structure.

[0157] A bent wiring BL can comprise a first layer BL1 and a second layer BL2. The materials of the first layer BL1 and the second layer BL2 can be different from each other. Therefore, the bent wiring BL can easily cope with the stress caused by bending.

[0158] In the curved wiring BL, at least one of the first layer BL1 and the second layer BL2 may include the same metal layer as the first electrode 250.

[0159] In addition, the first layer BL1 and the second layer BL2 of the curved wiring BL can be made of a different material than the first electrode 250.

[0160] The first layer BL1 can be disposed on the planarization layer 240. The first layer BL1 can be made of transparent indium tin oxide (ITO) or indium zinc oxide (IZO). For example, the first layer BL1 can include the same material as the first electrode 250 and can be formed together with the first electrode 250 by the same masking process used to form the first electrode 250.

[0161] The second layer BL2 can be arranged on top of the first layer BL1. The second layer BL2 can have the same length as the first layer BL1 in the Y-axis direction. For example, the first layer BL1 and the second layer BL2 can be formed to have a predetermined first length L1 in the Y-axis direction.

[0162] The second layer BL2 can be made of a different material than the first layer BL1. For example, the second layer BL2 can be made of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. For example, the second layer BL2 may include copper (Cu).

[0163] Additionally, the bent wiring BL can include a material different from that of the connecting wiring LL. For example, since the connecting wiring LL can be made of indium tin oxide (ITO) or indium zinc oxide (IZO), and the second layer BL2 of the bent wiring BL can be made of copper, the bent wiring BL can include a material different from that of the connecting wiring LL.

[0164] Therefore, since the first connecting wire LL1 and the second connecting wire LL2 are connected via the bent wire BL, the display device according to one embodiment of this specification can easily cope with stress caused by bending. Furthermore, since the bent wire BL comprises at least two layers of different materials, it can more effectively cope with stress caused by bending. The first connecting wire LL1 may be a first link wire, and the second connecting wire LL2 may be a second link wire.

[0165] The second interlayer dielectric layer 260 can be disposed on the first electrode 250 and the bent wiring BL. For example, the second interlayer dielectric layer 260 can be disposed on the planarization layer 240 to cover a portion of the first electrode 250 and the bent wiring BL. In this case, the second interlayer dielectric layer 260 can be disposed in the display area DA, the first non-display area NA1, and the second non-display area NA2. The second interlayer dielectric layer 260 can be disposed between the bent wiring BL and the first connection wiring LL1 in the first non-display area NA1 based on the Z-axis direction.

[0166] In the second non-display area NA2, the second interlayer dielectric layer 260 can be arranged between the curved wiring BL and the second connection wiring LL2.

[0167] The second interlayer dielectric layer 260 can be made of inorganic insulating materials such as silicon oxide (SiOx) and silicon nitride (SiNx). The second interlayer dielectric layer 260 can be a single layer or multiple layers made of inorganic insulating materials, but is not limited thereto.

[0168] The second electrode 270 can be disposed on the second interlayer dielectric layer 260. The second electrode 270 can be electrically connected to the drain electrode 214 through contact holes formed in the planarization layer 240 and the second interlayer dielectric layer 260. The second electrode 270 can be a pixel electrode.

[0169] The second electrode 270 can be made of a transparent conductive material or an opaque conductive material. For example, the second electrode 270 can be made of indium tin oxide (ITO), indium zinc oxide (IZO), or other conductive materials.

[0170] Connection wiring LL can be arranged on the second interlayer dielectric layer 260. For example, multiple connection wiring LL can be arranged on the second interlayer dielectric layer 260 to transmit signals applied from the circuit board 20 to the display area DA. In this case, the multiple connection wiring LL can be connected to the first pad portion PAD1 and the second pad portion PAD2 through contact holes formed in the first interlayer dielectric layer 230, the planarization layer 240 and the second interlayer dielectric layer 260 or the first interlayer dielectric layer 230 and the second interlayer dielectric layer 260.

[0171] The connection wiring LL can be made of transparent or opaque conductive materials. For example, the connection wiring LL can be made of indium tin oxide (ITO), indium zinc oxide (IZO), or other conductive materials.

[0172] The connecting wiring LL can be formed together with the second electrode 270 using the same masking process as that used to form the second electrode 270.

[0173] The connection wiring LL may include a first connection wiring LL1 and a second connection wiring LL2 arranged spaced apart from each other. The first connection wiring LL1 and the second connection wiring LL2 may be electrically connected via a curved wiring BL. For example, the pattern layer 800 may be arranged between the first connection wiring LL1 and the second connection wiring LL2 based on the Y-axis direction. In this case, the curved wiring BL arranged below the pattern layer 800 may be electrically connected to the first connection wiring LL1 through a first contact hole CH1 and to the second connection wiring LL2 through a second contact hole CH2. Therefore, the first connection wiring LL1 may contact one side of the curved wiring BL, and the second connection wiring LL2 may contact the other side of the curved wiring BL. The first contact hole CH1 may be arranged in a first non-display area NA1. The first contact hole CH1 may be formed to penetrate a second interlayer dielectric layer 260 arranged between the curved wiring BL and the first connection wiring LL1. The second contact hole CH2 may be arranged in a second non-display area NA2. The second contact hole CH2 may be formed to penetrate a second interlayer dielectric layer 260 arranged between the curved wiring BL and the second connection wiring LL2.

[0174] The first connection wiring LL1 can be arranged in the first non-display area NA1. For example, the first connection wiring LL1 can be arranged on the second interlayer dielectric layer 260 of the first non-display area NA1. In addition, the first connection wiring LL1 can be electrically connected to the bent wiring BL through the first contact hole CH1 in the first non-display area NA1.

[0175] The second connection wiring LL2 can be disposed in the second non-display area NA2. For example, the second connection wiring LL2 can be disposed on the second interlayer dielectric layer 260 of the second non-display area NA2. The second connection wiring LL2 can be electrically connected to the bent wiring BL through the second contact hole CH2 in the second non-display area NA2.

[0176] The liquid crystal layer 300 may be disposed on the second interlayer dielectric layer 260, the second electrode 270 and the first connection wiring LL1, and may include an alignment film (not shown) for easily guiding the arrangement of the liquid crystal.

[0177] The seal 310 may be a photocurable or thermocurable epoxy resin and may surround the liquid crystal layer 300. For example, the seal 310 may be arranged along the periphery of the liquid crystal layer 300 to seal the liquid crystal layer 300. Therefore, the seal 310 may be a sealing member or a sealing line.

[0178] Alternatively, the seal 310 may be a component for joining the first substrate 100 and the second substrate 500.

[0179] Reference Figure 3 and Figure 4 The seal 310 can be arranged above the second interlayer dielectric layer 260 or on the first connection wiring LL1.

[0180] Furthermore, based on the Z-axis direction, the seal 310 can be disposed between the second interlayer dielectric layer 260 and the planarization layer 600. Additionally, based on the Z-axis direction, the seal 310 can be disposed between the first connection wiring LL1 and the planarization layer 600.

[0181] Additionally, the seal 310 may overlap with the planarization layer 240 in the first non-display area NA1.

[0182] Reference Figure 4 A portion of the seal 310 may be disposed within the recess G1 recessed in the upper surface of the planarization layer 240. Therefore, a portion of the seal 310 may overlap the planarization layer 240 in the horizontal direction. In this case, a portion of the first connecting wiring LL1 may be disposed within the recess G1 formed in the planarization layer 240. The recess G1 of the planarization layer 240 may be a first recess or an inner recess. Here, the term "inner" may refer to the direction toward the center of the display area DA, and the term "outer" may refer to the direction opposite to the inner. Furthermore, the portion of the seal 310 disposed within the recess G1 may be a protrusion 311 or a first protrusion of the seal 310.

[0183] Since a portion of the seal 310 can be disposed within the groove G1 formed in the planarization layer 240, the groove G1 of the planarization layer 240 can serve as a guide for positioning the seal 310 in a predetermined position. Furthermore, since the groove G1 formed in the planarization layer 240 can increase the distance of the penetration path for moisture, debris, etc., into the display area DA, it effectively prevents or reduces the entry of moisture, debris, etc., into the display area DA.

[0184] Reference Figure 3 At least one pillar 320 may be disposed on the second interlayer dielectric layer 260, but is not limited thereto. For example, the pillar 320 may be disposed between the second interlayer dielectric layer 260 and the planarization layer 600 based on the Z-axis direction. Thus, the pillar 320 can maintain the gap for liquid crystal injection.

[0185] The pillar 320 may include a first pillar component 321 and a second pillar component 322 that may be formed of an organic insulating material.

[0186] The first pillar component 321 can be disposed on the second interlayer dielectric layer 260 and can be formed together with the pattern layer 800 by the same mask process as that used to form the pattern layer 800.

[0187] The second column component 322 can be arranged on the first column component 321 and can overlap with the first column component 321.

[0188] The first protective layer 400a can be arranged to overlap with the planarization layer 240. For example, the first protective layer 400a can be arranged above the planarization layer 240 and can cover the curved wiring BL. Therefore, the first protective layer 400a can protect the curved wiring BL from physical and / or chemical impacts. For example, the first protective layer 400a can prevent or reduce the penetration of moisture, debris, etc. into the curved wiring BL. Here, the first protective layer 400a can be an upper microcoating, an upper coating, or a first coating. Furthermore, the first protective layer 400a can cover a portion of the connecting wiring LL. Therefore, the first protective layer 400a can protect a portion of the connecting wiring LL from physical and / or chemical impacts.

[0189] The first protective layer 400a can be arranged across the bending region BA, and as the bending region BA bends, the first protective layer 400a can also bend along with it. Furthermore, the first protective layer 400a can overlap with the groove G of the first substrate 100.

[0190] The first protective layer 400a can be positioned between the seal 310 and the first pad portion PAD1 based on the Y-axis direction. In this case, the first side surface 410 constituting one side of the first protective layer 400a can be spaced apart from the seal 310. Additionally, the second side surface 420 constituting the other side of the first protective layer 400a can be spaced apart from the first pad portion PAD1. Here, the first side surface 410 can be an inner side surface of the first protective layer 400a, and the second side surface 420 can be an outer side surface of the first protective layer 400a.

[0191] A portion of the first protective layer 400a may be disposed within the recess G2 recessed in the upper surface of the planarization layer 240. Therefore, a portion of the first protective layer 400a may overlap with the planarization layer 240 in the horizontal direction. In this case, a portion of the second connecting wire LL2 may also be disposed within the recess G2 formed in the planarization layer 240, but is not limited thereto. For example, the recesses G2 formed in the planarization layer 240 may be spaced apart along the X-axis direction so that the second connecting wire LL2 can be disposed between the recesses G2. For example, the recess G2 of the planarization layer 240 may be a second recess or an outer recess. Furthermore, the portion of the first protective layer 400a disposed within the recess G2 may be a protrusion 430 or a second protrusion of the first protective layer 400a.

[0192] The first protective layer 400a can achieve a reinforced structure, wherein a portion of the first protective layer 400a is disposed within a groove G2 formed in the planarization layer 240. For example, a portion of the first protective layer 400a can be disposed in a groove G2 of the planarization layer 240 adjacent to the bending region BA, such that even if bending stress is applied to the first protective layer 400a, the portion of the first protective layer 400a disposed in the groove G2 can be supported by the planarization layer 240. Therefore, the first protective layer 400a can cope with bending stress through the portion of the first protective layer 400a disposed in the groove G2. For example, when a portion of the first protective layer 400a is disposed within the groove G2, the first protective layer 400a can improve its resistance to deformation caused by bending.

[0193] The first protective layer 400a may be formed of an organic insulating material to cope with stress caused by bending. For example, the first protective layer 400a may be formed of an organic material including acrylic-based materials (e.g., acrylate polymers), but is not limited thereto.

[0194] The first protective layer 400a can be formed using manufacturing methods such as inkjet printers, dispensers, and screen printers. For example, when the first protective layer 400a is formed using a dispenser, a portion of the first protective layer 400a can be located between the planarization layer 240 and the first pad portion PAD1. For example, if the material used in the manufacturing method using a dispenser has a low viscosity, a portion of the first protective layer 400a can cover some or all of the side surface 241 of the planarization layer 240 in the second non-display area NA2. For example, a portion of the first protective layer 400a can be arranged to contact, or cover, the second interlayer dielectric layer 260 that covers the side surface 241 of the planarization layer 240 in the second non-display area NA2.

[0195] Therefore, the second side surface 420 of the first protective layer 400a can be arranged closer to the first pad portion PAD1 than the planarization layer 240. That is, based on the Y-axis direction, a portion of the first protective layer 400a can be arranged between the planarization layer 240 and the pad portion PAD. Here, the portion of the first protective layer 400a arranged between the planarization layer 240 and the pad portion PAD based on the Y-axis direction can be a protrusion 440 or a third protrusion of the first protective layer 400a. In this case, the first protective layer 400a may include at least two protrusions 430 and 440 arranged spaced apart from each other, so the second protrusion can be referred to as the inner protrusion and the third protrusion can be referred to as the outer protrusion.

[0196] The second substrate 500 may overlap with the first region 110 and the second region 120 of the first substrate 100. For example, the second substrate 500 may be formed to have the same or similar size as the first substrate 100, but is not limited thereto. For example, the second substrate 500 may be formed to be smaller than the first substrate 100, and may be formed to have a size that can cover the curved region BA. That is, the second substrate 500 may overlap with the curved region BA in the Z-axis direction.

[0197] The second substrate 500 can be disposed above the planarization layer 600 and the black matrix 700. Therefore, the second substrate 500 can protect the planarization layer 600 and the black matrix 700. In addition, the second substrate 500 can protect the arrangement disposed below the planarization layer 600 and the black matrix 700.

[0198] The end of the second substrate 500 may protrude further than the black matrix 700 in the Y-axis direction, but is not limited to this. For example, the end of the second substrate 500 may be arranged to overlap with the end of the black matrix 700 in the Z-axis direction.

[0199] The second substrate 500 can be made of transparent plastic material, glass material or reinforced glass material.

[0200] Additionally, the second substrate 500 may include color filters or may include a separate liquid crystal layer (not shown). Here, the color filter layer may include a red color filter, a green color filter, and a blue color filter. For example, the color filter layer may include acrylic resin and pigments. Depending on the type of pigment that achieves the color, the color filter layer can be classified as red, green, and blue.

[0201] A planarization layer 600 is disposed on the liquid crystal layer 300 and the first protective layer 400a so as to protect the liquid crystal layer 300 and the first protective layer 400a, and can be configured for surface planarization. Here, the planarization layer 600 can be an outer coating layer.

[0202] Additionally, the planarization layer 600 can be disposed below the lower portion of the second substrate 500 and can contact the first protective layer 400a. For example, the planarization layer 600 can be disposed on the first protective layer 400a. When the second substrate 500 is bonded to the first substrate 100 using the seal 310, the planarization layer 600 can be supported by the first protective layer 400a.

[0203] The planarization layer 600 can be made of organic materials such as photoacryloyl, benzocyclobutene, polyimide, fluorinated resin, etc.

[0204] The black matrix 700 can be disposed between the second substrate 500 and the planarization layer 600. In this case, the black matrix 700 can be disposed in the non-display area NA and can overlap with the seal 310 and a portion of the liquid crystal layer 300.

[0205] In addition, the black matrix 700 can have a closed-loop shape surrounding the display area DA. Therefore, the black matrix 700 can prevent or reduce light leakage.

[0206] The display panel 10 according to this specification may also include a pattern layer 800 disposed above the planarization layer 240.

[0207] Pattern layer 800 can be disposed on the curved wiring BL. Therefore, pattern layer 800 can protect the curved wiring BL from physical and / or chemical influences. For example, pattern layer 800 can prevent or reduce the penetration of moisture, impurities, etc. into the curved wiring BL.

[0208] The pattern layer 800 can be arranged in the curved region BA, and as the curved region BA bends, the pattern layer 800 can also bend accordingly. Furthermore, the pattern layer 800 can overlap with the groove G.

[0209] The pattern layer 800 can be made of an organic insulating material to withstand stress caused by bending. For example, the pattern layer 800 can be made of organic materials including polyester-based polymers, acrylic-based polymers, etc.

[0210] The pattern layer 800 can be configured as a structure with a predetermined width W2 and height H, and can be arranged along the X-axis direction. For example, the pattern layer 800 can be formed as a strip shape including a trapezoidal cross-section.

[0211] The pattern layer 800 can be formed with a predetermined width W2, and the width W2 of the pattern layer 800 can be greater than the width W1 of the groove G, but is not limited to this. For example, the width W2 of the pattern layer 800 can be the same as the width W1 of the groove G. In addition, the width W2 of the pattern layer 800 can be less than the first length L1 of the curved wiring BL.

[0212] The pattern layer 800 can be formed to have a predetermined height H. The height H of the pattern layer 800 can be adjusted. Therefore, the display panel 10 according to one embodiment of this specification can minimize or reduce the stress applied to the curved wiring BL by adjusting the height H of the pattern layer 800.

[0213] Figure 5 This is an example of a diagram based on a curved neutral plane.

[0214] Reference Figure 5 The neutral plane can be defined as the plane where the stress state is zero during bending, and the magnitude of the tensile or compressive stress is determined proportionally to the distance from the neutral plane. Based on the Z-direction, the neutral plane can be located at the center between the plane applying tensile stress and the plane applying compressive stress. The plane applying compressive stress can be defined as a plane arranged close to the center of curvature, and the plane applying tensile stress can be defined as the plane opposite to the plane applying compressive stress.

[0215] Furthermore, cracks are more likely to occur in configurations placed in regions subjected to tensile stress compared to configurations placed in regions subjected to compressive stress. For example, since the curved wiring BL arranged in the curved region BA of the display panel 10 can be placed in a region subjected to tensile stress, the probability of cracks occurring in the curved wiring BL due to the bending of the curved region BA is higher. Therefore, since cracks are more likely to occur in regions subjected to tensile stress than in regions subjected to compressive stress during bending, the stress applied to the curved wiring BL can be minimized or reduced by moving the neutral plane closer to the curved wiring BL.

[0216] Therefore, when pattern layer 800 is arranged on curved wiring BL (see...) Figure 4 In one embodiment of this specification, the display device can position the neutral plane on the curved wiring BL or move the neutral plane closer to the curved wiring BL by adjusting the height H of the pattern layer 800 while the thickness from the first substrate 100 to the first protective layer 400a is determined. Therefore, the display panel 10 can reduce the stress applied to the curved wiring BL during bending of the display panel 10 by using the pattern layer 800.

[0217] The display device according to this specification may also include an upper polarizing layer UPOL and a lower polarizing layer DPOL disposed on a curved wiring BL.

[0218] Figures 6A to 6C This is a diagram illustrating the manufacturing process of a display panel according to an embodiment of this specification.

[0219] Reference Figure 6AThe second protective layer 400b, circuit layer 200, bent wiring BL, pattern layer 800, and connection wiring LL can be arranged above the first substrate 100, and the grooves G can be formed using an etching process. In addition, the first groove G1 and the second groove G2 can be formed in the planarization layer 240.

[0220] Reference Figure 6B The first protective layer 400a can be disposed above the pattern layer 800. The first protective layer 400a can be formed by manufacturing methods using inkjet printers, dispensers, etc. Therefore, a portion of the first protective layer 400a can cover some or all of the side surface 241 of the planarization layer 240 in the second non-display area NA2. In this case, a portion of the first protective layer 400a can be disposed in the second recess G2 of the planarization layer 240.

[0221] Considering the manufacturing tolerances of the first protective layer 400a according to the method of using a dispenser, the possibility of interference with the placement of the first protective layer 400a according to the post-processing of the seal 310, the first side surface 410 of the first protective layer 400a can be arranged above the pattern layer 800 to be spaced apart from the seal 310. Therefore, the seal 310 can be spaced apart from the first side surface 410 of the first protective layer 400a. As an example, the seal 310 is arranged to be spaced apart from the first side surface 410 of the first protective layer 400a, but is not limited to this. For example, if the seal 310 will not be damaged by the bending of the first protective layer 400a even when the first protective layer 400a is bent, the first protective layer 400a can be arranged to contact the seal 310. For example, if the first protective layer 400a cures while in contact with the seal 310, stress caused by the bending of the display panel 10 may be transmitted to the seal 310. Furthermore, since the stress caused by the bending of the first protective layer 400a may be transmitted to the seal 310 and cause deformation of the seal 310, the spaced arrangement between the seal 310 and the first protective layer 400a can prevent or reduce the premature transmission of stress caused by the bending of the first protective layer 400a to the seal 310.

[0222] Reference Figure 6C The first substrate 100 and the second substrate 500 can be bonded together using a seal 310. In this case, the first protective layer 400a can support the second substrate 500, and the liquid crystal layer 300 can be disposed between the first substrate 100 and the second substrate 500. In this case, a portion of the seal 310 can be disposed in the first groove G1 of the planarization layer 240.

[0223] Figure 7 This is a diagram illustrating a coating arranged in a display panel according to an embodiment of this specification.

[0224] Reference Figure 7 The display panel 10 according to the embodiments of this specification may further include a coating 900 disposed in a groove G. Here, the coating 900 disposed in the groove G may be a lower micro-coating, a lower coating, or a second coating.

[0225] The coating 900 may be disposed below the second protective layer 400b to overlap with a portion of the curved wiring BL. Here, the lower surface 910 of the coating 900 may be formed recessed toward the planarization layer 240, but is not limited thereto. For example, the lower surface 910 of the coating 900 may also be substantially flat.

[0226] The coating 900 can be made of organic materials, including polyester-based polymers or acrylic-based polymers.

[0227] Taking into account the location of the neutral plane, the coating 900 can be formed to have a predetermined thickness T.

[0228] According to the embodiments of this specification, the thickness T of the coating 900 can be adjusted when the thickness from the second protective layer 400b to the curved wiring BL or from the second protective layer 400b to the first protective layer 400a is determined. Therefore, the position of the neutral plane can be moved on or near the curved wiring BL. Thus, the display panel 10 can reduce the stress applied to the curved wiring BL during bending by using the coating 900.

[0229] Figure 8 This is a diagram illustrating the arrangement relationship between the first protective layer and the planarization layer in a display panel according to another embodiment of this specification.

[0230] Reference Figure 8 The first protective layer 400a can be arranged to be spaced apart from the planarization layer 600. For example, since the process requires the gap for liquid crystal injection between the second interlayer dielectric layer 260 and the planarization layer 600 to be formed to a predetermined size, considering the process errors and gap size that may occur when forming the first protective layer 400a, the thickness of the first protective layer 400a in the Z-axis direction can be formed to be the same as or smaller than the thickness of the seal 310 in the Z-axis direction. Therefore, as Figure 8 As shown, the first protective layer 400a can be arranged to be spaced apart from the planarization layer 600.

[0231] Figure 9 This is a diagram illustrating the curved appearance of a display device according to an embodiment of this specification.

[0232] Reference Figure 9The display panel 10 of the display device according to embodiments of this specification may be curved. For example, when the curved region BA is curved, the display panel 10 may be curved such that the first region 110 and the second region 120 face each other. In this case, the curved region BA may be curved to have a predetermined radius of curvature. Furthermore, a portion of the first protective layer 400a may be curved to contact the planarization layer 600.

[0233] Since the second interlayer dielectric layer 260, the first interlayer dielectric layer 230 and the gate insulating layer 220 made of inorganic insulating material are not arranged in the bending area BA of the display panel 10 according to the embodiment of this specification, damage to the gate insulating layer 220, the first interlayer dielectric layer 230 and the second interlayer dielectric layer 260 due to bending can be prevented or reduced in advance.

[0234] When the curved region BA is curved, the light source 30 can be arranged between the first region 110 and the second region 120. Here, the light source 30 can emit light towards the first region 110. Therefore, the light source 30 can overlap with the first region 110 in the Z-axis direction.

[0235] The light source 30 may include a backlight unit 31 and a backlight unit housing 32 surrounding the backlight unit 31. Here, the light source 30 may be a light source module.

[0236] The backlight unit 31 can emit light toward the first region 110. The light source used in the backlight unit 31 can be a light-emitting diode (LED), but is not limited to it.

[0237] The backlight unit housing 32 can be arranged to surround the backlight unit 31 to protect the backlight unit 31. In addition, the backlight unit housing 32 may include an opening OP through which light from the backlight unit 31 is emitted toward the first region 110.

[0238] The opening OP can be arranged facing the first region 110. In addition, the lower polarizing layer DPOL can be arranged in the opening OP.

[0239] Figure 10 This is a diagram illustrating the housing of a display device according to an embodiment of this specification.

[0240] Now refer to Figure 10 The display device according to the embodiments of this specification may include a housing 40. Here, the housing 40 may be a cover unit, a bottom cover, or a rear cover.

[0241] The housing 40 can be disposed on the back side of the display panel 10 to protect and support the display panel 10. For example, the housing 40 can be formed of a metal material with high rigidity, but is not limited to this. For example, the housing 40 can be formed of aluminum (Al), stainless steel, electrolytic galvanized iron (EGI) which is mainly iron (Fe), etc.

[0242] The housing 40 may include a bottom member 41 and a sidewall member 42 extending from the edge of the bottom member 41. The end of the sidewall member 42 may contact the lower portion of the second substrate 500. For example, the end of the sidewall member 42 may contact a planarization layer 600 disposed below the second substrate 500.

[0243] Therefore, the display device according to the embodiments of this specification can be implemented as a borderless type in which the housing 40 is not visible from the front side, because during the bending of the bending region BA, only the second substrate 500 is exposed on the front side, while the pad portion PAD is placed on the back side of the display region DA.

[0244] Figure 11 This is a cross-sectional view illustrating a display panel according to another embodiment of this specification. Figure 12 yes Figure 11 A magnified view of region B in the image. Figure 13 This is a diagram illustrating the curved appearance of a display device that applies a display panel according to an embodiment of this specification. Figures 11 to 13 The display panel 10a shown may be a display panel according to the second embodiment. Figure 3 , Figure 4 , Figure 6A and Figure 8 The display panel 10 shown may be a display panel according to the first embodiment.

[0245] Comparing the display panel 10 according to the first embodiment with the display panel 10a according to the second embodiment, the display panel 10a according to the second embodiment may further include dam IDM and ODM arranged spaced apart from each other, with the first protective layer 400a interposed therebetween. Therefore, during the manufacturing process of the first protective layer 400a, the display panel 10a according to the second embodiment can use the dam IDM and ODM to prevent or reduce material spillage in the formation of the first protective layer 400a. In this case, instead of the display panel 10 according to the first embodiment, the display panel 10a according to the second embodiment can be applied to the display device according to the embodiments of this specification.

[0246] Reference Figures 11 to 13According to the second embodiment, the display panel 10a may include a first substrate 100 having a groove G, a circuit layer 200, a liquid crystal layer 300, a sealant 310, a pad portion PAD, a curved wiring BL, a first protective layer 400a, a second substrate 500, a connecting wiring LL, a planarization layer 600, a black matrix 700, a pattern layer 800, a coating layer 900, etc.

[0247] The first substrate 100 including the groove G, the circuit layer 200, the liquid crystal layer 300, the seal 310, the pad portion PAD, the bent wiring BL, the first protective layer 400a, the second substrate 500, the connection wiring LL, the planarization layer 600, the black matrix 700, the pattern layer 800, and the coating 900 are substantially the same as those in the display panel 10 according to the first embodiment, and therefore are given the same reference numerals, and their redundant descriptions may be omitted or simplified.

[0248] According to the second embodiment, the display panel 10a may further include at least two dam IDM and ODM spaced apart from each other, with a first protective layer 400a inserted therebetween.

[0249] During the manufacturing process of the first protective layer 400a, the display panel 10a according to the second embodiment can use dam IDM and ODM to prevent or reduce the overflow of the first protective layer 400a. For example, when the first protective layer 400a is formed by using a distributor, dam IDM and ODM can prevent or reduce the overflow of the first protective layer 400a. Therefore, when the first protective layer 400a is formed using a material with low viscosity by using a distributor, dam IDM and ODM can prevent or reduce the flow of material forming the first protective layer 400a and cover the first pad portion PAD1. As a result, in the display panel 10a according to the second embodiment, a portion of the first protective layer 400a may not cover the side surface 241 of the planarization layer 240.

[0250] Reference Figures 11 to 13 According to the second embodiment, the display panel 10a may include an inner dam IDM and an outer dam ODM arranged spaced apart from each other in the Y-axis direction. In this case, the inner dam IDM may be arranged inside the first protective layer 400a, and the outer dam ODM may be arranged outside the first protective layer 400a. For example, the inner dam IDM may be arranged in the first non-display area NA1 to overlap with the first area 110. In addition, the outer dam ODM may be arranged in the second non-display area NA2 to overlap with the second area 120.

[0251] The internal dam IDM and the external dam ODM can be arranged above the planarization layer 240. Here, the internal dam IDM can be the first dam, and the external dam ODM can be the second dam.

[0252] The internal dam IDM and external dam ODM can be formed from organic insulating materials and can be formed together with the patterned layer 800 using the same masking process as that used to form the patterned layer 800.

[0253] The IDM can be disposed in the first non-display area NA1. In this case, the IDM can be disposed above the planarization layer 240. For example, the IDM can be disposed on the second interlayer dielectric layer 260, which is disposed on the planarization layer 240.

[0254] The second connection wiring LL2 can be arranged in the second non-display area NA2. In this case, the external dam ODM can be arranged above the planarization layer 240. For example, the external dam ODM can be arranged above the second connection wiring LL2, which is arranged above the planarization layer 240.

[0255] Reference Figure 13 According to the second embodiment, the display panel 10a can be curved. For example, when the curved region BA is curved to have a predetermined radius of curvature, the display panel 10 can be curved such that the first region 110 and the second region 120 face each other. In this case, the inner dam IDM and the outer dam ODM can overlap in the Z-axis direction, but are not necessarily limited thereto.

[0256] Since the second interlayer dielectric layer 260, the first interlayer dielectric layer 230 and the gate insulating layer 220 made of inorganic insulating material are not arranged in the bending region BA of the display panel 10a according to the embodiment of this specification, damage to the gate insulating layer 220, the first interlayer dielectric layer 230 and the second interlayer dielectric layer 260 due to bending can be prevented or reduced in advance.

[0257] When the curved region BA is curved, the light source 30 can be arranged between the first region 110 and the second region 120. Here, the light source 30 can emit light towards the first region 110. Therefore, the light source 30 can overlap with the first region 110 in the Z-axis direction.

[0258] Figure 14 This is a cross-sectional view illustrating a display panel according to another embodiment of this specification. Figure 15 yes Figure 14 A magnified view of region C in the image. Figure 16 This is a diagram illustrating the curved appearance of a display device that applies a display panel according to an embodiment of this specification. Figures 14 to 16 The display panel 10b shown may be a display panel according to the third embodiment.

[0259] Comparing the display panel 10 according to the first embodiment with the display panel 10b according to the third embodiment, in the display panel 10b according to the third embodiment, a first protective layer 400a can be formed by a patterning process using a photolithographic mask, such that a portion of the first protective layer 400a may not cover the side surface 241 of the planarization layer 240 in the second non-display area NA2. In this case, instead of the display panel 10 according to the first embodiment, the display panel 10b according to the third embodiment can be applied to the display device according to the embodiments of this specification.

[0260] Reference Figures 14 to 16 According to the third embodiment, the display panel 10b may include a first substrate 100 having a groove G, a circuit layer 200, a liquid crystal layer 300, a seal 310, a pad portion PAD, a bent wiring BL, a first protective layer 400a, a second substrate 500, a connecting wiring LL, a planarization layer 600, a black matrix 700, a pattern layer 800, a coating layer 900, etc.

[0261] The first substrate 100 including the groove G, the circuit layer 200, the liquid crystal layer 300, the seal 310, the pad portion PAD, the bent wiring BL, the first protective layer 400a, the second substrate 500, the connection wiring LL, the planarization layer 600, the black matrix 700, the pattern layer 800, and the coating 900 are substantially the same as those in the display panel 10 according to the first embodiment, and therefore are given the same reference numerals, and their redundant descriptions may be omitted or simplified.

[0262] The display panel 10b according to the third embodiment may include a first protective layer 400a formed by a patterning process using a photolithographic mask. Here, the patterning process using a photolithographic mask can improve the process accuracy of forming the first protective layer 400a. Therefore, the first protective layer 400a can be disposed only above the planarization layer 240 to overlap with it, such that a portion of the first protective layer 400a may not cover the side surface 241 of the planarization layer 240 in the second non-display area NA2. Therefore, the first protective layer 400a of the display panel 10b can be disposed at a predetermined location to protect curved wiring BL, etc.

[0263] Reference Figure 16 According to the third embodiment, the display panel 10b can be curved. For example, when the curved region BA is curved to have a predetermined radius of curvature, the display panel 10b can be curved such that the first region 110 and the second region 120 face each other.

[0264] Since the second interlayer dielectric layer 260, the first interlayer dielectric layer 230 and the gate insulating layer 220 made of inorganic insulating material are not arranged in the bending region BA of the display panel 10a according to the embodiment of this specification, damage to the gate insulating layer 220, the first interlayer dielectric layer 230 and the second interlayer dielectric layer 260 due to bending can be prevented or reduced in advance.

[0265] When the curved region BA is curved, the light source 30 can be arranged between the first region 110 and the second region 120. Here, the light source 30 can emit light towards the first region 110. Therefore, the light source 30 can overlap with the first region 110 in the Z-axis direction.

[0266] The display device according to one or more embodiments of this specification can be described as follows.

[0267] A display device according to one or more embodiments of this specification may include a display panel having a recess and a circuit board connected to the display panel. The display panel includes: a first substrate including a first region and a second region spaced apart from each other by the recess; a circuit layer disposed on the first region and including transistors; a planarization layer extending in the circuit layer and disposed over the recess; a curved wiring disposed on the planarization layer; a first protective layer disposed over the curved wiring; and a second substrate disposed over the first protective layer to overlap with the first region and the second region of the first substrate.

[0268] According to one or more embodiments of this specification, the display panel may further include a liquid crystal layer disposed between the circuit layer and the second substrate.

[0269] According to one or more embodiments of this specification, the display panel may further include a planarization layer disposed on the liquid crystal layer and the first protective layer.

[0270] According to one or more embodiments of this specification, the display panel may further include a seal surrounding the liquid crystal layer, and a first protective layer may be spaced apart from the seal.

[0271] According to one or more embodiments of this specification, the display panel may further include a seal surrounding the liquid crystal layer, and a portion of the seal may be disposed within a groove recessed in the planarization layer.

[0272] According to one or more embodiments of this specification, the display device may further include a pad portion disposed on a second region, and a portion of a first protective layer may be disposed between the planarization layer and the pad portion.

[0273] According to one or more embodiments of this specification, the display panel may further include a first dam and a second dam, the first dam and the second dam being arranged to be spaced apart from each other above the planarization layer, and a first protective layer may be arranged between the first dam and the second dam.

[0274] According to one or more embodiments of this specification, a first dam may overlap with a first region, and a second dam may overlap with a second region.

[0275] According to one or more embodiments of this specification, the planarization layer disposed above the groove may extend to overlap with the second region.

[0276] According to one or more embodiments of this specification, the first protective layer may be disposed above the planarization layer and may overlap with the second region.

[0277] According to one or more embodiments of this specification, the display panel may further include a patterned layer that overlaps with the grooves, and the patterned layer may be arranged on curved wiring.

[0278] According to one or more embodiments of this specification, the display panel may also include a coating disposed in a recess.

[0279] According to one or more embodiments of this specification, the display panel may further include a second protective layer disposed above the recess, and a planarization layer may cover the second protective layer.

[0280] According to one or more embodiments of this specification, the display panel may further include a first connecting wire and a second connecting wire, the first connecting wire contacting one side of the curved wire and the second connecting wire contacting the other side of the curved wire.

[0281] According to one or more embodiments of this specification, the display panel may further include a second interlayer dielectric layer disposed above the planarization layer. The second interlayer dielectric layer may be disposed between the bent wiring and the first connection wiring and between the bent wiring and the second connection wiring, and the first connection wiring and the second connection wiring may contact the bent wiring through contact holes in the second interlayer dielectric layer.

[0282] According to one or more embodiments of this specification, the bent wiring may include a material different from the material of the first connecting wiring and the second connecting wiring.

[0283] According to one or more embodiments of this specification, the display panel may further include a first electrode disposed on a planarization layer, the curved wiring may include a first layer and a second layer, and at least one of the first layer and the second layer may include the same metal layer as the first electrode.

[0284] According to one or more embodiments of this specification, a portion of the first protective layer may be disposed within a groove recessed in the planarization layer.

[0285] According to one or more embodiments of this specification, the first side surface of the first region and the second side surface of the second region may each be an inclined surface having a predetermined slope.

[0286] According to one or more embodiments of this specification, the first substrate and the second substrate may include glass material.

[0287] The above description of the problem to be solved, the means to solve the problem, and the effects described above do not define the basic features of the claims; therefore, the scope of the claims is not limited by the description in the specification.

[0288] Although embodiments of the present disclosure have been described in more detail with reference to the accompanying drawings, the present disclosure is not limited thereto and can be implemented in many different forms without departing from the technical concept of the present disclosure. Therefore, the embodiments disclosed herein are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure, nor is the scope of the technical concept of the present disclosure limited thereto. It should therefore be understood that the above embodiments are illustrative in all respects and do not limit the present disclosure. The scope of protection of the present disclosure should be interpreted based on the claims, and all technical concepts within the equivalent scope thereof should be understood to fall within the scope of the present disclosure.

[0289] Cross-references to related applications

[0290] This application claims priority and benefit to Korean Patent Application No. 10-2024-0184355, filed on December 12, 2024, the disclosure of which is incorporated herein by reference in its entirety.

Claims

1. A display device, the display device comprising: A first substrate, the first substrate including a first region and a second region spaced apart from each other by a groove; A circuit layer disposed on the first region and comprising transistors; A planarization layer that extends in the circuit layer to be disposed above the recess; The curved wiring is arranged on the planarization layer; A first protective layer is disposed above the curved wiring; as well as A second substrate is disposed above the first protective layer to overlap with the first region and the second region of the first substrate.

2. The display device according to claim 1, further comprising: A liquid crystal layer is disposed between the circuit layer and the second substrate.

3. The display device according to claim 2, further comprising: A planarization layer is disposed on the liquid crystal layer and the first protective layer.

4. The display device according to claim 2, further comprising: A sealing element surrounding the liquid crystal layer. The first protective layer is spaced apart from the sealing element.

5. The display device according to claim 2, further comprising: A sealing element surrounding the liquid crystal layer. A portion of the seal is disposed inside the groove, and the groove is recessed into the planarization layer.

6. The display device according to claim 1, further comprising: The pad portion is arranged on the second region. A portion of the first protective layer is disposed between the planarization layer and the pad portion.

7. The display device according to claim 1, further comprising: The first dam and the second dam are arranged spaced apart from each other above the planarization layer. The first protective layer is arranged between the first dam and the second dam.

8. The display device according to claim 7, wherein, The first dam overlaps with the first area, and the second dam overlaps with the second area.

9. The display device according to claim 1, wherein, The planarization layer disposed above the groove extends to overlap with the second region.

10. The display device according to claim 9, wherein, The first protective layer is disposed above the planarization layer and overlaps with the second region.

11. The display device according to claim 1, further comprising: A patterned layer, which overlaps with the groove. The pattern layer is arranged on the curved wiring.

12. The display device according to claim 11, further comprising: A coating is disposed in the groove.

13. The display device according to claim 1, further comprising: A second protective layer is disposed above the groove. The planarization layer covers the second protective layer.

14. The display device according to claim 1, further comprising: First connection wiring and second connection wiring The first connecting wire contacts one side of the curved wire, and the second connecting wire contacts the other side of the curved wire.

15. The display device according to claim 14, further comprising: The second interlayer dielectric layer is disposed above the planarization layer. The second interlayer dielectric layer is disposed between the bent wiring and the first connection wiring, and between the bent wiring and the second connection wiring. The first connection wiring and the second connection wiring contact the bent wiring through contact holes in the second interlayer dielectric layer.

16. The display device according to claim 14, wherein, The curved wiring comprises a material different from that of the first connecting wiring and the second connecting wiring.

17. The display device according to claim 1, further comprising: The first electrode is disposed on the planarization layer. The curved wiring includes a first layer and a second layer, and Wherein, at least one of the first layer and the second layer includes the same metal layer as the first electrode.

18. The display device according to claim 1, wherein, A portion of the first protective layer is disposed within a recess formed in the planarization layer.

19. The display device according to claim 1, wherein, The first side surface of the first region and the second side surface of the second region are each inclined surfaces with a predetermined slope.

20. The display device according to claim 1, wherein, The first substrate and the second substrate comprise glass material.

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