Pixel circuit, driving method thereof and display panel

Abstract

This invention discloses a pixel circuit, its driving method, and a display panel. The pixel circuit includes a pixel driving circuit and a light-emitting module. The pixel driving circuit includes a pulse width modulation module, a pulse amplitude modulation module, a coupling module, and a control module. The pulse amplitude modulation module is electrically connected to the light-emitting module and is used to control the amplitude of the driving current according to a first data voltage. The pulse width modulation module is electrically connected to the pulse amplitude modulation module and is used to control the pulse width of the driving current according to a second data voltage. The coupling module is used to couple the second data voltage to the pulse width modulation module. The control module is electrically connected to the second terminal of the coupling module and is used to write the second data voltage to the coupling module, turn off the second data voltage before writing it within a frame, and write a first initialization signal to the coupling module in a preset stage after all second data voltage writing stages and before the light-emitting stage within a frame. This invention can improve the performance of the pixel circuit.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a pixel circuit and its driving method, and a display panel. Background Technology

[0002] Pixel circuits and pixel-based flat panel display devices have become the mainstream in display devices due to their advantages such as high image quality, power saving, thin body and wide range of applications, and are widely used in various consumer electronic products such as mobile phones, televisions, laptops, and desktop computers.

[0003] However, the performance of current pixel circuits needs improvement. Summary of the Invention

[0004] This invention provides a pixel circuit and its driving method, as well as a display device, to improve the performance of the pixel circuit.

[0005] According to one aspect of the present invention, a pixel circuit is provided, the pixel circuit including a pixel driving circuit and a light-emitting module, the pixel driving circuit being used to generate a driving current, and the light-emitting module being used to emit light in response to the driving current;

[0006] The pixel driving circuit includes: a pulse width modulation module, a pulse amplitude modulation module, a coupling module, and a control module;

[0007] The pulse amplitude modulation module is electrically connected to the light-emitting module and is used to control the amplitude of the driving current according to the first data voltage; the pulse width modulation module is electrically connected to the pulse amplitude modulation module and is used to control the pulse width of the driving current according to the second data voltage.

[0008] The first end of the coupling module is electrically connected to the pulse width modulation module, and is used to couple the second data voltage to the pulse width modulation module;

[0009] The control module is electrically connected to the second end of the coupling module. The control module is used to write the second data voltage into the coupling module, turn off the second data voltage writing stage within a frame, and write the first initialization signal into the coupling module in a preset stage after all second data voltage writing stages and before the light emission stage within a frame.

[0010] Optionally, the pixel circuit includes a pre-writing stage, a writing stage, and a post-writing stage within one frame; the post-writing stage includes a writing stage for other rows of data, the preset stage, and a light-emitting stage; the preset stage is located between the writing stage for other rows of data and the light-emitting stage.

[0011] Preferably, the control module is used to turn off before the second data voltage is written, and turn on during the second data voltage writing stage and after the second data voltage is written.

[0012] The control module is used to write the second data voltage to the coupling module during the second data voltage writing phase, and to write a sweep frequency voltage to the coupling module during the light emission phase.

[0013] Optionally, the first initialization signal is the second data voltage corresponding to a preset gray level.

[0014] Optionally, the first end of the control module is electrically connected to the second end of the coupling module, the control end of the control module receives a control signal, and the second end of the control module is electrically connected to the first data line;

[0015] The first data line is used to write the second data voltage and the first initialization signal to the control module; the control signal is used to control the conduction state of the control module.

[0016] Preferably, the control module includes a control transistor, wherein a first terminal of the control transistor serves as a first terminal of the control module, a second terminal of the control transistor serves as a second terminal of the control module, and a control terminal of the control transistor serves as a control terminal of the control module.

[0017] Optionally, the pulse width modulation module includes a first initialization unit, a first threshold compensation unit, a second threshold compensation unit, a first driving unit, and a shutdown signal writing unit;

[0018] The first terminal of the first initialization unit is connected to the second initialization signal, the second terminal of the first initialization unit is electrically connected to the control terminal of the first driving unit, and the control terminal of the first initialization unit is connected to the second scan signal.

[0019] The first terminal of the first threshold compensation unit is connected to the first power supply voltage, the second terminal of the first threshold compensation unit is electrically connected to the first terminal of the first driving unit, and the control terminal of the first threshold compensation unit is connected to the first scan signal.

[0020] The first end of the second threshold compensation unit is electrically connected to the first end of the first driving unit, the second end of the second threshold compensation unit is electrically connected to the control end of the first driving unit, and the control end of the second threshold compensation unit is connected to the first scanning signal.

[0021] The first terminal of the shutdown signal writing unit is connected to the first power supply voltage, the second terminal of the shutdown signal writing unit is electrically connected to the first terminal of the first driving unit, and the control terminal of the shutdown signal writing unit is connected to the first light emission control signal.

[0022] Optionally, the pulse amplitude modulation module includes: a first light-emitting control unit, a second driving unit, a second light-emitting control unit, a pulse amplitude data writing unit, a third threshold compensation unit, a second initialization unit, a third initialization unit, a first storage unit, and a second storage unit;

[0023] The first terminal of the first light-emitting control unit is connected to the second power supply voltage, the second terminal of the first light-emitting control unit is electrically connected to the first terminal of the second driving unit, and the control terminal of the first light-emitting control unit is electrically connected to the second terminal of the first driving unit.

[0024] The first end of the second light-emitting control unit is electrically connected to the second end of the second driving unit, the second end of the second light-emitting control unit is electrically connected to the first end of the light-emitting module, and the control end of the second light-emitting control unit is connected to the second light-emitting control signal;

[0025] The first terminal of the pulse amplitude data writing unit is connected to the second data voltage, the second terminal of the pulse amplitude data writing unit is electrically connected to the first terminal of the second driving unit, and the control terminal of the pulse amplitude data writing unit is connected to the second scanning signal.

[0026] The first end of the third threshold compensation unit is electrically connected to the second end of the second driving unit, the second end of the third threshold compensation unit is electrically connected to the control end of the second driving unit, and the control end of the third threshold compensation unit is connected to the second scanning signal;

[0027] The first terminal of the second initialization unit is connected to the third initialization signal, the second terminal of the second initialization unit is electrically connected to the control terminal of the first light-emitting control unit, and the control terminal of the second initialization unit is connected to the global control signal;

[0028] The first end of the third initialization unit is connected to the fourth initialization signal, the second end of the third initialization unit is electrically connected to the control end of the second driving unit, and the control end of the third initialization unit is connected to the third scan signal;

[0029] The first end of the first storage unit is connected to the second power supply voltage, and the second end of the first storage unit is electrically connected to the control terminal of the second driving unit; the first end of the second storage unit is connected to the second power supply voltage, and the second end of the second storage unit is electrically connected to the control terminal of the first light-emitting control unit; the second end of the light-emitting module is connected to the third power supply voltage.

[0030] Optionally, within a frame, the preset phase is located before the conduction phase of the second initialization unit.

[0031] According to another aspect of the present invention, a method for driving a pixel circuit is provided for driving a pixel circuit as described above, the method comprising:

[0032] Before the second data voltage writing phase within a frame, the control module is controlled to shut down;

[0033] The control module is turned on during the second data voltage writing phase within a frame and during a preset phase after all second data voltages are written within a frame and before the light emission phase.

[0034] In the preset stage, the control module is controlled to write the first initialization signal to the second end of the coupling module.

[0035] Optionally, in the preset stage, controlling the control module to write the first initialization signal to the second end of the coupling module includes:

[0036] The first initialization signal is written to the first terminal of the control module, wherein the first initialization signal is the second data voltage corresponding to the preset gray level.

[0037] According to another aspect of the present invention, a display panel is provided, the display panel comprising a plurality of pixel circuits as described above.

[0038] The technical solution of this invention employs a pixel circuit including a pixel driving circuit and a light-emitting module. The pixel driving circuit generates a driving current, and the light-emitting module emits light in response to the driving current. The pixel driving circuit includes a pulse width modulation module, a pulse amplitude modulation module, a coupling module, and a control module. The pulse amplitude modulation module is electrically connected to the light-emitting module and controls the amplitude of the driving current according to a first data voltage. The pulse width modulation module is electrically connected to the pulse amplitude modulation module and controls the pulse width of the driving current according to a second data voltage. The first end of the coupling module is electrically connected to the pulse width modulation module and couples the second data voltage to the pulse width modulation module. The control module is electrically connected to the second end of the coupling module and writes the second data voltage to the coupling module. The control module is turned off before the second data voltage is written within a frame and writes a first initialization signal to the coupling module in a preset stage after all second data voltage writing stages and before the light-emitting stage within a frame. During the second data voltage writing stage of this pixel row, the control module of this pixel row is turned off, which can eliminate the influence of the second data voltage corresponding to the pixel row whose scan time is before this pixel row within a frame on this pixel row. After the second data voltage of all pixel rows on the display panel is written within a frame, and before the light emission stage, a first initialization signal is written to the coupling module. This eliminates the influence of the second data voltage of pixel rows whose scanning time is after the current pixel row on the current pixel row within a frame. As a result, the performance of the pixel circuit can be greatly improved.

[0039] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 A schematic diagram of a pixel circuit structure provided in an embodiment of the present invention;

[0042] Figure 2 A schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention;

[0043] Figure 3 A timing diagram of a pixel circuit provided in an embodiment of the present invention;

[0044] Figure 4A schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention;

[0045] Figure 5 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;

[0046] Figure 6 A timing diagram of a display panel provided in an embodiment of the present invention;

[0047] Figure 7 This is a flowchart of a pixel circuit driving method provided in an embodiment of the present invention. Detailed Implementation

[0048] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0049] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0050] The performance of pixel circuits in related technologies needs improvement. Extensive research revealed that pixel circuits in these technologies suffer from display anomalies, resulting in poor performance. More specifically, in these technologies, the pixel circuits employ a hybrid driving method combining digital and analog driving to drive the light-emitting module. However, in the digital driving section, the data voltage changes abruptly before and after writing, affecting the transistor characteristics. Furthermore, the impact on the corresponding transistors in different pixel circuits is inconsistent, leading to display anomalies.

[0051] To address the aforementioned technical problems, the present invention proposes the following solutions:

[0052] Figure 1This is a schematic diagram of a pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 1 The pixel circuit includes a pixel driving circuit 1 and a light-emitting module 2. The pixel driving circuit 1 generates a driving current, and the light-emitting module 2 emits light in response to the driving current. The pixel driving circuit 1 includes a pulse width modulation module 11, a pulse amplitude modulation module 12, a coupling module 13, and a control module 14. The pulse amplitude modulation module 12 is electrically connected to the light-emitting module 2 and is used to control the amplitude of the driving current according to a first data voltage DataI. The pulse width modulation module 11 is electrically connected to the pulse amplitude modulation module 12 and is used to control the pulse width of the driving current according to a second data voltage Datat. The first end of the coupling module 13 is electrically connected to the pulse width modulation module 11 and is used to couple the second data voltage Datat to the pulse width modulation module 11. The control module 14 is electrically connected to the second end of the coupling module 13 and is used to write the second data voltage Datat into the coupling module 13. The control module 14 is turned off before the second data voltage is written in a frame and writes a first initialization signal into the coupling module 13 in a preset stage after all the second data voltage writing stages and before the light emission stage in a frame.

[0053] Specifically, the pixel circuit can be applied in a display panel. The light-emitting module 2 in the pixel circuit is, for example, an OLED (Organic Light Emitting Diode), Micro LED (Micro Light Emitting Diode), or Mini LED (Mini Light Emitting Diode). The light-emitting module 2 is a current-driven device that emits light in response to a driving current. The specific structure and light-emitting principle of the light-emitting module 2 are well known to those skilled in the art and will not be described in detail here. The pixel driving circuit 1 can control the pulse width of the driving current according to the second data voltage Datat, thereby controlling the light-emitting duration of the light-emitting module within one frame. The pixel driving circuit 1 can also control the amplitude of the driving current according to the first data voltage DataI, thereby controlling the brightness of the light-emitting module. Through the joint control of the first data voltage DataI and the second data voltage Datat, the light-emitting module 2 displays the corresponding grayscale. It is understood that the pixel circuit in this embodiment is a hybrid digital and analog driving pixel circuit, which can achieve more precise adjustment of the display grayscale of the light-emitting module 2. The second data voltage Datat received by the pulse width modulation module 11 is provided by the coupling module 13.

[0054] In this embodiment, a control module 14 is provided so that the first data line transmitting the second data voltage Datat is not directly electrically connected to the coupling module 13, but is electrically connected through the control module 14. The driving process of the pixel circuit includes three stages within one frame: the pre-writing stage of the second data voltage, the writing stage of the second data voltage, and the post-writing stage of the second data voltage. The second data voltage writing stage of each pixel row in the display panel is performed sequentially in a row scanning manner. In the pre-writing stage of the second data voltage of this pixel row, the control module 14 of this pixel row is turned off. At this time, the second data voltage Datat corresponding to the pixel circuit of other pixel rows transmitted on the first data line will not be transmitted to the coupling module 13 of this pixel row, thereby eliminating the influence of the second data voltage Datat corresponding to the pixel row whose scanning time is before this pixel row within one frame on this pixel row. In the second data voltage writing stage of this pixel row, the control module 14 is turned on, so that the second data voltage Datat can be normally written to the pulse width modulation module 11 of this pixel row. After the second data voltage writing stage of this pixel row and before the light emission stage, there may be second data voltage writing stages corresponding to other pixel rows. Therefore, in the preset stage after all the second data voltage writing stages and before the light emission stage within a frame—that is, after the second data voltage writing stages and before the light emission stage for all pixel rows of the display panel within a frame—a first initialization signal Vint1 is written to the coupling module 13. The corresponding transistors in the pulse width modulation module 11 are turned on, making the bias state of the corresponding transistors in the pixel circuits of all pixel rows in the display panel the same. This eliminates the influence of the second data voltage Datat corresponding to pixel rows whose scanning time is after this pixel row on this pixel row within a frame. In summary, the pixel circuit of this embodiment can eliminate the influence of the second data voltage Datat of other pixel rows on this pixel row, thereby greatly improving the performance of the pixel circuit.

[0055] The technical solution of this embodiment employs a pixel circuit including a pixel driving circuit and a light-emitting module. The pixel driving circuit generates a driving current, and the light-emitting module emits light in response to the driving current. The pixel driving circuit includes a pulse width modulation module, a pulse amplitude modulation module, a coupling module, and a control module. The pulse amplitude modulation module is electrically connected to the light-emitting module and controls the amplitude of the driving current according to a first data voltage. The pulse width modulation module is electrically connected to the pulse amplitude modulation module and controls the pulse width of the driving current according to a second data voltage. The first end of the coupling module is electrically connected to the pulse width modulation module and couples the second data voltage to the pulse width modulation module. The control module is electrically connected to the second end of the coupling module and writes the second data voltage to the coupling module. The control module is turned off before the second data voltage is written within a frame and writes a first initialization signal to the coupling module in a preset stage after all second data voltage writing stages and before the light-emitting stage within a frame. During the second data voltage writing stage of this pixel row, the control module of this pixel row is turned off, which can eliminate the influence of the second data voltage corresponding to the pixel row whose scan time is before this pixel row within a frame on this pixel row. After the second data voltage of all pixel rows on the display panel is written within a frame, and before the light emission stage, a first initialization signal is written to the coupling module. This eliminates the influence of the second data voltage of pixel rows whose scanning time is after the current pixel row on the current pixel row within a frame. As a result, the performance of the pixel circuit can be greatly improved.

[0056] The above is the core idea of ​​this invention. For ease of explanation, the specific structure and working principle of the pulse width modulation module 11 and the pulse amplitude modulation module 12 will be described below. It is understood that there are many ways to implement the pulse width modulation module 11 and the pulse amplitude modulation module 12, and this embodiment only describes one of them.

[0057] Figure 2 This is a schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention. Figure 3 A timing diagram of a pixel circuit provided in an embodiment of the present invention is shown below. Figure 2 and Figure 3The pulse width modulation module 11 includes a first driving unit 111, a first initialization unit 112, a first threshold compensation unit 113, a second threshold compensation unit 114, and a turn-off signal writing unit 115. The first terminal of the first initialization unit 112 is connected to a second initialization signal Vint2, and the second terminal of the first initialization unit 112 is electrically connected to the control terminal of the first driving unit 111. The control terminal of the first initialization unit 112 is connected to a second scan signal Gn-1. The first terminal of the first threshold compensation unit 113 is connected to a first power supply voltage VDDW, and the second terminal of the first threshold compensation unit 113 is electrically connected to the first terminal of the first driving unit 111. The control terminal of the first threshold compensation unit 113 is connected to the first scan signal Gn. The first end of the second threshold compensation unit 114 is electrically connected to the first end of the first driving unit 111, and the second end of the second threshold compensation unit 114 is electrically connected to the control end of the first driving unit 111. The control end of the second threshold compensation unit 114 is connected to the first scanning signal Gn. The first end of the turn-off signal writing unit 115 is connected to the first power supply voltage VDDW, and the second end of the turn-off signal writing unit 115 is electrically connected to the first end of the first driving unit 111. The control end of the turn-off signal writing unit 115 is connected to the first light emission control signal EM2.

[0058] The pulse amplitude modulation module 12 includes a first light-emitting control unit 122, a second driving unit 121, a second light-emitting control unit 123, a pulse amplitude data writing unit 124, a third threshold compensation unit 125, a second initialization unit 129, a third initialization unit 126, a first storage unit 127, and a second storage unit 128. The first terminal of the first light-emitting control unit 122 is connected to the second power supply voltage ELVDD, the second terminal of the first light-emitting control unit 122 is electrically connected to the first terminal of the second driving unit 121, and the control terminal of the first light-emitting control unit 122 is electrically connected to the second terminal of the first driving unit 111; the first terminal of the second light-emitting control unit 123 is electrically connected to the second terminal of the second driving unit 121, the second terminal of the second light-emitting control unit 123 is electrically connected to the first terminal of the light-emitting module 2, and the control terminal of the second light-emitting control unit 123 is connected to the second light-emitting control signal EM1; the first terminal of the pulse amplitude data writing unit 124 is connected to the first data voltage DataI, the second terminal of the pulse amplitude data writing unit 124 is electrically connected to the first terminal of the second driving unit 121, and the control terminal of the pulse amplitude data writing unit 124 is connected to the second scan signal Gn-1; wherein, the first data voltage DataI can be provided by the second data line. The first terminal of the third threshold compensation unit 125 is electrically connected to the second terminal of the second driving unit 121, and the second terminal of the third threshold compensation unit 125 is electrically connected to the control terminal of the second driving unit 121. The control terminal of the third threshold compensation unit 125 is connected to the second scanning signal Gn-1. The first terminal of the second initialization unit 129 is connected to the third initialization signal Vint3, and the second terminal of the second initialization unit 129 is electrically connected to the control terminal of the first light-emitting control unit 122. The control terminal of the second initialization unit 129 is connected to the global control signal Set. The first terminal of the third initialization unit 126 is connected to the fourth initialization signal. Vint4, the second end of the third initialization unit 126 is electrically connected to the control end of the second driving unit 121, and the control end of the third initialization unit 126 is connected to the third scan signal Gn-2; the first end of the first storage unit 127 is connected to the second power supply voltage ELVDD, and the second end of the first storage unit 127 is electrically connected to the control end of the second driving unit 121; the first end of the second storage unit 128 is connected to the second power supply voltage ELVDD, and the second end of the second storage unit 128 is electrically connected to the control end of the first light-emitting control unit 122; the second end of the light-emitting module 2 is connected to the third power supply voltage ELVSS.

[0059] Specifically, the operation of the pixel circuit within one frame of TF includes stages such as t2-t9.

[0060] In the first stage t1, which is the stage where the previous frame is displayed, the control terminal of the first light-emitting control unit 122 is written with the first power supply voltage VDDW, the first light-emitting control unit 122 is turned off, and the light-emitting module 2 does not emit light.

[0061] In the second stage t2, the third scan signal Gn-2 controls the third initialization unit 126 to be turned on, and then the control terminal of the second drive unit 121 is initialized by the fourth initialization signal Vint4, so that the second drive unit 121 is turned on.

[0062] In the third stage t3, the second scan signal Gn-1 is enabled, controlling the first initialization unit 112 to turn on. Then, the control terminal of the first drive unit 111 is initialized using the second initialization signal Vint2, and the first drive unit 111 turns on. Additionally, the pulse amplitude data writing unit 124 and the third threshold compensation unit 125 are turned on. The first data voltage DataI is written to the control terminal of the second drive unit 121 after passing through the pulse amplitude data writing unit 124, the second drive unit 121, and the third threshold compensation unit 125, completing the threshold compensation for the second drive unit 121. The first storage unit 127 maintains the potential of the second drive unit 121.

[0063] Among them, the second stage t2 to the third stage t3 are the stages before the second data voltage is written to the pixel circuit.

[0064] In the fourth stage t4, which is the second data voltage writing stage, the control module 14 writes the second data voltage Datat into the coupling module 13. Simultaneously, the first threshold compensation unit 113 and the second threshold compensation unit 114 are turned on, and the first power supply voltage VDDW is written to the control terminal of the first drive unit 111, completing the threshold compensation for the first drive unit 111. At this time, the voltages across the coupling module 13 are Datat and VDDW+Vth, respectively, where Vth is the threshold voltage of the first drive unit 111. Therefore, the voltage difference across the coupling module 13 is VDDW+Vth-Datat.

[0065] In the fifth stage t5, the pixel circuits of other pixel rows sequentially undergo the aforementioned stages. After stage t5, the second data voltage writing stage for all pixel circuits within one frame of the display panel is completed.

[0066] In the sixth stage t6, also known as the preset stage, the control module 14 writes a first initialization signal Vint1 to the coupling module 13. The coupling module 13 couples the first initialization signal Vint1 to the control terminal of the first driving unit 111, and the first driving unit 111 is turned on. In the sixth stage t6, the first driving units 111 of all pixel circuits in the display panel are turned on by the first initialization signal Vint1, eliminating the influence of the second data voltage Datat corresponding to other pixel rows on the pixel circuits of this row.

[0067] In stage t7, all row pixel circuits have completed stages 4 and 6. At this time, the voltage on all first signal lines is set to the sweep voltage sweep. The sweep voltage sweep is greater than or equal to the maximum value of all second data voltages Datat. At this time, the control terminal voltage of the first drive unit 111 is sweep + VDDW + Vth - datat.

[0068] In the eighth stage t8, the global control signal set controls the second initialization unit 129 to be turned on, and the third initialization signal Vint3 initializes the control terminal of the first light-emitting control unit 122, so that the first light-emitting control unit 122 is turned on.

[0069] In the ninth stage t9, i.e., the light-emitting stage, the second light-emitting control signal EM1 controls the second light-emitting control unit 123 to turn on, and the light-emitting module 2 starts to emit light. The first light-emitting control signal EM2 controls the turn-off signal writing unit 151 to turn on. The control module 14 writes the sweep voltage sweep to the coupling module 13, and the coupling module 13 couples the sweep voltage sweep to the control terminal of the first driving unit 111. The potential at the control terminal of the first driving unit 111 begins to decrease under the control of the sweep voltage sweep. When the voltage difference between the control terminal and its first terminal is equal to the threshold voltage of the first driving unit 111, the first driving unit 111 turns on, causing the control terminal of the first light-emitting control unit 122 to write the first power supply voltage VDDW, and the first light-emitting control unit 122 turns off, ending the light emission.

[0070] Among them, the fifth stage t5 to the ninth stage t9 are the stages after the second data voltage is written.

[0071] Optionally, continue to refer to Figure 2 The first driving unit 111 includes a first transistor T1, the first end of the first transistor T1 serves as the first end of the first driving unit 111, the second end of the first transistor T1 serves as the second end of the first driving unit 111, and the control end of the first transistor T1 serves as the control end of the first driving unit 111.

[0072] The second driving unit 121 includes a second transistor T2, the first terminal of the second transistor T2 serves as the first terminal of the second driving unit 121, the second terminal of the second transistor T2 serves as the second terminal of the second driving unit 121, and the control terminal of the second transistor T2 serves as the control terminal of the second driving unit 121.

[0073] The first light-emitting control unit 122 includes a third transistor T3. The first terminal of the third transistor T3 serves as the first terminal of the first light-emitting control unit 122, the second terminal of the third transistor T3 serves as the second terminal of the first light-emitting control unit 122, and the control terminal of the third transistor T3 serves as the control terminal of the first light-emitting control unit 122.

[0074] The second light-emitting control unit 123 includes a fourth transistor T4. The first terminal of the fourth transistor T4 serves as the first terminal of the second light-emitting control unit 123, the second terminal of the fourth transistor T4 serves as the second terminal of the second light-emitting control unit 123, and the control terminal of the fourth transistor T4 serves as the control terminal of the second light-emitting control unit 123.

[0075] The pulse amplitude data writing unit 124 includes a fifth transistor T5. The first terminal of the fifth transistor T5 serves as the first terminal of the pulse amplitude data writing unit 124, the second terminal of the fifth transistor T5 serves as the second terminal of the pulse amplitude data writing unit 124, and the control terminal of the fifth transistor T5 serves as the control terminal of the pulse amplitude data writing unit 124.

[0076] The third initialization unit 126 includes a sixth transistor T6. The first terminal of the sixth transistor T6 serves as the first terminal of the third initialization unit 126, the second terminal of the sixth transistor T6 serves as the second terminal of the third initialization unit 126, and the control terminal of the sixth transistor T6 serves as the control terminal of the third initialization unit 126.

[0077] The third threshold compensation unit 125 includes a seventh transistor T7. The first terminal of the seventh transistor T7 serves as the first terminal of the third threshold compensation unit 125, the second terminal of the seventh transistor T7 serves as the second terminal of the third threshold compensation unit 125, and the control terminal of the seventh transistor T7 serves as the control terminal of the third threshold compensation unit 125.

[0078] The second threshold compensation unit 114 includes an eighth transistor T8. The first terminal of the eighth transistor T8 serves as the first terminal of the second threshold compensation unit 114, the second terminal of the eighth transistor T8 serves as the second terminal of the second threshold compensation unit 114, and the control terminal of the eighth transistor T8 serves as the control terminal of the second threshold compensation unit 114.

[0079] The first initialization unit 112 includes a ninth transistor T9. The first terminal of the ninth transistor T9 serves as the first terminal of the first initialization unit 112, the second terminal of the ninth transistor T9 serves as the second terminal of the first initialization unit 112, and the control terminal of the ninth transistor T9 serves as the control terminal of the first initialization unit 112.

[0080] The second initialization unit 129 includes a tenth transistor T10. The first terminal of the tenth transistor T10 serves as the first terminal of the second initialization unit 129, the second terminal of the tenth transistor T10 serves as the second terminal of the second initialization unit 129, and the control terminal of the tenth transistor T10 serves as the control terminal of the second initialization unit 129.

[0081] The first threshold compensation unit 113 includes an eleventh transistor T11. The first terminal of the eleventh transistor T11 serves as the first terminal of the first threshold compensation unit 113, the second terminal of the eleventh transistor T11 serves as the second terminal of the first threshold compensation unit 113, and the control terminal of the eleventh transistor T11 serves as the control terminal of the first threshold compensation unit 113.

[0082] The shutdown signal writing unit 115 includes a twelfth transistor T12. The first terminal of the twelfth transistor T12 serves as the first terminal of the shutdown signal writing unit 115, the second terminal of the twelfth transistor T12 serves as the second terminal of the shutdown signal writing unit 115, and the control terminal of the twelfth transistor T12 serves as the control terminal of the shutdown signal writing unit 115.

[0083] The first storage unit 127 includes a first capacitor C1, with its first end serving as the first terminal of the first storage unit 127 and its second end serving as the second terminal of the first storage unit 127. The second storage unit 128 includes a second capacitor C2, with its first end serving as the first terminal of the second storage unit 128 and its second end serving as the second terminal of the second storage unit 128.

[0084] The transistors mentioned above can be N-type transistors or P-type transistors, but P-type transistors are preferred.

[0085] Optionally, continue to refer to Figure 2 The first end of the control module 14 is electrically connected to the second end of the coupling module 13. The control end of the control module 14 is connected to the control signal CS1. The second end of the control module 14 is electrically connected to the first data line. The first data line is used to write the second data voltage Datat and the first initialization signal Vint1 to the control module 14. The control signal CS1 is used to control the conduction state of the control module 14.

[0086] Specifically, the coupling module 13 includes a third capacitor C3. The first end of the third capacitor C3 serves as the first end of the coupling module 13, and the second end of the third capacitor C3 serves as the second end of the coupling module 13. During the second data voltage writing stage, i.e., the fourth stage t4, the control signal CS1 controls the control module 14 to turn on. At this time, the second data voltage Datat corresponding to the pixel circuit can be written into the coupling module 13, and then coupled to the control terminal of the first driving unit 111. Before the second data voltage writing stage, i.e., from the first stage t1 to the third stage t3, the control signal CS1 controls the control module 14 to turn off, isolating the signal transmission path between the coupling module 13 and the first data line, thereby avoiding the influence of the second data voltage Datat corresponding to each pixel row preceding the pixel row (within a frame scanning order) on the pixel circuit. In the sixth stage t6, which is the preset stage, the control signal CS1 controls the control module 14 to be turned on, and at this time, the first initialization signal Vint1 is transmitted on the first data line. The first initialization signal Vint1 is written into the first terminal of the coupling module 13 and further coupled to the control terminal of the first driving unit 111 to complete the initialization of the first driving unit 111, thereby avoiding the influence of the second data voltage Datat corresponding to each pixel row after the pixel row where the pixel circuit is located (in the scanning order within a frame) on the pixel circuit.

[0087] Optionally, Figure 4 This is a schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention, with reference to... Figure 4 The control module 14 includes a control transistor T13, the first terminal of the control transistor T13 serves as the first terminal of the control module 14, the second terminal of the control transistor T13 serves as the second terminal of the control module 14, and the control terminal of the control transistor T13 serves as the control terminal of the control module 14.

[0088] Specifically, the control transistor T13 can be an N-type transistor or a P-type transistor, preferably a P-type transistor. In this embodiment, the function of the control module 14 can be realized with a single transistor. The circuit structure is simple, and the number of components required is small, which helps to reduce the cost of the pixel circuit and the area required by the pixel circuit, thereby increasing the pixel density of the display panel.

[0089] Optionally, the post-second data voltage writing stage includes a row data writing stage, a preset stage, and a light emission stage; the preset stage is located between the row data writing stage and the light emission stage; the control module 14 is used to turn off in the pre-second data voltage writing stage and turn on in the second data voltage writing stage and the post-second data voltage writing stage; wherein, the control module 14 is used to write the second data voltage Datat to the coupling module 13 in the second data voltage writing stage and to write a sweep frequency voltage to the coupling module 13 in the light emission stage.

[0090] Specifically, in this embodiment, within one frame, the control module 14 is turned on during both the second data voltage writing phase and the second data voltage writing post-phase, and turned off during the second data voltage writing pre-phase. After the second data voltage writing phase, i.e., after the fourth phase t4, the second data voltage writing post-phase includes the other row data writing phase (i.e., the fifth phase t5), the preset phase (i.e., the sixth phase t6), the seventh phase t7, the eighth phase t8, and the light emission phase (i.e., the ninth phase t9). The control module is turned on both during and after the second data voltage writing phase. This configuration reduces the number of transitions in the control signal CS1 controlling the on / off state of the control module within one frame, making the transmitted signal less susceptible to interference. It should be noted that during the other row data writing phase, i.e., the fifth phase t5, the control module 14 is turned on. At this time, the second data voltage Datat on the first data line is written to the control terminal of the first driving unit 111 in the pixel circuit, causing the first driving unit 111 to be in a biased state. However, by setting a preset phase and initializing the first driving unit 111 during the preset phase, the influence of the second data voltage of other pixel rows on the pixel circuit of this pixel row can be eliminated.

[0091] Optionally, the first initialization signal is the second data voltage Datat corresponding to a preset gray level.

[0092] Specifically, the light-emitting module 2 has multiple gray levels, and each second data voltage Datat transmitted on the first data line corresponds to a gray level. In this example, the first initialization signal Vint1 needs to control the first driving unit 111 to turn on, and each second data voltage Datat can control the first driving unit 111 to turn on. Furthermore, the voltage range transmitted on the first data line is close to the range corresponding to the second data voltage Datat. Therefore, setting the first initialization signal to the second data voltage Datat corresponding to the preset gray level eliminates the need to transmit additional voltage to the first data line, making it easier to implement. The preset gray level can be, for example, the lowest gray level, the highest gray level, or an intermediate gray level. In addition, the duration of the sixth stage t6 can be determined based on the preset gray level. If the voltage value corresponding to the preset gray level is low, the duration of the sixth stage t6 can be set to be shorter; while if the voltage value corresponding to the preset gray level is high, the duration of the sixth stage t6 needs to be set to be longer to ensure that the first driving unit 111 can be fully initialized.

[0093] Optionally, refer to Figure 2 and Figure 3The preset stage is located after the conduction stage of the second initialization unit 129. Specifically, the conduction stage of the second initialization unit 129 is also the eighth stage t8. The eighth stage t8 is also located between the fifth stage t5 and the ninth stage t9, and the first light-emitting control unit 122 needs to be turned on in the eighth stage t8. In this embodiment, the sixth stage t6 is set before the eighth stage t8, which can ensure that the first light-emitting control unit 122 can be turned on by the second initialization unit 129 before the light-emitting stage. Conversely, if the sixth stage t6 is set between the eighth stage t8 and the light-emitting stage, the first light-emitting control unit 122 may not be able to be turned on in the light-emitting stage.

[0094] The present invention also provides a display panel, such as Figure 5 As shown, Figure 5 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention, with reference to... Figure 5 The display panel includes multiple pixel circuits PX as described in any embodiment of the present invention. The pixel circuits are arranged in an array, and the pixel circuits PX in the same row share a control signal line, wherein the control signal line is used to provide a control signal CS1.

[0095] refer to Figure 6 , Figure 6 This is a timing diagram of a display panel provided in an embodiment of the present invention. Figure 6 The diagram only illustrates the relationship between the control signals CS1 corresponding to all pixel rows within a single frame. For example... Figure 6 As shown, the control signal CS1(1) corresponding to the first row of pixel circuits changes first; after the fourth stage t4 of the first row of pixel circuits ends, the control signal CS1(2) corresponding to the second row of pixel circuits changes; after the fourth stage t4 of the second row of pixel circuits ends, the control signal CS1(3) corresponding to the third row of pixel circuits changes; the display panel has a total of n rows of pixel circuits, so after the fourth stage t4 corresponding to the nth row of pixel circuits ends, the fifth stage t5 corresponding to all row of pixel circuits ends, and then all row of pixel circuits enter the sixth stage t6.

[0096] In this embodiment, the display panel includes the pixel circuit provided in any embodiment of the present invention. The display panel 70 can be a display panel on a mobile phone, tablet computer, MP3 player, MP4 player, smartwatch, in-vehicle display, smart helmet, or other wearable device. Since the display panel provided in the embodiment of the present invention includes the pixel circuit provided in the embodiment of the present invention, it also has the same beneficial effects, which will not be described again here.

[0097] This invention also provides a method for driving pixel circuits, such as... Figure 7 As shown, Figure 7This is a flowchart illustrating a pixel circuit driving method provided in an embodiment of the present invention. The pixel circuit driving method is used to drive the pixel circuit provided in any embodiment of the present invention, and the pixel circuit driving method includes:

[0098] Step S110: Before the second data voltage writing stage within a frame, the control module is turned off;

[0099] Step S120: The control module is turned on during the second data voltage writing phase within a frame and the preset phase after all second data voltages are written within a frame and before the light emission phase; wherein, during the preset phase, the control module writes a first initialization signal to the second end of the coupling module.

[0100] Specifically, before the second data voltage is written to this pixel row, the control module 14 for this pixel row is turned off. At this time, the second data voltage Datat corresponding to the pixel circuits of other pixel rows transmitted on the first data line will not be transmitted to the coupling module 13 of this pixel row, thus eliminating the influence of the second data voltage Datat corresponding to the pixel row whose scan time is before this pixel row within one frame. During the second data voltage writing stage of this pixel row, the control module 14 is turned on, enabling the second data voltage Datat to be normally written to the pulse width modulation module 11 of this pixel row. After the second data voltage writing stage of this pixel row and before the light emission stage, there may be other second data voltage writing stages corresponding to other pixel rows. Therefore, in the preset stage after all the second data voltages are written within a frame and before the light emission stage (i.e., after all the second data voltages of all pixel rows on the display panel are written within a frame and before the light emission stage), a first initialization signal Vint1 is written to the coupling module 13. The corresponding transistors in the pulse width modulation module 11 are turned on, making the bias state of the corresponding transistors in the pixel circuits of all pixel rows in the display panel the same. This eliminates the influence of the second data voltage Datat corresponding to the pixel row whose scan time is after this pixel row on this pixel row within a frame. In summary, the pixel circuit of this embodiment can eliminate the influence of the second data voltage Datat of other pixel rows on this pixel row, thereby greatly improving the performance of the pixel circuit.

[0101] The pixel circuit driving method of this embodiment, in the stage before the second data voltage of the current pixel row is written, shuts down the control module of the current pixel row, which can eliminate the influence of the second data voltage corresponding to the pixel row whose scan time is before the current pixel row within one frame on the current pixel row. In a preset stage after the second data voltage of all pixel rows of the display panel is written within one frame and before the light emission stage, a first initialization signal is written to the coupling module, thereby eliminating the influence of the second data voltage corresponding to the pixel row whose scan time is after the current pixel row within one frame on the current pixel row. Therefore, the performance of the pixel circuit can be greatly improved.

[0102] Optionally, in the preset phase, the control module writes a first initialization signal to the second end of the coupling module, including:

[0103] The first initialization signal is written to the first terminal of the control module, wherein the first initialization signal is the second data voltage corresponding to the preset gray level.

[0104] Specifically, the light-emitting module 2 has multiple gray levels, and each second data voltage Datat transmitted on the first data line corresponds to a gray level. In this example, the first initialization signal Vint1 needs to control the first driving unit 111 to turn on, and each second data voltage Datat can control the first driving unit 111 to turn on. Furthermore, the voltage range transmitted on the first data line is close to the range corresponding to the second data voltage Datat. Therefore, setting the first initialization signal to the second data voltage Datat corresponding to the preset gray level eliminates the need to transmit additional voltage to the first data line, making it easier to implement. The preset gray level can be, for example, the lowest gray level, the highest gray level, or an intermediate gray level. In addition, the duration of the sixth stage t6 can be determined based on the preset gray level. If the voltage value corresponding to the preset gray level is low, the duration of the sixth stage t6 can be set to be shorter; while if the voltage value corresponding to the preset gray level is high, the duration of the sixth stage t6 needs to be set to be longer to ensure that the first driving unit 111 can be fully initialized.

[0105] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0106] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A pixel circuit, characterized in that, The pixel circuit includes a pixel driving circuit and a light-emitting module. The pixel driving circuit is used to generate a driving current, and the light-emitting module is used to emit light in response to the driving current. The pixel driving circuit includes: a pulse width modulation module, a pulse amplitude modulation module, a coupling module, and a control module; The pulse amplitude modulation module is electrically connected to the light-emitting module and is used to control the amplitude of the driving current according to the first data voltage; the pulse width modulation module is electrically connected to the pulse amplitude modulation module and is used to control the pulse width of the driving current according to the second data voltage. The first end of the coupling module is electrically connected to the pulse width modulation module, and is used to couple the second data voltage to the pulse width modulation module; The control module is electrically connected to the second end of the coupling module. The control module is used to write the second data voltage into the coupling module, turn off the second data voltage writing stage within a frame, and write the first initialization signal into the coupling module in a preset stage after all second data voltage writing stages and before the light emission stage within a frame.

2. The pixel circuit according to claim 1, characterized in that, The pixel circuit includes a pre-writing stage, a writing stage, and a post-writing stage within one frame; the post-writing stage includes a row writing stage, the preset stage, and a light emission stage; the preset stage is located between the row writing stage and the light emission stage. Preferably, the control module is used to turn off before the second data voltage is written, and turn on during the second data voltage writing stage and after the second data voltage is written. The control module is used to write the second data voltage to the coupling module during the second data voltage writing phase, and to write a sweep frequency voltage to the coupling module during the light emission phase.

3. The pixel circuit according to claim 1, characterized in that, The first initialization signal is the second data voltage corresponding to the preset gray level.

4. The pixel circuit according to claim 1, characterized in that, The first end of the control module is electrically connected to the second end of the coupling module, the control end of the control module receives a control signal, and the second end of the control module is electrically connected to the first data line; The first data line is used to write the second data voltage and the first initialization signal to the control module; the control signal is used to control the conduction state of the control module. Preferably, the control module includes a control transistor, wherein a first terminal of the control transistor serves as a first terminal of the control module, a second terminal of the control transistor serves as a second terminal of the control module, and a control terminal of the control transistor serves as a control terminal of the control module.

5. The pixel circuit according to claim 1, characterized in that, The pulse width modulation module includes a first initialization unit, a first threshold compensation unit, a second threshold compensation unit, a first driving unit, and a shutdown signal writing unit. The first terminal of the first initialization unit is connected to the second initialization signal, the second terminal of the first initialization unit is electrically connected to the control terminal of the first driving unit, and the control terminal of the first initialization unit is connected to the second scan signal. The first terminal of the first threshold compensation unit is connected to the first power supply voltage, the second terminal of the first threshold compensation unit is electrically connected to the first terminal of the first driving unit, and the control terminal of the first threshold compensation unit is connected to the first scan signal. The first end of the second threshold compensation unit is electrically connected to the first end of the first driving unit, the second end of the second threshold compensation unit is electrically connected to the control end of the first driving unit, and the control end of the second threshold compensation unit is connected to the first scanning signal. The first terminal of the shutdown signal writing unit is connected to the first power supply voltage, the second terminal of the shutdown signal writing unit is electrically connected to the first terminal of the first driving unit, and the control terminal of the shutdown signal writing unit is connected to the first light emission control signal.

6. The pixel circuit according to claim 5, characterized in that, The pulse amplitude modulation module includes: a first light-emitting control unit, a second driving unit, a second light-emitting control unit, a pulse amplitude data writing unit, a third threshold compensation unit, a second initialization unit, a third initialization unit, a first storage unit, and a second storage unit; The first terminal of the first light-emitting control unit is connected to the second power supply voltage, the second terminal of the first light-emitting control unit is electrically connected to the first terminal of the second driving unit, and the control terminal of the first light-emitting control unit is electrically connected to the second terminal of the first driving unit. The first end of the second light-emitting control unit is electrically connected to the second end of the second driving unit, the second end of the second light-emitting control unit is electrically connected to the first end of the light-emitting module, and the control end of the second light-emitting control unit is connected to the second light-emitting control signal; The first terminal of the pulse amplitude data writing unit is connected to the second data voltage, the second terminal of the pulse amplitude data writing unit is electrically connected to the first terminal of the second driving unit, and the control terminal of the pulse amplitude data writing unit is connected to the second scanning signal. The first end of the third threshold compensation unit is electrically connected to the second end of the second driving unit, the second end of the third threshold compensation unit is electrically connected to the control end of the second driving unit, and the control end of the third threshold compensation unit is connected to the second scanning signal; The first terminal of the second initialization unit is connected to the third initialization signal, the second terminal of the second initialization unit is electrically connected to the control terminal of the first light-emitting control unit, and the control terminal of the second initialization unit is connected to the global control signal; The first end of the third initialization unit is connected to the fourth initialization signal, the second end of the third initialization unit is electrically connected to the control end of the second driving unit, and the control end of the third initialization unit is connected to the third scan signal; The first end of the first storage unit is connected to the second power supply voltage, and the second end of the first storage unit is electrically connected to the control terminal of the second driving unit; the first end of the second storage unit is connected to the second power supply voltage, and the second end of the second storage unit is electrically connected to the control terminal of the first light-emitting control unit; the second end of the light-emitting module is connected to the third power supply voltage.

7. The pixel circuit according to claim 6, characterized in that, Within a frame, the preset phase is located before the conduction phase of the second initialization unit.

8. A method for driving a pixel circuit, used to drive the pixel circuit according to any one of claims 1-7, characterized in that, The driving method for the pixel circuit includes: Before the second data voltage writing phase within a frame, the control module is controlled to shut down; The control module is turned on during the second data voltage writing phase within a frame and during a preset phase after all second data voltages are written within a frame and before the light emission phase. In the preset stage, the control module is controlled to write the first initialization signal to the second end of the coupling module.

9. The driving method for a pixel circuit according to claim 8, characterized in that, In the preset stage, controlling the control module to write the first initialization signal to the second end of the coupling module includes: The first initialization signal is written to the first terminal of the control module, wherein the first initialization signal is the second data voltage corresponding to the preset gray level.

10. A display panel, characterized in that, The display panel includes a plurality of pixel circuits as described in any one of claims 1-8.

Images