Resource allocation method, device, storage medium and computer program product
By dynamically scheduling test resources based on test progress and priority, the problem of test sites queuing in chip testing is solved, thereby improving test efficiency and overall test time.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI OPTICAL COMMUNICATIONS CORP
- Filing Date
- 2024-12-18
- Publication Date
- 2026-06-19
AI Technical Summary
During chip testing, the significant differences in testing time for different test sites lead to substantial waste of testing time and long queues at test sites.
By dynamically scheduling test resources based on the test progress and priority of test sites, including independent resources, shared resources, and test thread-based resources, the test needs of high-priority test sites are prioritized.
This effectively avoids or shortens the queuing time for test sites, improving testing efficiency and the overall chip testing completion time.
Smart Images
Figure CN122240289A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of chip technology, and in particular to resource allocation methods, devices, storage media, and computer program products. Background Technology
[0002] After semiconductor chips are manufactured, they need to be tested using automated test equipment (ATE). However, during the testing process, the testing time for different test sites varies greatly, resulting in queuing of test sites and significant waste of testing time. Summary of the Invention
[0003] In one aspect, this embodiment provides a resource allocation method, the method comprising: determining the priority of one or more test sites based on the test progress of one or more test sites; and determining test resources for one or more test sites based on the priority.
[0004] In this embodiment of the disclosure, the resource allocation method further includes: determining the test progress based on the test time already tested at the test site and the total test time required.
[0005] In this embodiment of the disclosure, determining test resources for one or more test sites based on priority includes: determining the type of test resources required for one or more test sites; and determining the test resources for one or more test sites based on the type of test resources.
[0006] In this embodiment of the disclosure, determining test resources for one or more test sites based on the type of test resources includes: in response to the test resource type for one or more test sites being a first resource type, determining test resources to test the test sites; wherein the first resource type includes independent resource types.
[0007] In this embodiment of the disclosure, determining test resources for one or more test sites based on the type of test resources includes: in response to the test resource type being a second resource type, determining whether the priority of the test site is the highest priority; and in response to the test site priority being the highest priority, determining that the test resource tests the test resource; wherein the second resource type includes a shared resource type.
[0008] In this embodiment of the disclosure, determining test resources for one or more test sites based on the type of test resources includes: in response to the test resource type for one or more test sites being a third resource type, allocating test resources to test the test sites based on the priority of the test sites; wherein the third resource type includes resource types based on test threads.
[0009] In this embodiment of the disclosure, the resource allocation method further includes: receiving test information of one or more test sites; wherein the test information includes at least the identifier of the test site and the test progress of the test site.
[0010] On the other hand, embodiments of this disclosure provide a resource allocation device, including: a memory for storing computer-readable instructions; and a processor for executing the computer-readable instructions, causing the resource allocation device to perform the resource allocation method.
[0011] In another aspect, embodiments of this disclosure provide a non-transitory computer-readable storage medium for storing computer-readable instructions that, when executed by a processor, cause the processor to perform a resource allocation method.
[0012] In another aspect, embodiments of this disclosure provide a computer program product, including a computer program that, when executed by a processor, implements the above-described resource allocation method. Attached Figure Description
[0013] The above and other objects, features, and advantages of this disclosure will become more apparent from the more detailed description of the embodiments thereof in conjunction with the accompanying drawings. The drawings are provided to further illustrate the embodiments of this disclosure and form part of the specification. They are used together with the embodiments of this disclosure to explain the disclosure and do not constitute a limitation thereof. In the drawings, the same reference numerals generally represent the same components or steps.
[0014] Figure 1 The schematic diagram illustrates an environmental application according to an embodiment of the present disclosure.
[0015] Figure 2 A flowchart illustrating a resource allocation method according to an embodiment of the present disclosure is shown.
[0016] Figure 3 A flowchart illustrating another resource allocation method according to an embodiment of the present disclosure is shown.
[0017] Figure 4a The diagram illustrates a resource allocation method.
[0018] Figure 4b The diagram illustrates a resource allocation method according to an embodiment of the present disclosure.
[0019] Figure 5a The diagram illustrates another method of resource allocation.
[0020] Figure 5b The diagram illustrates another resource allocation method according to an embodiment of the present disclosure.
[0021] Figure 6 A schematic diagram illustrating another resource allocation method according to an embodiment of the present disclosure is shown.
[0022] Figure 7 A block diagram illustrating a resource allocation device according to an embodiment of the present disclosure is shown schematically.
[0023] Figure 8 A block diagram illustrating a non-transitory computer-readable storage medium according to an embodiment of the present disclosure is shown.
[0024] Figure 9 A block diagram illustrating a computer program product according to an embodiment of the present disclosure is shown schematically. Detailed Implementation
[0025] To make the objectives, technical solutions, and advantages of this disclosure more apparent, exemplary embodiments according to this disclosure will now be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of this disclosure, and not all embodiments of this disclosure. It should be understood that this disclosure is not limited to the exemplary embodiments described herein.
[0026] Figure 1 The schematic diagram illustrates an environmental application according to an embodiment of the present disclosure.
[0027] like Figure 1 As shown, the chip tester 100 can test multiple chips. For example, the chip tester 100 can send input stimuli to multiple test chips, receive output feedback, or perform data analysis.
[0028] The chip tester 100 may include a test system or a field-programmable gate array (FPGA). The chip tester 100 may also be an automated test equipment (ATE), etc.
[0029] In this embodiment, the chip tester can perform parallel testing on multiple test sites simultaneously. Each test site has its own independent test thread. When a test site completes a test item, the test thread of that test site can send relevant test data to the FPGA or the tester's operating system, which can then perform corresponding operations based on that test data.
[0030] In some embodiments, one test site can correspond to one chip, meaning the chip tester can perform parallel testing on multiple chips simultaneously. When a chip corresponding to a test site completes a test item, the test thread of that test site can send relevant test data for that chip to the FPGA or the tester's operating system. For example, the test thread of that test site can send the chip's test progress and chip label, etc., to the FPGA or the tester's operating system. The FPGA or the tester's operating system can then perform corresponding operations based on this test data.
[0031] In some embodiments, a test site may correspond to multiple chips. When all chips corresponding to a test site have completed a test item, the test thread of that test site can send the relevant test data of that test site to the FPGA or the test machine operating system.
[0032] For example, the test thread corresponding to a test point determines the test progress of the test point based on the test time of the test point, and sends relevant data about the test progress to the FPGA or test machine operating system. The FPGA or test machine operating system can receive the relevant data about the test progress sent by the test thread corresponding to the test point. The FPGA or test machine operating system can determine the priority of the test point based on the test progress. The FPGA or test machine operating system can also schedule the test resources required for the next test of the test point based on the priority of the test point.
[0033] Figure 2 A flowchart illustrating a resource allocation method according to an embodiment of the present disclosure is shown.
[0034] like Figure 2 As shown, the resource allocation method of this disclosure embodiment includes steps S201 and S202:
[0035] S201. Based on the testing progress of one or more test sites, determine the priority of one or more test sites.
[0036] In this embodiment, when the test machine FPGA supports receiving test progress information about test points sent by the test threads, the FPGA can receive the test progress of the test points. This avoids communication between the test threads corresponding to each test point and the test machine operating system, thus avoiding unnecessary communication time. It also avoids the inefficiency caused by communication between test threads to determine their priorities. If the test machine FPGA does not have the capability to receive test progress information about test points, the test threads corresponding to each test point can send the test progress of the test points to the test machine operating system.
[0037] In this embodiment of the disclosure, the testing progress of one or more test sites can be the ratio of the number of test items already completed at the test site to the total number of test items that need to be completed. The testing progress of one or more test sites can also be the ratio of the testing time already completed at the test site to the total testing time required. Furthermore, the testing progress of one or more test sites can be determined based on the weight of the test items that need to be completed at the test site. For example, if a certain test item has a large weight, then when a test site completes that test item, the testing progress will advance significantly. Conversely, if a certain test item has a small weight, then when a test site completes that test item, the testing progress will remain almost unchanged. And so on.
[0038] In this embodiment of the disclosure, the faster the testing progress of a test site, the higher its priority can be determined. For example, to shorten the fastest test completion time, the test site with the fastest testing progress can be set to the highest priority, thereby ensuring that the test site completes the test in the shortest time. In some embodiments, the slower the testing progress, the higher the priority of the test site can be determined, thereby enabling the overall completion time of multiple test sites to be shortened.
[0039] S202. Based on priority, determine the test resources for one or more test sites.
[0040] In this embodiment of the disclosure, based on the current priority of each test site, the test requirements of test sites with higher priority are prioritized, and the required test resources are scheduled for their next test. For example, based on the current priorities of one or more test sites, if test site A is determined to have the first priority, test site B to have the second priority, and test site C to have the third priority, then the test resources required for test site A in the next test can be determined first. Based on the test resources required for test site A in the next test, the FPGA or test machine operating system schedules those test resources to perform the next test on test site A.
[0041] According to the embodiments of this disclosure, the priority of each test site is determined based on the testing progress. Based on the priority of the test sites, a scheduling method for test resources is determined, thereby dynamically scheduling test resources to test the test sites. This avoids or shortens the queuing time for each test site, improving the testing efficiency of the test sites.
[0042] In this embodiment of the disclosure, the resource allocation method further includes: determining the test progress based on the test time already tested at the test site and the total test time required.
[0043] For example, when the first test is completed at a certain test site, the corresponding test thread can determine the progress of that test site based on the time it took to complete the first test and the total required test time. For instance, if the first test takes 2 minutes to complete and the total required test time is 10 minutes, the test progress of that test site is 20%. The corresponding test thread can then send the identifier of that test site and its 20% progress to the FPGA or test machine operating system. Based on this 20% progress, the FPGA or test machine operating system will schedule test resources for that test site to perform the next test. If the test site then completes the second test in 2 minutes, the test progress of that test site is now 40%.
[0044] In this embodiment of the disclosure, since the testing time for each test item varies greatly, the testing progress of each test site is set as the ratio of the current completion time of the test site to the total testing time required for the test site, thereby ensuring the accuracy of the testing progress.
[0045] Figure 3 A flowchart illustrating another resource allocation method according to an embodiment of the present disclosure is shown.
[0046] like Figure 3 As shown, this embodiment of the disclosure determines test resources for one or more test sites based on priority, including steps S301 and S302:
[0047] S301. Determine the type of test resources required for one or more test sites.
[0048] In this embodiment of the disclosure, the FPGA or test machine operating system can determine the priority of each test site based on the test progress of the test site. The slower the test progress of a test site, the higher the priority of that test site.
[0049] In this embodiment of the disclosure, after determining the priority of each test site, the FPGA or test machine operating system can sort each test site according to its priority. Simultaneously, the FPGA or test machine operating system can also determine the test resources required for each test site to perform the next test, and determine the type of such test resources.
[0050] In this embodiment of the disclosure, test resources may include a per-pin power management unit (PMU), a vector generator, a power management unit (PMU), a digital power supply (DPS), I / O, a CPU, and so on.
[0051] In this embodiment of the disclosure, the type of test resource can be categorized based on whether it can perform parallel testing on multiple test sites, such as independent resource type, shared resource type, and test thread-based resource type, etc. In some embodiments, the type of test resource can also be categorized based on other classification criteria, which are not limited here, for example, into data processing type, data acquisition type, etc.
[0052] S302. Based on the type of test resource, determine the test resources used for one or more test sites.
[0053] In this embodiment of the disclosure, determining test resources for one or more test sites based on the type of test resources includes: in response to the test resource type for one or more test sites being a first resource type, determining test resources to test the test sites; wherein the first resource type includes independent resource types.
[0054] In embodiments of this disclosure, the first resource type can be an independent resource type. An independent resource type refers to a test resource that is used independently by the test site and does not need to be shared with other test sites, thus eliminating scheduling issues. For example, a per-pin PMU can individually power and manage each pin of the test site. Another example is a vector generator that can generate a specific sequence of electrical signals for the test site.
[0055] In this embodiment of the disclosure, when the type of test resource required for the next test at a test site is a first resource type, the FPGA or test machine operating system can schedule the test resources required for the test site to perform the next test at the test site.
[0056] For example, test site A currently has the highest priority, test site B has the highest priority, and test site C has the highest priority. The FPGA or test machine operating system can determine the test resources required for the next test of test sites A, B, and C, and simultaneously determine the type of each test resource. For example, if the test resource required for the next test of test sites B and C is determined to be a Per-pin PMU, which is an independent resource type, then based on this independent resource type, the FPGA or test machine operating system can schedule the Per-pin PMUs corresponding to test sites B and C to perform the next test on test sites B and C.
[0057] In this embodiment of the disclosure, determining test resources for one or more test sites based on the type of test resources includes: in response to the test resource type being a second resource type, determining whether the priority of the test site is the highest priority; and in response to the test site priority being the highest priority, determining that the test resource tests the test resource; wherein the second resource type includes a shared resource type.
[0058] In this embodiment of the disclosure, the second resource type can be a shared resource type. A shared resource type means that the test resource can be shared by multiple test sites, and used by one test site at a time. For example, when one test site uses the test resource, another test site that also needs to use the test resource must wait until the current test site completes its test before it can use the test resource. Test resources of the shared resource type can be PMU, DPS, etc.
[0059] In this embodiment of the disclosure, if the type of test resource required for the next test at a test site is a shared resource type, it can be determined whether the test site has the highest priority. For example, if the test resource required for the next test at test sites A and B is a PMU, and the type of the PMU is a shared resource type, then it can be determined whether test site A has the highest priority, and whether test site B has the highest priority.
[0060] In this embodiment of the disclosure, the test resources required for scheduling test sites are used to perform the next test on the highest priority test site.
[0061] In this embodiment of the disclosure, "highest priority" can refer to the highest priority across the entire range of test sites. Alternatively, "highest priority" can refer to the highest priority among multiple test sites that require the same test resource.
[0062] For example, the FPGA or test machine operating system receives test progress data for multiple test sites sent by the test threads corresponding to the test sites. Based on the test progress of each test site, the FPGA or test machine operating system determines the priority of each test site and sorts them. For example, if there are test progress data for 5 test sites, the priority of each test site is determined based on these 5 test progress data. For example, test site A is determined to have the first priority, test site B the second priority, test site C the third priority, test site D the fourth priority, and test site E the fifth priority. This allows the determination of the test resources and their types required for each test site to perform the next test.
[0063] For example, if the test resources required for test sites A and B are determined to be DPS (Data Point Service), and the type is shared resource, then it can be determined whether test site A has the highest priority, and whether test site B has the highest priority. If test site A has the highest priority, the DPS is scheduled to perform the next test on test site A first, and test site B can continue to wait.
[0064] Alternatively, if the required test resources for test sites B, C, and E are determined to be DPS (Data Service Points) of shared resource type, then the highest priority can be determined within the range of test sites B, C, and E. Based on the priorities of test sites B, C, and E, test site B, with the highest priority, can be determined as the highest priority. Therefore, if test site B is determined to be the highest priority, the DPS will prioritize performing the next test on test site B, while test sites C and E can continue to wait.
[0065] Through the embodiments of this disclosure, when the test resources required for a test point are of the shared resource type, the test order of the test points can be determined based on their priority. This allows test points with slower testing progress to jump the queue, thereby reducing their waiting time and ultimately shortening the overall chip testing time.
[0066] Figure 4a The diagram illustrates a resource allocation method.
[0067] like Figure 4a As shown, the horizontal axis represents test time. The diagram schematically illustrates two different types of test resources: independent test resources and shared test resources. Test sites 1, 2, and 3 require four tests.
[0068] As shown in the diagram, as time progresses, test site 1 begins testing. Since the first test requires a shared test resource, test site 2 must wait for test site 1 to complete the first test before it can begin its own. Test site 1 then proceeds to the second and third tests. Because the second test requires an independent test resource, test site 2 can begin the second test immediately after the first. This process continues, resulting in a waiting period between the second and third tests for test site 2. When test site 2 prepares to begin the third test, test site 3 begins its first test. Since the scheduling of test resources is based on the order of test sites, test resources are prioritized for test site 2, which has a higher priority, leading to the waiting time (represented by dashed lines) in the testing time of test site 3.
[0069] Figure 4b The diagram illustrates a resource allocation method according to an embodiment of the present disclosure.
[0070] like Figure 4b As shown, with Figure 4a The content is consistent, with the horizontal axis representing the test time. Figure 4b The diagram illustrates two different types of test resources: independent test resources and shared test resources. Test sites 1, 2, and 3 require four tests. (See reference...) Figure 4a The description, Figure 4b The first, second, and third tests for test site 1, as well as the first and second tests for test site 2, will not be elaborated upon here.
[0071] like Figure 4b As shown, when test site 2 is about to start the third test, test site 3 starts the first test. Based on the resource allocation method of this embodiment, the FPGA or test machine operating system can determine the test resources for testing based on the priority of test site 2 and test site 3. Since the test progress of test site 3 is slower than that of test site 2, the priority of test site 3 is higher than that of test site 2. Therefore, it can be seen from... Figure 4b As can be seen, the FPGA or test machine operating system prioritizes scheduling test resources to test site 3 so that test site 3 can complete the first test. Only after test site 3 completes the first test does test site 2 begin the third test.
[0072] according to Figure 4a and Figure 4b As can be seen from the embodiments of this disclosure, the FPGA or test machine operating system can dynamically schedule shared test resources according to the test progress of each test point. This can shorten the overall test time and improve efficiency.
[0073] In this embodiment of the disclosure, determining test resources for one or more test sites based on the type of test resources includes: in response to the test resource type for one or more test sites being a third resource type, allocating test resources to test the test sites based on the priority of the test sites; wherein the third resource type includes resource types based on test threads.
[0074] In this embodiment of the disclosure, the test resources corresponding to the third resource type can process multiple test sites in parallel, allowing simultaneous testing of multiple test sites. The third resource type includes resource types based on test threads, and the corresponding test resources can be CPU resources.
[0075] In this embodiment of the disclosure, if the type of test resource required for the next test at a test site is determined to be a test thread-based resource type, a test thread-based resource type can be allocated to each test site based on the priority of one or more test sites to perform the next test.
[0076] In this embodiment, test sites with higher priority can be allocated more test resources based on test threads. For example, higher priority means slower test progress, allowing for the allocation of more CPU resources and thus shortening the test time for that test site. Alternatively, when the test progress of two test sites is the same, the FPGA or test machine operating system can determine the priority of the two test sites based on the time required for the two test sites to perform calculations using CPU resources. For example, if the test progress of test sites A and B is both 20%, and test site A takes 2 minutes to perform calculations using CPU resources while test site B takes 1 minute, then the FPGA or test machine operating system can determine test site A as the first priority and test site B as the second priority. The time required for the test site to perform calculations using CPU resources can be determined based on factors such as the type of test item and the data obtained upon completion of the test.
[0077] Figure 5a The diagram illustrates another method of resource allocation.
[0078] like Figure 5a As shown, the horizontal axis represents the test time. Test site 1 starts executing the first test first. After test site 1 completes the first test, the FPGA or test machine operating system needs to call CPU resources to perform the second test on test site 1. For example, the FPGA or test machine operating system calls CPU resources to calculate and analyze the data obtained from the first test on test site 1. Furthermore, as... Figure 5a As shown, test site 2 also has a similar testing process to test site 1, which will not be described in detail here.
[0079] like Figure 5a As shown, when test site 1 is executing the first test, test site 2 also begins executing the first test. At this time, the test resources required for the first test can be of an independent resource type. Then, test site 1 completes the first test and begins to use CPU resources to calculate and analyze the data obtained from the first test. While the CPU resources are analyzing the data from test site 1, test site 2 completes the first test and needs to use CPU resources to calculate and analyze the data obtained from the first test. At this time, the CPU can allocate CPU resources to analyze and calculate the data from test site 1 and test site 2 according to their order of execution. For example... Figure 5a As shown.
[0080] Figure 5b The diagram illustrates another resource allocation method according to an embodiment of the present disclosure.
[0081] like Figure 5b As shown, the test items performed at test site 1 and test site 2 are the same as those at test site 2. Figure 5a Similar to the case in China, I will not elaborate further here. From Figure 5b As can be seen, while the CPU resources are analyzing the data at test site 1, test site 2 completes its first test. At this point, CPU resources need to be called to perform calculations and analysis on the data obtained from the first test at test site 2. According to the resource allocation method of this embodiment, the independent test thread of test site 2 can send the test progress of test site 2 to the FPGA or test machine operating system. Based on the test progress of test site 2, the FPGA or test machine operating system can determine that the priority of test site 2 is higher than that of test site 1. Therefore, the FPGA or test machine operating system allocates more CPU resources to test site 2 so that test site 2 can complete the analysis and calculation faster. Although the time for test site 1 to process data using CPU resources increases, the overall test time is reduced because the processing time of test site 2 is significantly reduced.
[0082] Through the embodiments of this disclosure, when the type of test resource required for the next item at a test site is a test thread-based resource type, more test thread-based test resources can be allocated to test sites with higher priority based on the priority of the test sites. This makes the test times of multiple test sites tend to be the same, thereby shortening the overall processing time.
[0083] Through the embodiments of this disclosure, different scheduling methods are determined based on the type of test resources required for the next test at the test site. This allows for dynamic adjustment of the test site testing order, thereby reducing unnecessary queuing time and improving testing efficiency.
[0084] In this embodiment of the disclosure, the resource allocation method further includes: receiving test information of one or more test sites; wherein the test information includes at least the identifier of the test site and the test progress of the test site.
[0085] In this embodiment, the FPGA or test machine operating system can also receive test information for one or more test sites sent by the test thread corresponding to the test site. Therefore, the FPGA or test machine operating system can determine the priority of each test site based on the test progress in the test information of one or more test sites. Then, based on the priority of each test site, test resources are scheduled to perform the next test on the test site.
[0086] In this embodiment, the timing of the test thread corresponding to the test site sending test information to the FPGA or test machine operating system can be set after the test data is saved but before entering the data processing stage. Therefore, without affecting normal data acquisition, storage, and processing, idle chip test machine hardware can be effectively avoided, enabling the test machine hardware resources to continuously and efficiently serve chip testing, thus improving the efficiency and economic benefits of the entire testing process.
[0087] In this embodiment, the FPGA or test machine operating system receives test information from test sites and can then schedule test resources. Therefore, the FPGA or test machine operating system can uniformly schedule the priority of each test site and determine the allocation of test resources, thereby shortening the test time of the slowest test site and improving test efficiency.
[0088] Figure 6 A schematic diagram illustrating another resource allocation method according to an embodiment of the present disclosure is shown.
[0089] like Figure 6 As shown, the chip testing system 600 may include testing software 601 and testing hardware 602. It is understood that the testing software 601 may include processors, mobile devices, etc., and the testing hardware 602 may include physical devices and their components used to perform chip testing.
[0090] In some embodiments, the chip testing system 600 may be an automated test equipment (ATE), and the test software 601 may be a test machine system within the ATE or an FPGA. The test software 601 may also be an independent test thread for each test point. The test hardware 602 may be physical devices and components such as test heads and test boards.
[0091] like Figure 6 As shown, after completing a test at a test site using the test hardware 602, the test data can be stored in memory. The test software 601 can then perform scheduling analysis. For example, each independent test thread at a test site in the test software 601 can send the test progress and identifier of the test site to the FPGA in the test software 601. The FPGA then determines the priority of the test site based on the test progress and identifier, thereby allocating test resources accordingly. The test hardware 602 performs the next test on the test site based on the scheduling analysis of the test software 601. Furthermore, the test software 601 can also process the test data and print logs.
[0092] Understandably, the priority of a test point is not fixed. After a test point completes a test, the FPGA or test machine operating system can determine its current priority based on the test progress. After the next test is completed at that test point, the FPGA or test machine operating system can again determine its priority based on the test progress. Alternatively, if the current priority of a test point has been determined but the next test has not yet started, and the FPGA or test machine operating system receives the test progress of another test point from its corresponding independent test thread, then it can re-determine the current priority of that test point based on both the current priority and the progress of the other test point.
[0093] Figure 7 A block diagram illustrating a resource allocation device according to an embodiment of the present disclosure is shown schematically.
[0094] like Figure 7 As shown, the resource allocation device 700 of this embodiment includes a memory 701 and a processor 702.
[0095] The memory 701 is used to store computer-readable instructions. The processor 702 is used to execute the computer-readable instructions, causing the resource allocation device to perform the resource allocation method.
[0096] Figure 8 A block diagram illustrating a non-transitory computer-readable storage medium according to an embodiment of the present disclosure is shown schematically.
[0097] like Figure 8 As shown, a non-transitory computer-readable storage medium 800 according to an embodiment of the present disclosure is used to store computer-readable instructions 801, which, when executed by a processor, cause the processor to perform the resource allocation method described above.
[0098] Figure 9 A block diagram illustrating a computer program product according to an embodiment of the present disclosure is shown schematically.
[0099] like Figure 9 As shown, a computer program product 900 according to an embodiment of this disclosure includes a computer program 901, which, when executed by a processor, implements the resource allocation method described above.
[0100] The above description, with reference to the accompanying drawings, illustrates a resource allocation method, resource allocation device, storage medium, and computer program product according to embodiments of the present disclosure. By determining the priority of each test site based on its testing progress, and determining the scheduling method for test resources based on the type of test resources required for the next test at each test site, test resources can be dynamically scheduled to test the test sites. Therefore, the scheduling method can be optimized based on the priority of the test sites and different test resource types, thereby avoiding or shortening the waiting time for each test site. Simultaneously, the overall test site testing time can be shortened, thereby improving the overall chip replacement rate and thus increasing chip testing efficiency.
[0101] The basic principles of this disclosure have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this disclosure are merely examples and not limitations, and should not be considered as essential features of each embodiment of this disclosure. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the scope of this disclosure to the necessity of employing the aforementioned specific details for implementation.
[0102] The block diagrams of devices, apparatuses, devices, and systems disclosed herein are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, devices, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.
[0103] Additionally, as used herein, the “or” used in a list of items beginning with “at least one” indicates a separate list, such that a list of, for example, “at least one of A, B, or C” means A or B or C, or AB or AC or BC, or ABC (i.e., A and B and C). Furthermore, the word “exemplary” does not imply that the described example is preferred or better than other examples.
[0104] It should also be noted that in the systems and methods of this disclosure, the components or steps can be decomposed and / or recombined. These decompositions and / or recombinations should be considered as equivalent solutions to this disclosure.
[0105] Various changes, substitutions, and modifications can be made to the technology described herein without departing from the teachings defined by the appended claims. Furthermore, the scope of the claims of this disclosure is not limited to the specific aspects of the processes, machines, manufactures, events, means, methods, and actions described above. Currently existing or later-developed processes, machines, manufactures, events, means, methods, or actions that perform substantially the same function or achieve substantially the same result as the corresponding aspects described above can be utilized. Therefore, the appended claims include such processes, machines, manufactures, events, means, methods, or actions within their scope.
[0106] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of this disclosure. Therefore, this disclosure is not intended to be limited to the aspects shown herein, but rather to be carried out within the widest scope consistent with the principles and novel features disclosed herein.
[0107] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this disclosure to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations therein.
Claims
1. A resource allocation method characterized by, The method comprises: determining priorities of one or more test sites based on test progress of the one or more test sites; determining test resources for the one or more test sites based on the priorities.
2. The resource allocation method of claim 1, wherein, Further comprising: determining the test progress based on tested time of the test sites and total time to be tested.
3. The resource allocation method of claim 1, wherein, The determining test resources for the one or more test sites based on the priorities comprises: determining types of the test resources required by the one or more test sites; determining test resources for the one or more test sites based on the types of the test resources.
4. The resource allocation method of claim 3, wherein, The determining test resources for the one or more test sites based on the types of the test resources comprises: determining that the test resources test the test sites in response to the types of the test resources for the one or more test sites being a first resource type; wherein the first resource type comprises an independent resource type.
5. The resource allocation method of claim 3, wherein, The determining test resources for the one or more test sites based on the types of the test resources comprises: determining whether the priorities of the test sites are highest priorities in response to the types of the test resources for the one or more test sites being a second resource type; and determining that the test resources test the test sites in response to the priorities of the test sites being the highest priorities; wherein the second resource type comprises a shared resource type.
6. The resource allocation method of claim 3, wherein, The determining test resources for the one or more test sites based on the types of the test resources comprises: allocating the test resources to test the test sites based on the priorities of the test sites in response to the types of the test resources for the one or more test sites being a third resource type; wherein the third resource type comprises a test thread-based resource type.
7. The method of claim 1, wherein, Further comprising: receiving test information of the one or more test sites; wherein the test information at least comprises identifications of the test sites and the test progress of the test sites.
8. A resource allocation apparatus, characterized by comprising: comprising: a memory for storing computer readable instructions; and a processor for running the computer readable instructions to cause the resource allocation device to perform the resource allocation method of any one of claims 1 to 7. The computer readable instructions, when executed by the processor, cause the processor to perform the resource allocation method of any one of claims 1 to 7.
9. A non-transitory computer-readable storage medium storing computer-readable instructions, the computer-readable instructions comprising: The computer program, when executed by the processor, implements the resource allocation method of any one of claims 1 to 7.
10. A computer program product comprising a computer program, characterized in that,