An automatic design and simulation system and method for millimeter wave passive devices

Abstract

This invention proposes an automated design and simulation system and method for millimeter-wave passive devices, belonging to the field of circuit design and automation technology. The system includes a passive device layout generation module, an electromagnetic simulation module, and a testing and performance index extraction module connected in sequence. The passive device layout generation module generates and stores millimeter-wave passive device layouts in batches according to preset passive device parameter ranges. The electromagnetic simulation module performs automated batch simulations on the generated layouts to obtain S-parameter files for the corresponding layouts. The testing and performance index extraction module performs simulation tests on the millimeter-wave passive devices in a set frequency band based on the S-parameter files, outputting performance curves. This invention automates the entire process of passive device design, simulation, and performance evaluation, enabling the rapid and reliable provision of massive, high-quality passive device model datasets for RF integrated circuit automated design platforms, thus shortening the design cycle of RF chips.

Description

Technical Field

[0001] This invention belongs to the field of circuit design and automation technology, and specifically relates to an automated design simulation system and method for millimeter-wave passive devices. Background Technology

[0002] With the rapid development of fifth-generation (5G) and future sixth-generation (6G) wireless communication, automotive radar, millimeter-wave imaging, and other technologies, operating frequencies are increasingly extending into the millimeter-wave band (typically referring to 30 GHz to 300 GHz). Millimeter-wave technology has become a current research hotspot due to its ability to provide extremely wide spectral bandwidth, enabling high-speed data transmission and ultra-high-resolution detection. In millimeter-wave integrated circuit design, the performance of passive components (such as inductors, capacitors, transformers, baluns, and coupled transmission lines) plays a decisive role in the overall system performance. Unlike low-frequency applications, the characteristics of passive components in the millimeter-wave band are severely affected by complex electromagnetic phenomena such as parasitic effects, substrate coupling, skin effect, and proximity effect. Therefore, accurate modeling of these components is crucial.

[0003] Currently, designers face two main challenges: First, standard passive device models provided by integrated circuit manufacturers are typically fitted from measurement data in low-frequency or lower microwave bands. When the frequency increases to the millimeter-wave band, the accuracy of these compact models drops significantly, failing to accurately reflect electromagnetic field distribution and loss mechanisms. Directly using these inaccurate models for circuit design will lead to a significant deviation between the chip performance after tape-out and the simulation results, resulting in substantial R&D costs and time losses. Therefore, for critical passive components, simulations based on three-dimensional electromagnetic field solvers such as EMX (Electromagnetic Xplorer, an electromagnetic simulation tool) and Ansys HFSS (High Frequency Structural Simulator, a high-frequency structural simulation tool) must be used to obtain more reliable data.

[0004] Secondly, the design flow of millimeter-wave passive devices based on electromagnetic simulation itself suffers from efficiency bottlenecks. Traditional methods heavily rely on manual operations by designers, including: manually drawing layouts, manually setting electromagnetic simulation parameters, manually executing simulations, and manually extracting performance metrics (such as inductance value L, quality factor Q, coupling coefficient k, etc.) from simulation results. This process is not only tedious and time-consuming but also highly susceptible to human error. More importantly, to construct a large-scale, high-quality dataset covering a broad design space that can support machine learning-aided design or circuit optimization, it is necessary to generate massive amounts of samples by changing the geometry of passive devices (such as the number of turns, linewidth, and spacing). Traditional manual methods are almost impossible to implement in the face of this requirement, greatly restricting the development of advanced RF automated design platforms. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of existing technologies and propose an automated design and simulation system and method for millimeter-wave passive devices. This invention enables a fully automated solution for the entire process of millimeter-wave passive device design, simulation, and performance evaluation, generating accurate model datasets efficiently and reliably, thereby fundamentally accelerating the research and development process of millimeter-wave chips.

[0006] This invention proposes an automated design and simulation system for millimeter-wave passive devices, comprising a passive device layout generation module, an electromagnetic simulation module, and a testing and performance index extraction module connected in sequence. The passive device layout generation module is used to generate and store millimeter-wave passive device layouts in batches according to a preset passive device parameter range. The electromagnetic simulation module is used to perform automated batch simulations on the layouts generated by the passive device layout generation module to obtain S-parameter files for the corresponding layouts. The testing and performance index extraction module is used to perform simulation tests on the millimeter-wave passive devices in a set frequency band based on the S-parameter files and output performance curves.

[0007] In one specific embodiment of the present invention, it further includes:

[0008] The passive device layout generation module uses a parameter randomization strategy within the preset passive device parameter range, which involves uniform random sampling of discrete parameters or gradient stepping of continuous parameters, to generate parameter samples that uniformly cover the corresponding parameter space for the passive device. Then, it generates the corresponding layout of the passive device based on the parameter samples.

[0009] In one specific embodiment of the present invention, it further includes:

[0010] The test and performance index extraction module loads a standard test circuit template for passive devices. This module uses an S-parameter file to drive simulation, maps simulation data to the test circuit port, and then controls the simulator to complete the simulation of the specified frequency band to obtain the performance curve of the passive device.

[0011] In one specific embodiment of the present invention, it further includes:

[0012] The passive device layout generation module includes a device layout drawing function; wherein:

[0013] The function for drawing the inductor layout is:

[0014] gen_inductor(shape, n, w, linespace, inner_r, cantilever_len, cantilever_gap)

[0015] Where shape represents the shape, n is the number of turns parameter; w is the coil line width parameter, linespace is the coil spacing parameter, inner_r is the coil inner diameter parameter; cantilever_len is the cantilever length parameter, cantilever_gap is the cantilever spacing parameter;

[0016] The function for drawing the capacitor layout is:

[0017] gen_capacitor(layer, len, wid)

[0018] Here, layer is used to define the number of metal layers that form the core energy storage element of the capacitor, len represents the length of the capacitor, and wid represents the width of the capacitor;

[0019] The transformer layout drawing function is:

[0020] gen_transformer(prim_n, sec_n, prim_w, sec_w, linespace, prim_r, sec_r, cantilever_len, cantilever_gap)

[0021] Wherein, prim_n is the number of turns of the primary coil, sec_n is the number of turns of the secondary coil; prim_w is the linewidth of the primary coil, sec_w is the linewidth of the secondary coil; linespace is the coil spacing parameter; prim_r is the inner diameter of the primary coil, sec_r is the inner diameter of the secondary coil; cantilever_len is the cantilever length parameter, and cantilever_gap is the cantilever spacing parameter;

[0022] The function for drawing the Baron map is:

[0023] gen_balun(single_n, diff_n, single_w, diff_w, linespace, single_r,diff_r, cantilever_len, cantilever_gap)

[0024] Where single_n is the single-ended turns parameter, diff_n is the differential turns parameter; single_w is the balun single-ended linewidth parameter, diff_w is the balun differential linewidth parameter; linespace is the coil spacing parameter; single_r is the single-ended inner diameter parameter, diff_r is the differential inner diameter parameter; cantilever_len is the cantilever length parameter, and cantilever_gap is the cantilever spacing parameter;

[0025] The function for drawing multi-free-point coupled-line layouts is:

[0026] In this function, gen_coupler(point_num, x_range, y_range, cantilever_len, cantilever_gap), x_range is the maximum search space along the X-axis of the multi-degree-of-freedom coupled line, y_range is the maximum search space along the Y-axis of the multi-degree-of-freedom coupled line, point_num is the number of free points, cantilever_len is the cantilever length, and cantilever_gap is the cantilever spacing.

[0027] In one specific embodiment of the present invention, it further includes:

[0028] The testing and performance index extraction module extracts the S-parameter matrix corresponding to the frequency band from the performance curve and converts it into performance indices, specifically including:

[0029] 1) Extraction of inductance value L:

[0030] The test and performance index extraction module converts the S-parameters into impedance matrix Y-parameters, and combines them with the target test frequency f, using the expression... The inductance value L is calculated.

[0031] Where imag() represents taking the imaginary number, Y 11 This is the input short-circuit admittance of the two-port network;

[0032] 2) Capacitance value C extraction:

[0033] The testing and performance index extraction module converts the S-parameters into the admittance matrix Y-parameters, and combines them with the target test frequency f, using the expression... The capacitance value C is calculated.

[0034] 3) Extraction of quality factor Q:

[0035] For inductive devices, the testing and performance extraction module converts the S-parameters into impedance matrix Y-parameters, and then uses the expression... Calculate the inductance quality factor Q, where real() represents taking the real part;

[0036] For capacitive devices, the testing and performance index extraction module converts the S-parameters into the admittance matrix Y-parameters, and then uses the expression... The capacitor's quality factor Q is calculated.

[0037] 4) Extraction of coupling coefficient k and correlation parameters:

[0038] For devices with coupling structures, the test and performance index extraction module converts the S-parameters into an impedance matrix, and extracts the self-inductances L1 and L2, and the quality factors Q1 and Q2 of the two ports of the device from the impedance matrix. Here, L1 is the self-inductance of the first port, L2 is the self-inductance of the second port, Q1 is the quality factor of the first port, and Q2 is the quality factor of the second port. Then, based on the extracted self-inductances L1 and L2 and mutual inductances... Through expressions The coupling coefficient k is calculated.

[0039] in, Describe the reverse effect of a change in current at port 2 on the voltage at port 1.

[0040] In a specific embodiment of the present invention, the multi-free-point coupling line layout includes two multi-degree-of-freedom coupling line models. When generating the layout, each coupling line model automatically generates a corresponding number of irregularly distributed free points on one side of the model based on the maximum search space of the X-axis and the maximum search space of the Y-axis. Then, starting from the cantilever of the model, the model passes through the free points in sequence, folds with the X-axis as the axis of symmetry, and then folds with the Y-axis as the axis of symmetry, returning to the position of the cantilever, thus completing the generation of a single coupling line model. The two coupling line models are connected back to back to form the multi-free-point coupling line layout.

[0041] This invention also proposes an automated design and simulation method for millimeter-wave passive devices based on the above system, including:

[0042] Based on the preset range of passive device parameters, the layout of millimeter-wave passive devices is generated in batches and stored.

[0043] The layout of the millimeter-wave passive device is subjected to automated batch simulation to obtain the S-parameter file of the corresponding layout;

[0044] Based on the S-parameter file, simulation tests are performed on the millimeter-wave passive device in the specified frequency band, and performance curves are output.

[0045] In one specific embodiment of the present invention, it further includes:

[0046] Extract the S-parameter matrix of the corresponding frequency band from the performance curve and convert it into performance indicators.

[0047] Features and beneficial effects of the present invention:

[0048] This invention addresses three core problems: insufficient accuracy of millimeter-wave band process library models, cumbersome and scalable manual design processes, and inefficiency in obtaining large-scale, high-quality datasets. It offers significant benefits, as detailed below:

[0049] 1) Improve the design accuracy of the millimeter-wave band and overcome the limitations of the process library:

[0050] This invention employs a direct linkage between "layout generation and EMX electromagnetic simulation," performing millimeter-wave electromagnetic simulation based on the actual device layout. It eliminates the need to rely on insufficiently accurate process library models, accurately capturing the true electromagnetic characteristics of millimeter-wave devices. The output SNP file and extracted performance indicators such as L, Q, k, and C are more closely aligned with actual application scenarios, effectively solving the problem of insufficient millimeter-wave design accuracy caused by traditional reliance on process libraries, and providing reliable support for high-performance millimeter-wave circuit design.

[0051] 2.) Overcoming the bottlenecks of manual design to achieve large-scale, efficient design:

[0052] This invention automates the entire process through skill scripts, covering batch generation of layout parameters, automatic simulation invocation, and batch extraction of performance indicators. It replaces the cumbersome process of manually drawing layouts, manually setting simulation parameters, and manually reading calculation data, significantly reducing the cost of manual intervention and operational errors. It can quickly complete the design and testing of large batches of devices, effectively overcome the pain point of the difficulty in scaling up manual design, and significantly improve the R&D efficiency of millimeter-wave passive devices.

[0053] 3) Efficiently produce large-scale, high-quality datasets to empower AI-assisted design:

[0054] This invention, relying on automated processes and multi-dimensional parameter control, can rapidly generate device samples with diverse structures and comprehensive performance coverage. Combined with accurate simulation and test data, these samples are structured and organized into a standardized dataset. This dataset can be scaled up as needed, and the consistency and accuracy of the data are ensured through full-process automation. It effectively solves the problem of traditional methods being unable to efficiently obtain large-scale, high-quality datasets, providing core data support for AI-assisted design RF automation platforms and facilitating accurate training of machine learning models.

[0055] 4) Balancing design flexibility and practicality to meet the requirements of millimeter-wave technology:

[0056] The devices in this invention support flexible adjustment of multiple parameters, and the device structure and performance can be customized according to different millimeter-wave circuit requirements, process limitations and area constraints; at the same time, it supports data export to CSV format, which takes into account the dual needs of machine learning training and direct acquisition of target device models, further improving the conversion efficiency of design results and adapting to the R&D needs of diverse application scenarios of millimeter-wave technology. Attached Figure Description

[0057] Figure 1 This is a schematic diagram of the structure of an automated design and simulation system for millimeter-wave passive devices according to an embodiment of the present invention.

[0058] Figure 2 This is a schematic diagram of a multi-degree-of-freedom coupled line layout structure in a specific embodiment of the present invention.

[0059] Figure 3 This is a circuit diagram of a passive inductor test circuit in a specific embodiment of the present invention.

[0060] Figure 4 This is a circuit diagram of a passive capacitor test in a specific embodiment of the present invention.

[0061] Figure 5 This is a transformer test circuit diagram in a specific embodiment of the present invention.

[0062] Figure 6 This is a balun test circuit diagram in a specific embodiment of the present invention.

[0063] Figure 7 This is a circuit diagram of a coupling line test in a specific embodiment of the present invention.

[0064] Figure 8 This is a simulation curve of the parameters of a passive inductor tested in a specific embodiment of the present invention.

[0065] Figure 9 This is a simulation curve of the parameters related to the passive capacitor tested in a specific embodiment of the present invention.

[0066] Figure 10 This is a simulation curve of the relevant parameters of the transformer, balun, and coupling line tested in a specific embodiment of the present invention. Detailed Implementation

[0067] This invention proposes an automated design and simulation system and method for millimeter-wave passive devices. The following detailed description, in conjunction with the accompanying drawings and specific embodiments, further illustrates this invention. This embodiment uses a 65nm CMOS process and millimeter-wave frequency band as a scenario; those skilled in the art can adjust the parameters as needed to implement this invention.

[0068] This invention proposes an automated design and simulation system for millimeter-wave passive devices, the structure of which is as follows: Figure 1 As shown, the system includes a passive device layout generation module, an electromagnetic simulation module, and a testing and performance index extraction module connected in sequence. The passive device layout generation module generates and stores layouts of millimeter-wave passive devices in batches according to preset device parameter ranges. The electromagnetic simulation module performs automated batch simulations of the layouts generated by the passive device layout generation module to obtain S-parameter files for the corresponding layouts. The testing and performance index extraction module performs performance tests on the millimeter-wave passive devices based on the S-parameter files output by the electromagnetic simulation module and calculates performance indicators to output performance curves.

[0069] Furthermore, the implementation methods of each module in the system described in this embodiment are as follows:

[0070] The passive device layout generation module, based on the SKILL script-driven Cadence Virtuoso software, realizes the parametric layout drawing and batch generation of millimeter-wave passive devices such as inductors, capacitors, transformers, baluns, and multi-point coupling lines according to the preset parameter range of millimeter-wave passive devices. In this embodiment, a parameter randomization algorithm is used to ensure sample diversity, and the generated layout samples are finally classified and stored in a designated layout library.

[0071] In one specific embodiment of the present invention, the device layout drawing function in this module has a preset adjustable parameter range adapted to 65nm CMOS process. The inductor adopts an octagonal structure, and the core parameters such as the number of turns, line width, and line spacing are defined by calling the preset `gen_inductor` function. Different metal layers are used for connection to avoid short circuits. The capacitor adopts a parallel plate structure, and the number of metal layers, plate length, and width are defined by calling the preset `gen_capacitor` function to achieve precise matching between capacitance and layout area. The transformer adopts an octagonal coupling structure, and the initial / ... The secondary coil's turns, wire width, inner diameter, and other parameters control the coil's coupling strength, and its tap structure provides bias for active circuits. The balun uses an octagonal structure, and the single-ended / differential end parameters are defined by calling the preset gen_balun function. The taps are only placed on the differential end, realizing bidirectional conversion between differential and single-ended signals. The multi-free-point coupling line is based on a preset search space along the X / Y axes, and an irregular coupling structure is generated by calling the preset gen_coupler function. The two single-ended side models are combined into a complete circuit.

[0072] Furthermore, when the passive device layout generation module executes the batch generation instruction, it adopts a parameter randomization strategy of "uniform random sampling + gradient stepping". It performs uniform random sampling on discrete parameters and gradient stepping on continuous parameters to ensure that the sampled parameters uniformly cover the corresponding parameter space. Finally, it generates layout samples of different types of devices under different parameters and automatically saves them to the specified layout library.

[0073] The electromagnetic simulation module establishes communication with EMX via a SKILL script, reads layout samples stored in the passive device layout generation module, performs automated batch electromagnetic simulations, and outputs SNP files that correspond one-to-one with the layout samples. In one specific embodiment of the invention, the electromagnetic simulation module presets millimeter-wave frequency band simulation parameters, with a frequency range of 1GHz to 100GHz and a frequency step of 1GHz. It selects the mesh density based on the hardware configuration and matches the substrate parameters to the characteristics of a 65nm CMOS process. By automatically reading layout sample information from the layout library, it sequentially imports it into EMX and configures corresponding ports for different devices, initiating the electromagnetic simulation process. After simulation, the module automatically saves the SNP files to a specified path. This module directly performs electromagnetic simulations on actual layouts, replacing traditional process library models, effectively solving the problem of insufficient accuracy in millimeter-wave frequency band models. It also supports batch continuous simulations, improving design efficiency and simulation reliability.

[0074] Furthermore, the testing and performance index extraction module adopts an automated testing platform integrated with parsing code written based on SKILL, loads the standard test circuit template of the corresponding device, reads the SNP file output by the electromagnetic simulation module, drives the Spectre simulator to perform simulation, realizes automatic extraction of device performance indexes, generation of simulation curves and export of CSV format data, and then provides data support for the construction of artificial intelligence database.

[0075] In one specific embodiment of the present invention, the testing and performance index extraction module automatically loads dedicated test circuit templates for inductors, capacitors, transformers, baluns, and coupling lines. It drives the simulation by sequentially replacing the SNP files of the corresponding devices, mapping the simulation data to the test circuit ports. It controls the Spectre simulator to complete the simulation of the specified frequency band, generates the device performance index simulation curves, and exports them as CSV files. It extracts the S-parameter matrix of the 1GHz-100GHz frequency band from the CSV file, and converts the S-parameters into an impedance matrix (Z-parameters) or admittance matrix (Y-parameters) by calling an analytical function. Then, it calculates key performance indicators such as inductance value, capacitance value, quality factor (Q), and coupling coefficient (k), realizing automated performance testing and data analysis of millimeter-wave passive devices.

[0076] Therefore, the system described in this embodiment can realize a closed-loop automated process of automatic layout generation, automatic simulation execution, automatic indicator extraction, and automatic dataset construction. In specific implementation, the SKILL script is used as the core driving tool, linking Cadence Virtuoso (circuit design), EMX (electromagnetic simulation), and SKILL (code control) to complete the entire process from device design to dataset output without manual intervention, effectively solving the problems of insufficient process library accuracy, low manual efficiency, and lack of datasets.

[0077] Furthermore, in one specific embodiment of the present invention, the passive device layout generation module automatically generates the layout by writing a skill script to drive Cadence Virtuos. The script is based on Cadence's SKILL language syntax, encapsulates the device layout drawing function, and supports parameterized calls. The module presets the adjustable parameter ranges for each device (adapting to 65nm CMOS process), as shown in Table 1:

[0078] Table 1. Parameter configuration table of the passive device layout generation module in a specific embodiment of the present invention.

[0079] Device type Core adjustable parameters Parameter range inductance Number of turns, line width, line spacing, inner radius, cantilever length, cantilever spacing Single-turn, double-turn, multi-turn (3 turns or more); 2μm-10μm; 1μm-4μm; 10μm-80μm; 5μm-20μm; 5μm-20um capacitance Number of metal layers, plate length, plate width 2-9 layers; 2μm-10μm; 5μm-20μm transformer (Primary and secondary) Number of turns, wire width, wire spacing, inner radius, cantilever length, cantilever spacing Single-turn, double-turn, multi-turn; 2μm-10μm; 1μm-4μm; 10μm-80μm; 5μm-20μm; 5μm-20um Barron (Single-ended, differential) Number of turns, wire width, wire spacing, inner radius, cantilever length, cantilever spacing Single-turn, double-turn, multi-turn; 2μm-10μm; 1μm-4μm; 10μm-80μm; 5μm-20μm; 5μm-20um Multi-point coupling line Number of free points, spatial range, line width 2 or more; 10μm-120μm; 2μm-10μm

[0080] Furthermore, in one specific embodiment of this aspect, the passive device layout is generated in the following way:

[0081] (1) Inductor layout.

[0082] In one specific embodiment of this invention, the inductor has an octagonal structure. The CadenceVirtuoso algorithm is automatically generated to produce the inductor layout by calling the `gen_inductor(shape, n, w, linespace, inner_r, cantilever_len, cantilever_gap)` function. Here, `shape="octagon"` defines the inductor as an octagonal structure; `n` is the number of turns parameter, which can be flexibly set to different turn specifications such as single-turn, double-turn, and triple-turn; `w` is the coil linewidth parameter; `linespace` is the coil spacing parameter; `inner_r` is the coil inner diameter parameter; `cantilever_len` is the cantilever length parameter; and `cantilever_gap` is the cantilever spacing parameter. Simultaneously, different metal layers are used to connect the coils to avoid short-circuit problems during layout generation.

[0083] (2) Capacitor layout.

[0084] One specific embodiment of this invention employs a parallel-plate capacitor structure. The Cadence Virtuoso engine automatically generates the capacitor layout by calling the `gen_capacitor(layer, len, wid)` function. The core energy storage structure of the capacitor is formed by the overlapping areas of parallel plates with different numbers of layers. This overlapping area directly determines the capacitance value of the parallel-plate capacitor. The parameter `layer` defines the number of metal layers forming the core energy storage element of the capacitor; in this embodiment, `layer=4`, meaning four metal layers are used for overlapping construction. The parameter `len` corresponds to the length specification of the capacitor, and `wid` corresponds to the width specification of the capacitor. Together, they determine the area occupied by the capacitor layout and can be flexibly adjusted according to the layout space of millimeter-wave circuits. Through the coordinated combination of the number of metal layers, the overlapping area, and the length / width parameters, a precise match between the capacitance value and the layout area can be achieved.

[0085] (3) Transformer layout.

[0086] One specific embodiment of the present invention employs an octagonal coupled transformer structure. By calling the gen_transformer(prim_n, sec_n, prim_w, sec_w, linespace, prim_r, sec_r, cantilever_len,cantilever_gap) function, Cadence Virtuoso is driven to automatically generate the transformer layout, which can flexibly adapt to the impedance matching requirements of millimeter-wave circuits. The correspondence and functions of each function parameter to the transformer structure are as follows: `prim_n` is the primary coil turns parameter, and `sec_n` is the secondary coil turns parameter. These can be flexibly configured into various turns combinations such as single-turn to single-turn, double-turn to double-turn, three-turn to three-turn, and single-turn to double-turn, depending on requirements. `prim_w` is the primary coil linewidth parameter, and `sec_w` is the secondary coil linewidth parameter, defining the linewidth specifications of the primary and secondary coils respectively. `linespace` is the coil spacing parameter, corresponding to the gap size between adjacent coils, used to control the electromagnetic coupling strength between coils and ensure the design accuracy of the transformer coupling coefficient. `prim_r` is the primary coil inner diameter parameter, and `sec_r` is the secondary coil inner diameter parameter, determining the basic layout size of the transformer and adapting to the spatial layout constraints of the circuit. `cantilever_len` is the cantilever length parameter, and `cantilever_gap` is the cantilever spacing parameter. The cantilever is used to connect the transformer to external circuits, and the spacing design effectively avoids parasitic interference between cantilever arms. In addition, the transformer has tap structures on both sides, which, by connecting a DC voltage, can provide operating bias for the active circuit modules used with this transformer.

[0087] (4) Baron map.

[0088] In one specific embodiment of the present invention, an octagonal balun structure is adopted. By calling the gen_balun(single_n,diff_n, single_w, diff_w, linespace, single_r, diff_r, cantilever_len,cantilever_gap) function, Cadence Virtuoso is driven to automatically generate the balun layout, which can accurately adapt to the impedance matching requirements of millimeter-wave circuits. The correspondence and functions of each function parameter to the balun structure are as follows: single_n is the single-end turns parameter, and diff_n is the differential turns parameter, which can be flexibly configured into various combinations such as 1 turn at the single end / 1 turn at the differential end, 2 turns at the single end / 2 turns at the differential end, 3 turns at the single end / 3 turns at the differential end, and 1 turn at the single end / 2 turns at the differential end; single_w is the balun single-end linewidth parameter, and diff_w is the balun differential end linewidth parameter, defining the linewidth specifications of the single-end and differential end coils respectively; linespace is the coil spacing parameter, corresponding to the gap size between adjacent coils; single_r is the single-end inner diameter parameter, and diff_r is the differential end inner diameter parameter, determining the basic layout size of the single-end and differential ends of the balun; cantilever_len is the cantilever length parameter, and cantilever_gap is the cantilever spacing parameter, corresponding to the length and gap specifications of the balun cantilever respectively.

[0089] In this embodiment, unlike the tap layout of a transformer, the taps of the balun are only located at the differential end. As a balun core, it can realize bidirectional conversion between differential and single-ended signals. These differential taps can be connected to a DC voltage to provide operating bias for the corresponding active circuit module.

[0090] (5) Multi-free point coupled line layout.

[0091] Figure 2 This is a schematic diagram of a multi-degree-of-freedom coupled line layout structure adapted to the millimeter-wave frequency band in a specific embodiment of the present invention. It is a single-sided model of the complete structure; the actual complete multi-degree-of-freedom coupled line layout consists of two such... Figure 2 The multi-degree-of-freedom coupled line model shown is composed of back-to-back connections. The core of this multi-degree-of-freedom coupled line layout is an irregular coupling structure based on a preset search space along the X / Y axes. It is automatically generated using the script function `gen_coupler(point_num, x_range, y_range, cantilever_len, cantilever_gap)`. The specific structure, parameter correspondences, and characteristics are as follows:

[0092] Figure 2In the text, "maximum search space of the X-axis for multi-degree-of-freedom coupled lines" and "maximum search space of the Y-axis for multi-degree-of-freedom coupled lines" correspond to the function parameters x_range and y_range, respectively, limiting the range for selecting the positions of free points. In the complete circuit, each of the two coupled line models is equipped with independent X-axis and Y-axis search spaces. point_num represents the number of free points set for the multi-degree-of-freedom coupled line (in cases such as...). Figure 2 The embodiment shown contains 4 on one end.

[0093] Figure 2 The "Free Point 1X / 1Y", "Free Point 2X / 2Y", "Free Point 3X / 3Y", and "Free Point 4X / 4Y" marked in the code are independent random coordinate points controlled by `point_num` in the function. The script will automatically generate multiple irregularly distributed free points for each coupled line model within its maximum search space along the X and Y axes (e.g., ...). Figure 2 In the embodiment shown, there are 4 on the single end side, and the free points of the two models can be selected independently and are not bound to each other, so as to construct a coupling line body with more flexible and diverse forms; the layout starts from the fixed cantilever, passes through free point 1, free point 2, free point 3, and free point 4 in sequence, and then flips with the X-axis as the axis of symmetry, and then flips with the Y-axis as the axis of symmetry, returning to the position of the cantilever. Figure 2 The "cantilever length" and "cantilever spacing" in the text correspond to the parameters cantilever_len and cantilever_gap, respectively.

[0094] This coupling line, through the design of "semi-layout independent free points + dual-model combination", can generate a large number of sample layouts with significant structural differences, which can provide richer passive network data support for AI-assisted design RF automation platforms and fully adapt to the diverse circuit design needs of the millimeter wave band.

[0095] In one specific embodiment of the present invention, after the completed SKILL script is imported into the Cadence Virtuoso software, a script loading operation is performed in the command line to complete the loading. Subsequently, a batch generation command is executed, specifying the number of elements to be generated, to generate layout samples containing different device types and parameters in batches. All samples are automatically saved to a specified layout library (e.g., Library: mmWave_passive; Cellview: auto_gen_1~auto_gen_1000). "Library" refers to the library, which provides the basic components and data required for the design, while "cellview" represents the specific design elements within the library. "mmWave_passive" refers to the name of the library, here referring to the millimeter-wave passive device library, and "auto_gen_1~auto_gen_1000" refers to the 100 generated design elements. To ensure sample diversity, the script has a built-in "parameter randomization algorithm" that uses a strategy that combines "uniform random sampling + gradient stepping". For discrete parameters in the sample space of the free-point coupled line model, uniform random sampling is used; for continuous parameters such as size, line spacing, inner diameter, and number of turns, gradient stepping is used. This ensures that the samples are uniformly covered in the parameter space and have sufficient structural diversity. The layouts generated by the gradient stepping and random sampling are classified and saved to the corresponding layout library according to their types.

[0096] In a specific embodiment of the present invention, taking gradient stepping as an example, to generate an automated inductor model, the parameters are: number of turns, line width, line spacing, inner radius, cantilever length, and cantilever spacing. The number of turns can be selected from three options; the line width is 2-10µm with a step size of 2µm, resulting in 5 options; the line spacing is 1-4µm with a step size of 1µm, resulting in 4 options; the inner radius is 10-80µm with a step size of 5µm, resulting in 15 options; the cantilever width is 5-20µm with a step size of 5µm, resulting in 4 options; and the cantilever spacing is 5-20µm with a step size of 5µm, resulting in 4 options. Based on this gradient step size selection, 3*5*4*15*4*4=14400 layout samples can be generated. In this embodiment, by randomly sampling, the required number of samples is selected from the sample space, thus generating the corresponding number of layout samples.

[0097] Furthermore, in one specific embodiment of the present invention, the automated electromagnetic simulation module establishes communication and linkage with EMX through SKILL scripts to realize the automated execution of the entire simulation process. The specific parameter configuration and operation method are as follows:

[0098] At the simulation parameter configuration level, the script pre-sets the simulation parameters for the millimeter-wave band: the frequency range is 1GHz~100GHz, and the frequency step is 1GHz; the mesh density is flexibly selected according to the hardware configuration; and the substrate parameters are matched to the characteristic requirements of the 65nm CMOS process.

[0099] After the layouts are generated in batches, the script executes an automated simulation function. In one specific embodiment of the invention, the layout information of 1000 samples from the layout library is automatically read and imported into EMX sequentially; for each sample, the ports are automatically set (such as single-port inductor, dual-port transformer, dual-port balun), and electromagnetic simulation is started; after the simulation is completed, the script automatically saves the SNP file to the specified path, with the file name corresponding one-to-one with the layout sample.

[0100] This module performs electromagnetic simulations directly on the actual layout, replacing the traditional design method that relies on process library models. It not only effectively solves the problem of poor accuracy of traditional models in the millimeter-wave band, but also supports batch continuous simulation operations, improving design efficiency and simulation reliability.

[0101] Furthermore, in a specific embodiment of the present invention, the testing and performance indicator extraction module is based on SKILL and uses parsing code to specifically implement the following functions:

[0102] 1) Test circuit adaptation.

[0103] Figure 3 This is a standard test circuit diagram for a passive inductor in a specific embodiment of the present invention. `port0` refers to the PORT device in the Cadence Virtuoso platform, a virtual device used to define the circuit's "signal interaction interface." Essentially, it provides the core interface for circuit simulation (such as Spectre, EMX, ADS co-simulation, etc.) by providing signal excitation, response acquisition, and impedance reference. It neither occupies actual layout area nor has physical device attributes; it serves only as the logical boundary for simulation analysis. `inductor s2p` refers to the import of the corresponding inductor s2p file obtained from the automated electromagnetic simulation module into the `nport` device in the Cadence Virtuoso platform (used for storing and analyzing SNP files; `n` refers to the number of ports). Figure 4Figure 5 shows a passive capacitor test circuit diagram in a specific embodiment of the present invention. Port0 refers to the PORT device in the Cadence Virtuoso platform, and capacitor S2P refers to the corresponding capacitor S2P file obtained from the automated electromagnetic simulation module and imported into the Cadence Virtuoso platform's nPort device. Figure 5 shows a standard transformer test circuit diagram in a specific embodiment of the present invention. Port0 and Port1 refer to the PORT devices in the Cadence Virtuoso platform, and transformer S8P refers to the corresponding transformer S8P file obtained from the automated electromagnetic simulation module and imported into the Cadence Virtuoso platform's nPort device. "Bias Voltage 1" and "Bias Voltage 2" are connected to the transformer taps to provide DC power. Figure 6 This is a standard test circuit diagram of a balun in a specific embodiment of the present invention, where port0 and port1 refer to PORT devices in the Cadence Virtuoso platform, balun s6p refers to the balun s6p file obtained by the automated electromagnetic simulation module and imported into the NCOP device in the Cadence Virtuoso platform, and "bias voltage 1" is connected to the balun tap to provide DC power. Figure 7 This is a standard test circuit diagram for the coupling line in a specific embodiment of the present invention. Based on whether there are taps on one side or the differential terminal, it is divided into "coupled line S6P" and "coupled line S8P". The script can automatically load the test circuit template of the corresponding device and drive the Spectre simulator to perform simulation by sequentially replacing the SNP files, mapping the simulation data to the test circuit ports to ensure that the indicator extraction scenario is consistent with the actual application requirements.

[0104] 2) Calculation of indicators, specifically including: 2-1) Extraction of inductance value (L):

[0105] The testing and performance metric extraction module converts the S-parameters in the SNP file into an impedance matrix (Y-parameters) using code. Combined with the target test frequency f, it then uses an expression... The inductance value L is calculated.

[0106] Where imag() represents taking the imaginary number, Y11 is the input short-circuit admittance of the two-port network, and f refers to the corresponding operating frequency.

[0107] 2-2) Capacitance value (C) extraction:

[0108] The testing and performance metric extraction module converts the S-parameters in the SNP file into admittance matrices (Y-parameters) using code. Combined with the target test frequency f, this is expressed using an expression... The capacitance value C is calculated.

[0109] Here, imag() refers to taking the imaginary number, Y11 Here, f represents the input short-circuit admittance of the two-port network, and f refers to the corresponding operating frequency.

[0110] 2-3) Quality factor (Q) extraction:

[0111] For inductive devices, the testing and performance extraction module converts the S-parameters in the SNP file into an impedance matrix (Y-parameters) using code, and then uses expressions to... The inductance quality factor Q is calculated, where real() represents taking the real part.

[0112] For capacitive devices, the testing and performance indicator extraction module converts the S-parameters in the SNP file into admittance matrices (Y-parameters) through code, and then uses expressions to... The capacitor's quality factor Q is calculated.

[0113] 2-4) Extraction of coupling coefficient (k) and correlation parameters:

[0114] For devices with coupled structures such as transformers, baluns, and coupled wires, the testing and performance index extraction module converts the S-parameters in the SNP file into an impedance matrix using code. From the impedance matrix, it extracts the self-inductances L1 and L2 (L1 is the self-inductance of the first port, and L2 is the self-inductance of the second port, extracted in the same way as the inductance value L mentioned earlier) and the quality factors Q1 and Q2 (Q1 is the quality factor of the first port, and Q2 is the quality factor of the second port, extracted in the same way as the quality factor Q mentioned earlier). Then, based on the extracted self-inductances L1 and L2 and mutual inductance... Through expressions The coupling coefficient k is calculated.

[0115] in, Describe the reverse effect of a change in current at port 2 on the voltage at port 1.

[0116] 3) Simulation execution and data export.

[0117] In this embodiment, the test and performance index extraction module controls the Spectre simulator to complete the simulation calculation of the specified frequency band, generate the simulation curve of the corresponding device, and export the simulation results as a CSV format curve data file. Then, the S-parameter matrix data of the 1GHz-100GHz frequency band is extracted from the CSV file.

[0118] In a specific embodiment of the present invention, the automated design, simulation and testing of 2000 millimeter-wave passive device samples are completed using the aforementioned millimeter-wave passive device automated design and simulation system. The constructed dataset covers inductors (250), capacitors (250), transformers (250), baluns (250), and multi-free-point coupling lines (1000), and the simulation characteristics of each device can be presented through corresponding curves.

[0119] Figure 8 This is a simulation curve of the parameters of a passive inductor tested in a specific embodiment of the present invention. The left graph shows the relationship between inductance L and frequency, and the right graph shows the relationship between quality factor Q and frequency. The vertical axis of the left graph represents the inductance value (pH), and the vertical axis of the right graph represents the quality factor Q. The horizontal axis of both graphs represents the frequency value (GHz). Figure 9 This is a simulation curve of the parameters of a passive capacitor tested in a specific embodiment of the present invention. The left graph shows the relationship between capacitance C and frequency, and the right graph shows the relationship between quality factor Q and frequency. The vertical axis of the left graph represents the capacitance value (fF), and the vertical axis of the right graph represents the quality factor Q. The horizontal axis of both graphs represents the frequency value (GHz). Figure 10 This is a simulation curve of the parameters related to the transformer, balun, and coupling line in a specific embodiment of the present invention. The top graph shows the relationship between the primary coil inductance L1, the secondary coil inductance L2, and frequency; the middle graph shows the relationship between the primary coil quality factor Q1, the secondary coil quality factor Q2, and frequency; and the bottom graph shows the relationship between the coupling coefficient (k) and frequency. The vertical axes of the three graphs represent inductance (in pH), Q parameter (quality factor), and coupling coefficient (k), respectively. The horizontal axis represents frequency (GHz). Furthermore, the dataset size can be flexibly adjusted and expanded to any number according to actual needs, fully meeting the application requirements of AI-assisted design platforms for large-scale, high-quality datasets.

[0120] Furthermore, this embodiment also proposes an automated design and simulation method for millimeter-wave passive devices based on the above system, including the following steps:

[0121] 1) Generate and store the layout of millimeter-wave passive devices in batches according to the preset passive device parameter range.

[0122] 2) Perform automated batch simulation of the layout of the millimeter-wave passive device to obtain the S-parameter file of the corresponding layout.

[0123] 3) Perform simulation tests on the millimeter-wave passive device in the set frequency band according to the S-parameter file, and output the performance curve.

[0124] 4) Extract the S-parameter matrix of the corresponding frequency band from the performance curve and convert it into performance indicators.

Claims

1. An automated design and simulation system for millimeter-wave passive devices, characterized in that, The system includes a passive device layout generation module, an electromagnetic simulation module, and a testing and performance index extraction module connected in sequence. The passive device layout generation module is used to generate and store the layout of millimeter-wave passive devices in batches according to a preset range of passive device parameters. The electromagnetic simulation module is used to perform automated batch simulation of the layout generated by the passive device layout generation module to obtain the S-parameter file of the corresponding layout. The testing and performance index extraction module is used to perform simulation tests on the millimeter-wave passive devices in a set frequency band according to the S-parameter file and output performance curves.

2. The system according to claim 1, characterized in that, Also includes: The passive device layout generation module uses a parameter randomization strategy within the preset passive device parameter range, which involves uniform random sampling of discrete parameters or gradient stepping of continuous parameters, to generate parameter samples that uniformly cover the corresponding parameter space for the passive device. Then, it generates the corresponding layout of the passive device based on the parameter samples.

3. The system according to claim 1, characterized in that, Also includes: The test and performance index extraction module loads a standard test circuit template for passive devices. This module uses an S-parameter file to drive simulation, maps simulation data to the test circuit port, and then controls the simulator to complete the simulation of the specified frequency band to obtain the performance curve of the passive device.

4. The system according to claim 2, characterized in that, Also includes: The passive device layout generation module includes a device layout drawing function; wherein: The function for drawing the inductor layout is: gen_inductor(shape, n, w, linespace, inner_r, cantilever_len, cantilever_gap) Where shape represents the shape, n is the number of turns parameter; w is the coil line width parameter, linespace is the coil spacing parameter, inner_r is the coil inner diameter parameter; cantilever_len is the cantilever length parameter, cantilever_gap is the cantilever spacing parameter; The function for drawing the capacitor layout is: gen_capacitor(layer, len, wid) Here, layer is used to define the number of metal layers that form the core energy storage element of the capacitor, len represents the length of the capacitor, and wid represents the width of the capacitor; The transformer layout drawing function is: gen_transformer(prim_n, sec_n, prim_w, sec_w, linespace, prim_r, sec_r,cantilever_len, cantilever_gap) Wherein, prim_n is the number of turns of the primary coil, sec_n is the number of turns of the secondary coil; prim_w is the linewidth of the primary coil, sec_w is the linewidth of the secondary coil; linespace is the coil spacing parameter; prim_r is the inner diameter of the primary coil, sec_r is the inner diameter of the secondary coil; cantilever_len is the cantilever length parameter, and cantilever_gap is the cantilever spacing parameter; The function for drawing the Baron map is: gen_balun(single_n, diff_n, single_w, diff_w, linespace, single_r, diff_r, cantilever_len, cantilever_gap) Where single_n is the single-ended turns parameter, diff_n is the differential turns parameter; single_w is the balun single-ended linewidth parameter, diff_w is the balun differential linewidth parameter; linespace is the coil spacing parameter; single_r is the single-ended inner diameter parameter, diff_r is the differential inner diameter parameter; cantilever_len is the cantilever length parameter, and cantilever_gap is the cantilever spacing parameter; The function for drawing multi-free-point coupled-line layouts is: In this function, gen_coupler(point_num, x_range, y_range, cantilever_len, cantilever_gap), x_range is the maximum search space along the X-axis of the multi-degree-of-freedom coupled line, y_range is the maximum search space along the Y-axis of the multi-degree-of-freedom coupled line, point_num is the number of free points, cantilever_len is the cantilever length, and cantilever_gap is the cantilever spacing.

5. The system according to claim 3, characterized in that, Also includes: The testing and performance index extraction module extracts the S-parameter matrix corresponding to the frequency band from the performance curve and converts it into performance indices, specifically including: 1) Extraction of inductance value L: The test and performance index extraction module converts the S-parameters into impedance matrix Y-parameters, and combines them with the target test frequency f, using the expression... The inductance value L is calculated. Where imag() represents taking the imaginary number, Y 11 This is the input short-circuit admittance of the two-port network; 2) Capacitance value C extraction: The testing and performance index extraction module converts the S-parameters into the admittance matrix Y-parameters, and combines them with the target test frequency f, using the expression... The capacitance value C is calculated. 3) Extraction of quality factor Q: For inductive devices, the testing and performance extraction module converts the S-parameters into impedance matrix Y-parameters, and then uses the expression... Calculate the inductance quality factor Q, where real() represents taking the real part; For capacitive devices, the testing and performance index extraction module converts the S-parameters into the admittance matrix Y-parameters, and then uses the expression... The capacitor's quality factor Q is calculated. 4) Extraction of coupling coefficient k and correlation parameters: For devices with coupling structures, the test and performance index extraction module converts the S-parameters into an impedance matrix, and extracts the self-inductances L1 and L2, and the quality factors Q1 and Q2 of the two ports of the device from the impedance matrix. Here, L1 is the self-inductance of the first port, L2 is the self-inductance of the second port, Q1 is the quality factor of the first port, and Q2 is the quality factor of the second port. Then, based on the extracted self-inductances L1 and L2 and mutual inductances... Through expressions The coupling coefficient k is calculated. in, Describe the reverse effect of a change in current at port 2 on the voltage at port 1.

6. The system according to claim 4, characterized in that, The multi-free-point coupled-line layout includes two multi-degree-of-freedom coupled-line models. When generating the layout, each coupled-line model automatically generates a corresponding number of irregularly distributed free points on one side of the model based on the maximum search space of the X-axis and the maximum search space of the Y-axis. Then, starting from the cantilever of the model, the model passes through the free points in sequence, folds with the X-axis as the axis of symmetry, and then folds with the Y-axis as the axis of symmetry, returning to the position of the cantilever. Thus, a single coupled-line model is generated. The two coupled-line models are connected back to back to form the multi-free-point coupled-line layout.

7. An automated design and simulation method for millimeter-wave passive devices based on the system described in any one of claims 1-6, characterized in that, include: Based on the preset range of passive device parameters, the layout of millimeter-wave passive devices is generated in batches and stored. The layout of the millimeter-wave passive device is subjected to automated batch simulation to obtain the S-parameter file of the corresponding layout; Based on the S-parameter file, simulation tests are performed on the millimeter-wave passive device in the specified frequency band, and performance curves are output.

8. The method according to claim 7, characterized in that, Also includes: Extract the S-parameter matrix of the corresponding frequency band from the performance curve and convert it into performance indicators.

Images