Filter circuit design method and structure for wireless modules

Abstract

This invention discloses a design method and structure for a filter circuit in a wireless module, relating to the field of filter circuit technology. It addresses the problem in existing technologies of how to reduce the cost of harmonic suppression circuits in wireless modules while ensuring effective suppression of second and third harmonics. The method includes: obtaining design parameters for the filter circuit in the wireless module and constructing a simulation model of the filter circuit; the filter circuit includes at least two parallel filter branches, respectively used to suppress the second and third harmonics of the useful signal frequency band; each filter branch consists of trace inductors and capacitors; simulating the filter circuit simulation model to obtain the target total inductance value for each filter branch; and determining the layout and wiring length of the corresponding trace inductors in each filter branch based on the target total inductance value of each filter branch and the printed circuit board parameters. This invention reduces the cost of harmonic suppression circuits in wireless modules while ensuring circuit performance.

Description

Technical Field

[0001] This invention relates to the field of filtering circuit technology, and in particular to the design method and structure of filtering circuits for wireless modules. Background Technology

[0002] With the rapid development of wireless communication technology, 2.4G and other radio frequency wireless modules are widely used in various electronic devices. Electromagnetic compatibility (EMC), as a core performance indicator of electronic devices, is subject to strict constraints. During operation, wireless modules generate second and third harmonics, which not only degrade the communication quality of the wireless module but also cause electromagnetic interference, affecting the normal operation of surrounding electronic devices. Therefore, it is essential to effectively suppress these high-order harmonics through filtering circuits.

[0003] Currently, the mainstream harmonic suppression solution in the industry uses an LC (Inductor Capacitor) notch filter circuit. The core of this circuit consists of an inductor and a capacitor. An inductor is a passive electronic component that converts electrical energy into magnetic energy and stores it, while a capacitor is a passive electronic component that stores electrical charge. The inductive reactance of an inductor increases with frequency, while the capacitive reactance of a capacitor decreases with frequency. Together, they form a resonant circuit, achieving series resonance at a specific frequency. At this point, the total impedance of the circuit is at its minimum, resulting in strong attenuation of the signal at that frequency, thus specifically suppressing harmonic signals at that frequency. Useful signals at non-resonant frequencies are transmitted with almost no loss. However, in traditional LC filter circuits, the inductors are all standardized electronic components with independent packages. These components need to be purchased and soldered separately, which not only increases the material and manufacturing costs of the wireless module but also occupies valuable layout space on the printed circuit board (PCB), hindering the miniaturization design of the wireless module.

[0004] To reduce costs, some designs attempt to simplify the filter circuit structure, but this often leads to a decrease in harmonic suppression and fails to meet EMC constraints. Other designs attempt to adjust the ratio of capacitor and inductor parameters to balance cost and performance, but because the implementation of the inductor remains unchanged, the cost reduction effect is limited and it is difficult to achieve accurate suppression of the second and third harmonics at the same time. This can easily lead to problems such as excessive insertion loss in the useful signal band and inconsistent harmonic suppression effects.

[0005] In summary, how to reduce the cost of harmonic suppression circuits in wireless modules while ensuring the suppression effect on second and third harmonics and taking into account the transmission quality of useful signals has become a technical problem that urgently needs to be solved in this field. Summary of the Invention

[0006] The purpose of this invention is to provide a design method and structure for a filter circuit of a wireless module, which can reduce the cost of the harmonic suppression circuit of the wireless module while ensuring the suppression effect of the second and third harmonics.

[0007] To achieve the above objectives, the present invention provides the following technical solution: In a first aspect, the present invention provides a method for designing a filtering circuit for a wireless module, comprising: Obtain the design parameters of the filtering circuit in the wireless module and construct a simulation model of the filtering circuit; the design parameters include at least the useful signal frequency band and the printed circuit board parameters; the filtering circuit includes at least two parallel filtering branches, which are used to suppress the second and third harmonics of the useful signal frequency band, respectively; each filtering branch is composed of trace inductance and capacitor; the trace inductance is composed of the layout wiring and vias of the printed circuit board. The filter circuit simulation model is simulated to obtain the target total inductance value of each filter branch; Based on the target total inductance value and printed circuit board parameters for each filter branch, the layout and routing length of the corresponding trace inductance in each filter branch is determined.

[0008] Optionally, the target total inductance value includes a first target total inductance value and a second target total inductance value; the two filter branches are the first filter branch and the second filter branch, respectively; The filter circuit simulation model was performed to obtain the target total inductance value for each filter branch, including: When the parameters of the second filter branch remain unchanged, the inductance value of the first trace inductance is adjusted iteratively through the first simulation process to obtain the first target total inductance value in the first filter branch. When the parameters of the first filter branch remain unchanged, the inductance value of the second trace inductor is adjusted iteratively through the second simulation process to obtain the second target total inductance value in the second filter branch. The target auxiliary inductance value is obtained by fine-tuning the inductance value of the auxiliary inductor in the filter circuit through the third simulation process.

[0009] Optionally, the design parameters also include a preset first capacitance value, a preset first attenuation threshold, and a preset in-band insertion loss value; When the parameters of the second filter branch remain unchanged, the inductance value of the first trace inductor is iteratively adjusted through the first simulation process to obtain the first target total inductance value corresponding to the first trace inductor, including: In the first simulation, the value of the first capacitor remains unchanged, while the inductance value of the first trace inductance is a variable. The first transmission coefficient attenuation value corresponding to the second harmonic and the second transmission coefficient attenuation value corresponding to the useful signal frequency band are determined. When the attenuation value of the first transmission coefficient is greater than the first attenuation threshold, the inductance value of the first trace inductance is increased; When the attenuation value of the first transmission coefficient is less than or equal to the first attenuation threshold and the attenuation value of the second transmission coefficient is less than the preset in-band insertion loss value, the value of the first trace inductance is reduced. Iteratively adjust the inductance value of the first trace inductor until the first transmission coefficient attenuation value is less than or equal to the first attenuation threshold and the second transmission coefficient attenuation value is greater than or equal to the preset in-band insertion loss value, and output the first target total inductance value.

[0010] Optionally, the design parameters also include a preset second capacitance value and a preset second attenuation threshold; When the parameters of the first filter branch remain unchanged, the inductance value of the second trace inductor is iteratively adjusted through the second simulation process to obtain the second target total inductance value corresponding to the second trace inductor, including: In the second simulation, the value of the second capacitor remains unchanged, while the value of the second trace inductance is a variable. The attenuation value of the third transmission coefficient corresponding to the third harmonic and the attenuation value of the fourth transmission coefficient corresponding to the useful signal frequency band are determined. When the attenuation value of the third transmission coefficient is greater than the second attenuation threshold, the value of the second trace inductance is increased; When the attenuation value of the third transmission coefficient is less than or equal to the second attenuation threshold and the attenuation value of the fourth transmission coefficient is less than the preset in-band insertion loss value, the value of the second trace inductance is reduced. Iteratively adjust the value of the second trace inductance until the third transmission coefficient attenuation value is less than or equal to the second attenuation threshold and the fourth transmission coefficient attenuation value is greater than or equal to the preset in-band insertion loss value, and output the second target total inductance value.

[0011] Optionally, the target auxiliary inductance value is obtained by fine-tuning the inductance value of the auxiliary inductor through a third simulation process, including... In the third simulation, the total inductance values ​​of the first and second targets remain unchanged, and the attenuation values ​​of the fifth transmission coefficient corresponding to the useful signal frequency band, the attenuation values ​​of the sixth transmission coefficient corresponding to the second harmonic, and the attenuation values ​​of the seventh transmission coefficient corresponding to the third harmonic are determined. When the fluctuation range of the fifth transmission coefficient attenuation value exceeds the preset fluctuation threshold, the inductance value of the auxiliary inductor is finely adjusted with a preset adjustment step size. After each fine-tuning, the simulation is repeated until the attenuation value of the fifth transmission coefficient is greater than or equal to the preset in-band insertion loss value and the fluctuation amplitude is less than or equal to the preset fluctuation threshold. At the same time, the attenuation value of the sixth transmission coefficient is less than or equal to the first attenuation threshold and the attenuation value of the seventh transmission coefficient is less than or equal to the second attenuation threshold. Then, the target auxiliary inductance value is output.

[0012] Optionally, based on the target total inductance value of each filter branch and the printed circuit board parameters, the layout routing length of the corresponding trace inductance in each filter branch is determined, including: Based on the printed circuit board parameters, determine the via parasitic inductance in each filter branch; The difference between the target total inductance and the via parasitic inductance is determined as the inductance value of the corresponding trace inductance. The layout and routing length of the trace inductance are determined based on the inductance value of the trace inductance.

[0013] Optionally, the printed circuit board parameters include at least the thickness of the printed circuit board and the drilling diameter of the vias; Based on the printed circuit board parameters, determine the via parasitic inductance in each filter branch, including: Substitute the PCB thickness and via drilling diameter into the formula: ; The parasitic inductance of the via was calculated; where, Parasitic inductance of vias; The thickness of the printed circuit board; The diameter of the through hole; It is a constant.

[0014] Optionally, the printed circuit board parameters also include the characteristic impedance of the printed circuit board and the effective dielectric constant of the printed circuit board. The layout and routing length of the trace inductance are determined based on the inductance value, including: Substituting the characteristic impedance and effective dielectric constant into the formula: ; The layout routing length is calculated; where, This is the inductance value of the trace inductance; Characteristic impedance; The effective dielectric constant; The speed of light; This refers to the length of the wiring layout.

[0015] Optionally, the printed circuit board parameters also include trace width, substrate dielectric constant, and substrate thickness; Before determining the layout routing length of the trace inductance based on the trace inductance value, the method also includes: determining the effective dielectric constant of the printed circuit board; Determining the effective dielectric constant of a printed circuit board includes: Substitute the trace width, substrate dielectric constant, and substrate thickness into the formula: ; The effective dielectric constant is calculated. The dielectric constant of the substrate; The thickness of the substrate; This refers to the trace width; It is a constant.

[0016] Compared with existing technologies, the wireless module filtering circuit design method provided by this invention abandons the traditional independently packaged inductors in the filtering branches. Instead, it utilizes the layout and wiring of the printed circuit board and vias to form the trace inductors, eliminating the need for additional procurement and soldering, significantly reducing material and manufacturing costs, and saving PCB space to meet miniaturization requirements. A simulation model of the filtering circuit is constructed, and combined with parameters such as the useful signal frequency band, two parallel filtering branches are set to suppress the second and third harmonics respectively. The target total inductance value of each filtering branch is accurately obtained through simulation, ensuring that the harmonic suppression effect meets the standards and satisfies EMC constraints. Based on the target total inductance value and PCB parameters, the layout and wiring length of the trace inductors are determined to ensure that the actual inductance parameters are consistent with the simulation values, avoiding problems such as excessive insertion loss within the useful signal band and uneven harmonic suppression effects. This approach reduces costs while simultaneously ensuring both harmonic suppression and useful signal transmission quality.

[0017] Secondly, the present invention also provides a filtering circuit structure for a wireless module, comprising at least two filtering branches connected in parallel, the two filtering branches being used to suppress the second harmonic and the third harmonic of the useful signal frequency band respectively; each filtering branch is composed of a trace inductor and a capacitor. The layout and wiring length of the corresponding trace inductor in each filter branch are obtained using the filter circuit design method of any of the above wireless modules. Attached Figure Description

[0018] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this invention, illustrate exemplary embodiments of the invention and are used to explain the invention, but do not constitute an undue limitation of the invention. In the drawings: Figure 1 A flowchart illustrating a filtering circuit design method for a wireless module according to an embodiment of the present invention; Figure 2 A schematic diagram of the filtering circuit of a wireless module provided in one embodiment of the present invention; Figure 3 A partial flowchart illustrating a filtering circuit design method for a wireless module provided in an embodiment of the present invention; Figure 4 A schematic diagram of simulation results for transmission coefficients at different frequencies provided for one embodiment of the present invention; Figure 5 A partial flowchart illustrating a filtering circuit design method for a wireless module provided in an embodiment of the present invention; Figure 6 To and Figure 2 The corresponding filter circuit on the printed circuit board.

[0019] Reference numerals: 1-First filter branch; 2-Second filter branch; 3-Input port; 4-Output port; C1-First capacitor; C2-Second capacitor; L1-First trace inductance; L2-Second trace inductance; L3-Auxiliary inductance. Detailed Implementation

[0020] To facilitate a clear description of the technical solutions in the embodiments of the present invention, the terms "first" and "second" are used to distinguish identical or similar items with essentially the same function and effect. For example, the first threshold and the second threshold are merely used to distinguish different thresholds and do not limit their order. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and that the terms "first" and "second" are not necessarily different.

[0021] It should be noted that in this invention, the terms "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in this invention should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0022] In this invention, "at least one" means one or more, and "more than one" means two or more. "And / or" describes the relationship between the associated objects, indicating that three relationships can exist.

[0023] like Figure 1 As shown, this embodiment of the invention provides a method for designing a filtering circuit for a wireless module, which may include: Step 100: Obtain the design parameters of the filtering circuit in the wireless module and construct a simulation model of the filtering circuit; the design parameters include at least the useful signal frequency band and the printed circuit board parameters; the filtering circuit includes at least two parallel filtering branches, which are used to suppress the second and third harmonics of the useful signal frequency band, respectively; each filtering branch is composed of trace inductance and capacitor; the trace inductance is composed of the layout wiring and vias of the printed circuit board; The structure of the filter circuit designed in this invention is as follows: Figure 2 As shown, the two filtering branches are the first filtering branch 1 and the second filtering branch 2, respectively. The first filtering branch 1 includes a first capacitor C1 and a first trace inductor L1 connected in series. The second filtering branch 2 includes a second capacitor C2 and a second trace inductor L2 connected in series. The filtering circuit also includes an input port 3, an output port 4, and an auxiliary inductor L3. The first terminals of the input port 3 and the first capacitor C1 are both connected to the first terminal of the auxiliary inductor L3, and the first terminals of the output port 4 and the second capacitor C2 are both connected to the second terminal of the auxiliary inductor L3. The auxiliary inductor L3 is a standardized inductor element with an independent package.

[0024] Printed circuit board parameters specifically include process parameters directly related to layout and routing design, such as the board thickness, via drilling diameter, characteristic impedance, effective dielectric constant, trace width, substrate dielectric constant, and substrate thickness.

[0025] The filter circuit simulation model is built based on common standards in the field of RF circuit simulation and can be constructed using dedicated RF simulation software such as ADS. The circuit topology of the model is consistent with... Figure 2 The physical circuit is completely identical, and the simulation parameters match the actual wireless module's operating parameters and the printed circuit board's process parameters.

[0026] Specifically, the useful signal frequency band is the operating frequency band for the wireless module to achieve normal communication. It is the signal frequency that the filtering circuit needs to ensure lossless transmission, not the harmonic frequencies that need to be suppressed. For example, the 2.4 GHz band.

[0027] The main structure of a printed circuit board includes a metal conductor layer. Layout and routing is the planning and arrangement of the metal conductors in this metal conductor layer in terms of path, length, width, and spacing. It is directly fabricated on the substrate of the printed circuit board (such as FR4 board) through an etching process, forming an inseparable whole with the printed circuit board, and is also the core component of the printed circuit board.

[0028] The layout routing (also known as the layout trace) determines the basic inductance value of the trace inductance. It and vias are complementary and work together. Together, they can realize signal connectivity between different layers of the printed circuit board, and at the same time, they are superimposed to form the total inductance value of the trace inductance.

[0029] Vias are an inherent structure of printed circuit boards (PCBs), not independent components. Specifically, they are cylindrical metal holes drilled into PCBs, with metal (such as copper) plated on the hole walls. They enable the connection of metal conductors between different layers of the PCB. Vias are fabricated simultaneously with the PCB substrate and metal conductor layers, and are one of the core structures for PCBs to achieve multi-layer wiring and signal interconnection. The core parameters of vias are determined by the PCB design, including the PCB thickness and the drill diameter. The PCB thickness is the thickness of the PCB itself, and the vertical length of the via is consistent with the PCB thickness. The drill diameter must match the PCB's manufacturing process capabilities. Vias, when connected in series with the layout and routing, together constitute the trace inductance. The parasitic inductance of the via is part of the total trace inductance value.

[0030] A filter branch is an independent circuit branch in a filter circuit used to specifically suppress harmonics of a certain frequency. In this filter circuit, the two filter branches are connected in parallel and are respectively used to suppress the second and third harmonics of the useful signal. By reasonably designing the resonance parameters of the two branches, the electrical coupling effect between the branches can be reduced to an acceptable range for engineering applications, thereby achieving precise suppression of different harmonics.

[0031] Step 200: Simulate the filter circuit simulation model to obtain the target total inductance value of each filter branch; Specifically, a filter circuit simulation model refers to a virtual circuit model that is consistent with the actual physical circuit and is built in professional simulation software based on the design parameters of the filter circuit. The model simulates the working state of the actual circuit.

[0032] The target total inductance value is the inductance value that the trace inductance in each filter branch needs to reach in order to achieve precise suppression of harmonics at a specific frequency.

[0033] Before simulating the filter circuit simulation model, the initial capacitance values ​​of the first capacitor C1 and the second capacitor C2 need to be preset according to the harmonic suppression target of the filter branch. Then, the trace inductance value is adjusted iteratively to match the resonance requirement. In this invention, the first capacitor value and the second capacitor value are both preset fixed values, which are comprehensively selected based on the actual operating frequency band of the wireless module and the process adaptability of the printed circuit board. The design process can be simplified by adjusting the trace inductance value, and the continuous adjustable performance of the trace inductance value compensates for the need for fine adjustment of resonance parameters caused by the fixed capacitance value, so as to achieve accurate resonance at different harmonic frequencies.

[0034] Step 300: Based on the target total inductance value and printed circuit board parameters for each filter branch, determine the layout routing length of the corresponding trace inductance in each filter branch.

[0035] Specifically, layout routing length is the physical length of the metal wires that constitute the trace inductance in a printed circuit board.

[0036] Analysis of the beneficial effects of this embodiment: In the prior art, harmonic suppression of wireless modules generally adopts traditional LC notch filter circuits, whose inductors are all independently packaged standardized electronic components. This design mode brings multiple technical and production defects. Not only does the procurement, soldering, and packaging of independent inductors increase hardware costs, but the fixed package size also occupies valuable layout space on the PCB board, which is not conducive to the miniaturization and integration design of wireless modules. Furthermore, the inductance value of independent inductors is fixed, resulting in poor parameter matching flexibility and difficulty in accurately customizing according to actual needs. Multiple replacements will also increase design and debugging costs. At the same time, the soldering process of independent inductors is prone to problems such as cold solder joints and misalignment. The additional parasitic parameters introduced by the soldering points will also interfere with the resonant frequency of the filter circuit, affecting the harmonic suppression effect and the quality of useful signal transmission. In addition, traditional filter circuits often use multiple inductors superimposed to suppress the second and third harmonics simultaneously, which easily leads to mutual interference between the suppression effects of different frequency bands, making it difficult to balance the suppression accuracy of different harmonic frequency bands and the in-band transmission quality of useful signals.

[0037] The filter circuit design method of this invention obtains design parameters and constructs a simulation model, simulates to obtain the target total inductance value and calculates to determine the layout and routing length. Combined with key technical features such as dual parallel filter branches, routing inductance replacing independent inductance, and routing inductance composed of layout and routing and vias, a closed-loop design method system is formed. Each technical feature accurately solves the core defects of the prior art, and the synergistic effect of each feature achieves superimposed technical effects.

[0038] The filter circuit is configured with two parallel filter branches to suppress the second and third harmonics respectively. By designing dedicated branches to dedicated harmonic frequency bands, the coupling interference between branches is reduced, allowing the two branches to be independent and non-interfering with each other. This achieves precise suppression of different harmonics, solves the problem of traditional designs where multiple harmonic suppression is incomplete, and avoids defects such as resonant frequency shift and excessive insertion loss of useful signals caused by a single branch suppressing multiple harmonics.

[0039] Replacing traditional independent inductors with trace inductors as the core component of the filtering branch is a key solution to the high cost and limited layout space of traditional circuits. Trace inductors are directly integrated into the PCB board structure itself, eliminating the need to purchase independent components. This completely eliminates the material, soldering, and packaging costs of independent inductors, significantly reducing the hardware and manufacturing costs of the filtering circuit. Furthermore, without an independent package size, they are directly integrated into the PCB layout, without occupying additional space, effectively freeing up PCB layout resources. This provides a foundation for the miniaturization and integration of wireless modules, while also avoiding various process problems caused by soldering independent inductors, eliminating additional parasitic parameters introduced by soldering points, ensuring the process consistency and parameter stability of the filtering circuit, and improving the reliability of harmonic suppression. In this invention, only the auxiliary inductor L3 is retained as a separately packaged standardized inductor component. This is because the auxiliary inductor is used to stabilize the transmission characteristics of useful signal frequency bands and requires high-precision, low-parasitic electrical characteristics. Existing PCB layout processes struggle to meet these precision requirements. Retaining this independent inductor significantly reduces costs while ensuring the overall performance of the filtering circuit, balancing cost control and circuit reliability.

[0040] The trace inductor consists of the layout and routing of the printed circuit board (PCB) and vias. This design optimizes the feasibility and parameter controllability of the trace inductor. It utilizes the inherent structure of the PCB to form the trace inductor, without requiring additional physical modifications to the PCB. Only the path and length of the layout and routing need to be optimized according to the inductance value requirements. It is fully compatible with conventional PCB manufacturing processes and does not increase manufacturing difficulty or cost. The parameters of the layout and routing and vias can be precisely controlled through design, solving the problem of fixed inductance values ​​and difficulty in customization of traditional independent inductors. This provides a foundation for precise parameter matching of the trace inductor, enabling flexible and quantitative design of inductance values. At the same time, as an inherent structure of the PCB, vias, in collaboration with the layout and routing to form the trace inductor, not only enable signal connectivity between different layers of the PCB but also contribute to the inductance value of the trace inductor, allowing for a wider range of parameter adjustment and easier matching of precise harmonic suppression requirements.

[0041] The closed-loop design process—acquiring design parameters, building a simulation model, obtaining the target total inductance value through simulation, and calculating the layout and routing length—addresses the problems of blind parameter matching and low debugging efficiency in traditional filter circuit design. It achieves precise, digital, and efficient design of routing inductance parameters. The core design parameters, such as the useful signal frequency band and PCB board parameters, are obtained, ensuring that the filter circuit design is fully aligned with the actual application scenario of the wireless module, guaranteeing the design's adaptability. The target total inductance value is obtained through the simulation model, and parameter debugging can be completed without building physical circuits. This avoids the blind debugging process of repeated soldering and replacing individual inductors in traditional designs, significantly improving design efficiency and reducing design and debugging costs. Then, based on the target total inductance value and PCB board parameters, the layout and routing length is determined, achieving precise matching between the routing inductance parameters and harmonic suppression requirements. This ensures that the inductance value of the routing inductor perfectly matches the suppression requirements of the second and third harmonics, guaranteeing the harmonic suppression accuracy of the filter circuit and the transmission quality of the useful signal.

[0042] The synergistic effect of the core steps in this embodiment achieves full-process optimization of filter circuit design and application. Obtaining parameters and building models lays a scenario-based and standardized foundation for the entire design process, ensuring that the design direction aligns with actual needs. Simulation to obtain the target total inductance value enables precise digital adjustment of parameters, solving the blindness of traditional design. Calculating and determining the layout and wiring length realizes the transformation of design parameters into actual processes, allowing the precise parameters obtained from simulation to be implemented in the actual processing of PCB boards. Each step is interconnected, forming a closed loop from design to process. This ensures that the parameters of the wiring inductance accurately match the harmonic suppression requirements and are fully compatible with the PCB board processing technology, achieving a triple improvement in design efficiency, processing feasibility, and performance without the need for additional process modifications.

[0043] In summary, the filter circuit design method of this embodiment comprehensively solves the core defects of traditional LC filter circuits in terms of cost, layout, performance, and process through innovative technical features and closed-loop design process. The designed filter circuit is fully adapted to the harmonic suppression requirements of wireless modules, and takes into account cost control, structural design and performance.

[0044] Specifically, the target total inductance value includes a first target total inductance value and a second target total inductance value; the design parameters also include a preset first capacitance value C1 (i.e., the capacitance value of the first capacitor), a preset first attenuation threshold, a preset in-band insertion loss value, a preset second capacitance value C2 (i.e., the capacitance value of the second capacitor), and a preset second attenuation threshold.

[0045] In an exemplary implementation, see Figure 3 Step 200 may specifically include: Step 210: When the parameters of the second filter branch remain unchanged, the inductance value of the first trace inductor L1 is iteratively adjusted through the first simulation process to obtain the first target total inductance value corresponding to the first trace inductor, including: Step 210 may specifically include: (1) In the first simulation process, the value of the first capacitor remains unchanged, and the inductance value of the first trace inductance L1 is a variable. The first transmission coefficient attenuation value corresponding to the second harmonic and the second transmission coefficient attenuation value corresponding to the useful signal frequency band are determined. The step size for iterative adjustment is set according to the accuracy requirements of harmonic suppression. In this example, 0.005nH can be selected as the iteration step size, which is determined based on the combined requirements of second harmonic suppression accuracy and simulation efficiency. The smaller the step size, the higher the suppression accuracy and the more simulation iterations are required.

[0046] (2) When the attenuation value of the first transmission coefficient is greater than the first attenuation threshold, increase the inductance value of the first trace inductance L1; (3) When the attenuation value of the first transmission coefficient is less than or equal to the first attenuation threshold and the attenuation value of the second transmission coefficient is less than the preset in-band insertion loss value, the value of the first trace inductance L1 is reduced. (4) Iteratively adjust the inductance value of the first trace inductance L1 until the first transmission coefficient attenuation value is less than or equal to the first attenuation threshold and the second transmission coefficient attenuation value is greater than or equal to the preset in-band insertion loss value, and output the first target total inductance value.

[0047] Numerical Example: In this example, the first capacitor value is fixed at 1.6pF, the first attenuation threshold is -40dB, the preset in-band insertion loss is -0.2dB, the useful signal frequency band is 2.4G, the second harmonic frequency band is 4.8G, and the initial inductance value of the first trace inductance L1 is set to 0.27nH.

[0048] ① First iteration: L1=0.27nH. The simulation results show that the first transmission coefficient attenuation value of the 4.8G band is -38.7dB (>-40dB) and the second transmission coefficient attenuation value of the 2.4G band is -0.14dB (≥-0.2dB). Since the attenuation value of the first transmission coefficient does not reach the threshold, L1 is increased to 0.275nH in a step size of 0.005nH. ② Second iteration: L1=0.275nH, the simulation shows that the first transmission coefficient attenuation value of the 4.8G band is -39.3dB (>-40dB), and the second transmission coefficient attenuation value of the 2.4G band is -0.15dB (≥-0.2dB). It still does not meet the first attenuation threshold requirement, so L1 is increased in steps of 0.005nH. ③ Last iteration (48th iteration): L1 = 0.30nH. The simulation results show that the attenuation value of the first transmission coefficient in the 4.8G band is -40.5dB (≤-40dB) and the attenuation value of the second transmission coefficient in the 2.4G band is -0.185dB (≥-0.2dB). The threshold requirement is met, so the iteration stops and the inductance value of L1 at this time, 0.30nH, is output as the first target total inductance value.

[0049] It should be noted that the transmission coefficient in this embodiment of the invention is a physical quantity characterizing the transmission efficiency of a signal from the circuit input port to the output port, used to reflect the amplitude change and energy transfer effect of the signal after transmission through the circuit. Furthermore, the transmission coefficient attenuation value in this embodiment of the invention is a quantified result of the transmission coefficient (unit: dB), which can characterize the degree of power loss during signal transmission. The value is negative; the larger the absolute value, the more severe the signal suppression and the stronger the harmonic suppression effect.

[0050] The first through seventh transmission coefficient attenuation values ​​are specific quantification results of the transmission coefficient under different simulation scenarios and signal frequency bands, named only to distinguish the monitoring objects under different scenarios. For example, in this example, the first transmission coefficient attenuation value of 4.8 GHz is -38.7 dB, which essentially means that the quantization result of the transmission coefficient under this frequency band is -38.7 dB. This value is the transmission coefficient attenuation value in the current simulation stage, used to determine whether the second harmonic suppression meets the standard.

[0051] S220: When the parameters of the first filter branch remain unchanged (that is, after fixing the parameters of the first filter branch to the first target total inductance value), the value of the second trace inductance L2 is adjusted iteratively through the second simulation process to obtain the second target total inductance value in the second filter branch; in this example, 0.002nH can be selected as the iteration step size because the frequency of the third harmonic is higher and the adjustment accuracy of the inductance value is more required. A smaller step size can achieve accurate suppression of the third harmonic.

[0052] Step 220: In the second simulation process, the value of the second capacitor remains unchanged, and the value of the second trace inductance L2 is a variable. Determine the attenuation value of the third transmission coefficient corresponding to the third harmonic and the attenuation value of the fourth transmission coefficient corresponding to the useful signal frequency band. When the attenuation value of the third transmission coefficient is greater than the second attenuation threshold, the value of the second trace inductance L2 is increased; When the attenuation value of the third transmission coefficient is less than or equal to the second attenuation threshold and the attenuation value of the fourth transmission coefficient is less than the preset in-band insertion loss value, the value of the second trace inductance L2 is reduced. Iteratively adjust the value of the second trace inductance L2 until the third transmission coefficient attenuation value is less than or equal to the second attenuation threshold and the fourth transmission coefficient attenuation value is greater than or equal to the preset in-band insertion loss value, and output the second target total inductance value.

[0053] Numerical Example: In this example, the second capacitor value is fixed at 1.6pF, the second attenuation threshold is -41dB, the preset in-band insertion loss is -0.2dB, the useful signal frequency band is 2.4G, the third harmonic frequency band is 7.2G, the initial inductance value of the second trace inductance L2 is set to 0.56nH, and the first filter branch has a fixed first target total inductance value of L1=0.30nH, keeping the parameters unchanged.

[0054] ① First iteration: L2=0.56nH. The simulation results show that the attenuation value of the third transmission coefficient in the 7.2G band is -39.8dB (>-41dB), and the attenuation value of the fourth transmission coefficient in the 2.4G band is -0.16dB (≥-0.2dB). Since the attenuation value of the third transmission coefficient does not reach the threshold, L2 is increased to 0.562nH with a fine step size of 0.002nH. ② Second iteration: L2=0.562nH, the simulation results show that the attenuation value of the third transmission coefficient in the 7.2G band is -40.2dB (>-41dB), and the attenuation value of the fourth transmission coefficient in the 2.4G band is -0.162dB (≥-0.2dB). The second attenuation threshold requirement is still not met, so L2 is increased by the original step size. ③ The last iteration (55th iteration): L2 = 0.60nH. The simulation results show that the attenuation value of the third transmission coefficient in the 7.2G band is -41.3dB (≤-41dB) and the attenuation value of the fourth transmission coefficient in the 2.4G band is -0.19dB (≥-0.2dB). The threshold requirement is met, so the iteration stops and the inductance value of L2 at this time, 0.60nH, is output as the second target total inductance value.

[0055] S230: By fine-tuning the value of the auxiliary inductor L3 in the filter circuit through the third simulation process, the target auxiliary inductor value is obtained.

[0056] Step 230 may specifically include: (1) In the third simulation process, the total inductance of the first target and the total inductance of the second target remain unchanged. The attenuation value of the fifth transmission coefficient corresponding to the useful signal frequency band, the attenuation value of the sixth transmission coefficient corresponding to the second harmonic, and the attenuation value of the seventh transmission coefficient corresponding to the third harmonic are determined. (2) When the fluctuation range of the fifth transmission coefficient attenuation value exceeds the preset fluctuation threshold, the value of the auxiliary inductor L3 is finely adjusted with a preset adjustment step size; (3) After each fine-tuning, re-simulate until the attenuation value of the fifth transmission coefficient is greater than or equal to the preset in-band insertion loss value and the fluctuation amplitude is less than or equal to the preset fluctuation threshold. At the same time, the attenuation value of the sixth transmission coefficient is less than or equal to the first attenuation threshold and the attenuation value of the seventh transmission coefficient is less than or equal to the second attenuation threshold. Output the target auxiliary inductance value.

[0057] Numerical Example: In this example, the first target total inductance value L1 = 0.30nH, the second target total inductance value L2 = 0.60nH are fixed, the preset in-band insertion loss value is -0.2dB, the first attenuation threshold is -40dB, the second attenuation threshold is -41dB, the preset fluctuation threshold is ±0.01dB (i.e., the fluctuation range of the fifth transmission coefficient attenuation value does not exceed 0.01dB), and the initial value of the auxiliary inductor L3 is set to 0.5nH.

[0058] ① First round of simulation: L3=0.5nH. The simulation results show that the attenuation value of the fifth transmission coefficient in the 2.4G band fluctuates between -0.16dB and -0.22dB, with a fluctuation range of 0.06dB (>±0.01dB). The attenuation value of the sixth transmission coefficient in the 4.8G band is -39.7dB (>-40dB), and the attenuation value of the seventh transmission coefficient in the 7.2G band is -40.5dB (>-41dB). Because the useful signal transmission is unstable and the harmonic attenuation does not meet the standard, L3 is increased to 0.53nH with a fine step size of 0.03nH. ② Second round of simulation: L3=0.53nH. The simulation results show that the attenuation value of the fifth transmission coefficient in the 2.4G band fluctuates between -0.165dB and -0.212dB, with a fluctuation range of 0.047dB (>±0.01dB). The attenuation value of the sixth transmission coefficient in the 4.8G band is -40.1dB (≤-40dB), and the attenuation value of the seventh transmission coefficient in the 7.2G band is -41.2dB (≤-41dB). The fluctuation range still does not meet the standard, so L3 is increased by the original step size. ③ Final simulation (57th): L3 = 2.2nH, simulation yields the attenuation value of the fifth transmission coefficient in the 2.4G band ( Figure 4 The value pointed to by m1 is stable at -0.192dB (≥-0.2dB), with a fluctuation range of 0.006dB (≤±0.01dB). See [link / reference]. Figure 4 It can be seen that the attenuation value of the sixth transmission coefficient in the 4.8G band ( Figure 4 The value pointed to by m2 is -42.1dB, the attenuation value of the seventh transmission coefficient in the 7.2G band. Figure 4 The value pointed to by m3 is -46.7dB. All conditions are met, so the iteration stops and the inductance value of L3 at this time, 2.2nH, is output as the target auxiliary inductance value.

[0059] The beneficial effects of this embodiment are as follows: This part, through the scheme of independent iterative simulation of two filter branches and precise fine-tuning of auxiliary inductors, further realizes the refinement, controllability and stability improvement of filter circuit parameter design based on the original closed-loop design process, as follows: 1) Independent iterative simulation of branches enables precise control of a single variable and avoids mutual interference of multiple parameters. For example, the parameters of the second filter branch can be fixed first to optimize the first filter branch L1, and then the optimized parameters of the first filter branch can be fixed to optimize the second filter branch L2. Essentially, the complex optimization problem of two variables is decomposed into two simple optimization problems of one variable. This avoids the cross-influence of the parameter change of one inductor on the suppression effect of two harmonic frequency bands and the transmission quality of useful signals when adjusting L1 and L2 at the same time, ensuring that the parameter optimization of each filter branch can accurately match the suppression requirements of the corresponding harmonics, and improving the design accuracy of the target total inductance value. 2) Individual fine-tuning of auxiliary inductors enables refined calibration of useful signal transmission characteristics, taking into account both harmonic suppression and signal stability. After determining the total inductance values ​​of L1 and L2, the auxiliary inductor L3 is fine-tuned separately while keeping the core parameters of the filter branch unchanged to ensure that the suppression effect of the second and third harmonics is not affected. Precise calibration is performed on the fluctuation range of the attenuation value of the transmission coefficient in the useful signal frequency band, solving the problem of unstable useful signal transmission characteristics that may occur after the dual filter branches are connected in parallel. While ensuring that harmonic suppression meets the standards and in-band insertion loss exceeds the standard, the stability of useful signal transmission is further improved, allowing the filter circuit to achieve harmonic suppression while ensuring the core communication performance of the wireless module. 3) Hierarchical design with step-by-step simulation optimization enables traceability and debuggability of the design process. The entire process is divided into three levels: "second harmonic branch optimization → third harmonic branch optimization → auxiliary inductor fine-tuning". The optimization objectives, adjustment variables, and judgment criteria of each level are independent and clear. If a problem occurs in the parameter design of a certain level, the corresponding branch or component can be directly located and adjusted without the need for overall re-simulation. Compared to the traditional overall parameter adjustment method, this step-by-step design makes the entire simulation optimization process highly traceable and debuggable, reducing the difficulty of subsequent parameter correction and process adaptation.

[0060] See Figure 5 In an exemplary embodiment, based on the target total inductance value of each filter branch and the printed circuit board parameters, the layout routing length of the corresponding trace inductance in each filter branch is determined, including: Step 310: Based on the printed circuit board parameters, determine the via parasitic inductance in each filter branch; specifically, the printed circuit board parameters include the thickness of the printed circuit board, the drilling diameter of the vias, the characteristic impedance of the printed circuit board, the effective dielectric constant of the printed circuit board, the trace width, the dielectric constant of the substrate, and the substrate thickness, etc.

[0061] Step 310 may specifically include: Substitute the PCB thickness and via drilling diameter into the formula: ; The parasitic inductance of the via was calculated; where, Parasitic inductance of vias; The thickness of the printed circuit board; The diameter of the through hole; It is a constant, specifically, These are constants related to the printed circuit board substrate, when the substrate is FR4. Take 5.8. If it is an aluminum substrate, ceramic substrate, or other substrates, The values ​​need to be adjusted according to the electromagnetic properties of the substrate. The specific values ​​can be determined by simulation or experimentation using the dielectric constant and magnetic permeability of the substrate.

[0062] Step 320: Determine the inductance value of the corresponding trace by the difference between the target total inductance value and the via parasitic inductance. Step 330: Determine the layout and routing length of the trace inductor based on the inductance value of the trace inductor.

[0063] The layout and routing length of the trace inductance are determined based on the inductance value, including: Substituting the characteristic impedance and effective dielectric constant into the formula: ; The layout routing length is calculated; where, This is the inductance value of the trace inductance; Characteristic impedance; The effective dielectric constant; The speed of light; This refers to the length of the wiring layout.

[0064] Understandably, before determining the layout routing length of the trace inductance based on the trace inductance value, the method also includes: determining the effective dielectric constant of the printed circuit board; Determining the effective dielectric constant of a printed circuit board includes: Substitute the trace width, substrate dielectric constant, and substrate thickness into the formula: ; The effective dielectric constant is calculated. The dielectric constant of the substrate; The thickness of the substrate; For the trace width, For example, a constant. .

[0065] After obtaining the layout and routing length of each inductor, proceed to the PCB design stage. For specific routing design details, please refer to [link / reference needed]. Figure 2Then, the PCB is fabricated; the fabrication structure is shown in [reference needed]. Figure 6 .

[0066] The beneficial effects of this embodiment are as follows: The target total inductance value of the filter branch is converted into PCB layout and routing parameters that can be actually produced, specifically as follows: 1) Accurately cancel the parasitic inductance of vias, ensuring that the actual performance of the filter circuit is consistent with the simulation performance. The parasitic inductance of vias is an unavoidable interference factor in PCB layout. If its influence is ignored, it will cause the actual value of the trace inductance to deviate from the target total inductance value, thereby affecting the harmonic suppression effect and the quality of useful signal transmission. By quantifying parameters such as PCB board thickness and via diameter, and combining with formula (1), the parasitic inductance of vias is accurately calculated. In step 320, the parasitic inductance is subtracted from the target total inductance value to obtain the actual required inductance value of the trace inductance, which effectively cancels the interference of the parasitic inductance of vias and ensures that the actual working performance of the filter circuit is consistent with the previous simulation optimization results. 2) Realize the quantitative design of layout and routing length, and improve production consistency and reproducibility. For example, by using formulas (2) and (3), the trace inductance value, PCB characteristic impedance, effective dielectric constant and other parameters are directly related to the routing length, realizing the accurate calculation of the routing length (rather than empirical estimation). The standardized formulaic calculation method allows different designers and production batches to obtain consistent wiring lengths based on the same parameters, significantly improving the standardization and production consistency of PCB layout and routing. Furthermore, this method can be directly replicated in the design of filter circuit PCBs for other frequency bands and specifications, enhancing the replicability and versatility of the technical solution. 3) All parameters in the example (via parasitic inductance, effective dielectric constant, wiring length) are quantified and calculated from actual PCB parameters, and the source of parameters for each step and formula is clear and traceable. If PCB process parameters (such as board thickness and line width) are adjusted later, the corresponding wiring length and trace inductance values ​​can be recalculated directly using the formulas without needing to perform overall simulation optimization again. This significantly reduces the difficulty of later process adaptation and parameter correction, shortening the design cycle.

[0067] See Figure 2 The present invention also provides a filtering circuit structure for a wireless module, comprising at least two parallel filtering branches, the two filtering branches being used to suppress the second and third harmonics of the useful signal frequency band, respectively; each filtering branch is composed of a trace inductor and a capacitor; the layout and wiring length of the corresponding trace inductor in each filtering branch is obtained by using the filtering circuit design method of the wireless module in any of the above embodiments.

[0068] Although the invention has been described herein in conjunction with various embodiments, those skilled in the art will understand and implement other variations of the disclosed embodiments by reviewing the accompanying drawings, the disclosure, and the appended claims in carrying out the claimed invention. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality.

[0069] Although the invention has been described in conjunction with specific features and embodiments, it is apparent that various modifications and combinations can be made therein without departing from the spirit and scope of the invention. Accordingly, this specification and drawings are merely illustrative descriptions of the invention as defined by the appended claims and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of the invention. Clearly, those skilled in the art can make various alterations and modifications to the invention without departing from its spirit and scope. Thus, if such modifications and modifications of the invention fall within the scope of the claims and their equivalents, the invention is also intended to include such modifications and modifications.

Claims

1. A method for designing a filtering circuit for a wireless module, characterized in that, include: Obtain the design parameters of the filtering circuit in the wireless module and construct a simulation model of the filtering circuit; the design parameters include at least the useful signal frequency band and printed circuit board parameters; the filtering circuit includes at least two parallel filtering branches, which are used to suppress the second and third harmonics of the useful signal frequency band, respectively; each filtering branch is composed of trace inductance and capacitor; the trace inductance is composed of the layout wiring and vias of the printed circuit board; The simulation model of the filter circuit is simulated to obtain the target total inductance value of each filter branch; Based on the target total inductance value of each filter branch and the printed circuit board parameters, the layout routing length of the corresponding trace inductance in each filter branch is determined.

2. The filtering circuit design method for the wireless module according to claim 1, characterized in that, The target total inductance value includes a first target total inductance value and a second target total inductance value; The two filtering branches are the first filtering branch and the second filtering branch, respectively. The filter circuit simulation model is simulated to obtain the target total inductance value of each filter branch, including: When the parameters of the second filtering branch remain unchanged, the inductance value of the first trace inductance is adjusted iteratively through the first simulation process to obtain the first target total inductance value in the first filtering branch; When the parameters of the first filtering branch remain unchanged, the inductance value of the second trace inductance is adjusted iteratively through the second simulation process to obtain the second target total inductance value in the second filtering branch; The target auxiliary inductance value is obtained by fine-tuning the inductance value of the auxiliary inductor in the filter circuit through the third simulation process.

3. The filtering circuit design method for the wireless module according to claim 2, characterized in that, The design parameters also include a preset first capacitance value, a preset first attenuation threshold, and a preset in-band insertion loss value. When the parameters of the second filter branch remain unchanged, the inductance value of the first trace inductor is iteratively adjusted through the first simulation process to obtain the first target total inductance value corresponding to the first trace inductor, including: In the first simulation process, the first capacitor value remains unchanged, the inductance value of the first trace inductance is a variable, and the first transmission coefficient attenuation value corresponding to the second harmonic and the second transmission coefficient attenuation value corresponding to the useful signal frequency band are determined. When the attenuation value of the first transmission coefficient is greater than the first attenuation threshold, the inductance value of the first trace inductance is increased; When the first transmission coefficient attenuation value is less than or equal to the first attenuation threshold and the second transmission coefficient attenuation value is less than the preset in-band insertion loss value, the value of the first trace inductance is reduced. Iteratively adjust the inductance value of the first trace inductor until the first transmission coefficient attenuation value is less than or equal to the first attenuation threshold and the second transmission coefficient attenuation value is greater than or equal to the preset in-band insertion loss value, and output the first target total inductance value.

4. The filtering circuit design method for the wireless module according to claim 3, characterized in that, The design parameters also include a preset second capacitance value and a preset second attenuation threshold; When the parameters of the first filter branch remain unchanged, the inductance value of the second trace inductor is iteratively adjusted through the second simulation process to obtain the second target total inductance value corresponding to the second trace inductor, including: In the second simulation process, the value of the second capacitor remains unchanged, while the value of the second trace inductance is a variable. The third transmission coefficient attenuation value corresponding to the third harmonic and the fourth transmission coefficient attenuation value corresponding to the useful signal frequency band are determined. When the attenuation value of the third transmission coefficient is greater than the second attenuation threshold, the value of the second trace inductance is increased; When the attenuation value of the third transmission coefficient is less than or equal to the second attenuation threshold and the attenuation value of the fourth transmission coefficient is less than the preset in-band insertion loss value, the value of the second trace inductance is reduced. The value of the second trace inductance is iteratively adjusted until the third transmission coefficient attenuation value is less than or equal to the second attenuation threshold and the fourth transmission coefficient attenuation value is greater than or equal to the preset in-band insertion loss value, and then the second target total inductance value is output.

5. The filtering circuit design method for the wireless module according to claim 4, characterized in that, The target auxiliary inductance value is obtained by fine-tuning the inductance value of the auxiliary inductor through the third simulation process, including... In the third simulation process, the first target total inductance value and the second target total inductance value remain unchanged, and the fifth transmission coefficient attenuation value corresponding to the useful signal frequency band, the sixth transmission coefficient attenuation value corresponding to the second harmonic and the seventh transmission coefficient attenuation value corresponding to the third harmonic are determined. When the fluctuation range of the fifth transmission coefficient attenuation value exceeds the preset fluctuation threshold, the inductance value of the auxiliary inductor is finely adjusted with a preset adjustment step size. After each fine-tuning, the simulation is repeated until the attenuation value of the fifth transmission coefficient is greater than or equal to the preset in-band insertion loss value and the fluctuation amplitude is less than or equal to the preset fluctuation threshold. At the same time, the attenuation value of the sixth transmission coefficient is less than or equal to the first attenuation threshold and the attenuation value of the seventh transmission coefficient is less than or equal to the second attenuation threshold. Then, the target auxiliary inductance value is output.

6. The filtering circuit design method for a wireless module according to claim 1, characterized in that, Based on the target total inductance value of each filter branch and the printed circuit board parameters, the layout routing length of the corresponding trace inductance in each filter branch is determined, including: Based on the printed circuit board parameters, determine the via parasitic inductance in each filter branch; The difference between the target total inductance value and the via parasitic inductance is determined as the inductance value of the corresponding trace inductance. The layout routing length of the routing inductor is determined based on the inductance value of the routing inductor.

7. The filtering circuit design method for a wireless module according to claim 6, characterized in that, The printed circuit board parameters include at least the thickness of the printed circuit board and the drilling diameter of the vias; Based on the printed circuit board parameters, the via parasitic inductance in each filter branch is determined, including: Substitute the thickness of the printed circuit board and the drilling diameter of the via into the formula: ; The parasitic inductance of the via is calculated; wherein, The parasitic inductance of the via; The thickness of the printed circuit board; The diameter of the through hole; It is a constant.

8. The filtering circuit design method for a wireless module according to claim 6, characterized in that, The printed circuit board parameters also include the characteristic impedance of the printed circuit board and the effective dielectric constant of the printed circuit board. Determining the layout routing length of the trace inductor based on its inductance value includes: Substituting the characteristic impedance and the effective dielectric constant into the formula: ; The layout wiring length is calculated; wherein, The inductance value of the aforementioned trace inductance; The characteristic impedance; The effective dielectric constant is denoted as . The speed of light; The wiring length of the layout is given.

9. The filtering circuit design method for a wireless module according to claim 8, characterized in that, The printed circuit board parameters also include trace width, substrate dielectric constant, and substrate thickness; Before determining the layout routing length of the trace inductor based on the inductance value of the trace inductor, the method further includes: determining the effective dielectric constant of the printed circuit board; Determining the effective dielectric constant of the printed circuit board includes: Substituting the trace width, the substrate dielectric constant, and the substrate thickness into the formula: ; The effective dielectric constant is calculated. The dielectric constant of the substrate; The thickness of the substrate; The width of the trace; It is a constant.

10. The filtering circuit structure of a wireless module, characterized in that, At least including: Two filter branches are connected in parallel, and the two filter branches are used to suppress the second and third harmonics of the useful signal frequency band, respectively; each filter branch is composed of a trace inductor and a capacitor; The layout and wiring length of the corresponding trace inductor in each filter branch are obtained using the filter circuit design method of the wireless module as described in any one of claims 1 to 9.

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