Method and apparatus for generating waveforms to counteract superconducting quantum computing circuit distortions
By generating and synthesizing square wave waveforms with different periods, the problem of severe square wave distortion in superconducting quantum computing was solved, and simplified calibration and efficient quantum bit control were achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- BEIJING ACAD OF QUANTUM INFORMATION SCI
- Filing Date
- 2026-02-02
- Publication Date
- 2026-06-19
AI Technical Summary
The square wave waveform in existing superconducting quantum computing is severely distorted, resulting in complex calibration and low success rate, making it difficult to apply in large-scale systems.
By generating square waves with different periods and performing synthesis processing, a target waveform is generated to resist system distortion and simplify the calibration process.
The generated waveform can resist system distortion, reduce the tailing effect caused by distortion, simplify the calibration process, and improve the control efficiency of qubits.
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Figure CN122242806A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of superconducting quantum computing technology, and in particular to a method and apparatus for generating waveforms that resist distortion in superconducting quantum computing circuits. Background Technology
[0002] In the field of superconducting quantum computing, tunable frequency qubits are the core functional units for various experiments. Currently, square wave biasing is the mainstream method for realizing various experimental operations in quantum computing. For example, square waves can be used to control the frequency of the qubit, causing it to resonate with the superconducting resonant cavity to initialize the qubit; the frequency of the qubit can be optimized and adjusted using square waves to achieve the best readout effect; and the operating frequency can be switched by adjusting the qubit frequency using square waves.
[0003] However, square waves have a wide spectral range, and the frequency responses vary greatly from the device generating the waveform to the superconducting quantum control circuitry, making distortion the most severe issue. Current superconducting quantum computing control experiments rely on distortion calibration to overcome this problem, incurring enormous time and manpower costs. For example, typical distortion calibration requires first calibrating the control and readout of the qubits, then generating distortion using a special square wave, measuring the distortion using the calibrated qubits, then using the measured distortion magnitude to infer the system's response, and finally performing pre-distortion processing on the square wave waveform based on the measured response to achieve calibration. The entire calibration process is complex and depends on multiple factors, including qubit manipulation, readout, decoherence, distortion measurement accuracy, and distortion fitting errors, resulting in a low success rate and difficulty in automation. These shortcomings further hinder the practical application of this distortion calibration method in large-scale superconducting quantum computing systems. Summary of the Invention
[0004] To address the problems of existing technologies, this application provides a new square wave waveform synthesis scheme. The synthesized square wave waveform can be used without calibration compared to ordinary square waves, and it can also achieve control of qubits.
[0005] According to the first aspect of this application, a method for generating waveforms resistant to distortion in superconducting quantum computing circuits is provided, characterized by comprising:
[0006] The control synthesis device generates a first square wave with a first period; The synthesizing apparatus is controlled to generate a second square wave having a second period, wherein the first period is twice the second period; and The first square wave and the second square wave are synthesized to generate a target waveform, which is used in the superconducting quantum computing circuit.
[0007] According to a second aspect of this application, a waveform generation device resistant to superconducting quantum computing circuit distortion is provided, characterized in that it comprises: A controller is configured to control a synthesis apparatus to generate a first square wave having a first period, and to control the synthesis apparatus to generate a second square wave having a second period, wherein the first period is twice the second period; and A generator is used to synthesize the first square wave and the second square wave to generate a target waveform, which is used in the superconducting quantum computing circuit.
[0008] According to a third aspect of this application, an electronic device is provided, comprising: Processor; and A memory storing computer instructions that, when executed by the processor, cause the processor to perform the method described in the first aspect.
[0009] According to a fourth aspect of this application, a non-transitory computer storage medium is provided, which stores a computer program that, when executed by a plurality of processors, causes the processors to perform the method described in the first aspect.
[0010] According to the waveform generation method and apparatus for resisting superconducting quantum computing circuit distortion provided in this application, the generated waveform can resist the distortion caused by the system. After the waveform operation is completed, the tailing caused by the distortion is greatly alleviated and has no significant impact on subsequent quantum operations. Attached Figure Description
[0011] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings, without exceeding the scope of protection claimed by this application.
[0012] Figure 1 This is a flowchart of a method for generating waveforms that resist superconducting quantum computing circuit distortion according to an embodiment of this application.
[0013] Figure 2 This is a schematic diagram of a synthesized target waveform according to an embodiment of this application.
[0014] Figure 3 This is a flowchart of a method for generating waveforms that resist superconducting quantum computing circuit distortion according to another embodiment of this application.
[0015] Figure 4This is a comparison diagram of a spin echo experiment performed on a normal square wave and a square wave synthesized according to an embodiment of this application.
[0016] Figure 5 This is a schematic diagram of a waveform generation apparatus for resisting superconducting quantum computing circuit distortion according to an embodiment of this application.
[0017] Figure 6 This is a schematic diagram of the structure of an electronic device provided in this application. Detailed Implementation
[0018] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0019] In summary, given the severe distortion of square wave waveforms in existing technologies, this application provides a novel square wave waveform synthesis scheme. The synthesized waveform can resist system-induced distortion, thus eliminating the need for square wave waveform calibration, while also enabling control of qubits.
[0020] According to one aspect of this application, a method for generating waveforms resistant to distortion in superconducting quantum computing circuits is provided. Figure 1 This is a flowchart of a method for generating waveforms resistant to superconducting quantum computing circuit distortion according to an embodiment of this application. Figure 1 As shown, the method includes the following steps: Step S101: Control the synthesis device to generate a first square wave with a first period.
[0021] In one embodiment, such as Figure 2 As shown, the synthesis device can be controlled to generate a first square wave with a first period, the waveform length of which can be maintained for only one first period. The period can range from tens of nanoseconds to several microseconds, depending on the requirements. In one specific embodiment, corresponding software can be controlled to synthesize digital signals to generate a first square wave with a first period. In one specific embodiment, the synthesis device may include a signal generator or signal source, such as a function signal generator, arbitrary waveform generator, etc.
[0022] Step S102: Control the synthesis device to generate a second square wave with a second period, wherein the first period is twice the second period.
[0023] In one embodiment, such as Figure 2As shown, the synthesizer can be controlled to generate a second square wave with a second period. The frequency of the second square wave is twice that of the first square wave, and the first period is twice that of the second period. The waveform length of the second square wave generated by the synthesizer can be controlled to remain at two second periods, and the waveform length and waveform height of the second square wave are consistent with those of the first square wave.
[0024] Step S103: The first square wave and the second square wave are synthesized to generate a target waveform, which is used in the superconducting quantum computing circuit.
[0025] In one embodiment, the first square wave and the second square wave are synthesized to generate the target waveform. In another embodiment, the second square wave is processed first, and then the first square wave and the processed second square wave are synthesized.
[0026] In one specific embodiment, such as Figure 2 As shown, the amplitude of the second square wave is first amplified by a factor of two; then, the amplified second square wave is flipped vertically; finally, the first square wave and the flipped second square wave are superimposed to generate the target waveform.
[0027] In an optional embodiment, step S103 may include: The amplitude of the second square wave is amplified by a factor of two; The amplified second square wave is flipped vertically; and The target waveform is generated by superimposing the first square wave and the second square wave after flipping them vertically.
[0028] Figure 3 This is a flowchart of a method for generating waveforms to resist superconducting quantum computing circuit distortion according to another embodiment of this application. Figure 1 compared to, Figure 3 Steps S301 to S303 of the method shown are Figure 1 Steps S101 to S103 of the method shown are the same, except that, Figure 3 The method shown also includes: Step S304: Control the qubit using the target waveform.
[0029] In one embodiment, the generated target waveform includes multiple square wave steps, one or more of which can be selected (when the bit operating point is at a symmetry point) for use as control of the qubit. For example... Figure 2 As shown, the generated target waveform has four square wave steps, and one or two can be selected for use as control of the qubit.
[0030] In an optional embodiment, step S304 may include: Determine one or more square wave steps from each waveform period of the target waveform; and The qubits are controlled using one or more defined square wave steps.
[0031] Furthermore, the square wave synthesis method proposed in this application is applicable to various softened square wave waveforms (softening refers to square waves with relatively slow rising or falling edges). Specific applications include controlling the frequency of qubits for rapid initialization, controlling the frequency of qubits for readout optimization, and controlling the frequency of qubits or couplers to implement two-qubit gates in superconducting quantum computing experiments. It can also be extended to other experiments that require control using square waves.
[0032] Figure 4 The distortion tail effect of a standard square wave (left) and the square wave synthesized in this application (right) is examined and compared using the standard spin echo experiment in superconducting quantum computing. Here, "occupancy probability" represents the probability population of measuring the occupancy state of a qubit in the quantum bit experiment. The results of the spin echo experiment for different phases will evolve differently over time. For example... Figure 4 As shown, a bit control experiment was conducted between a normal square wave and the square wave synthesized in this application. After waiting 100 ns, a standard phase-changing spin echo experiment was performed (the circles, triangles, and square data points correspond to the last pulse control signal in the spin echo experiment, with phases set to 0°, 120°, and 240°, respectively). If there is no distortion tailing effect, the triangle and square data points should completely overlap, and the circles, triangles, and square data points exhibit almost identical attenuation behavior. Through comparison, it can be found that the square wave waveform synthesized in this application meets the expectation of no distortion effect, while the normal square wave exhibits obvious oscillatory behavior. This is a result of the frequency of the qubits caused by the distortion tail changing as the distance from the square wave increases. Therefore, using the square wave waveform synthesized in this application significantly alleviates the distortion-induced tailing problem.
[0033] According to another aspect of this application, a waveform generation apparatus resistant to distortion in superconducting quantum computing circuits is provided. Figure 5 This is a schematic diagram of a waveform generation apparatus for superconducting quantum computing circuit distortion according to an embodiment of this application. Figure 5 As shown, the device includes a controller 501 and a generator 502, wherein the controller 501 is used to control the synthesis device to generate a first square wave with a first period and to control the synthesis device to generate a second square wave with a second period, wherein the first period is twice the second period; the generator 502 is used to synthesize the first square wave and the second square wave to generate a target waveform.
[0034] In an alternative embodiment, generator 502 can be used to: The amplitude of the second square wave is amplified by a factor of two; The amplified second square wave is flipped vertically; and The target waveform is generated by superimposing the first square wave and the second square wave after flipping them vertically.
[0035] In an alternative embodiment, controller 501 can also be used to control the qubit using the target waveform.
[0036] In an alternative embodiment, controller 501 can be used to: Determine one or more square wave steps from each waveform period of the target waveform; and The qubits are controlled using one or more defined square wave steps.
[0037] According to the waveform generation method and apparatus for resisting superconducting quantum computing circuit distortion provided in this application, the generated waveform can resist the distortion caused by the system. After the waveform operation is completed, the tailing caused by the distortion is greatly alleviated and has no significant impact on subsequent quantum operations.
[0038] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.
[0039] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are all optional embodiments, and the actions and modules involved are not necessarily essential to this application.
[0040] In the several embodiments provided in this application, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be an electrical connection or other forms.
[0041] See Figure 6 , Figure 6An electronic device is provided, including a processor and a memory. The memory stores computer instructions or one or more programs, which, when executed by the processor, cause the processor to execute the computer instructions to achieve the following: Figure 1 and Figure 3 The method and its detailed scheme are shown.
[0042] It should be understood that the above-described device embodiments are merely illustrative, and the device disclosed in this invention can be implemented in other ways. For example, the division of units / modules described in the above embodiments is only a logical functional division, and there may be other division methods in actual implementation. For example, multiple units, modules, or components may be combined, integrated into another system, or some features may be ignored or not executed.
[0043] Furthermore, unless otherwise specified, the functional units / modules in the various embodiments of the present invention can be integrated into one unit / module, or each unit / module can exist physically separately, or two or more units / modules can be integrated together. The integrated units / modules described above can be implemented in hardware or as software program modules.
[0044] When the integrated unit / module is implemented in hardware, the hardware can be digital circuits, analog circuits, etc. The physical implementation of the hardware structure includes, but is not limited to, transistors, memristors, etc. Unless otherwise specified, the processor or chip can be any suitable hardware processor, such as a CPU, GPU, FPGA, DSP, and ASIC, etc. Unless otherwise specified, the on-chip cache, off-chip memory, and storage can be any suitable magnetic or magneto-optical storage medium, such as resistive random access memory (RRAM), dynamic random access memory (DRAM), static random access memory (SRAM), enhanced dynamic random access memory (EDRAM), high-bandwidth memory (HBM), hybrid memory cube (HMC), etc.
[0045] If the integrated unit / module is implemented as a software program module and sold or used as an independent product, it can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer electronic device (which may be a personal computer, server, or network electronic device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this disclosure. The aforementioned memory includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.
[0046] This application also provides a computer-readable storage medium storing one or more computer programs, which, when executed by multiple processors, cause the processors to perform actions such as... Figure 1 and Figure 3 The method and its detailed scheme are shown.
[0047] This application also provides a computer program product, which includes a computer program that, when run on a computer, causes the computer to perform the methods of any of the above embodiments.
[0048] References to features, advantages, or similar language in this specification do not imply that all features and advantages achievable with this solution should be included or included in any single implementation thereof. Rather, references to features and advantages are understood to mean that a particular feature, advantage, or characteristic described in connection with an embodiment is included in at least one embodiment of this solution. Therefore, discussions of features, advantages, and similar language throughout this specification may, but do not necessarily, refer to the same embodiments.
[0049] Furthermore, the features, advantages, and characteristics described herein can be combined in any suitable manner in one or more embodiments. Based on the description herein, those skilled in the art will recognize that this solution can be implemented without one or more specific features or advantages of a particular embodiment. In other instances, additional features and advantages can be appreciated in specific embodiments not presented in all embodiments of this solution.
[0050] The embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand the method and core ideas of this application. Furthermore, any changes or modifications made by those skilled in the art based on the ideas of this application, and on the specific implementation methods and application scope of this application, are all within the scope of protection of this application. Therefore, the content of this specification should not be construed as a limitation of this application.
Claims
1. A method for generating waveforms resistant to distortion in superconducting quantum computing circuits, characterized in that, include: The control synthesis device generates a first square wave with a first period; The synthesis device is controlled to generate a second square wave with a second period, wherein the first period is twice the second period; as well as The first square wave and the second square wave are synthesized to generate a target waveform, which is used in the superconducting quantum computing circuit.
2. The generation method as described in claim 1, characterized in that, Also includes: The target waveform is used to control the qubit.
3. The generation method as described in claim 2, characterized in that, The control of the qubit using the target waveform includes: Determine one or more square wave steps from each waveform period of the target waveform; and The qubits are controlled using one or more defined square wave steps.
4. The generation method as described in claim 3, characterized in that, Each waveform period of the target waveform includes four square wave steps. The waveform length of the first square wave is maintained for one first cycle, and the waveform length of the second square wave is maintained for two second cycles. The waveform length and waveform height of the second square wave are consistent with those of the first square wave.
5. The generation method according to any one of claims 1 to 4, characterized in that, The process of synthesizing the first square wave and the second square wave to generate the target waveform includes: The amplitude of the second square wave is amplified by a factor of two; The amplified second square wave is flipped vertically; and The target waveform is generated by superimposing the first square wave and the second square wave after flipping them vertically.
6. A waveform generation device resistant to distortion in superconducting quantum computing circuits, characterized in that, include: A controller is used to control the synthesis apparatus to generate a first square wave having a first period, and to control the synthesis apparatus to generate a second square wave having a second period, wherein the first period is twice the second period; as well as A generator is used to synthesize the first square wave and the second square wave to generate a target waveform, which is used in the superconducting quantum computing circuit.
7. The generating apparatus as described in claim 6, characterized in that, The controller is also used for: The target waveform is used to control the qubit.
8. The generating apparatus as claimed in claim 7, characterized in that, The controller is also used for: Determine one or more square wave steps from each waveform period of the target waveform; and The qubits are controlled using one or more defined square wave steps.
9. An electronic device, characterized in that, The device includes a memory and a processor, wherein the memory stores a computer program, and the processor, when executing the computer program in the memory, implements the method of any one of claims 1 to 5.
10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the method of any one of claims 1 to 5.