Power supply circuit and current estimation method

Abstract

This disclosure relates to power supply circuits and current estimation methods. A power supply circuit includes one or more power supplies controlled by a controller, a sensor, and a filter. Each power supply includes electrical components suitable for storing energy. The sensor senses a first current having a first bandwidth through the electrical components. The filter filters the signal based on the first current to obtain a filtered current having a second bandwidth less than the first bandwidth. The controller is configured to process the filtered current to generate an estimated current having a third bandwidth greater than the second bandwidth.

Description

Technical Field

[0001] This disclosure relates to power supply circuits and methods for estimating the current passing through electronic components suitable for storing energy. In particular, this disclosure relates to a power supply circuit and a method for estimating the current passing through an inductor. Background Technology

[0002] Power supply circuits typically include a controller configured to manage one or more individual power supplies. For example, these individual power supplies may each drive one or both phases of a buck converter. Each power supply is configured to provide current to an inductor. For the controller to manage the power supplies efficiently, it needs to provide feedback sample currents containing information about the current supplied by each power supply to its corresponding inductor.

[0003] For high-performance control technologies, the controller needs to understand the frequency dynamics of the current supplied to the inductor. This current's frequency dynamic range can be quite large. This necessitates providing the controller with a high-bandwidth and accurate feedback sample current. This is difficult to achieve because in most high-power power supply circuits, the feedback sample current is supplied to the controller via traces on a printed circuit board (PCB). These traces are conductive paths etched onto the PCB substrate, which introduce noise and attenuation into the feedback sample current. This reduces the bandwidth and accuracy of the information provided to the controller, and critical information is lost.

[0004] The purpose of this disclosure is to address one or more of the limitations described above. Summary of the Invention

[0005] According to a first aspect of this disclosure, a power supply circuit is provided, the power supply circuit comprising: One or more power sources, wherein each power source includes electrical components suitable for storing energy; A controller is used to control one or more power sources; A sensor adapted to sense a first current passing through an electrical component, wherein the first current has a first bandwidth; and The filter is configured to receive a signal based on a first current and output a filtered current having a second bandwidth that is less than the first bandwidth. The controller is configured to process the filtered current to generate an estimated current with a third bandwidth greater than the second bandwidth.

[0006] For example, the power supply can be a switching power supply, such as a buck, boost, or buck / boost converter.

[0007] Alternatively, the filter is a low-pass filter. For example, the low-pass filter can be implemented as part of the controller, or alternatively, as part of the power supply.

[0008] Alternatively, the low-pass filter has a transfer function characterized by poles at a predefined frequency and is designed to attenuate parasitic noise present in the power supply circuit.

[0009] Optionally, the power supply circuit has parasitic poles with parasitic frequencies, and the poles associated with the low-pass filter are dominant poles with frequencies below the parasitic frequencies.

[0010] For example, parasitic poles can be caused by a conductive path that carries the first current.

[0011] Optionally, the dominant pole is configured to set a cutoff frequency so that parasitic frequencies can be ignored.

[0012] Optionally, the predefined frequency of the pole is selected as approximately 1 / 5 to 1 / 10 of the switching frequency of the first current.

[0013] Optionally, the low-pass filter includes a Σ-Δ analog-to-digital converter.

[0014] For example, a low-pass filter can operate at a data rate with a switching frequency higher than the first current.

[0015] Optionally, the low-pass filter includes an anti-aliasing filter coupled to the Σ-Δ analog-to-digital converter.

[0016] Optionally, the first current includes a noise component, which includes noise caused by one or more sources in the power supply circuit.

[0017] For example, noise can come from one or more of the following: PCB traces, wires, and one or more power supplies.

[0018] Optionally, the third bandwidth is equal to the first bandwidth.

[0019] Optionally, the controller is configured to execute an algorithm based on an observer model.

[0020] Optionally, the observer model is configured using a set of data points; wherein the set of data points includes one or more of the following: filter parameters, properties of one or more power sources, input voltages of one or more power sources, and output voltages of one or more power sources.

[0021] For example, filter parameters may include DC gain and cutoff frequency (e.g., DC gain can be set to 1, and cutoff frequency = Fsw / 10). Power supply properties may include: voltage (input / output), duty cycle, temperature, switching resistor, switching delay control, and dead time.

[0022] Alternatively, the observer model may include a Luenberger observer model or a sliding-mode observer.

[0023] Optionally, the controller includes a calculator for executing the algorithm, wherein the calculator is implemented using a parallel architecture, a single-stream observer architecture, or a two-stream observer architecture.

[0024] Optionally, the electrical component includes an inductor, and wherein the first current is a first inductor current, the filter current is a filter inductor current, and the estimated current is an estimated inductor current.

[0025] According to a second aspect of this disclosure, a method for estimating the current passing through an electrical component suitable for storing energy is provided, the method comprising: A first current is measured through an electrical component, wherein the first current has a first bandwidth; The signal based on the first current is filtered to generate a filtered current with a second bandwidth smaller than the first bandwidth; and The filtered current is processed to generate an estimated current with a third bandwidth greater than the second bandwidth.

[0026] Optionally, the third bandwidth is equal to the first bandwidth.

[0027] Optionally, processing the filtered current includes executing an algorithm based on an observer model.

[0028] Alternatively, filtering can be performed using a low-pass filter, which has a transfer function characterized by poles at a predefined frequency and is designed to attenuate parasitic noise present in the power supply circuit.

[0029] Optionally, the low-pass filter includes a Σ-Δ analog-to-digital converter. Attached Figure Description

[0030] The present disclosure is described in more detail below by way of example only, with reference to the accompanying drawings, in which:

[0031] Figure 1 It is a diagram of the power supply circuit according to this disclosure;

[0032] Figure 2A It is used for Figure 1 A first example implementation of a low-pass filter in a power supply circuit;

[0033] Figure 2B It is used for Figure 1 A second example implementation of a low-pass filter in a power supply circuit;

[0034] Figure 2C It is used for Figure 1A third example implementation of a low-pass filter in a power supply circuit;

[0035] Figure 2D It is used for Figure 1 The fourth example implementation of a low-pass filter in a power supply circuit;

[0036] Figure 3 It is a diagram showing several waveforms according to frequency;

[0037] Figure 4 It is shown by Figure 1 A diagram illustrating the operational principle of the algorithm executed by the observer circuit in the controller;

[0038] Figure 5A It is a diagram of an observer circuit with a fully parallel architecture;

[0039] Figure 5B This is a diagram of a single-stream observer architecture used to implement the observer circuit;

[0040] Figure 5C This is a diagram of a two-stream observer architecture used to implement the observer circuit;

[0041] Figure 6A yes Figure 1 An exemplary implementation of the power supply circuit;

[0042] Figure 6B and Figure 6C It shows the use of Figure 6A An exemplary implementation of the observer circuit in the power supply circuit;

[0043] Figure 6D It is used for Figure 6A An example implementation of a filter in a power supply circuit;

[0044] Figure 7A and Figure 7B It shows the use Figure 5B Figures showing the simulation results of the power supply circuit for the single-stream observer architecture;

[0045] Figure 8 It shows the use Figure 5B Figures showing the simulation results of the power supply circuit for the single-stream observer architecture; and

[0046] Figure 9 This is a flowchart of a method for estimating the current through an electrical component (such as an inductor) suitable for storing energy, according to this disclosure. Detailed Implementation

[0047] Figure 1This is a diagram of a power supply circuit 100 according to the present disclosure. The power supply circuit 100 includes one or more power supplies 110a, 110b, 110n, and a controller 120 for controlling the one or more power supplies 110a, 110b, 110n. Although only three power supplies 110a, 110b, 110n are shown for the example power supply circuit 100, it should be understood that any number of power supplies can be used in alternative embodiments. Furthermore, although a single controller 120 for all power supplies 110a, 110b, 110n is shown in the example power supply circuit 100, in alternative embodiments each power supply may have its own controller. Each power supply 110a, 110b, 110n includes inductors 112a, 112b, 112n. Power supplies 110a, 110b, 110n may be switching power supplies, such as buck, boost, or buck-boost power supplies.

[0048] The power supply circuit 100 also includes a plurality of sensors 130a, 130b, and 130n, each sensor being configured to sense the first inductor current I through the inductors 112a, 112b, and 112n, respectively. mon,a I mon,b I mon,n Multiple sensors can be implemented in ways known in the prior art, such as: "An On-Chip High-Speed ​​Current Sensor Applied in the Current-Mode DC–DC Converter" (Wang et al., 2014; 10.1109 / TPEL.2014.2302318) or "Lossless Inductor Current Sensing Method With Improved Frequency Response" (Ziegler et al., 2009; TPEL.2009.2013954). In an alternative embodiment, one or more power supplies may have only one sensor. The current I of each first inductor... mon,a I mon,b I mon,n It has the highest bandwidth.

[0049] The power supply circuit 100 also includes a filter 140 configured to filter the first inductor current I. mon,a I mon,b I mon,n Filtering is performed to obtain the filter inductor current I. sns,a I sns,b I sns,n Depending on the implementation, filter 140 can receive a signal based on the sensed first inductor current, which may be the sensed first inductor current itself.

[0050] In an alternative embodiment, a separate filter can be provided for each power supply. The current I of each filter inductor is... sns,a I sns,b I sns,n It has a second bandwidth, which is smaller than the first inductor current I. mon,a I mon,b I mon,n The first bandwidth. Filter 140 can be, for example, a low-pass filter. The first inductor current I mon,a I mon,b I mon,n It has a noise component. The noise component can originate from one or more sources in the power supply circuit. For example, the noise component could be due to the first inductor current I. mon,a I mon,b I mon,n The noise is caused by wires or PCB traces traveling between one or more power supplies 110a, 110b, 110n and the rest of the circuit. The noise component may also include noise caused by the one or more power supplies 110a, 110b, 110n themselves. Then, filter 140 filters the first inductor current I. mon,a I mon,b I mon,n Filtering is performed by introducing the dominant pole into the filter inductor current I. sns,a I sns,b I sns,n This compensates for noise components. The filtering action eliminates the noise in the first inductor current I. mon,a I mon,b I mon,n This reduces most of the noise induced in the PCB traces and diminishes the importance of the PCB traces' influence on the feedback signal. Filtering can be performed by adding capacitors of known value to the PCB traces or by active filtering before digitization.

[0051] Controller 120 is configured to process the filter inductor current I sns,a I sns,b I sns,n To generate an estimated inductor current I with a third bandwidth greater than the second bandwidth. obs,a I obs,b I obs,n The third bandwidth can be equal to the first inductor current I. mon,a I mon,b I mon,n The first bandwidth. Controller 120 is configured to execute an algorithm based on an observer model to generate an estimate of the inductor current I. obs,a I obs,b I obs,nThe observer model can be, for example, the Luenberger observer model. The algorithm uses the observer model to reconstruct the first inductor current I based on the set of data points. mon,a I mon,b I mon,n This data set includes the filter inductor current I. sns,a I sns,b I sns,n And knowledge of the operating conditions of the power supply circuit 100. To ensure reliable algorithm operation, the filter inductor current I... sns,a I sns,b I sns,n It needs to be filtered to suppress noise components, including noise from one or more sources in the power supply circuit 100.

[0052] The controller 120 includes a calculator or processor 124 for executing the algorithm. The calculator or processor 124 is also referred to as an observer circuit.

[0053] The observer circuit 124 can be implemented using different architectures. Figure 5A , Figure 5B and Figure 5C An example of a potential architecture is described in the document.

[0054] In operation, sensors 130a, 130b, and 130n sense a first inductor current I generated by each of one or more power sources 110a, 110b, and 110n. mon,a I mon,b I mon,n The first inductor current I mon,a I mon,b I mon,n The current is transmitted to controller 140 via a transmission component (e.g., a wire or PCB trace), which adds a noise component and causes the first inductor current I to... mon,a I mon,b I mon,n Attenuation of various frequency components.

[0055] The current I of the first inductor mon,a I mon,b I mon,nFiltering occurs before or after transmission. Filter 140 can be implemented as a low-pass filter. Low-pass filter 140 has a transfer function characterized by a pole at a predefined frequency and is designed to attenuate parasitic noise present in the power supply circuit. Pole (also called dominant pole) is selected to attenuate parasitic poles present in the circuit, for example, along a conductive path carrying the first current. Parasitic poles have parasitic (pole) frequencies. In the context of this disclosure, a dominant pole is a single pole having a frequency lower than the parasitic frequency. The difference between the frequency of the dominant pole and the parasitic frequency should provide sufficient margin so that the gain of the system (including sensor circuitry, I / O, PCB traces, analog front-end, and filters) at the frequencies of other poles is much lower than the gain of the system at a lower frequency than the DC gain of the dominant pole. The concept of a dominant pole is that a pole sets the cutoff frequency and, optionally, the gain of the low-pass filter such that the frequencies of other poles can be ignored (i.e., no signal passes through). For the power supply circuit of this disclosure, the filter 140 may have an order higher than 1, and therefore multiple poles may have to be considered.

[0056] Therefore, the filter inductor signal I sns,a I sns,b I sns,n The influence of the transmission components is relatively small. In other words, the influence of the dominant pole masks the influence of the poles generated by the transfer function of the transmission device. At controller 120, the filter inductor signal I... sns,a I sns,b I sns,n The algorithm is provided to observer circuit 124. It is based on an observer model and configured in part based on the characteristics of the dominant poles (in other words, the frequency of the dominant poles). The algorithm has knowledge of the various system inputs of power supplies 110a, 110b, and 110n and generates an estimate of the inductor current I. obs,a I obs,b I obs,n The system input can be, for example, the output voltage V. o Input voltage V in And control signals Ca, Cb, and Cn. Each estimated inductor current I... obs,a I obs,b I obs,n Based on known state variables and the filter inductor signal I sns,a I sns,b I sns,n For the first inductor current I mon,a I mon,b I mon,n The reconstruction.

[0057] Furthermore, estimate the inductor current I. obs,a I obs,b Iobs,n It can be used to generate control signals Ca, Cb, and Cn for controlling power supplies 110a, 110b, and 110c, respectively.

[0058] Figure 2A It is shown that it is used for Figure 1 Figure 200a shows the filter 140a in the power supply circuit 100. In this example, filter 140a is a low-pass filter. The low-pass filter 140a includes a Σ-Δ analog-to-digital converter (SDADC) 142a, an anti-aliasing filter, and a gain setting 144a. In example 200a, the low-pass filter 140a is part of the controller 120a. The SDADC 142a has an input for receiving a clock signal CLK. The clock signal CLK is used to sequence the operation of the SDADC 142a and the controller 120. The anti-aliasing filter and gain setting 144a are formed by a capacitor C1 connected in parallel with a resistor R1. In example implementation 200a, only a single power supply 110a is shown. It should be understood that this example implementation 200a can be implemented using any one of one or more power supplies 110a, 110b, 110n of the power supply circuit 100. The SDADC 142a is configured to add a dominant pole to the filter inductor current I. sns,a middle.

[0059] The current I of the first inductor mon,a The signal is generated, sensed, and transmitted to the controller 120a via transmission component 210a. In example implementation 200a, transmission component 210a is a PCB trace. However, in alternative embodiments, the transmission component can be, for example, a wire or other conductive path. The PCB trace 210a coupling the controller 120a and the power supply 110a adds multiple parasitic poles 220a with an unknown value P1. The capacitance of the trace 210a is one source of the parasitic poles 220a. The SDADC 142a introduces a pole known as the dominant pole of the filter. Therefore, the effect of the PCB trace 210a is attenuated. The SDADC 142a has a dual function. First, it filters the inductor current I. sns,a The data is digitized to feed it into the algorithm. Secondly, this introduces the dominant pole. The anti-aliasing filter and gain setting stage 144a are useful for better performance of the SDADC 142a, but are not necessary if other types of ADCs are used in alternative embodiments.

[0060] Figure 2B It is used for Figure 1A second example implementation 200b of the filter 140b in the power supply circuit 100. The filter 140b is a low-pass filter. The low-pass filter 140b includes an SDADC 142b, an anti-aliasing filter, and a gain setting 144b. In example implementation 200b, the low-pass filter 140b is implemented as part of the power supply 110a. The low-pass filter 140b and... Figure 2A The low-pass filter 140a is the same as that in example implementation 200b, except that in example implementation 200b, filter 140b is part of power supply 110a. Therefore, the description of the SDADC, anti-aliasing filter, and gain settings will not be repeated here. It should be understood that example implementation 200a can be implemented using any one of one or more power supplies 110a, 110b, 110n of power supply circuit 100.

[0061] In this second example implementation 200b, the low-pass filter 140b takes into account noise caused by propagation along the PCB trace 210b before current transmission. Then, the transmitter TX is used to transmit the filtered current I... sns,a The current is sent to the receiver RX located in the controller, where the filtered current can be processed.

[0062] Figure 2C It is used for Figure 1 This is a third example implementation of the filter 140c in the power supply circuit 100. The filter 140c is a low-pass filter. The low-pass filter 140c includes an SDADC 142c, an anti-aliasing filter, and a gain setting 144c. In this disclosure, due to aliasing, high-frequency noise coupled along PCB trace 210b or at the input of the SDADC 142c will appear as a signal in the signal band. Because of the SDADC 142c, the sampling frequency can be relatively high. Therefore, the anti-aliasing filter is implemented as one of the higher-order poles, which is dominated by a negligible pole. An anti-aliasing filter is provided to eliminate the aliasing problem of high-frequency noise. The SDADC 142c is implemented as a voltage-mode modulator. The SDADC 142c includes a modulation integrator 145c, a sampling and DAC 146c, and a synchronizer 147c. In this example implementation, the modulation integrator 145c integrates the error between the input signal and the “DAC” output formed by the buffer at the bottom of the sampling and DAC 146c. If the DAC output is lower than the input signal, the output signal of the modulation integrator 145c rises. Otherwise, the output voltage of the modulation integrator 145c falls. Sampling and sampling: The DAC 146c samples the output of the modulation integrator 145c. If the integration error is higher than the reference connected to the negative input of the comparator, the comparator output is set high, and the DAC output is set low (or otherwise set high). In doing so, the average DAC output remains equal to the input signal.

[0063] Figure 2D It is used for Figure 1 This is a fourth example implementation of filter 142d in power supply circuit 100. Filter 142d is a low-pass filter. The low-pass filter is SDADC 142d, which includes modulation integrator 145d, sampling and DAC 146d, and synchronizer 147d. SDADC 142d is implemented as a current-mode modulator. In this example implementation, modulation integrator 145d integrates the input current and DAC current. The DAC is formed by a charge pump, which presents as a first current source CS1 and a second current source CS2. Depending on the sampling comparator output state, the first current source CS1 is active, or the second current source CS2 is active. If the voltage across modulation integrator 145d is higher than the negative input of the comparator, the DAC does not pull enough current, and therefore the comparator activates the second current source CS2. If the voltage across modulation integrator 145d is lower than the negative input voltage of the comparator, the charge pump does not push enough current to equalize the current I from the first inductor. mon,a The current is drawn by the charge pump, thus activating the first current source CS1. On average, the current delivered by the charge pump is equal to the first inductor current I. mon,a .

[0064] refer to Figures 2A-2D The described low-pass filter can be configured to operate at a data rate with a switching frequency higher than the first current.

[0065] Figure 3 This is a diagram showing several Bode diagrams (amplitude varying with frequency). The vertical line represents the first inductor current I. mon,a The spectrum, which includes DC frequency and switching frequency F sw Harmonics. Bode plot 310 shows the frequency gain of the transmission channel. Bode plot 320 shows the frequency gain of the transmission channel plus the filter. Bode plot 330 is an example spectrum of switching and induced noise.

[0066] The amplitude of the first inductor current 310 is constant at low frequencies and begins to decrease above a certain frequency. This is due to unknown parasitic poles.

[0067] The pole frequency is the frequency at which the system's transfer function approaches infinity.

[0068] The filter used to filter the current of the first inductor has poles and zeros. These characteristics of the filter provide information about how the system will respond to signals with different input frequencies. The filter used has a dominant pole at the frequency that will attenuate parasitic poles.

[0069] Switching frequency F sw Since the frequency range of its harmonics is known, the form that the dominant pole should take can be calculated. Based on the expected parasitic effects of the power supply circuit 100 and the first inductor current I... mon,a I mon,b I mon,n Switching frequency F sw The bandwidth of the first inductor current can be used to determine the filter inductor current I. sns,a I sns,b I sns,n The location of the dominant pole. The shape and behavior of the dominant pole can be changed by tuning the parameters of the filter 140.

[0070] Experimentally, it has been determined that the frequency of the dominant pole should be within the range of the first inductor current I. mon,a I mon,b I mon,n Switching frequency F sw At least 1 / 5 to 1 / 10. This allows for a trade-off between the information lost by filter 140 and algorithm performance, while ensuring that the impact of noise components becomes negligible. mon,a I mon,b I mon,n Low-pass filter measurements. For example, if the switching frequency is 1MHz, then for optimal performance, the dominant pole should be in the range of 100-200kHz.

[0071] The dominant pole should take the form that overcomes the influence of parasitic poles. Realizing the dominant pole will cause the first inductor current I to... mon,a I mon,b I mon,n Some losses cause the filter inductor current I to... sns,a I sns,b I sns,n The bandwidth is lower than the first inductor current I. mon,a I mon,b I mon,n However, the first inductor current I mon,a I mon,b I mon,n The loss can be reconstructed using an observer-based model algorithm.

[0072] Figure 4 It is shown by Figure 1 The diagram illustrates the operational principle of the algorithm executed by controller 120 400. In this example, the algorithm is based on an observer model. For example, the observer model could be a Luenberger observer model or a sliding mode observer.

[0073] Operating principle 400 comprises three boxes. The first box is facility 410, which is a mathematical representation of one or more power supplies 110a, 110b, 110n. The second box is filter box 420, which is a mathematical representation of filter 140. In this example, filter 140 is a low-pass filter. The last box is observer processor 430, which provides an observer model that is executed to generate an estimate of the inductor current I. obs [n]. The observer model is configured using a set of data points. The set of data points includes parameters of filter 140, properties of one or more power supplies 110a, 110b, 110n, and input and / or output voltages of one or more power supplies 110a, 110b, 110n. The observer model uses this set of data points to recreate the first inductor current I. mon,a I mon,b I mon,n Bandwidth information.

[0074] The variables in each of boxes 410, 420, and 430 are defined as follows. Variable X is the state vector of the inductor, considered as a system. State vector X includes the first inductor current I. mon [n] and filter inductor current I sns [n]. VariableA s and B s These are the system's state transition matrix and input matrix, while variable U is the system's input vector. Variable C s It is the system's output matrix, E s This is the system's input-output matrix. Note that the variables of the state observer are usually denoted by a "hat" to distinguish them from the variables of the equations satisfied by the physical system. In practice, the hat represents the observer's estimate of that variable. For example, if the observer model is a Luenberger observer, the algorithm runs by solving the following equation: The value of vector L depends on the expected location of the eigenvalues ​​of the state observer. The variable Y is the filter inductor current I with a known dominant pole. sns [n], where variable U is an input vector including the output voltage of one or more power sources and the voltage of the switching nodes. If (A s -LC s If the eigenvalues ​​of an observer are inside the unit circle, then the observer is stable.

[0075] In Figure 4 In the middle, variable A s (In box 410) and A l(In box 430) are different to indicate that the system has parameters that the observer may not know very accurately. For example, the inductance value L is known within a certain tolerance and is usually not calibrated. Furthermore, the actual value may vary depending on the circumstances, and the observer must assume a fixed value that is not far from the actual value.

[0076] In a preferred embodiment, the algorithm uses the PWM control signal C a C b C n The algorithm estimates the voltage at the switching nodes used to drive inductors 112a, 112b, and 112c based on the input voltages of one or more power supplies 110a, 110b, and 110c. The calculator or observer circuit 124 used to execute this algorithm can be implemented as a digital or analog circuit. Various architectures are conceivable.

[0077] Figure 5A This is a diagram of a first example implementation of the observer circuit 500a used to execute the algorithm. In this example implementation, the observer circuit 500a has a fully parallel observer architecture. The observer circuit 500a can be implemented as an analog circuit or a digital circuit. In this first example implementation, the observer circuit 500a is combined, and its operations are performed in parallel.

[0078] Figure 5B This is a diagram of a single-stream observer architecture 500b used to implement the observer circuit. In this example implementation, the single-stream observer architecture 500b can be implemented as a small state machine feeding multiplier / multiplier+accumulator units. In this example implementation, the observer circuit 124 is implemented as a digital circuit. In an alternative embodiment, it can be implemented as an analog circuit. In this second example implementation, the single-stream observer architecture 500b solves the equations sequentially, performing one operation at a time. For example, during cycle 0, the architecture 500b determines 0 or B. obs11_B Whether it is loaded into the accumulator register of the multiplier / accumulator unit. Then, in the next cycle, if B obs11_B If it has already been loaded, the value will be added to the accumulator.

[0079] Figure 5C This is a diagram of a two-stream observer architecture 500c used to implement the observer circuit. In this example implementation, the single-stream observer architecture 500c can be implemented as a small state machine feeding multiplier / multiplier+accumulator units. In this example implementation, the observer circuit 124 is implemented as a digital circuit. In an alternative embodiment, it can be implemented as an analog circuit. In this third example implementation, the two-stream observer architecture 500c solves the equations sequentially, performing one operation at a time.

[0080] Figure 6A This is an exemplary implementation of the power supply circuit 600 according to the present disclosure. The power supply circuit 600 includes one or more power supplies 610 (also referred to as phases) and a controller 620. Each power supply 610 includes an inductor 612 and is configured to sense a first inductor current I. mon A sensor (not shown). First inductor current I mon It has a first bandwidth. Controller 620 is configured to control one or more power supplies 610. Controller 620 includes an SDADC 640 and a calculator or observer circuit 624 for executing algorithms.

[0081] During operation, the sensor senses the current I of the first inductor. mon And transmit it to controller 620. First inductor current I mon It is received at SDADC 640, which is configured to receive the first inductor current I. mon Filtering is performed to generate the filter inductor current I. sns The filter inductor current has a second bandwidth that is less than the first bandwidth. The SDADC 640 includes a first-order Σ-Δ modulator 642 and a low-pass filter 643. The controller is then configured to process the filter inductor current I. sns To generate an estimated inductor current I with a third bandwidth greater than the second bandwidth. obs The controller uses an observer-based algorithm to handle the filter inductor current I. sns In this example, the Luenberger observer-based algorithm is executed using digital circuitry with a parallel architecture. The inductor current I is estimated. obs The third bandwidth can be equal to the first inductor current I. mon The first bandwidth. In this case, estimate the inductor current I. obs The first inductor current I mon The reconstruction is then performed. Then, the inductor current I is estimated. obs Modulator 626 generates control signals for one or more power supplies 610. In this exemplary power supply circuit 600, modulator 626 is a PWM modulator.

[0082] Although the SDADC 640 is shown as part of the controller 620 in this exemplary power supply circuit 600, in alternative embodiments, the SDADC 640 may be implemented elsewhere in the power supply circuit 600. For example, it may be implemented as part of one or more power stages 610.

[0083] Figure 6B and Figure 6C It shows Figure 6AAn exemplary implementation of the calculator / observer circuit 624 is provided. The observer circuit 624 is implemented having components consisting of... Figure 6B The first circuit L-OBS (1 / 2) and shown Figure 6C The second circuit shown is a parallel architecture digital circuit composed of L-OBS (2 / 2).

[0084] Figure 6D It is used for Figure 6A Example implementation of filters in a system.

[0085] Figure 7A It shows including Figure 5B Figure 700A shows the simulation results of the power supply circuit for the single-current observer architecture 500b. Figure 700A illustrates the estimated inductor current I. obs,a Filter inductor current I sns,a and actual inductor current I L_a .

[0086] Figure 7B Figure 700B shows the current fed back from the power stage model. In Figure 700B, the current includes noise.

[0087] Figure 8 It shows including Figure 5B Figure 800A shows the simulation results of the power supply circuit for the 500b single-current observer architecture. Figure 800A illustrates the estimated inductor current I. obs,a Filter inductor current I sns,a and actual inductor current I L_a .

[0088] Figure 9 This is a flowchart of a method 900 for estimating the current passing through an electrical component suitable for storing energy (such as an inductor). This method can be implemented using the aforementioned power supply circuit 100 or 600''.

[0089] At step 910, a first current is measured through the electrical component. This first current has a first bandwidth. Then, at step 920, the signal based on the first current is filtered to generate a filtered current with a second bandwidth. The signal based on the first inductor current can be the measured first inductor current itself.

[0090] The second bandwidth is less than the first bandwidth. Filtering can be performed using a low-pass filter. The low-pass filter may include a Σ-Δ analog-to-digital converter. At step 930, the filtered current is processed to generate an estimated current. The estimated current has a third bandwidth that is larger than the second bandwidth. The third bandwidth may be equal to the first bandwidth. The processing of the filtered current can be performed by executing an algorithm based on an observer model.

[0091] The power supply circuits and methods disclosed herein can be applied to various applications, including dense power distribution systems or other high-power systems.

[0092] Those skilled in the art will understand that variations of the disclosed arrangements are possible without departing from this disclosure. Therefore, the above description of specific embodiments is merely illustrative and not intended to be limiting. Those skilled in the art will appreciate that minor modifications can be made without materially altering the operation.

Claims

1. A power supply circuit, comprising: One or more power sources, wherein each power source includes electrical components suitable for storing energy; Controller, used to control the one or more power supplies; A sensor adapted to sense a first current passing through the electrical component, wherein the first current has a first bandwidth; as well as The filter is configured to receive a signal based on the first current and output a filtered current having a second bandwidth that is less than the first bandwidth; The controller is configured to process the filtered current to generate an estimated current with a third bandwidth greater than the second bandwidth.

2. The power supply circuit according to claim 1, wherein the filter is a low-pass filter.

3. The power supply circuit of claim 2, wherein the low-pass filter has a transfer function characterized by poles at a predefined frequency and is designed to attenuate parasitic noise present in the power supply circuit.

4. The power supply circuit of claim 3, wherein the power supply circuit has parasitic poles having parasitic frequencies, and wherein the pole associated with the low-pass filter is a dominant pole having a frequency lower than the parasitic frequency.

5. The power supply circuit of claim 4, wherein the dominant pole is configured to set the cutoff frequency such that the parasitic frequency can be ignored.

6. The power supply circuit according to claim 3, wherein the predefined frequency of the pole is selected as approximately 1 / 5 to 1 / 10 of the switching frequency of the first current.

7. The power supply circuit according to claim 2, wherein the low-pass filter comprises a Σ-Δ analog-to-digital converter.

8. The power supply circuit of claim 7, wherein the low-pass filter includes an anti-aliasing filter coupled to the Σ-Δ analog-to-digital converter.

9. The power supply circuit of claim 1, wherein the first current includes a noise component, the noise component including noise caused by one or more sources in the power supply circuit.

10. The power supply circuit according to claim 1, wherein the third bandwidth is equal to the first bandwidth.

11. The power supply circuit of claim 1, wherein the controller is configured to execute an algorithm based on an observer model.

12. The power supply circuit of claim 11, wherein the observer model is configured using a set of data points; wherein the set of data points includes one or more of the following: parameters of the filter, properties of the one or more power supplies, input voltages of the one or more power supplies, and output voltages of the one or more power supplies.

13. The power supply circuit of claim 11, wherein the observer model includes a Luneburger observer model or a sliding mode observer.

14. The power supply circuit of claim 1, wherein the controller includes a calculator for executing the algorithm, wherein the calculator is implemented using a parallel architecture, a single-stream observer architecture, or a two-stream observer architecture.

15. The power supply circuit of claim 1, wherein the electrical component includes an inductor, and wherein the first current is a first inductor current, the filter current is a filter inductor current, and the estimated current is an estimated inductor current.

16. A method for estimating the current passing through an electrical component suitable for storing energy, the method comprising: A first current is measured through the electrical component, wherein the first current has a first bandwidth; The signal based on the first current is filtered to generate a filtered current with a second bandwidth that is smaller than the first bandwidth; as well as The filtered current is processed to generate an estimated current with a third bandwidth greater than the second bandwidth.

17. The method of claim 16, wherein the third bandwidth is equal to the first bandwidth.

18. The method of claim 16, wherein processing the filtered current includes executing an algorithm based on an observer model.

19. The method of claim 16, wherein the filtering is performed using a low-pass filter having a transfer function characterized by poles at a predefined frequency and designed to attenuate parasitic noise present in the power supply circuit.

20. The method of claim 19, wherein the low-pass filter comprises a Σ-Δ analog-to-digital converter.

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