Etchant composition, method of patterning a metal-containing layer using the etchant composition, and method of manufacturing a display device

Abstract

This application relates to an etchant composition, a method for patterning a metal-containing layer using the etchant composition, and a method for manufacturing a display device. The etchant composition comprises: about 3.0 wt% to about 15.0 wt% of ammonium persulfate, about 0.1 wt% to about 5.0 wt% of an inorganic acid, about 0.1 wt% to about 2.0 wt% of a fluorinated ammonium salt, about 0.01 wt% to about 1.5 wt% of a chloride ammonium salt, about 0.1 wt% to about 2.0 wt% of a 2-nitrogen cyclic compound, about 0.1 wt% to about 2.0 wt% of a 4-nitrogen cyclic compound, about 0.1 wt% to about 3.0 wt% of an aminosulfonic acid compound, and the remainder being water, such that the total weight of the etchant composition reaches 100 wt%, wherein the weight ratio of the 4-nitrogen cyclic compound to the 2-nitrogen cyclic compound ranges from about 1.6 to about 5.0.

Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2024-0202692, filed on December 31, 2024, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] One or more embodiments of this disclosure relate to etchant compositions and methods for patterning metal-containing layers using etchant compositions and methods for manufacturing display devices. Background Technology

[0004] With the development of the display field that expresses various electrical signal information, various display devices with excellent characteristics such as thinness, light weight and low power consumption are being researched and developed.

[0005] As the resolution of display devices increases, controlling the etching profiles of the various wirings and electrodes included in the display device becomes increasingly important. Summary of the Invention

[0006] One or more embodiments of this disclosure include an etchant composition capable of etching multilayer films, a method of patterning a metal-containing layer using an etchant composition, and a method of manufacturing a display device using an etchant composition.

[0007] Further aspects of the implementation will be set forth in part in the description which follows and will be apparent in part from the description, or may be learned by practice of the implementations presented in this disclosure.

[0008] According to one or more implementation methods

[0009] An etchant composition is provided, the etchant composition comprising:

[0010] Ammonium persulfate, approximately 3.0 wt% to approximately 15.0 wt%;

[0011] Inorganic acids, approximately 0.1 wt% to approximately 5.0 wt%;

[0012] About 0.1 wt% to about 2.0 wt% of fluorinated ammonium salts;

[0013] Approximately 0.01 wt% to approximately 1.5 wt% of ammonium chloride salts;

[0014] About 0.1 wt% to about 2.0 wt% of 2-nitrogen cyclic compounds (e.g., cyclic compounds comprising two nitrogen atoms in their rings);

[0015] About 0.1 wt% to about 2.0 wt% of 4-nitrogen cyclic compounds (e.g., cyclic compounds comprising 4 nitrogen atoms in their rings);

[0016] About 0.1 wt% to about 3.0 wt% of an aminosulfonic acid compound; and

[0017] The remaining water is used to bring the total weight of the etchant composition to 100 wt%.

[0018] The weight ratio of the 4-nitrogen cyclic compound to the 2-nitrogen cyclic compound ranges from about 1.6 to about 5.0.

[0019] Inorganic acids may include nitric acid (HNO3), sulfuric acid (H2SO4), p-toluenesulfonic acid (CH3C6H4SO3), chloric acid (HClO3), phosphoric acid (H3PO4), phosphorous acid (H3PO3), or any suitable combination thereof.

[0020] Inorganic acids can be nitric acid.

[0021] Ammonium fluoride salts may include ammonium hydrogen fluoride.

[0022] 2-Nitrogen cyclic compounds may include imidazole, benzimidazole, pyrazole, indazole, pyridazine, pyrimidine, pyrazine, or any suitable combination thereof.

[0023] In an embodiment, the 2-nitrogen cyclic compound may be an imidazole.

[0024] The aminosulfonic acid compound may include, for example, aminosulfonic acid, taurine, sulfoalanine, homocysteic acid, aminomethanesulfonic acid, 3-amino-1-propanesulfonic acid, or any suitable combination thereof.

[0025] 4-Nitrogen cyclic compounds may include 5-aminotetrazole, 5-methyltetrazole, 1-methyl-5-aminotetrazole, 1-ethyl-5-aminotetrazole, 5-mercapto-1-methyltetrazole, 5-methoxy-1H-tetrazole, 1H-tetrazole, or any suitable combination thereof.

[0026] In an embodiment, the 4-nitrogen cyclic compound may be 5-aminotetrazole.

[0027] Corrosion inhibitors may include 4-nitrogen cyclic compounds.

[0028] The etchant composition can be used to etch metal films, metal oxide films, metal nitride films, or any suitable combination thereof.

[0029] According to another aspect of the implementation method,

[0030] A method for patterning a metal-containing layer is provided, the method comprising:

[0031] Provide substrate;

[0032] A metal-containing layer is formed on the substrate;

[0033] Forming a photoresist pattern on a metal-containing layer; and

[0034] The metal-containing layer is etched using the above-described etchant composition to pattern the metal-containing layer.

[0035] The metal layer can be multiple.

[0036] The metal layer may include metal, metal oxide, metal nitride or any suitable combination thereof, or may consist of metal, metal oxide, metal nitride or any suitable combination thereof.

[0037] In this embodiment, the metal may include copper, titanium, titanium alloys, or any suitable combination thereof.

[0038] Furthermore, titanium alloys may include: titanium; and molybdenum (Mo), tantalum (Ta), chromium (Cr), nickel (Ni), neodymium (Nd), or any suitable combination thereof.

[0039] Metal oxides may include oxides of indium (In), tin (Sn), gallium (Ga), zinc (Zn), aluminum (Al), or any suitable combination thereof.

[0040] The metal oxide can be indium tin oxide.

[0041] Metal nitrides may include titanium nitride, tantalum nitride, or any suitable combination thereof.

[0042] In an embodiment, the metal layer may include a first metal layer and a second metal layer.

[0043] The first metal layer may include titanium and / or titanium alloys.

[0044] Titanium alloys may include: titanium; and molybdenum (Mo), tantalum (Ta), chromium (Cr), nickel (Ni), neodymium (Nd), or any suitable combination thereof.

[0045] The second metal layer may include copper.

[0046] In an embodiment, the metal layer may further include a metal oxide layer on the second metal layer, and the metal oxide layer may include indium tin oxide.

[0047] According to another aspect of the implementation method,

[0048] A method for manufacturing a display device or electronic device is provided, the display device or electronic device comprising: a thin-film transistor including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode; and a light-emitting element electrically connected to the source electrode and the drain electrode, wherein the method for manufacturing the display device or electronic device includes:

[0049] Provide substrate;

[0050] A metal-containing layer is formed on the substrate;

[0051] Forming a photoresist pattern on a metal-containing layer; and

[0052] The metal-containing layer is etched using the above-described etchant composition to form a metal-containing layer pattern.

[0053] The metal layer pattern can be configured as: gate electrode, source electrode and drain electrode, and / or bottom metal layer. Attached Figure Description

[0054] The above and other aspects and features of specific embodiments of this disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, wherein:

[0055] Figure 1 A plan view of the display device according to an embodiment is provided for illustrative purposes.

[0056] Figure 2 For illustrative purposes Figure 1 A cross-sectional view of a portion of the display device;

[0057] Figure 3 A schematic diagram illustrating the method of measuring side etching;

[0058] Figure 4 A pair of cross-sectional scanning electron microscope (SEM) images of the Ti / Cu pattern on a test substrate etched using the etchant composition of Example 3; and

[0059] Figure 5 A pair of cross-sectional SEM images of the Ti / Cu pattern of the test substrate etched using the etchant composition of Comparative Example 5. Detailed Implementation

[0060] The embodiments described in the accompanying drawings will now be illustrated in more detail with reference to examples thereof, wherein the same reference numerals refer to the same elements throughout. In this regard, the embodiments may take different forms and should not be construed as limited to the description set forth herein. Accordingly, the embodiments described below are merely described with reference to the accompanying drawings to explain aspects of the embodiments described herein. As used herein, the term “and / or” includes any and all combinations of one or more of the associated enumerated items. Throughout this disclosure, the expression “at least one of a, b, and c” indicates only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

[0061] Because the subject matter of this disclosure can be modified in various suitable ways and has many implementations, exemplary embodiments will be illustrated in the accompanying drawings and described in more detail in the specification. The effects and features of the embodiments of this disclosure, as well as methods for implementing them, will become clear from the following detailed description of the embodiments in conjunction with the accompanying drawings. However, the subject matter of this disclosure is not limited to the embodiments described herein and can be implemented in various suitable forms.

[0062] In the following implementation, the terms “first” and / or “second” are not intended to be limiting, but rather to distinguish one component from another.

[0063] In the following implementation, unless the context clearly indicates otherwise, singular expressions include plural expressions.

[0064] In the following embodiments, the terms "comprising" and / or "having" are intended to imply the presence of the described features or components, and do not exclude the possibility of adding one or more other features or components.

[0065] In the following embodiments, when a portion (e.g., a membrane, zone, and / or component, etc.) is referred to as being on or above another portion (e.g., a membrane, zone, and / or component, etc.), this includes not only when it is directly on top of another portion (e.g., a membrane, zone, and / or component, etc.), but also when there are other membranes, zones, and / or components, etc. in between.

[0066] In the accompanying drawings, the dimensions of the components may be enlarged or reduced for ease of interpretation. For example, for ease of description, the dimensions (e.g., thickness) of each configuration shown in the drawings may be arbitrary, and this disclosure is not necessarily limited to the dimensions (e.g., thickness) shown.

[0067] Etching Composition

[0068] According to one or more implementation methods

[0069] An etchant composition is provided, the etchant composition comprising:

[0070] Ammonium persulfate, approximately 3.0 wt% to approximately 15.0 wt%;

[0071] Inorganic acids, approximately 0.1 wt% to approximately 5.0 wt%;

[0072] About 0.1 wt% to about 2.0 wt% of fluorinated ammonium salts;

[0073] Approximately 0.01 wt% to approximately 1.5 wt% of ammonium chloride salts;

[0074] About 0.1 wt% to about 2.0 wt% of 2-nitrogen cyclic compounds (e.g., cyclic compounds comprising two nitrogen atoms in their rings);

[0075] About 0.1 wt% to about 2.0 wt% of 4-nitrogen cyclic compounds (e.g., cyclic compounds comprising 4 nitrogen atoms in their rings);

[0076] About 0.1 wt% to about 3.0 wt% of an aminosulfonic acid compound; and

[0077] The remaining water (e.g., excess water) is added to bring the total weight of the etchant composition to 100 wt%.

[0078] The weight ratio of the 4-nitrogen cyclic compound to the 2-nitrogen cyclic compound ranges from about 1.6 to about 5.0.

[0079] The wt% of the above components represents the value relative to the total weight of the etchant composition.

[0080] Ammonium persulfate can be a primary oxidizing agent for copper, for example, a major component in copper etching, and can control the etching rate. Ammonium persulfate oxidizes copper to copper ions (Cu). 2+ ), to achieve etching.

[0081] Based on a total etchant composition of 100 wt%, the amount of ammonium persulfate can be from about 3.0 wt% to about 15.0 wt%. If the content of ammonium persulfate is less than 3.0 wt%, etching may not occur or the etching rate may be reduced. If the content of ammonium persulfate is greater than 15.0 wt%, it may be difficult to control the etching rate, and an excessive increase in anions may occur, which may reduce the etching uniformity of the multilayer film.

[0082] Inorganic acids may be used as auxiliary oxidants for etching. Inorganic acids may include nitric acid (HNO3), sulfuric acid (H2SO4), phosphoric acid (H3PO4), phosphorous acid (H3PO3), p-toluenesulfonic acid (CH3C6H4SO3), chloric acid (HClO3), or any suitable combination thereof. In this embodiment, the inorganic acid may be nitric acid.

[0083] Based on a total etchant composition of 100 wt%, the amount of inorganic acid can be from about 0.1 wt% to about 5.0 wt%. If the content of inorganic acid is less than 0.1 wt%, the etching rate may decrease, residues may appear in the etched profile, and / or defects may occur. If the content of inorganic acid is greater than 5.0 wt%, over-etching may occur and / or cracks may appear in the photoresist, thereby reducing productivity.

[0084] Ammonium fluoride salts can act as dissociators of metal oxides oxidized by oxidizing agents. For example, they can act as dissociators for titanium (Ti). Ammonium fluoride salts also have the ability to etch indium oxide and can be used as etchants for indium oxide, removing residues and / or sharp points that may appear during etching. In embodiments, the ammonium fluoride salt may be ammonium bifluoride.

[0085] Based on a total etchant composition of 100 wt%, the ammonium fluoride salt may be from about 0.1 wt% to about 2.0 wt%. In another example, the ammonium fluoride salt may be from about 0.6 wt% to about 1.0 wt%. If the content of the ammonium fluoride salt is less than 0.1 wt%, the etching rate may be reduced, and residues and / or sharp points may occur. If the content of the ammonium fluoride salt is greater than 2.0 wt%, it may damage the substrate (e.g., a substrate forming a wiring substrate including wiring) and / or the silicon-based insulating layer (e.g., a silicon-based electrical insulating layer).

[0086] Ammonium chloride salts can improve productivity by preventing or reducing excessive etching of metals. The chloride ions in the ammonium chloride salt can control corrosion between the photoresist and the metal pattern. The chloride ions can bind to the metal on the surface of the metal pattern in the gap between the photoresist and the metal pattern, preventing or reducing the penetration of oxidants from the etchant composition into the gap and causing excessive lateral etching on the upper part of the metal pattern. In an embodiment, the ammonium chloride salt may be ammonium chloride.

[0087] Based on a total etchant composition of 100 wt%, the amount of ammonium chloride salt may be from about 0.01 wt% to about 1.5 wt%. In another example, the amount of ammonium chloride salt may be from about 0.1 wt% to about 1.5 wt% or from about 1.0 wt% to about 1.3 wt%.

[0088] 2-Nitrogen cyclic compounds can stabilize the side etching rate as the number of substrates processed with the etchant composition varies. Copper ions (Cu) in the etchant composition... 2+ The concentration of copper ions (Cu) in the etchant composition increases with the number of substrates processed by the etchant composition. Initially, when the number of substrates processed by the etchant composition increases, the concentration of copper ions (Cu) in the etchant composition increases. 2+ When the concentration of copper ions (Cu) increases to a set or predetermined value, the side etching rate increases along with the number of substrates processed; however, when the concentration of copper ions (Cu) increases to a set or predetermined value, the side etching rate increases. 2+ When the concentration of 2-nitrogen cyclic compound increases beyond a set or predetermined value, the side etching rate decreases with increasing number of substrates processed. The initial increase in the side etching rate described above is called side etching hunting. The copper ions (Cu) initially generated in the 2-nitrogen cyclic compound and etchant composition... 2+This coordination helps mitigate the initial increase in side etch rate and reduces the variation in side etch rate with the number of substrates processed, thereby ensuring process stability. In embodiments, the 2-nitrogen cyclic compound may include imidazole, benzimidazole, pyrazole, indazole, pyridazine, pyrimidine, pyrazine, or any suitable combination thereof. In embodiments, the 2-nitrogen cyclic compound may be imidazole.

[0089] Based on a total etchant composition of 100 wt%, the amount of the 2-nitrogen ring compound can be from about 0.1 wt% to about 2.0 wt%. If the content of the 2-nitrogen ring compound is less than 0.1 wt%, side etching fluctuations may occur. If the content of the 2-nitrogen ring compound is greater than 2.0 wt%, the etching rate may decrease, thereby reducing etching efficiency.

[0090] Aminosulfonic acid compounds can buffer the acidity of the etchant composition as the number of substrates processed varies. Aminosulfonic acid compounds can prevent or reduce the taper angle of copper patterns as the number of substrates processed with the etchant composition varies. In embodiments, the aminosulfonic acid compound may include, for example, aminosulfonic acid, taurine, sulfonylalanine, homocysteine ​​sulfonic acid, aminomethanesulfonic acid, 3-amino-1-propanesulfonic acid, or any suitable combination thereof. In embodiments, the aminosulfonic acid compound may be aminosulfonic acid.

[0091] Based on a total etchant composition of 100 wt%, an aminosulfonic acid compound may be included in the composition at a concentration of about 0.1 wt% to about 3.0 wt%. If the aminosulfonic acid compound is included in the composition at a concentration of less than 0.1 wt%, the variation in the cone angle may increase with the cumulative number of substrates processed. If the aminosulfonic acid compound is included in the composition at a concentration of more than 3.0 wt%, the etching rate may decrease, thereby reducing etching efficiency.

[0092] 4-Nitrogen cyclic compounds can be used as corrosion inhibitors to prevent or reduce the corrosion of copper.

[0093] 4-Nitrogen cyclic compounds may include, for example, 5-aminotetrazole, 5-methyltetrazole, 1-methyl-5-aminotetrazole, 1-ethyl-5-aminotetrazole, 5-mercapto-1-methyltetrazole, 5-methoxy-1H-tetrazole, 1H-tetrazole, or any suitable combination thereof.

[0094] Based on a total etchant composition of 100 wt%, the amount of the 4-nitrogen cyclic compound can be from about 0.1 wt% to about 2.0 wt%. If the content of the 4-nitrogen cyclic compound is less than 0.1 wt%, it may become difficult to control the copper etching rate, leading to over-etching and uneven etching. If the content of the 4-nitrogen cyclic compound is greater than 2.0 wt%, the etching rate may decrease, thereby reducing etching efficiency.

[0095] In an embodiment, by satisfying that the weight ratio of the 4-nitrogen cyclic compound to the 2-nitrogen cyclic compound is in the range of about 1.6 to about 5.0, the vertical and horizontal etching ratio of the wiring can be controlled, and the problem of side etching becoming more severe as the copper ions in the etchant composition increase can be simultaneously (e.g., synchronously) improved.

[0096] Furthermore, the etchant composition disclosed herein can control the vertical to horizontal etching ratio by controlling the chelation of copper ions and the crevice etching of chloride ions. The vertical direction can be the direction corresponding to the height of the wiring, and the horizontal direction can be a direction orthogonal to (e.g., substantially orthogonal to) the vertical direction. If the etching ratio in the vertical direction is high, the side angle of the wiring is close to 90 degrees. The side angle of the wiring refers to the angle formed between the side and bottom of the wiring. If the side angle of the wiring is less than 90 degrees, the width of the upper surface of the wiring is narrower than the width of the bottom surface, and if the side angle of the wiring is greater than 90 degrees, the width of the upper surface of the wiring is wider than the width of the bottom surface. If the side angle of the wiring is 90 degrees, the width of the bottom surface of the wiring is the same as the width of the upper surface. If the side angle of the wiring is 90 degrees, the area of ​​the wiring cross-section is large at the desired scale, thus reducing impedance (e.g., resistance), but it may be difficult to perform subsequent thin-film deposition processes to conform the wiring. If the lateral angle of the wiring is small, for example, less than 40 degrees, the wiring cross-section becomes close to a triangle, which increases impedance (e.g., resistance) and may cause the wiring to break at weak points. Therefore, it is desirable for the wiring to have an appropriate or suitable lateral angle. Furthermore, the etchant composition of the embodiments of this disclosure can improve the etching ratio in the vertical to horizontal directions so that the wiring has a lateral angle of about 50 degrees to about 60 degrees.

[0097] In this embodiment, multiple substrates can be processed sequentially by repeatedly using the etchant composition. During the initial substrate processing, copper ions (Cu) may cause [problems / problems]. 2+ This refers to the side etching fluctuation phenomenon caused by the increased side etching rate. The etchant composition according to the embodiment can effectively prevent or reduce the variation of side etching and side angle with the number of substrates processed during the initial substrate processing.

[0098] In one embodiment, the etchant composition may be a composition for etching metal films, metal oxide films, metal nitride films, or any suitable combination thereof. In another embodiment, the etchant composition may be a composition for etching both metal films and metal oxide films.

[0099] For example, an etchant composition can etch multilayer films including metal films and metal oxide films.

[0100] For example, the metal film may include copper, titanium, titanium alloys or any suitable combination thereof, and the titanium alloy may include: titanium; and molybdenum (Mo), tantalum (Ta), chromium (Cr), nickel (Ni), neodymium (Nd) or any suitable combination thereof.

[0101] For example, the metal film may include a first metal film and a second metal film, wherein the first metal film may include titanium and / or titanium alloys, wherein the titanium alloys include: titanium; and molybdenum (Mo), tantalum (Ta), chromium (Cr), nickel (Ni), neodymium (Nd) or any suitable combination thereof; and the second metal film may include copper.

[0102] For example, the metal oxide film may include oxides such as indium (In), tin (Sn), gallium (Ga), zinc (Zn), aluminum (Al), or any suitable combination thereof. In another example, the metal oxide film may include oxides such as In, and Sn, Ga, Zn, or any suitable combination thereof. In yet another example, the metal oxide film may be an oxide of In and Sn (e.g., ITO).

[0103] For example, the first metal film may include titanium, the second metal film may include copper, and the metal oxide film may include ITO, but is not limited thereto.

[0104] Patterning with metal layer

[0105] The method of patterning a metal-containing layer using the above-described etchant composition will be further described.

[0106] The method for patterning a metal-containing layer according to the embodiments may include:

[0107] Provide substrate;

[0108] A metal-containing layer is formed on the substrate;

[0109] Forming a photoresist pattern on a metal-containing layer; and

[0110] The metal-containing layer is etched using the above-described etchant composition to pattern the metal-containing layer.

[0111] The metal-containing layer can be a single layer or multiple layers. In embodiments, the metal-containing layer can be multiple layers. For example, the metal-containing layer may include or consist of the following: a layer composed of metal; a layer comprising or composed of metal oxides; a layer comprising or composed of metal nitrides; or any suitable combination thereof.

[0112] The metal may include copper, titanium, titanium alloys or any suitable combination thereof, and titanium alloys may include: titanium; and molybdenum (Mo), tantalum (Ta), chromium (Cr), nickel (Ni), neodymium (Nd) or any suitable combination thereof.

[0113] Metal oxides may include oxides of indium (In), tin (Sn), gallium (Ga), zinc (Zn), aluminum (Al), or any suitable combination thereof. For example, a metal oxide may be indium tin oxide.

[0114] Metal nitrides may include titanium nitride, tantalum nitride, or any suitable combination thereof. For example, a metal oxide may be titanium nitride.

[0115] In one embodiment, the metal layer may include a first metal layer and a second metal layer. The first metal layer may include titanium and / or a titanium alloy, and the second metal layer may include copper.

[0116] In one embodiment, the metal layer may further comprise a metal oxide layer on top of the second metal layer. For example, the metal oxide layer may comprise indium tin oxide.

[0117] Manufacturing of display devices

[0118] In one embodiment, the display device may be manufactured using the etchant composition according to the embodiment.

[0119] The display device according to an embodiment may include: a thin-film transistor, including a semiconductor layer, a gate electrode, and a source electrode and a drain electrode; and a light-emitting element electrically connected to the source electrode and the drain electrode. In an embodiment, the display device may further include a bottom metal layer beneath the semiconductor layer. The bottom metal layer may be connected to the source electrode and the drain electrode. In an embodiment, the light-emitting element may be an organic light-emitting element and / or a quantum dot light-emitting element.

[0120] A method for manufacturing a display device according to an embodiment may include:

[0121] Provide substrate;

[0122] A metal-containing layer is formed on the substrate;

[0123] Forming a photoresist pattern on a metal-containing layer; and

[0124] The metal-containing layer is etched using the above-described etchant composition to form a metal-containing layer pattern.

[0125] The metal layer pattern can form the gate electrode, source electrode, drain electrode, and / or bottom metal layer of the display device.

[0126] The metal-containing layer refers to the metal-containing layer in the patterning method described above.

[0127] Display device

[0128] Figure 1 A plan view illustrating the display device according to an embodiment.

[0129] refer to Figure 1The display device 1 includes a display area DA for displaying an image and an outer peripheral area PA surrounding the display area DA. The display device 1 can provide an image to the outside using light emitted from the display area DA.

[0130] Within the display area DA, pixels PX can be provided, each equipped with a suitable display element, such as an organic light-emitting diode (OLED). Multiple pixels PX can be provided, and these pixels PX can be arranged in various suitable forms (e.g., stripe arrangement, pentiline). ® The layout (e.g., RGBG matrix, RGBG structure, or RGBG matrix structure) and / or mosaic layout, etc., are provided to achieve the image. PENTILE ® It is a trademark officially registered by Samsung Display Co., Ltd.

[0131] If (for example, when) area DA is displayed in a floor plan, then area DA can be displayed as follows: Figure 1 The area shown is provided in a rectangular shape. In another embodiment, the display area DA may be provided in other polygonal shapes (such as triangular, pentagonal, or hexagonal shapes), or in circular, elliptical, or irregular shapes.

[0132] The peripheral area PA is the area surrounding the display area DA, and may be an area where no image is displayed. The peripheral area PA may completely or partially surround the display area DA. The peripheral area PA may contain: various suitable wirings for transmitting electrical signals to be applied to the display area DA; and pad portions PAD, to which printed circuit boards and / or driver IC chips may be attached.

[0133] Figure 2 For illustrative purposes Figure 1 A cross-sectional view of a portion of the display device.

[0134] refer to Figure 1 and Figure 2 The display device 1 according to the embodiment includes a thin film transistor (TFT) on a substrate 100 corresponding to a display area DA and a pad portion PAD on the substrate 100 corresponding to an outer peripheral area PA.

[0135] The display device 1 includes a planarization layer 117, which serves as an insulating layer (e.g., an electrically insulating layer) for exposing pad portions of the pads (PADs) and is disposed on a thin-film transistor (TFT). The display device 1 also includes a pixel defining film 119 on the planarization layer 117.

[0136] The substrate 100 may include or be composed of various suitable materials (such as glass, metal, and / or plastics (e.g., polymers)). In some embodiments, the substrate 100 may include a flexible material. In some embodiments, a flexible material refers to a material that can be easily bent, folded, and / or rolled up. The substrate 100 made of a flexible material may include or be composed of ultrathin glass, metal, and / or plastics (e.g., polymers).

[0137] The buffer layer 111 can reduce or block the infiltration of foreign matter, moisture and / or external air from the lower part of the substrate 100, and can provide a flat surface on the substrate 100. The buffer layer 111 may include inorganic materials (such as oxides and / or nitrides) and / or organic materials and / or organic-inorganic composite materials, and may include a single-layer structure or a multi-layer structure of inorganic and / or organic materials.

[0138] An isolation layer (not shown) may be further included between the substrate 100 and the buffer layer 111. The isolation layer (not shown) serves to prevent, minimize, or reduce the penetration of impurities from the substrate 100 into the semiconductor layer A. The isolation layer (not shown) may include inorganic materials (such as oxides and / or nitrides) and / or organic materials and / or organic-inorganic composite materials, and may include a single-layer structure or a multi-layer structure of inorganic and / or organic materials.

[0139] Semiconductor layer A may be located on buffer layer 111. In an embodiment, semiconductor layer A may include an oxide semiconductor material. Semiconductor layer A may include, for example, an oxide of at least one material selected from the group consisting of: indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), aluminum (Al), cesium (Cs), cerium (Ce), and zinc (Zn).

[0140] For example, semiconductor layer A can be an ITZO (InSnZnO) semiconductor layer and / or an IGZO (InGaZnO) semiconductor layer. Because oxide semiconductor materials have a wide bandgap (approximately 3.1 eV), high carrier mobility, and low leakage current, they have the advantage of small voltage drop even with long driving times, and small brightness changes due to voltage drop even when driven at low frequencies.

[0141] Semiconductor layer A may include a channel region C, and a source region S and a drain region D on one side and the other side of the channel region C, respectively. Semiconductor layer A may include a single-layer structure or a multi-layer structure, or may be composed of a single-layer structure or a multi-layer structure.

[0142] The bottom metal layer BML may be located between the substrate 100 and the buffer layer 111. The bottom metal layer BML may overlap with the channel region C of the semiconductor layer A. The bottom metal layer BML may include a conductive material (e.g., an electrically conductive material) including copper (Cu), titanium (Ti), molybdenum (Mo), and / or aluminum (Al), and the bottom metal layer BML may be formed as a single-layer structure or a multi-layer structure including the above materials. In an embodiment, the bottom metal layer BML may be formed as a Ti / Cu bilayer structure.

[0143] The bottom metal layer BML may overlap with the semiconductor layer A, which includes an oxide semiconductor material. Because the semiconductor layer A, including the oxide semiconductor material, is susceptible to light, the bottom metal layer BML prevents or reduces changes in the device characteristics of the thin-film transistor (TFT) including the oxide semiconductor material caused by photocurrent induced in the semiconductor layer A by external light incident from the substrate 100 side. In an embodiment, the bottom metal layer BML may be connected to the drain region D or the source region S.

[0144] The gate insulating layer 113 may be on the semiconductor layer A. The gate insulating layer 113 may include silicon oxide (SiO2). X ), silicon nitride (SiN) X ), silicon oxynitride (SiO) X N Y Aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and / or zinc oxide (ZnO) X (It can be ZnO and / or ZnO2, etc.) The gate insulating layer 113 can be patterned to overlap at least a portion of the semiconductor layer A. For example, the gate insulating layer 113 can be patterned to expose the source region S and the drain region D.

[0145] The region where the gate insulating layer 113 overlaps with the semiconductor layer A can be understood as the channel region C. The source region S and the drain region D undergo a conductive process such as plasma processing, during which the portion of the semiconductor layer A that overlaps with the gate insulating layer 113 (e.g., the channel region C) has characteristics different from those of the source region S and the drain region D.

[0146] In another embodiment, the gate insulating layer 113 may not be patterned to overlap a portion of the semiconductor layer A, but may instead cover the entire surface of the substrate 100 to cover the semiconductor layer A. The gate electrode G may be on the gate insulating layer 113 to at least partially overlap the semiconductor layer A. In this embodiment, the first electrode CE1 of the storage capacitor Cst may be on the gate insulating layer 113. The gate electrode G and the first electrode CE1 of the storage capacitor Cst may be formed as a single-layer or multi-layer structure comprising or composed of the following: copper (Cu), titanium (Ti), molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), molybdenum (Mo), tungsten (W), or any suitable combination thereof. In this embodiment, the storage capacitor Cst may include the first electrode CE1 and the second electrode CE2.

[0147] An interlayer insulating layer 115 may be provided to cover the semiconductor layer A, the gate electrode G, and the first electrode CE1 of the storage capacitor Cst. The interlayer insulating layer 115 may include silicon oxide (SiO2). X ), silicon nitride (SiN) X ), silicon oxynitride (SiO) X N Y Aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and / or zinc oxide (ZnO) X (It can be ZnO and / or ZnO2), etc.

[0148] Electrode layer E, the second electrode CE2 of storage capacitor Cst, and / or pad electrode PE, etc., may be located on the upper part of interlayer insulating layer 115. Electrode layer E may be a source electrode, drain electrode, and / or data line, etc.

[0149] The electrode layer E, the second electrode CE2 of the storage capacitor Cst, and the pad electrode PE may comprise conductive materials (e.g., electrically conductive materials) including copper (Cu), titanium (Ti), molybdenum (Mo), aluminum (Al), and / or conductive metal oxides (e.g., electrically conductive oxides), and may be formed as a single-layer structure or a multilayer structure comprising the aforementioned materials. The conductive metal oxide may be an oxide of indium (In), tin (Sn), gallium (Ga), zinc (Zn), aluminum (Al), or any suitable combination thereof. The conductive metal oxide may be indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), aluminum zinc oxide (AZO), or any suitable combination thereof. In an embodiment, the electrode layer E, the second electrode CE2 of the storage capacitor Cst, and the pad electrode PE may be formed from a Ti / Cu / ITO multilayer structure.

[0150] The electrode layer E can be connected to the source region S or drain region D of the semiconductor layer A through contact holes. In addition, the bottom metal layer BML and the source region S or drain region D of the semiconductor layer A can be connected through contact holes formed in the buffer layer 111 and the interlayer insulating layer 115.

[0151] The second electrode CE2 of the storage capacitor Cst overlaps with the first electrode CE1, with an interlayer insulating layer 115 between them, thereby providing capacitance. In an embodiment, the interlayer insulating layer 115 may be used as the dielectric layer of the storage capacitor Cst.

[0152] The electrode layer E, the second electrode CE2 of the storage capacitor Cst, and the pad electrode PE can be patterned simultaneously (e.g., synchronously).

[0153] The electrode layer E, the second electrode CE2 of the storage capacitor Cst, and the pad electrode PE can be covered by an inorganic protective layer PVX. The inorganic protective layer PVX can be an inorganic insulating film comprising or composed of inorganic materials. Silicon nitride, silicon oxide, and / or silicon oxynitride can be used as the inorganic material. In an embodiment, the inorganic protective layer PVX can be silicon nitride (SiN). X ) and silicon dioxide (SiO) X It can be a single-layer or multi-layer structure. An inorganic protective layer PVX can be introduced to cover and protect some of the wiring on the interlayer insulation layer 115.

[0154] The inorganic protective layer PVX may include contact holes (CNTs) for connecting the thin-film transistor (TFT) and the pixel electrode 310, and openings (OPs) for exposing the pad portion (PAD). Figure 1 As described, the printed circuit board and / or driver IC chip can be attached to the pad portion of the PAD.

[0155] A planarization layer 117 is provided to cover the second electrode CE2 of the electrode layer E and the storage capacitor Cst, and the planarization layer 117 may include a contact hole CNT to connect the thin film transistor (TFT) and the pixel electrode 310.

[0156] The planarization layer 117 may be formed as a single-layer or multi-layer structure comprising or composed of organic materials, and provides a flat upper surface. The planarization layer 117 may comprise polymers such as benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), polymethyl methacrylate (PMMA), polystyrene (PS), phenolic polymers, acrylic polymers, imide polymers, aryl ether polymers, amide polymers, fluorinated polymers, p-xylene polymers, vinyl alcohol polymers, or any suitable combination thereof.

[0157] In one implementation, a planarization layer 117 may be provided to expose the pad portion of the pad.

[0158] The light-emitting element 300 is on the planarization layer 117. The light-emitting element 300 includes a pixel electrode 310, an intermediate layer 320 including an emitting layer, and a counter electrode 330.

[0159] The pixel electrode 310 may be a (semi-)transparent electrode or a reflective electrode. In some embodiments, the pixel electrode 310 may provide a reflective layer formed of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, or compounds thereof, and a transparent or semi-transparent electrode layer formed on the reflective layer. The transparent or semi-transparent electrode layer may include at least one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and zinc aluminum oxide (AZO). In embodiments, the pixel electrode 310 may provide an ITO / Ag / ITO multilayer structure.

[0160] A pixel defining film 119 may be applied to a planarization layer 117. The pixel defining film 119 covers the edge of the pixel electrode 310 and may have an opening to expose a portion of the pixel electrode 310. The pixel defining film 119 may be used to prevent or reduce the occurrence, likelihood, or extent of arcing or the like at the edge of the pixel electrode 310 by increasing the distance between the edge of the pixel electrode 310 and the counter electrode 330 on the upper part of the pixel electrode 310.

[0161] The pixel-defining film 119 can be formed by spin coating or other methods using one or more organic insulating materials (e.g., organic electrical insulating materials) selected from the group consisting of polyimide, polyamide, acrylic resin, benzocyclobutene and phenolic resin.

[0162] The intermediate layer 320 lies between the pixel electrode 310 and the counter electrode 330 within the opening formed by the pixel defining film 119, and may include an emission layer. The emission layer may include organic and / or inorganic materials, including fluorescent and / or phosphorescent materials that emit red, green, blue, or white light. The organic materials may be low-molecular-weight organic materials and / or polymeric organic materials, and the inorganic materials may be semiconductor quantum dot materials.

[0163] Functional layers such as the hole transport layer (HTL), hole injection layer (HIL), electron transport layer (ETL), and / or electron injection layer (EIL) can optionally be located below or above the emitter layer.

[0164] The counter electrode 330 can be a transparent electrode or a reflective electrode. In some embodiments, the counter electrode 330 can be a transparent or translucent electrode and can be formed of a metal thin film of a metal with a low work function, including Li, Ca, LiFAl, Ag, Mg and / or compounds thereof and / or multilayer materials (such as LiF / Ca (a stacked structure of LiF and Ca) or LiF / Al (a stacked structure of LiF and Al)). In embodiments, a transparent conductive oxide (TCO) film formed of, for example, ITO, IZO, ZnO and / or In2O3 can be further provided on the metal thin film. The counter electrode 330 can be provided throughout the display area DA and can be on the intermediate layer 320 and the pixel defining film 119. The counter electrode 330 can be integrally provided in a plurality of light-emitting elements 300 and correspond to a plurality of pixel electrodes 310.

[0165] Because these light-emitting elements 300 are easily damaged by external moisture and / or oxygen, a thin-film encapsulation layer can cover the light-emitting elements 300 to protect them.

[0166] In the aforementioned display device 1, when forming the bottom metal layer BML, the gate electrode G, the electrode layer E, and the pad electrode PE, an etchant composition according to the embodiment can be used.

[0167] The etchant compositions according to embodiments will be described in more detail below with reference to examples.

[0168] Example

[0169] Preparation of Etching Composition

[0170] Examples 1 to 7 and Comparative Examples 1 to 10

[0171] Etching compositions according to Examples 1 to 7 and Comparative Examples 1 to 10 were prepared using the compositions shown in Table 1 below. In Table 1, wt% refers to the weight percentage based on the total weight of the etching composition. In Table 1, when the total weight of the etching composition is 100 wt%, the remaining amount corresponds to deionized water.

[0172] In Table 1 below, APS is ammonium persulfate, ABF is ammonium hydrogen fluoride, HNO3 is nitric acid, and ATZ is 5-aminotetrazole. In Table 1, the T / I ratio represents the weight ratio of ATZ to imidazole, and the S / E fluctuation is assessed by evaluating the extent of side etching using the etched pattern of the etchant composition confirmed by scanning electron microscopy (SEM) images, which will be described in more detail herein.

[0173] Table 1

[0174]

[0175] Manufacturing of test substrate

[0176] A Ti (200 Å) / Cu (6000 Å) film was deposited on a glass substrate, and a photoresist was patterned thereon to fabricate a test substrate. The width of the photoresist pattern was 20 μm, and the spacing between the patterns was 8 μm. Multiple test substrates were fabricated to evaluate each of the etchant compositions of Examples 1 to 7 and Comparative Examples 1 to 10.

[0177] Evaluation Example 1

[0178] For each of the etchant compositions of Examples 1 to 7 and Comparative Examples 1 to 10, an etching test was performed by sequentially etching multiple manufactured test substrates. The etchant composition was placed in a jet etching experimental apparatus (model name: ETCHER (TFT), SEMES) with the temperature set to approximately 28°C, and then the test substrate was etched. Based on endpoint detection (EPD), the etching time was until 100% overetch was achieved. The jetted etchant composition was recycled and reused.

[0179] The cross-section of the test substrate etched with the etchant composition was observed using SEM to measure the degree of side etching S / E. Figure 3 A schematic diagram illustrating the method of measuring side etching. (Reference) Figure 3 "S / E" indicates the distance between the bottom edge of the etched photoresist PR pattern and the bottom edge of the etched copper pattern Cu.

[0180] For each of the etchant compositions in Examples 1 to 7 and Comparative Examples 1 to 10, the test substrates were etched sequentially, and the Cu content in the etchant composition was confirmed according to the number of substrates etched using an inductively coupled plasma mass spectrometry (ICP-MS) analyzer (7900 ICP-MS, manufactured by Agilent). 2+ The concentration.

[0181] Observe the Cu in the etchant composition separately 2+ A pair of cross-sectional SEM images of the Ti / Cu patterns of a test substrate etched at a concentration of 0 ppm (the first etched test substrate) and a test substrate etched at 500 ppm were obtained, and the degree of lateral etching was measured from these images. When the number of etched test substrates is small, the Cu content in the etchant composition from the etched copper patterns is... 2+ The concentration is low, and when the number of test substrates being etched is large, the Cu in the etchant composition from the etched copper pattern is high. 2+ The concentration can accumulate and increase. If the side etching S / E varies greatly with the number of etched substrates, the process stability decreases.

[0182] The S / E fluctuation items in Table 1 are assessed based on 0 ppm Cu. 2+ The S / E value of the Ti / Cu pattern etched on the test substrate by the etchant composition and the value of the pattern etched by 500 ppm Cu 2+ The etchant composition is used to measure the difference in S / E values ​​between the Ti / Cu patterns etched on the test substrate. If (for example, when) the difference in S / E values ​​is from about 0 μm to about 0.1 μm, the process stability is assessed as “good”; however, when it is greater than 0.1 μm, the process stability is assessed as “defective”. Frequent changes to the etchant composition to ensure process stability increase process costs and time.

[0183] Referring to Table 1, the S / E fluctuations of the Ti / Cu patterns on the test substrates etched with the etchant compositions of Examples 1 to 7 were good, at 0.1 μm or less. However, the S / E fluctuations of the Ti / Cu patterns on the test substrates etched with the etchant compositions of Comparative Examples 1 to 10 were greater than 0.1 μm and were defective. Although this disclosure is not limited to any particular mechanism or theory, the above is considered to be because, in the case of the etchant compositions of Examples 1 to 7, as etching proceeds, the copper ions generated in the etchant composition are effectively chelated, thereby reducing the contribution of copper ions to side etching through oxidation. In the case of the etchant compositions of Comparative Examples 1 to 10, the chelation of copper ions is ineffective, so as etching proceeds, copper ions are continuously oxidized and contribute to side etching.

[0184] For example, the S / E values ​​of etched patterns using the etchant compositions of Example 3 and Comparative Example 5 were measured and compared. Figure 4 A pair of cross-sectional SEM images of the Ti / Cu pattern of a test substrate etched using the etchant composition of Example 3. Figure 4 The left image shows Cu in the etchant composition. 2+ SEM images of Ti / Cu patterns etched at a concentration of 0 ppm, and Figure 4 The image on the right shows the Cu in the etchant composition. 2+ SEM image of Ti / Cu pattern etched at a concentration of 500 ppm. Figure 5 A pair of cross-sectional SEM images of the Ti / Cu pattern of the test substrate etched using the etchant composition of Comparative Example 5. Figure 5 The left image shows Cu in the etchant composition. 2+ SEM images of Ti / Cu patterns etched at a concentration of 0 ppm, and Figure 5 The image on the right shows the Cu in the etchant composition. 2+SEM image of Ti / Cu pattern etched at a concentration of 500 ppm.

[0185] refer to Figure 4 SEM images, in the case of Example 3, when Cu in the etchant composition 2+ When the concentration increased from approximately 0 ppm to approximately 500 ppm, the side etching S / E degree increased from approximately 0.60 μm to approximately 0.66 μm, an increase of 10%. On the other hand, reference... Figure 5 SEM images, in the case of Comparative Example 5, showing the Cu content in the etchant composition. 2+ When the concentration increased from about 0 ppm to about 500 ppm, the side etching S / E degree increased from about 0.63 μm to about 0.96 μm, an increase of 52%.

[0186] In Comparative Example 5, the side etching became more severe as the number of etched test substrates increased, while in Example 3, no significant increase in the side etching S / E degree was observed even when the number of etched test substrates increased.

[0187] The etchant composition according to the embodiments ensures the etching of the metal multilayer film while controlling the etching profile on the control side.

[0188] Using the etchant composition according to the embodiments, metal-containing layer patterns in semiconductor devices can be reliably formed.

[0189] It should be understood that the embodiments described herein are to be considered in a descriptive sense only and are not intended for limiting purposes. The description of features or aspects within each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, those skilled in the art will understand that various suitable changes in form and detail may be made therein without departing from the spirit and scope of this disclosure as defined by the claims and its equivalents.

Claims

1. An etchant composition comprising: 3.0 wt% to 15.0 wt% ammonium persulfate; Inorganic acids ranging from 0.1 wt% to 5.0 wt%; 0.1 wt% to 2.0 wt% of fluorinated ammonium salts; 0.01wt% to 1.5wt% of chloride-containing ammonium salts; 0.1 wt% to 2.0 wt% of 2-nitrogen cyclic compounds; 0.1 wt% to 2.0 wt% of 4-nitrogen cyclic compounds; 0.1 wt% to 3.0 wt% of aminosulfonic acid compounds; and The remaining water is used to bring the total weight of the etchant composition to 100 wt%. The weight ratio of the 4-nitrogen cyclic compound to the 2-nitrogen cyclic compound ranges from 1.6 to 5.

0.

2. The etchant composition according to claim 1, The inorganic acid mentioned therein includes nitric acid, sulfuric acid, p-toluenesulfonic acid, chloric acid, phosphoric acid, phosphorous acid, or any suitable combination thereof.

3. The etchant composition according to claim 1, The inorganic acid mentioned is nitric acid.

4. The etchant composition according to claim 1, The fluorinated ammonium salts mentioned therein include ammonium hydrogen fluoride.

5. The etchant composition according to claim 1, The 2-nitrogen cyclic compound includes imidazole, benzimidazole, pyrazole, indazole, pyridazine, pyrimidine, pyrazine, or any suitable combination thereof.

6. The etchant composition according to claim 1, The 2-nitrogen cyclic compound is an imidazole.

7. The etchant composition according to claim 1, The aminosulfonic acid compound mentioned above includes aminosulfonic acid, taurine, sulfonylalanine, homocysteine ​​sulfonic acid, aminomethanesulfonic acid, 3-amino-1-propanesulfonic acid, or any suitable combination thereof.

8. The etchant composition according to claim 1, The aminosulfonic acid compound mentioned above is an aminosulfonic acid.

9. The etchant composition according to claim 1, The 4-nitrogen cyclic compound includes 5-aminotetrazole, 5-methyltetrazole, 1-methyl-5-aminotetrazole, 1-ethyl-5-aminotetrazole, 5-mercapto-1-methyltetrazole, 5-methoxy-1H-tetrazole, 1H-tetrazole, or any suitable combination thereof.

10. The etchant composition according to claim 9, The 4-nitrogen cyclic compound is 5-aminotetrazole.

11. A method for patterning a metal-containing layer, comprising: Provide substrate; A metal-containing layer is formed on the substrate; A photoresist pattern is formed on the metal-containing layer; as well as The metal-containing layer is etched using the etchant composition according to any one of claims 1 to 10 to pattern the metal-containing layer.

12. The method according to claim 11, The metal-containing layer therein is multi-layered.

13. The method according to claim 11, The metal-containing layer includes metals, metal oxides, metal nitrides, or any suitable combination thereof.

14. The method according to claim 13, The metals mentioned include copper, titanium, titanium alloys, or any suitable combination thereof. And the titanium alloy comprises: titanium; And molybdenum, tantalum, chromium, nickel, neodymium or any suitable combination thereof.

15. The method according to claim 13, The metal oxides mentioned therein include oxides of indium, tin, gallium, zinc, aluminum, or any suitable combination thereof.

16. The method according to claim 13, The metal oxide mentioned therein is indium tin oxide.

17. The method according to claim 13, The metal nitrides mentioned therein include titanium nitride, tantalum nitride, or any suitable combination thereof.

18. The method according to claim 11, The metal-containing layer includes a first metal layer and a second metal layer. The first metal layer comprises titanium, titanium alloys, or any suitable combination thereof. The titanium alloy comprises: titanium; And molybdenum, tantalum, chromium, nickel, neodymium, or any suitable combination thereof, The second metal layer comprises copper.

19. The method according to claim 18, The metal-containing layer further includes a metal oxide layer on the second metal layer. Furthermore, the metal oxide layer includes indium tin oxide.

20. A method of manufacturing a display device, the method comprising: Provide substrate; A metal-containing layer is formed on the substrate; A photoresist pattern is formed on the metal-containing layer; as well as The metal-containing layer is etched using the etchant composition according to any one of claims 1 to 10 to form a metal-containing layer pattern. The display device includes a thin-film transistor, the thin-film transistor including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode; and a light-emitting element electrically connected to the source electrode and the drain electrode, wherein the metal layer pattern constitutes: the gate electrode, the source electrode and the drain electrode, and / or the bottom metal layer.

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