Multi-axis synchronous motion control system and method
By adopting a unified master clock source and control cycle mechanism in the multi-axis synchronous motion control system, precise synchronization of multi-axis motion is achieved, solving the problem of asynchronous actions and improving the system's synchronization accuracy and operating efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- 合肥欣奕华智能机器股份有限公司
- Filing Date
- 2026-03-06
- Publication Date
- 2026-06-30
Smart Images

Figure CN122308256A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of motion control technology, and in particular to a multi-axis synchronous motion control system and method. Background Technology
[0002] With the rapid development of industrial automation and precision manufacturing, multi-axis motion has become a core requirement for high-end equipment in fields such as semiconductor processing and high-end CNC machine tools. Multi-axis motion refers to the coordinated action of multiple independent motion axes driven by multiple motors. Each motion axis can complete independent displacement along a linear or rotational direction, thereby realizing the complex motion functions of the equipment.
[0003] However, during the operation of a multi-axis motion system, the motion axes often have asynchronous movements, which can easily lead to consequences such as positioning inaccuracy, machining trajectory deviation, and product scrapping, severely restricting the operating accuracy and production efficiency of the equipment. Therefore, improving the synchronization accuracy of multi-axis motion has become a key technical problem that urgently needs to be solved in the field of industrial automation. Summary of the Invention
[0004] The purpose of this application is to provide a multi-axis synchronous motion control system and method, which aims to improve the synchronization accuracy of multi-axis motion.
[0005] To achieve the above objectives, the embodiments of this application provide the following technical solutions: In a first aspect, this application provides a multi-axis synchronous motion control system, comprising: a main control board and at least one sub-board; each sub-board is used to control at least one motor, the motor being used to drive a motion axis; the main control board includes a main control clock source; the main control clock source is used to provide a reference clock signal; the main control board is configured to: send motion command data to a target sub-board in a first control cycle based on the reference clock signal provided by the main control clock source; the target sub-board is any one of the at least one sub-board; the motion command data is used to drive the motor to move so that the corresponding motion axis moves to a target position; and send a command synchronization signal to the target sub-board in a second control cycle based on the reference clock signal provided by the main control clock source; the target sub-board is configured to: cache the motion command data in response to receiving the motion command data; and retrieve the corresponding target motion command data in response to receiving the command synchronization signal, and control at least one motor to operate based on the target motion command data.
[0006] The multi-axis synchronous motion control system provided in this application uses a unified master clock source integrated on the main control board as a reference. Motion command data is issued in the first control cycle. The sub-boards cache the received motion command data in advance to ensure that each sub-board has stored complete and valid motion commands to be executed before the arrival of the synchronization signal. This ensures that all motion axes move simultaneously under the trigger of the same command synchronization signal, thereby realizing the precise synchronization of centralized planning and distributed execution of motion command data. It effectively avoids command execution deviations caused by clock signal asynchrony and improves the synchronization accuracy of multi-axis motion.
[0007] In some embodiments, the main control board is connected to the daughter board via a data communication bus and a hardwired connection, respectively; the main control board is used to transmit motion command data via the data communication bus and transmit command synchronization signals via the hardwired connection.
[0008] In some embodiments, in response to receiving a command synchronization signal, retrieving corresponding target motion command data and controlling at least one motor to operate based on the target motion command data includes: in response to receiving a command synchronization signal, retrieving corresponding target motion command data and acquiring feedback data of the target motor; the feedback data is used to characterize the actual motion data of the target motor; the target motor is the motor that needs to be controlled as represented by the target motion command data; calculating the deviation between the feedback data and the target motion command data, determining the deviation result to generate a control signal; and controlling the movement of at least one target motor based on the control signal.
[0009] In some embodiments, the first control period is M times the second control period; M is an integer greater than 1.
[0010] In some embodiments, a first timer and a second timer are respectively connected to a master clock source; the first timer is used to count based on a reference clock signal provided by the master clock source, and to determine a first control period based on the relationship between the count value and a first preset value; the second timer is used to count based on a reference clock signal provided by the master clock source, and to determine a second control period based on the relationship between the count value and a second preset value.
[0011] In some embodiments, the main control board is further configured to: determine a timing deviation based on the real-time count value of the second timer and a target count value; the target count value is determined based on the real-time count value of the first timer, a first preset value, and a second preset value, and is used to represent the theoretical count value of the second timer when there is no deviation; if the timing deviation exceeds a preset timing threshold, adjust the real-time count value of the second timer or the real-time count value of the first timer until the timing deviation corresponding to the adjusted count value does not exceed the preset timing threshold.
[0012] In some embodiments, the main control board is connected to at least one main control motor driver via an industrial Ethernet bus; the main control motor driver is used to drive the motion axis of the corresponding main control motor; the main control board is also configured to: send a target motion command to the target main control motor driver via the industrial Ethernet bus based on the reference clock signal provided by the main control clock source, so as to drive the motion axis of the target main control motor connected to the target main control motor to move; the target main control motor driver is any one of the at least one main control motor driver.
[0013] Secondly, this application also provides a multi-axis synchronous motion control method, applied to the main control board in the multi-axis synchronous motion control system of the first aspect described above. The method includes: sending motion command data to a target sub-board in a first control cycle based on a reference clock signal provided by a main control clock source; the motion command data is used to drive a motor to move so that the corresponding motion axis moves to a target position; the target sub-board is used to control at least one motor, which is used to drive the motion axis to move; sending a command synchronization signal to the target sub-board in a second control cycle based on the reference clock signal provided by the main control clock source; wherein, the command synchronization signal is used to trigger the target sub-board to control the connected motor to move based on the motion command data.
[0014] In some embodiments, based on the reference clock signal provided by the master control clock source, a target motion command is sent to the target master control motor driver via an industrial Ethernet bus to drive the motion axis corresponding to the target master control motor connected to the target master control motor driver.
[0015] Thirdly, this application also provides an electronic device comprising: a processor and a memory; the memory storing processor-executable instructions; when the processor is configured to execute the instructions, causing the electronic device to implement the method of the second aspect described above.
[0016] Fourthly, this application also provides a computer-readable storage medium comprising: computer software instructions; when the computer software instructions are executed in an electronic device, the electronic device performs the method described in the second aspect.
[0017] Fifthly, this application also provides a computer program product comprising a computer program that, when run on an electronic device, causes the electronic device to perform the method of the second aspect.
[0018] The beneficial effects of the second to fifth aspects mentioned above can be referred to the corresponding description of the second aspect, and will not be repeated here. Attached Figure Description
[0019] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0020] Figure 1 A schematic diagram of the architecture of a multi-axis synchronous motion control system provided in this application; Figure 2 A schematic diagram of a synchronization period deviation monitoring and calibration process provided for this application; Figure 3 A schematic diagram of the execution of a daughterboard closed-loop control provided in this application; Figure 4 A hardware architecture diagram of a multi-axis synchronous motion control system provided in this application; Figure 5 A schematic diagram illustrating the interaction logic between a main control board and a daughter board provided in this application; Figure 6 A flowchart illustrating a multi-axis synchronous motion control method provided in this application; Figure 7 A flowchart illustrating a multi-axis synchronous motion control cycle provided in this application; Figure 8 This is a schematic diagram of the structure of an electronic device provided in this application. Detailed Implementation
[0021] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0022] It should be noted that in the embodiments of this application, the words "exemplarily" or "for example" are used to indicate examples, illustrations, or explanations. Any embodiment or design scheme described as "exemplarily" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design schemes. Specifically, the use of the words "exemplarily" or "for example" is intended to present the relevant concepts in a specific manner.
[0023] In the embodiments of this application, the terms "first," "second," "third," "fourth," "fifth," and "sixth" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with "first," "second," "third," "fourth," "fifth," and "sixth" may explicitly or implicitly include one or more of that feature.
[0024] In embodiments of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.
[0025] As industrial automation technology develops towards higher precision, the inter-axis synchronization performance of multi-axis motion control systems has become a core bottleneck restricting the improvement of overall control accuracy.
[0026] In related technologies, multi-axis motion control schemes are mainly divided into two categories: analog control schemes and pulse control schemes. Traditional analog control schemes consist of independent analog control cards that drive the motor by outputting continuous voltage or current signals; however, the use of distributed clock sources for each control card in this scheme makes it difficult to guarantee synchronization accuracy between motion axes. Pulse control schemes, on the other hand, achieve motor control by sending pulse train signals. This scheme relies on a simple interface protocol for command transmission, and its synchronization capability is limited by the protocol architecture, thus also failing to meet high-precision control requirements.
[0027] To overcome the aforementioned synchronization performance bottleneck, relevant technologies have introduced real-time Ethernet protocols such as EtherCAT to construct control architectures. However, this architecture has significant drawbacks: on the one hand, due to the inherent latency and jitter of the software protocol stack, the synchronization accuracy is difficult to break through the microsecond level bottleneck; on the other hand, its pure digital instruction interface has compatibility issues with the analog signal interface of high-performance analog drivers, failing to fully leverage the technical advantages of analog drivers.
[0028] In summary, the relevant technical solutions are difficult to achieve stable and precise synchronization in multi-axis collaborative control, which limits the performance improvement of the overall motion control system.
[0029] Based on this, the multi-axis synchronous motion control system provided in this application uses the unified master control clock source integrated on the main control board as a reference. Motion command data is issued in the first control cycle. The sub-boards cache the received motion command data in advance to ensure that each sub-board has stored complete and valid motion commands to be executed before the arrival of the synchronization signal. This ensures that all motion axes move simultaneously under the trigger of the same command synchronization signal, thereby realizing the precise synchronization of centralized planning and distributed execution of motion command data, effectively avoiding command execution deviations caused by clock signal asynchrony, and improving the synchronization accuracy of multi-axis motion.
[0030] To further describe the technical solutions of the embodiments of this application, as follows: Figure 1 The diagram shown is a schematic representation of the architecture of a multi-axis synchronous motion control system provided in an embodiment of this application.
[0031] Reference Figure 1 The multi-axis synchronous motion control system includes: a main control board 101, at least one sub-board 102, a motor 103, and a motion axis 104. Each sub-board 102 controls at least one motor 103, and the motor 103 drives the motion axis 104.
[0032] As one implementation method, such as Figure 1 As shown, the main control board 101 is connected to at least one daughter board 102, and is responsible for sending motion command data and command synchronization signals to the daughter board 102. Each daughter board 102 is connected to at least one motor driver 105, and each motor driver 105 controls a motor 103. Each motor drives the corresponding motion axis 104 to perform motion. Specifically, the daughter board 102 receives motion command data sent to it by the main control board 101, and in response to the command synchronization signal determined based on the reference clock signal of the main control board 101, drives the motor driver 105 to perform actions based on the motion command data. The motor driver 105 drives the motion axis 104 corresponding to the motor 103 to move left and right, up and down, rotate, etc. Figure 1 Only a few examples of each hardware component are shown in this application, and there is no limit to the number of each hardware component.
[0033] The main control board 101 is the control device of the multi-axis synchronous motion control system. It is used to plan the multi-axis motion logic, generate a unified reference clock signal, issue motion command data and command synchronization signals, and ensure the timing consistency of the control actions of each sub-board 102.
[0034] In this embodiment of the application, the main control board 101 includes a main control clock source, which is used to provide a reference clock signal.
[0035] The master clock source is a high-precision clock signal generator and is a hardware device. The reference clock signal is a standard clock signal generated by the master clock source. It serves as the time reference for all control cycles and synchronization signals in the entire multi-axis synchronous motion control system, ensuring the consistency of all timing-related operations, such as the issuance of instructions by the master control board 101 and the execution of instructions by the daughter board 102.
[0036] For example, the main control clock source uses a high-precision crystal oscillator (such as a temperature-compensated crystal oscillator or a temperature-compensated crystal oscillator) as its core, combined with clock shaping, frequency division, and amplitude stabilization circuits, to generate a clock signal with stable frequency and extremely low timing jitter. This clock signal serves as the unified reference clock signal in the entire multi-axis synchronous motion control system, providing accurate time measurement for the first control cycle when the main control board 101 issues motion command data and the second control cycle when it sends command synchronization signals, while ensuring the timing consistency of the commands executed by each sub-board 102.
[0037] In this embodiment, the main control board 101 is configured to send motion command data to the target sub-board 102 in a first control cycle based on a reference clock signal provided by the main control clock source. The target sub-board 102 is any one of at least one sub-board 102. The motion command data is used to drive the motor 103 to move so that the corresponding motion axis 104 moves to the target position.
[0038] The target position refers to the preset spatial or angular position that the motion axis needs to reach under the control of motion command data. It is the final positioning target of motion control.
[0039] As a feasible implementation method, the main control board 101 generates two sets of strictly synchronized derived clock signals based on the reference clock signal provided by the main control clock source through a PLL (phase-locked loop) circuit. These two sets of clock signals have different or the same frequency and can be used as direct clock signal references for generating the timing signal of the first control cycle (i.e., the first control cycle signal below) and the instruction synchronization signal of the second control cycle, respectively.
[0040] Among them, the PLL circuit refers to the processing circuit that regenerates and distributes the reference clock signal output by the master clock source. It multiplies and divides the single reference clock signal through feedback control and generates multiple derived clock signals with different frequencies but strictly synchronized phases.
[0041] For example, the main control board 101 generates two sets of phase-synchronized clock signals through a PLL circuit: a first derived clock signal and a second derived clock signal. For instance, a 50MHz (1 / 2 division) and a 350MHz (3.5 times the frequency) clock signal are derived from a 100MHz reference. Although they appear to be independent in frequency, their periods and edges have a strict integer multiple alignment relationship on the time axis. This application does not specify the specific frequencies of the first and second derived clock signals; they can be clock signals with the same frequency or clock signals with different frequencies.
[0042] As a feasible implementation method, the main control board 101 has a built-in first timer, which counts based on the reference clock signal provided by the main control clock source. When the count value reaches the first preset value, a motion command data sending action is triggered. The time interval between two trigger actions is the first control cycle. The main control board 101 sends the packaged motion command data to the target daughter board 102 through the data communication bus.
[0043] The first timer can be a system timer within the main control board 101. This system timer is driven by a first derived clock signal generated by the PLL circuit based on the reference clock signal. The first timer counts this first derived clock signal to generate a first control cycle signal for the first control cycle.
[0044] For example, the master clock source provides a 100MHz reference clock signal, which is divided by the PLL circuit to generate a 50MHz first derived clock signal, and then provided to the first timer. The first timer is configured with a first preset value of 25000 (i.e., 50MHz / 2kHz=25000), so that an overflow occurs every 25000 counts, thereby accurately generating a first control cycle signal with a period of 0.5ms (frequency 2kHz), which is the first control cycle.
[0045] In this embodiment of the application, the main control board 101 is configured to send an instruction synchronization signal to the target daughter board 102 in a second control cycle based on the reference clock signal provided by the main control clock source.
[0046] As a feasible implementation method, the main control board 101 has a built-in second timer, which also counts based on the reference clock signal. When the count value reaches the second preset value, the transmission of the instruction synchronization signal is triggered, and the time interval between the two triggers is the second control cycle. The main control board 101 sends the synchronization trigger signal to the target daughter board 102 through a hard wire connection to ensure low latency and high reliability of the synchronization instruction transmission.
[0047] Specifically, the second timer can be a peripheral timer on the main control board 101 that operates independently of the first timer (system timer), such as a PWM timer dedicated to pulse width modulation or hardware triggering, or a general-purpose timer with hardware trigger output function. The second timer is driven by a second derived clock signal generated by the PLL circuit based on the reference clock signal. The second timer counts this second derived clock signal to generate the instruction synchronization signal for the second control cycle, which is a set of voltage pulse signals.
[0048] For example, the PLL circuit generates a second derived clock signal (e.g., 350MHz) based on the same 100MHz reference clock signal to drive the second timer. If a second control cycle of 20kHz is required, the second preset value is configured to 17500 (i.e., 350MHz / 20kHz = 17500). The second timer overflows every 17500 counts, and a steep-edge pulse signal, i.e., the instruction synchronization signal, is automatically generated by its dedicated hardware output pin.
[0049] For example, the instruction synchronization signal of the second control cycle is simultaneously broadcast to all daughter boards 102 via independent hard lines (such as differential signal lines) as a synchronization trigger signal for each daughter board 102. Since the generation and transmission of this signal are entirely driven by the second timer of the main control board 101 and do not depend on software scheduling, its cycle is stable and the jitter is extremely low, providing a deterministic time reference for the synchronous execution of each daughter board 102.
[0050] As a feasible implementation method, the main control board 101 calculates the timing deviation between the first control cycle and the second control cycle in real time and performs optimization adjustments to ensure timing consistency. For details, please refer to the following embodiment on the generation and synchronization of the first and second control cycles.
[0051] The daughter board 102 is an intermediate actuator in the multi-axis synchronous motion control system that connects the main control board 101 and the motor 103. It has functions such as motion command data buffering, command synchronization signal conversion, and motor 103 control. Specifically, the daughter board 102 can receive and buffer motion command data issued by the main control board 101, respond to command synchronization signals to execute control actions, and at the same time collect feedback data from the motor 103 for deviation correction, thereby achieving precise drive of the connected motor 103.
[0052] In this embodiment, the target subboard 102 is configured to: cache motion command data in response to receiving motion command data; retrieve corresponding target motion command data in response to receiving a command synchronization signal; and control at least one motor 103 to work based on the target motion command data.
[0053] As a feasible implementation, a dedicated storage area is pre-allocated within the target daughterboard 102 to sequentially store multiple sets of motion command data periodically issued by the main control board 101, and a dedicated circuit is set up to continuously monitor the command synchronization signal hardwire. When a valid edge of the command synchronization signal is detected, it indicates that the command synchronization signal has been received. The corresponding data reading position is immediately determined according to preset rules, and the target motion command data matching the command synchronization signal is accurately read from the storage area. Here, the valid edge of the command synchronization signal refers to a specific level transition edge (rising edge or falling edge), which is used to trigger all daughterboards to simultaneously retrieve and execute motion commands from the buffer.
[0054] For example, if the main control board 101 issues a command at 2kHz (first control cycle, 0.5ms), the storage area of the target daughter board 102 can cache the command data for the next 10 cycles (10 sets in total). When the edge of the command synchronization signal running at 20kHz (second control cycle, 50µs) arrives, the target daughter board 102 determines that the current cycle is the Nth 50µs cycle (N ranges from 1 to 10) through an internal counter, and then reads the Nth set of motion command data (e.g., including parameters such as target position and target speed) from the storage area.
[0055] As a feasible implementation method, within a second control cycle, the target sub-board 102 performs closed-loop control calculations based on the read instruction data and the real-time acquired feedback signals from the motor 103, generating and outputting the motor 103 drive signal. For details, please refer to the specific embodiment of the sub-board's multi-axis motion control process described below.
[0056] It can be seen that, as Figure 1 The multi-axis synchronous motion control system shown includes a main control board 101 that uses a unified internal master clock source. The main control board 101 sends motion command data to the sub-board 102 in a first control cycle and sends a command synchronization signal to the sub-board 102 in a second control cycle. The sub-board 102 buffers the received motion command data and immediately retrieves the command upon receiving the command synchronization signal, controlling the motor 103 to drive the motion axis 104. This system provides a completely consistent time reference for the main control board and each sub-board through a unified clock control source, eliminating the potential for timing misalignment caused by clock deviations between devices. Furthermore, the main control board sends motion command data in the first control cycle, and the sub-boards buffer the received motion command data in advance, ensuring that each sub-board has prepared complete and valid motion commands to be executed before the synchronization signal arrives. This ensures that all motion axes move simultaneously under the trigger of the same command synchronization signal, thereby achieving precise synchronization of centralized planning and distributed execution of motion command data.
[0057] The following section provides a detailed description of an embodiment of the generation and synchronization of the first and second control cycles in a multi-axis synchronous motion control system.
[0058] In some embodiments, the first control period is M times the second control period; M is an integer greater than 1.
[0059] As a feasible implementation method, by configuring the clock signal frequency driving the first timer to be 1 / M of the clock signal frequency driving the second timer, or by configuring the first preset value of the first timer to be M times the second preset value of the second timer, the integer multiple relationship can be deterministically established, thereby ensuring that every motion command issued by the main control board can be executed accurately and synchronously within a certain number of consecutive execution cycles.
[0060] For example, the specific value of M is configured according to the planning accuracy and execution real-time performance required by the system. For instance, in scenarios requiring high dynamic response, the second control cycle can be set to a higher frequency, and M can be set to an integer to ensure the smoothness of the instructions.
[0061] In some embodiments, the multi-axis synchronous motion control system further includes: a first timer and a second timer, the first timer and the second timer being connected to a master clock source respectively; the first timer is used to count based on a reference clock signal provided by the master clock source, and to determine a first control period based on the relationship between the count value and a first preset value; the second timer is used to count based on a reference clock signal provided by the master clock source, and to determine a second control period based on the relationship between the count value and a second preset value.
[0062] In one possible implementation, the first and second timers are connected to the master clock source via a PLL circuit. The specific connection path is as follows: the reference clock signal (e.g., 100MHz) output by the master clock source is first input to the PLL circuit; after locking the reference clock signal, the PLL circuit outputs one or more derived clock signals synchronized with it (e.g., 50MHz and 350MHz); these derived clock signals drive the first and second timers respectively. Thus, the two timers are essentially driven by synchronized clock signals derived from the same reference clock source and having a defined frequency relationship.
[0063] In one possible implementation, both the first and second timers are hardware devices, each containing an incrementing counter that automatically increments by 1 on each valid edge (such as a rising edge) of the base clock signal received from its clock signal input. For example, if the driving clock signal is 50MHz, the counter increments by 1 every 20 nanoseconds. The incrementing counter can be a binary counter, a Johnson counter, or a counting circuit composed of a linear feedback shift register.
[0064] The first preset value is a fixed value pre-written into the timer's auto-reload register. The first timer continuously compares the current count value of the counter with this first preset value in real time. When the current count value equals the first preset value, the timer hardware automatically triggers two actions: 1) generating a periodic signal (i.e., the first control periodic signal); 2) resetting the counter to zero or reloading the initial value, and starting the counting of the next period.
[0065] For example, if a first control cycle of 2kHz (period 500µs) is required, and the drive clock signal is 50MHz (period 20ns), then the first preset value should be configured as: 500µs / 20ns = 25000. The timer counts from 0 to 24999, and when the 25000th clock edge arrives and the count value becomes 25000, the period signal is immediately triggered and the counter is reset.
[0066] The second preset value is another fixed value written into the second timer auto-reload register, which determines the length of the second control cycle. When the current count value of the counter equals the second preset value, the second timer hardware automatically triggers two actions: 1) generating a synchronization pulse signal (i.e., instruction synchronization signal) on its dedicated output pin; 2) resetting the counter and starting the next round of counting.
[0067] For example, if a second control cycle of 20kHz (period 50µs) is required, and the drive clock signal is 350MHz (period approximately 2.857ns), then the second preset value should be configured as: 50µs / 2.857ns≈17500 (rounded down). The timer counts from 0 to 17499, and when the count reaches 17500, the hardware automatically outputs a synchronization pulse and resets.
[0068] In some embodiments, such as Figure 2 As shown, the main control board is configured to execute the timing deviation calculation and calibration process between the first and second control cycles. This process mainly includes the following steps: S201. Determine the timing deviation based on the real-time count value of the second timer and the target count value.
[0069] The actual count value refers to the current value of the second timer's counter, which is directly read at the instant the first control cycle signal generated by the first timer is triggered. This value directly reflects the actual phase position of the second timer relative to the trigger point of the first timer. The actual phase position refers to the absolute count value recorded by the second timer's incrementing counter at the current sampling moment. This value directly quantifies the precise time point of the second control cycle's command synchronization signal within its own complete cycle (0 to 2π or 0 to the second preset value).
[0070] The target count value is determined based on the real-time count value of the first timer, a first preset value, and a second preset value, and is used to represent the theoretical count value of the second timer under conditions of no deviation. This target count value represents the expected phase position of the second timer relative to the current progress of the first timer under ideal synchronization conditions.
[0071] As one possible implementation, the target count value can be obtained through the following relationship: Target count value = Real-time count value of the first timer × (First control cycle / Second control cycle) / (First preset value / Second preset value) + Initial value of the second timer.
[0072] This formula reflects the proportional relationship between the counting progress of two timers under ideal integer multiple synchronization. The first control period is M times the second control period, where M is an integer greater than 1. The first preset value is the total number of counts to be made before the first timer overflows (corresponding to the first control period); the second preset value is the total number of counts to be made before the second timer overflows (corresponding to the second control period). The proportional conversion of (first control period / second control period) / (first preset value / second preset value) in the formula establishes a correspondence between the real-time counting progress of the first timer and the expected counting progress of the second timer, ensuring that the second timer has a matching ideal phase position at any real-time counting node of the first timer.
[0073] The introduction of the second timer initial value is to adapt to the counting scenario where the second timer starts non-zero, further improve the universality of the formula, and ensure that it can accurately calculate the target count value under different counting initial conditions.
[0074] As one possible implementation, the timing deviation is the difference between the real-time count value and the target count value, i.e.: Timing Deviation = Real-time Count Value - Target Count Value. This deviation value directly quantifies the phase offset of the second control cycle relative to the first control cycle (in units of the second control cycle of the second timer). A positive deviation indicates that the second cycle signal is ahead, and a negative deviation indicates that it is behind.
[0075] For example, assume that the driving clock of the first timer is 50MHz (period 20ns), and its first preset value is 25000 (corresponding to a first control period of 500µs). The driving clock of the second timer is 100MHz (period 10ns), and its second preset value is 5000 (corresponding to a second control period of 50µs).
[0076] Assuming the second timer starts with an initial value of 30 when the first timer starts, a synchronization checkpoint is triggered when the real-time count of the first timer reaches 1500 (corresponding to an elapsed time of 1500 × 20 ns = 30 µs). At this point, the second timer should have experienced the same amount of time under ideal synchronization. Its target count value is calculated as follows: Target count value = 1500 × (500 µs / 50 µs) / (25000 / 5000) + 30 = 3030.
[0077] If the actual real-time count value of the second timer is 3000, then the timing deviation = 3000 - 3030 = -30. This negative deviation (-30) indicates that the actual phase of the second timer lags behind the ideal synchronization position by 30 counting units. Calculated using the clock period of the second timer (10ns), this is equivalent to a lag of 30 × 10ns = 300ns. This deviation can be used for subsequent phase fine-tuning to achieve precise timing synchronization.
[0078] It should be noted that, since the second timer has the cyclic operation characteristic of automatically resetting to zero and reloading after counting to the second preset value, when the target count value calculated by the above formula is greater than the second preset value, the calculated target count value needs to be modulo-processed (the modulo value is the second preset value) to obtain the equivalent target count value of the current second cycle, so as to accurately characterize the ideal phase position of the second timer in the current counting cycle.
[0079] For example, since the second preset value of the second timer is 5000, the count value will start from 0 again after reaching 5000 (automatic reload). Therefore, when the calculated target count value (such as 6000) exceeds the second preset value, modulo processing is required: the target count value in the equivalent loop is 6000mod5000=1000. The difference between 1000 and the currently actually read real-time count value of the second timer is used to determine the timing deviation.
[0080] As another possible implementation, the timing deviation is determined based on the first real-time count value and the second real-time count value of the second timer. The first real-time count value is the real-time count value of the second timer when the first control cycle signal is triggered; the second real-time count value is the real-time count value of the second timer when the previous first control cycle signal is triggered.
[0081] For example, when the first control cycle signal is triggered, the first real-time count value c(k) of the second timer (such as a PWM timer) is recorded immediately. By comparing this value with the second real-time count value c(k-1) recorded when the previous first control cycle signal was triggered, the difference Δc(k) = c(k) - c(k-1) can be calculated to monitor the periodicity. The ideal value of Δc(k) should be 0, and its fluctuation reflects the combined timing deviation, including clock signal drift and software scheduling jitter.
[0082] For example, suppose the driving clock signal of the second timer is 100MHz (period 10ns), the second preset value is 5000 (corresponding to a second control period of 50µs), and the first control period is configured to be an integer multiple of the second control period (to ensure that, under ideal conditions, when two adjacent first control periods are triggered, the second timer returns to the same phase position).
[0083] At the instant the first control cycle is triggered, the real-time count value c(k) of the second timer is read as 12530. Calculations based on the first timer's state indicate that the target count value of the second timer should be 12500. Therefore, the timing deviation is 12530 - 12500 = +30 count units, meaning the command synchronization signal of the second control cycle is 300 nanoseconds ahead. Simultaneously, if the recorded value c(k-1) was 12025 when the previous first control cycle signal was triggered, then Δc(k) = 12530 - 12025 = 505, which differs from the ideal value of 0 by +505. This indicates that the operating phase of the second timer fluctuates relative to the ideal synchronization state within the first control cycle. This fluctuation corresponds to a time of 505 × 10 ns = 5050 nanoseconds. In other words, the combined timing deviation, including phase offsets of the command synchronization signal and the first control cycle signal, software scheduling jitter, clock source jitter, and sampling time software delay, is 505 count units (corresponding to 5050 nanoseconds).
[0084] S202. If the timing deviation exceeds the preset timing threshold, adjust the real-time count value of the second timer or the real-time count value of the first timer until the timing deviation corresponding to the adjusted count value does not exceed the preset timing threshold.
[0085] A preset timing threshold refers to a pre-defined, maximum allowable absolute value of timing deviation. Its function is to set a safety boundary for the system's synchronization state. When the timing deviation is below this preset timing threshold, the synchronization state is considered good; when it exceeds this preset timing threshold, synchronization is determined to be inaccurate, requiring calibration. The preset timing threshold can be determined based on the system's synchronization accuracy requirements, the stability of the clock source, and the tolerance of the control loop, etc. This application's embodiments do not impose limitations on the preset timing threshold.
[0086] As one possible implementation, when a timing deviation exceeding a preset timing threshold is detected, the main control board performs a one-time phase compensation by reloading the counter of the second timer. Specifically, this operation may include writing a compensated target value (e.g., target value = current count value - timing deviation) to the counter of the second timer. This operation is equivalent to performing a "jump" adjustment on the phase of the second timer, realigning the start edge of its next cycle with the first control cycle, thereby quickly correcting the timing deviation to within the threshold range. This adjustment process is performed at the hardware level, ensuring minimal delay and jitter in the calibration action itself.
[0087] For example, suppose the timing deviation is +30 count cycles (corresponding to a lead of 300 nanoseconds), and the preset timing threshold is ±20 count cycles. When the deviation of +30 exceeds the threshold, the main control board immediately writes a compensation value to the count register of the second timer: the current count value 12530 - 30 = 12500. When the next drive clock signal edge arrives, the second timer will continue to increment from 12500 (instead of 12531). This operation "pulls back" the edge of the next instruction synchronization signal that follows, causing it to occur 300 nanoseconds earlier, thus coinciding with the theoretical alignment point of the first control cycle.
[0088] As one possible implementation, when calculating the deviation between the control cycle signal and the first control cycle, a preset estimation algorithm can be used to calculate an optimized timing deviation estimate. Based on the comparison between the optimized timing deviation estimate and a preset threshold, it is determined whether to perform phase compensation operation on the second timer. The preset estimation algorithm can be a Kalman filter algorithm, etc.
[0089] The Kalman filter algorithm refers to a recursive optimal estimation algorithm based on a system state-space model. In this application, it is specifically used to process measurement data of timing deviation between the first and second control cycles. This algorithm, by fusing a simplified system model describing the clock signal drift with noise-contaminated actual observations, provides a real-time, optimal estimate of the true phase deviation, which cannot be directly and accurately measured. Its core advantage lies in its ability to output smoother and more reliable deviation estimates even in the presence of measurement noise (such as software sampling jitter) and model uncertainties (such as changes in the clock signal drift rate), thereby improving the accuracy and stability of the synchronization state judgment of each motion axis.
[0090] For example, the steps for implementing Kalman filtering to optimize timing bias estimation are as follows: (1) State definition and initialization: Define the phase offset and frequency offset rate as two-dimensional state vectors, and set the initial estimate and error covariance matrix.
[0091] The phase offset of the second control cycle relative to the first control cycle Relative frequency offset rate over two weeks As state variables, they constitute the state vector. Initial state estimation and its error covariance matrix .in, It can be set based on historical system data or nominal values.
[0092] (2) State prediction based on system dynamics model: Based on the clock signal drift model, the state and error at the current moment are predicted by the optimal estimate of the previous moment.
[0093] A system dynamics model is established based on the physical laws governing the evolution of clock signal deviation, and the state and uncertainties at the trigger time of the next first control cycle are predicted: .
[0094] in, This is the state transition matrix. For the clock signal synchronization problem in this application, it is typically taken as: ,here For the first control cycle (e.g.) This model represents the phase deviation. It will accumulate frequency offset within one cycle The impact ( ), while the frequency shift itself remains approximately constant in the short term ( ). The process noise covariance matrix is used to characterize the dynamic uncertainty of the clock signal (such as the random walk of the frequency) that the simplified model above fails to describe. for Prior state estimation at time 10:00 The corresponding prior estimate of the covariance is given.
[0095] (3) Calculate Kalman gain: dynamically calculate the fusion weight of model prediction and current observation.
[0096] Calculate the Kalman gain at the current time step. This gain determines whether to place more trust in model predictions or current observations in subsequent updates:
[0097] in, This is the observation matrix. In this application, the phase offset calculated from the timing deviation can be directly observed, therefore... . The variance of the observed noise is used to quantify the original time series deviation measurements. The unreliability of the clock signal includes random errors introduced by clock signal jitter, software read delay, etc.
[0098] (4) Use observations to update the state: use actual observations to correct the prediction, obtain the optimal estimate of the current state, and update the error.
[0099] Utilizing in the The original timing deviation observation value actually calculated at the trigger time of the first control cycle. (Right now The prior prediction is corrected to obtain the optimal posterior state estimate. And update its error covariance : ; .in, It is an identity matrix.
[0100] (5) Extract the optimized deviation estimate: output the filtered phase deviation for synchronization judgment and compensation decision.
[0101] From the optimal estimated state Extract the optimal estimate of the phase deviation. This estimate has effectively filtered out random jitter noise from the original observation data and incorporated trend information from the system model, thus providing a more accurate estimate than a single original observation. It is smoother, more accurate, and more reliable. The optimized deviation value can be used as a core judgment criterion to decide whether to trigger hardware phase compensation, or directly as the input for calculating the compensation amount, thereby achieving more robust and accurate monitoring and adjustment of the synchronization deviation between the first control cycle and the second control cycle.
[0102] For example, let the first control cycle be... Process noise covariance matrix Observation noise variance (Corresponding to observation uncertainties of approximately ±5 counting periods). Initialization , .exist At that time, the original timing deviation was observed. .
[0103] First, we made a prediction and obtained the following: Then, the Kalman gain was calculated to obtain: After updating the state, we get: Among them, the calculation .
[0104] The optimal estimate of the phase deviation extracted at this time is With only 10 counting cycles, compared to the original observation of 30 counting cycles, this estimated value is significantly smoother and more accurately reflects the steady-state deviation trend of the system. If the preset timing compensation threshold is 20 counting cycles, then based on this optimized estimated value of 1.70, it can be judged that the synchronization state is good, and no compensation trigger is required, thus avoiding malfunctions caused by single observation noise. As the filter continues to run ( The estimated values will increasingly accurately track the actual synchronization deviation, providing a reliable basis for system adjustment.
[0105] The following section provides a detailed description of a specific implementation of the multi-axis motion control process by the sub-board in a multi-axis synchronous motion control system.
[0106] In some embodiments, the main control board is connected to the daughter board via a data communication bus and a hardwired connection, respectively; the main control board is used to transmit motion command data via the data communication bus and transmit command synchronization signals via the hardwired connection.
[0107] The data communication bus includes at least one of the following: Peripheral Component Interconnect (PCI), Compact PCI (CPCI), PCI Extensions for Instrumentation (PXI), Peripheral Component Interconnect Express (PCIe), Compact PCI Express (CPCIE), and PCI Extensions for Instrumentation Express (PXIE). This bus is responsible for reliably transmitting motion command data and motor feedback data over the first control cycle.
[0108] A hardwire refers to a physical conductor or differential pair that is laid independently of the data communication bus and is specifically used to transmit synchronization signals with strict timing requirements. This hardwire includes at least one of the following: a low-voltage differential signal pair, a dedicated clock signal line, or a trigger signal line. This line is responsible for transmitting low-jitter, deterministic command synchronization signals using the second control cycle as the carrier.
[0109] As one possible implementation, when the main control board is triggered in each first control cycle, it sends the packaged multi-axis motion command data frame to the data communication bus. The data frame carries the target sub-board address and data verification information to ensure that the command is accurately and completely sent to the target sub-board's receiving buffer.
[0110] In one possible implementation, the main control board's second timer generates a steep-edge digital pulse via its dedicated hardware output pin during each count overflow cycle (i.e., the second control cycle). This pulse signal is then hard-wired and simultaneously broadcast to the synchronization signal receiving ports of all daughter boards via dedicated driver circuitry such as LVDS.
[0111] In one possible implementation, the data communication bus and hardwired lines are deployed on the backplane. The backplane is a hardware substrate that integrates various buses such as the data communication bus and hardwired synchronization lines, and is used to realize communication between the main control board and each daughterboard.
[0112] In some embodiments, such as Figure 3 As shown, Figure 3 This application provides a schematic flowchart of a daughterboard closed-loop control execution. The daughterboard is configured to, in response to receiving a command synchronization signal, retrieve the corresponding target motion command data and control at least one motor to operate based on the target motion command data. The specific implementation includes the following steps: S301. In response to receiving the instruction synchronization signal, retrieve the corresponding target motion instruction data and collect the feedback data of the target motor.
[0113] The feedback data is used to characterize the actual motion data of the target motor. The target motor is the motor that needs to be controlled, as represented by the target motion command data.
[0114] The target motion command data includes command position, command speed, and command acceleration, which are used to define the spatial coordinates, motion speed, and acceleration change rate that the motor should achieve in each control cycle, and together constitute a complete axis control trajectory command.
[0115] The feedback data from the target motor includes the motor's feedback position, directly measured by the encoder, and the current / torque signal output from the motor driver's analog monitoring port and sampled by the analog-to-digital converter on the daughterboard. The feedback position characterizes the actual angular or linear displacement of the motor's shaft; the current / torque signal reflects the real-time electrical state and output torque of the motor windings.
[0116] As one possible implementation, the feedback data of the target motor also includes the motor's feedback speed and feedback acceleration. The feedback speed is obtained by time-difference calculation of continuous encoder position signals and is used to characterize the real-time motion rate of the motor; the feedback acceleration is further obtained by time-difference calculation of the speed feedback signal and is used to characterize the rate of change of the motor's motion rate.
[0117] For example, based on feedback location Second control cycle The computational feedback speed can be obtained through differential calculation. and feedback acceleration The calculation relationship is as follows:
[0118] in, This refers to the cycle count of the current second control cycle; This indicates the cycle count of the previous second control cycle. This is the second control cycle.
[0119] As one possible implementation, the daughterboard maintains a circular buffer that stores multiple sets of motion commands issued by the master controller in sequence. When a synchronization signal edge is detected, the motion command data set at the corresponding index position is read from the buffer according to the index determined by the internal cycle counter.
[0120] As one possible implementation, triggered by the edge of the synchronous command signal in the same cycle, the daughterboard samples the analog feedback signal of the motor driver through its integrated ADC circuit and reads the digital signal of the position encoder in real time through the encoder interface circuit. Here, the ADC circuit refers to an integrated circuit that samples and quantizes continuous analog electrical signals (such as voltage) into discrete digital quantities, used to convert analog signals from the physical world into digital codes that can be processed by a digital system.
[0121] S302. Calculate the deviation between the feedback data and the target motion command data, determine the deviation result to generate a control signal, and control the motion of at least one target motor based on the control signal.
[0122] As one possible implementation method, the deviation result is determined based on the deviation calculation between the feedback data and the target motion command data.
[0123] For example, the position deviation, velocity deviation, and acceleration deviation are calculated respectively using the following relationships:
[0124] in, , , They represent the current number. Position deviation, velocity deviation, and acceleration deviation within the second control cycle; , , These are the measured feedback position, feedback velocity, and feedback acceleration, respectively. , , These represent the commanded position, commanded speed, and commanded acceleration for the corresponding cycle. This set of deviation values directly reflects the degree of deviation between the actual motion state of the motor and the target trajectory in terms of position, speed, and acceleration, providing accurate error input for subsequent closed-loop control.
[0125] As one possible implementation, based on the deviation results, a multi-loop PI control algorithm is executed to determine the motor control quantity. The daughterboard, through its DAC circuit, converts the motor control quantity into a control signal and outputs it to the motor driver to control the movement of the motor drive axis. The DAC circuit refers to an integrated circuit that converts and reconstructs discrete digital input values into continuous analog electrical signals (such as voltage or current). It is used to convert the digital control quantity calculated by the multi-loop PI control algorithm into an analog voltage or current signal that can directly drive the motor driver, thereby completing the final conversion from digital control instructions to physical execution.
[0126] Among them, the multi-loop PI control algorithm is a series control strategy that nests multiple proportional-integral control loops in motion control. The multi-loop PI control algorithm enables the daughterboard to decompose and transform the unified motion command data (position, velocity, acceleration) issued by the main control board layer by layer into instantaneous control of the motor torque: the outer position loop ensures precise endpoint control, while the inner current loop achieves microsecond-level torque response to resist disturbances. This algorithm runs in parallel on all daughterboards at the same trigger moment of the command synchronization signal, ensuring that each axis not only starts synchronously but also maintains consistent dynamic response throughout the entire motion process.
[0127] For example, a multi-loop PI control algorithm can achieve control signal calculation and output limiting through the following relationship: Specifically, based on positional deviation Speed deviation and acceleration deviation Substituting the values into the PI control algorithms for the position loop, velocity loop, and acceleration loop respectively, the outputs of each loop are calculated sequentially:
[0128] in, , , The first The output control quantities of the position loop, velocity loop and acceleration loop in each control cycle; , , These are the proportional coefficients for each ring. , , These are the integral coefficients for each ring.
[0129] Then, the outputs of each loop are superimposed to obtain the total control signal. : .
[0130] As one possible implementation method, the above-mentioned total control signal Amplitude limiting is achieved through the following relationship:
[0131] in, and The lower and upper limits of the control signal output are set according to the input range of the motor driver. This limited signal... That is, the DAC circuit on the daughterboard converts the signal into an analog voltage signal and outputs it to the motor driver to achieve synchronous control of the motor.
[0132] As one possible implementation, the feedback data collected by the daughterboard from the target motor can be transmitted back to the main control board. This method allows the main control board to monitor the actual operating status of the motor in real time (such as position and speed), and to dynamically adjust the control quantity based on the deviation between the feedback data and the command to ensure motion accuracy and multi-axis synchronization. At the same time, it can also diagnose motor faults and trigger protection mechanisms in a timely manner through abnormal characteristics of the feedback data.
[0133] As one possible implementation, the above logic of the daughterboard is implemented by at least one of the following: a complex programmable logic device (CPLD), a field programmable gate array (FPGA), a digital signal processor (DSP), a microcontroller unit (MCU), or a microprocessor unit (MPU).
[0134] As one possible implementation, a buffer circuit is integrated on the daughterboard. This circuit is a hardware unit for signal isolation and driving. Its function is to receive the command synchronization signal from the backplane, enhance it through impedance matching and driving, and then distribute it to the internal logic of the daughterboard. This effectively isolates the electrical influence of the internal load of each daughterboard on the common signal line of the backplane, ensuring that the command synchronization signal maintains steep edges and low jitter characteristics during long-distance transmission and multi-branch distribution, allowing multiple daughterboards to stably share the same high-precision trigger signal. A buffer circuit also exists in the main control board.
[0135] In some embodiments, the main control board is connected to at least one main control motor driver via an industrial Ethernet bus; the main control motor driver is used to drive the motion axis of the corresponding main control motor; the main control board is also configured to: send a target motion command to the target main control motor driver via the industrial Ethernet bus based on the reference clock signal provided by the main control clock source, so as to drive the motion axis of the target main control motor connected to the target main control motor to move; the target main control motor driver is any one of the at least one main control motor driver.
[0136] Industrial Ethernet buses include EtherCAT networks. The main control board should be connected to the main motor driver via the EtherCAT network, and motion command data should be sent to the main motor driver, which then controls the movement of the main motor.
[0137] As one possible implementation, the main control board generates an absolute time reference based on a unified reference clock signal within each first control cycle. Using this time as a reference, it simultaneously encapsulates and sends motion command packets with strictly aligned timestamps to the daughter board data bus and the EtherCAT network. The commands sent to the daughter board are directly triggered by the command synchronization signal at a predetermined time, while the commands sent to the EtherCAT slave station carry the same timestamp and rely on the local clock signal synchronized by the network to start the control cycle at the corresponding time, thereby realizing the coordinated action of heterogeneous control terminals under the same absolute time reference.
[0138] For example, the main control board uses the Xenomai real-time Linux system to build a deterministic task scheduling environment. This system, through a hard real-time kernel, ensures that the core communication and control task scheduler and the EtherCAT master application are accurately woken up and executed at absolutely certain times in each first control cycle. Specifically, the scheduler is responsible for synchronously completing motion planning calculations, issuing daughterboard commands, and collecting feedback; the EtherCAT master program synchronously drives the network communication cycle, realizing network slave command synchronization and status collection. Xenomai is a real-time development framework for Linux that provides deterministic, low-latency execution capabilities for time-critical tasks through a dual-kernel or single-kernel architecture.
[0139] For example, such as Figure 4 As shown, the Figure 4 This application provides a hardware architecture diagram of a multi-axis synchronous motion control system. The main control board connects to at least one main motor driver via an industrial Ethernet bus (such as EtherCAT) to control the main motor and drive the corresponding motion axis. Simultaneously, the main control board and the daughter board are connected via a data communication bus and hardwired connections on the backplane. The daughter board connects to at least one motor driver to control the corresponding motor and drive the corresponding motion axis; this enables the transmission of motion command data and command synchronization signals, thereby supporting distributed control of multi-axis motion. Figure 4 This application showcases some of the hardware devices, but does not impose specific restrictions on the quantity, model, or other aspects of each hardware device.
[0140] For example, such as Figure 5 As shown, the Figure 5This application provides a schematic diagram of the interaction logic between a main control board and a daughter board. The main control board is equipped with a main control clock source, which generates a second derived clock signal (i.e., clock 2) through a PLL to drive a second timer. Based on the timing trigger logic of this timer, the instruction synchronization signal is transmitted to the daughter board via hardwired. The transmission of the instruction synchronization signal is ensured by a buffer circuit. Simultaneously, the main control clock source also generates a first derived clock signal (i.e., clock 1) through a PLL to drive a first timer. Based on the communication and control task scheduling program of the first timer, motion command data is sent to the daughter board via the data communication bus. The communication and control task scheduling program is used to generate a first control cycle signal and plan motion command data. Then, the daughter board, relying on its processor, responds to the instruction synchronization signal to retrieve the target motion command data and completes motor control-related calculations, encoding, and other processing, with the daughter board clock source acting as an auxiliary. Furthermore, the main control board can achieve additional communication via EtherCAT, performing redundant backups and real-time verification of the motion command data of the main control motor driver in the communication and control task scheduling program, further ensuring the reliability of timing synchronization and data transmission. Figure 5 This application showcases some of the hardware devices, but does not impose specific restrictions on the quantity, model, or other aspects of each hardware device.
[0141] The following is a specific embodiment to illustrate the detailed logic implementation of the multi-axis synchronous motion control method of this application.
[0142] like Figure 6 As shown, a multi-axis synchronous motion control method can be executed by the main control board in the aforementioned multi-axis synchronous motion control system. The method includes: S601: Based on the reference clock signal provided by the main control clock source, motion command data is sent to the target daughterboard in the first control cycle.
[0143] The motion command data is used to drive the motor to move the corresponding motion axis to the target position. The target sub-board is used to control at least one motor, which drives the motion axis.
[0144] In one possible implementation, the main control board first connects the reference clock signal provided by its own main control clock source to the first timer. The first timer counts the reference clock signal and compares it with a preset first value. When the count value reaches the first preset value, the completion of the first control cycle is triggered. At the same time, a motion command data sending trigger signal is generated. The main control board responds to the trigger signal and sends the corresponding motion command data to the target daughter board through the data communication bus. This process is repeated to continuously send motion command data to the target daughter board in the first control cycle.
[0145] S602, based on the reference clock signal provided by the main control clock source, sends an instruction synchronization signal to the target daughterboard in the second control cycle.
[0146] Among them, the command synchronization signal is used to trigger the target subboard to control the movement of the connected motor based on motion command data.
[0147] In one possible implementation, the main control board synchronously transmits the reference clock signal output by the main control clock source to the second timer. The second timer counts periodically based on the reference clock signal. When the count value reaches a preset second value, the second control cycle ends. At this time, the main control board sends an instruction synchronization signal to the target sub-board through a hard wire connected to the sub-board. The instruction synchronization signal is stably sent to the target sub-board in the second control cycle through the cyclic counting and triggering of the second timer.
[0148] In one possible implementation, after the main control board sends a command synchronization signal to the target sub-board via a hardwired connection, the target sub-board performs edge detection on the command synchronization signal and confirms receipt. Then, it retrieves the previously cached motion command data and simultaneously collects the feedback data of the controlled target motor. The deviation between the feedback data and the motion command data is calculated to obtain the deviation result. Based on the deviation result, a corresponding control signal is generated and then output to the target motor to trigger the target motor to run according to the motion command data, thereby driving the corresponding motion axis to move.
[0149] In some embodiments, the multi-axis synchronous motion control method further includes: sending a target motion command to the target master motor driver via an industrial Ethernet bus based on a reference clock signal provided by the master clock source, so as to drive the motion axis corresponding to the target master motor connected to the target master motor driver to move.
[0150] As one possible implementation, the main control board uses the reference clock signal provided by the main control clock source as the timing reference. According to the preset communication cycle and the communication protocol of the industrial Ethernet bus, the generated target motion command is formatted and sent to the target main control motor driver through the industrial Ethernet bus. At the same time, the communication status of the industrial Ethernet bus is monitored in real time to ensure the complete transmission of the target motion command. After receiving the target motion command, the target main control motor driver parses and executes it, drives the target main control motor to run, and then drives the corresponding motion axis to complete the specified motion, so as to realize the stable issuance of target motion commands based on the timing of the reference clock signal.
[0151] As can be seen, this application achieves coordinated synchronization of multi-axis motion through periodic data interaction and synchronous control between the main control board and the daughter board based on a reference clock signal. At the same time, the main control board also directly controls the main control motor driver through the industrial Ethernet bus to drive the motion axis of the main control motor, thus constructing a heterogeneous connection architecture of main control board-daughter board-motor driver-motor and main control board-main control motor driver-main control motor. Through a unified main control clock source reference timing, heterogeneous synchronous motion of motion axes under the two types of connection paths is realized, improving the adaptability and synchronous control flexibility of the multi-axis motion control system.
[0152] For example, such as Figure 7 As shown, the Figure 7 This application provides a flowchart illustrating a multi-axis synchronous motion control cycle. Specifically, it includes: relying on the reference clock signal from the main control clock source, the main control board completes the transmission of motion command data and the reading back of feedback data on the data communication bus in a first control cycle (the duration of which is M times the duration of the second control cycle, where M is an integer greater than 1). Simultaneously, it interacts with the motion command data corresponding to the main control motor driver on EtherCAT to drive the motion axis of the corresponding main control motor. Within each shorter second control cycle, the main control board sends a command synchronization signal to the daughter board. The daughter board triggers edge detection of this signal, retrieves the cached target motion command data, synchronously acquires the feedback data from the motor, generates a control signal through a PI control algorithm, and outputs the motion command. Simultaneously, it periodically checks the counter's count value to compensate for any timing deviations, thereby ensuring the synchronous control accuracy of the multi-axis motion.
[0153] This application also provides an electronic device. Figure 8 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application, such as... Figure 8 As shown, the electronic device includes a processor 801 and a memory 802; the memory 802 stores instructions executable by the processor 801; when the processor 801 is configured to execute the instructions, the electronic device implements the method described in the foregoing method embodiments.
[0154] This application also provides a computer-readable storage medium storing computer program instructions thereon; when the computer program instructions are executed by a computer, the computer causes the computer to implement the methods described in the foregoing embodiments. The computer may be an electronic device, a network device, or a manager. The computer-readable storage medium may be a non-transitory computer-readable storage medium, such as a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device.
[0155] This application also provides a computer program product that, when run on a computer, causes the computer to execute the relevant method steps described in the above method embodiments.
[0156] The electronic devices, computer-readable storage media, or computer program products provided in this application are all used to perform the corresponding methods provided above. Therefore, the beneficial effects they can achieve can be referred to the beneficial effects in the corresponding methods provided above, and will not be repeated here.
[0157] Through the above description of the embodiments, those skilled in the art can clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.
[0158] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another apparatus, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.
[0159] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0160] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.
[0161] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, essentially, or the parts that contribute to related technologies, or all or part of the technical solutions, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.
[0162] In the description of the embodiments of this application, specific features, structures, materials or characteristics may be combined in any suitable manner in one or more embodiments or examples.
[0163] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A multi-axis synchronous motion control system, characterized in that, include: A main control board and at least one sub-board; each sub-board is used to control at least one motor, the motor being used to drive a motion axis. The main control board includes a main control clock source; the main control clock source is used to provide a reference clock signal; the main control board is configured to: Based on the reference clock signal provided by the main control clock source, motion command data is sent to the target sub-board in a first control cycle; the target sub-board is any one of the at least one sub-boards. The motion command data is used to drive the motor to move the corresponding motion axis to the target position; Based on the reference clock signal provided by the main control clock source, a command synchronization signal is sent to the target daughterboard in the second control cycle; The target subboard is configured as follows: In response to receiving the motion command data, the motion command data is cached; In response to receiving the instruction synchronization signal, the corresponding target motion instruction data is retrieved, and at least one of the motors is controlled to operate based on the target motion instruction data.
2. The system according to claim 1, characterized in that, The main control board is connected to the daughter board via a data communication bus and a hardwired connection, respectively. The main control board is used to transmit the motion command data through the data communication bus and to transmit the command synchronization signal through the hardwire.
3. The system according to claim 1 or 2, characterized in that, The step of responding to receiving the instruction synchronization signal, retrieving the corresponding target motion instruction data, and controlling at least one of the motors to operate based on the target motion instruction data includes: In response to receiving the instruction synchronization signal, the corresponding target motion instruction data is retrieved, and feedback data of the target motor is collected; the feedback data is used to characterize the actual motion data of the target motor; the target motor is the motor that needs to be controlled as represented by the target motion instruction data. Based on the deviation calculation between the feedback data and the target motion command data, the deviation result is determined to generate a control signal; The control signal controls the movement of at least one of the target motors.
4. The system according to claim 1, characterized in that, The first control cycle is M times the second control cycle; M is an integer greater than 1.
5. The system according to claim 1, characterized in that, The system further includes: a first timer and a second timer, wherein the first timer and the second timer are respectively connected to the main control clock source; The first timer is used to count based on the reference clock signal provided by the main control clock source, and to determine the first control period based on the relationship between the count value and the first preset value; The second timer is used to count based on the reference clock signal provided by the main control clock source, and to determine the second control period based on the relationship between the count value and the second preset value.
6. The system according to claim 5, characterized in that, The main control board is also configured to: The timing deviation is determined based on the real-time count value and the target count value of the second timer; the target count value is determined based on the real-time count value of the first timer, the first preset value, and the second preset value, and is used to represent the theoretical count value of the second timer when there is no deviation. If the timing deviation exceeds a preset timing threshold, adjust the real-time count value of the second timer or the real-time count value of the first timer until the timing deviation corresponding to the adjusted count value does not exceed the preset timing threshold.
7. The system according to claim 1, characterized in that, The main control board is connected to at least one main control motor driver via an industrial Ethernet bus; the main control motor driver is used to drive the motion axis of the corresponding main control motor. The main control board is also configured to: Based on the reference clock signal provided by the master control clock source, the target motion command is sent to the target master control motor driver through the industrial Ethernet bus to drive the motion axis corresponding to the target master control motor connected to the target master control motor driver to move. The target master motor driver is any one of the at least one master motor drivers.
8. A multi-axis synchronous motion control method, characterized in that, The method, applied to the main control board in the multi-axis synchronous motion control system according to any one of claims 1-7, comprises: Based on the reference clock signal provided by the main control clock source, motion command data is sent to the target sub-board in the first control cycle; the motion command data is used to drive the motor to move so that the corresponding motion axis moves to the target position; the target sub-board is used to control at least one motor, and the motor is used to drive the motion axis to move. Based on the reference clock signal provided by the main control clock source, a command synchronization signal is sent to the target daughterboard in the second control cycle; The command synchronization signal is used to trigger the target subboard to control the movement of the connected motor based on the motion command data.
9. The method according to claim 8, characterized in that, Also includes: Based on the reference clock signal provided by the master control clock source, a target motion command is sent to the target master control motor driver via an industrial Ethernet bus to drive the motion axis corresponding to the target master control motor connected to the target master control motor driver.
10. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes computer-executable instructions that, when executed on a computer, cause the computer to perform the multi-axis synchronous motion control method as described in claims 8-9.