Texture picture caching method, electronic device, chip system and storage medium

Abstract

This application provides a method for caching texture images, an electronic device, a chip system, and a storage medium, relating to the field of electronic device technology. Typically, the decoded data obtained by the GPU from decoding images is temporarily cached in the GPU's on-chip cache. Due to the limited resources of the GPU's on-chip cache, the decoded data is subsequently moved to memory for caching. Some texture images may be reused across multiple frames, so the GPU repeatedly reads the decoded data of these texture images from memory, resulting in wasted bandwidth resources between memory and the GPU and increased power consumption. This application can identify whether some images are inter-frame reused texture images. If they are inter-frame reused texture images, the corresponding decoded data can be moved to a system-level cache before the GPU moves it to memory for caching. Subsequently, the GPU directly obtains this decoded data from the system-level cache during rendering, reducing bandwidth resources between memory and the GPU and reducing power consumption.

Description

Technical Field

[0001] This application relates to the field of electronic device technology, and in particular to a method for caching texture images, an electronic device, a chip system, and a storage medium. Background Technology

[0002] As electronic devices become increasingly powerful, they support a wider range of applications. Among these, some applications that involve a large number of images or videos consume a lot of power, such as games, short video apps, and map apps. Therefore, it is urgent to address how to reduce the power consumption of electronic devices when running these types of applications. Summary of the Invention

[0003] This application provides a method for caching texture images, an electronic device, a chip system, and a storage medium, which can reduce the power consumption of electronic devices when running certain applications.

[0004] To achieve the above objectives, the first aspect of this application provides a method for caching texture images, employing the following technical solution:

[0005] The GPU decodes the first image to obtain the first decoded data, wherein the first image is an inter-frame reused texture image;

[0006] The GPU sends the first decoded data to the system-level cache, wherein the first decoded data carries a first identifier, which is used to represent the decoded data of the inter-frame multiplexed texture image;

[0007] The system-level cache manages the caching duration of the first decoded data in the system-level cache, wherein the caching duration of the decoded data carrying the first identifier in the system-level cache is greater than the caching duration of the decoded data not carrying the first identifier in the system-level cache;

[0008] When the first decoded data meets the conditions for being released, the system-level cache dumps the first decoded data from the system-level cache to memory.

[0009] Before displaying an application's screen, electronic devices typically decode and render the images within the application. This decoding and rendering is usually handled by the decoder and renderer in the GPU. The decoded data obtained by the GPU is temporarily cached in the GPU's on-chip cache. However, the GPU's on-chip cache is relatively small, so the GPU moves the decoded data from the on-chip cache to the memory cache. When the GPU needs to read the decoded data, it reads it from memory. Some inter-frame multiplexed texture images participate in the rendering of multiple frames. Therefore, the GPU needs to frequently write this part of the decoded data back from the on-chip cache to memory and then repeatedly read the decoded data of these images from memory. This results in wasted bandwidth resources between memory and the GPU, and high power consumption.

[0010] In this application, the decoding data of inter-frame multiplexed texture images cached on-chip by the GPU can be moved to the memory cache before being cached in the system-level cache. Subsequently, if the GPU needs to use the decoding data of inter-frame multiplexed texture images before rendering the scene, it can read it from the system-level cache. Since the capacity of the system-level cache is larger than that of the on-chip cache, more decoding data of inter-frame multiplexed texture images can be stored. Furthermore, using the system-level cache can reduce the frequency of decoding data being written back to memory and repeatedly read from memory, thereby saving bandwidth resources between memory and GPU. The GPU reads decoding data from the system-level cache with shorter latency and lower power consumption compared to reading decoding data from memory.

[0011] As one implementation of the first aspect, the method further includes:

[0012] The GPU decodes the second image to obtain the second decoded data, wherein the second image is not an inter-frame reused texture image;

[0013] The GPU sends the second decoded data to the system-level cache, wherein the second decoded data does not carry the first identifier;

[0014] The system-level cache manages the caching duration of the second decoded data in the system-level cache;

[0015] When the system-level cache meets the conditions for releasing the second decoded data, it dumps the second decoded data from the system-level cache to memory.

[0016] In this application, since the decoding data of inter-frame reused texture images needs to be repeatedly dumped between memory and GPU, the focus is on caching this type of decoding data in the system-level cache. Therefore, the decoding data of non-inter-frame reused texture images can be directly dumped to memory or dumped to the system-level cache. When system-level cache resources are scarce, it is also necessary to dump to memory.

[0017] As another implementation of the first aspect, the GPU sending the first decoded data to the system-level cache includes:

[0018] The GPU sends the first decoded data to the system-level cache through a first interface, the first interface being the scid0 port, and the data transmitted through the first interface carries the first identifier.

[0019] The GPU sending the second decoded data to the system-level cache includes:

[0020] The GPU sends the second decoded data to the system-level cache through a second interface, which is scid1. The data transmitted through the second interface does not carry the first identifier.

[0021] In this application, the decoding data of inter-frame multiplexed texture images and the decoding data of non-inter-frame multiplexed texture images can be transmitted through different ports. This method allows different data types to carry different tags, or allows the decoding data of inter-frame multiplexed texture images to carry a first identifier. The subsequent system-level cache can determine the caching strategy to be adopted based on the first identifier, so that the decoding data of inter-frame multiplexed texture images can be retained in the system-level cache for a longer time than the decoding data of non-inter-frame multiplexed texture images.

[0022] As another implementation of the first aspect, before the GPU decodes the first image to obtain the first decoded data, the method further includes:

[0023] The first upper-layer application identifies the first image as a first type of inter-frame multiplexing texture image through the OpenGL interface. The first type of inter-frame multiplexing texture image includes inter-frame multiplexing texture icons and inter-frame multiplexing texture text.

[0024] In this application, the OpenGL interface can identify whether an image is an inter-frame reused texture icon or an inter-frame reused texture text. Furthermore, after identification, the GPU can obtain the identification results.

[0025] As another implementation of the first aspect, the method further includes:

[0026] Run the first application;

[0027] During the operation of the first application, obtain the number of times and the interval between the use of each scene image in the first application;

[0028] Based on the number of times and the interval between uses of each scene image in the first application, determine whether each scene image is a second type of inter-frame reused texture image.

[0029] In this application, some texture images in consecutive frames of some scene areas are also the same. For example, the texture image of the land in the game screen, the texture image of the forest in the forest, etc. These texture images can also be used as inter-frame reused texture images. Therefore, the application can be run in advance, and the number of times and the interval between the use of each scene image during the pre-run of the application can be used to determine whether they are these two types of inter-frame reused texture images.

[0030] As another implementation of the first aspect, the first application is a game application, and the screen of the first application involves multiple scene areas; the method further includes:

[0031] The number of times and the interval between uses of each scene image in the first scene area are obtained after the game character enters the first scene area during the operation of the first application. The first scene area can be any scene area.

[0032] Based on the number of times each scene image in the first scene area is used and the usage interval, determine whether each scene image in the first scene area is a second type of inter-frame reused texture image.

[0033] In this application, some applications, especially game applications, may set up multiple regions, such as castle regions and forest regions. Some texture images may be reused more often in the castle region and less often in the forest region. Similarly, some texture images may be reused more often in the forest region and less often in the castle region. Therefore, it is necessary to divide the scene regions, determine the usage frequency and usage interval of each scene image in each scene region, and determine the second type of inter-frame reused texture images in each scene region.

[0034] As another implementation of the first aspect, the scene image in the first scene area includes a first scene image; the number of times the first scene image is used is the number of times the first scene image is accessed; the usage interval of the first scene image is the time interval corresponding to each access order of the first scene image;

[0035] The time interval corresponding to the first access of the first scene image is the difference between the access time of the first scene image when it is accessed for the second time and the access time when it is accessed for the first time.

[0036] The time interval corresponding to the i-th access of the first scene image is the smaller of the left time interval and the right time interval of the i-th access of the first scene image. The left time interval of the i-th access is the difference between the access time of the i-th access and the access time of the (i-1)-th access, and the right time interval of the i-th access is the difference between the access time of the (i+1)-th access and the access time of the i-th access.

[0037] The time interval corresponding to the last access of the first scene image is the difference between the access time of the last access of the first scene image and the access time of the second to last access.

[0038] As another implementation of the first aspect, determining whether each scene image is a second type of inter-frame reused texture image based on the number of times and the interval between uses of each scene image in the first application includes:

[0039] Cluster the time intervals corresponding to each access count of the first scene image to obtain multiple time interval classes, each time interval class including at least one access count and the corresponding time interval;

[0040] If the number of time interval classes in the first scene image that are accessed more than the number threshold and whose average access time interval is less than the interval threshold is greater than the number threshold, then the first scene image is determined to be the second type of inter-frame reuse texture image.

[0041] If, within the time interval class of the first scene image, the number of time interval classes that have been accessed more than the access threshold and have an average access time interval less than the interval threshold is less than or equal to the number threshold, then the first scene image is determined not to be the second type of inter-frame reused texture image.

[0042] In this application, clustering is used to identify frequently accessed scene images within a certain period of time as inter-frame reused texture images. In addition, in order to make the system-level cache more efficient, more conditions can be set to limit the number of images identified as inter-frame reused texture images.

[0043] As another implementation of the first aspect, the method further includes:

[0044] During the m runs of the first application, the number of times n is the first scene image determined as the second type of inter-frame reused texture image;

[0045] If the value of n / m is greater than the proportional threshold, the first scene image is determined to be the second type of inter-frame reused texture image.

[0046] In this application, in order to make the determined inter-frame reused texture image more accurate, the first application can be run multiple times. The final second type of inter-frame reused texture image is determined by the proportion of the number of times the second type of inter-frame reused texture image determined by running the first application to the total number of times.

[0047] As another implementation of the first aspect, after determining whether each scene image of the first application is a second type of inter-frame multiplexed texture image, the method further includes:

[0048] During the operation of the first application, it was detected that a game character entered the first scene area;

[0049] Set the first tag for the scene image in the first scene region of the first application that is determined to be a second type of inter-frame multiplexed texture image.

[0050] In this application, the determined inter-frame reuse texture image can be stored in an electronic device. Each time the application is run, the corresponding scene image is determined as the second type of inter-frame reuse texture image based on the different scene regions entered.

[0051] As another implementation of the first aspect, the method further includes:

[0052] The GPU decodes the third image to obtain third decoded data, wherein the third image is the first scene image in the first scene region;

[0053] The GPU sends the third decoded data to the system-level cache, the third decoded data carrying the first identifier;

[0054] The system-level cache manages the caching duration of the third decoded data in the system-level cache;

[0055] When the third decoded data meets the conditions for being released, the system-level cache dumps the third decoded data from the system-level cache to memory.

[0056] As another implementation of the first aspect, the management strategy for decoded data in the system-level cache includes:

[0057] When the remaining storage resources in the system-level cache meet the first condition, the least used decoding data among the decoding data of inter-frame multiplexed texture images with a cache duration greater than the first value and the decoding data of non-inter-frame multiplexed texture images with a cache duration greater than the second value is released, wherein the first value is greater than the second value, and the remaining storage resources in the system-level cache meeting the first condition includes: the remaining storage resources in the system-level cache are less than a first proportion or less than a fourth value.

[0058] As another implementation of the first aspect, the management strategy for decoded data in the system-level cache includes:

[0059] When the remaining storage resources in the system-level cache meet the first condition, the least used decoding data among the decoding data whose cache duration is greater than the third value is released. Specifically, the decoding data of the inter-frame multiplexed texture image is not allowed to be released before it is cached in the system-level cache for the first duration. The first duration is greater than the third value. The remaining storage resources in the system-level cache meeting the first condition include: the remaining storage resources in the system-level cache are less than a first proportion or less than a fourth value.

[0060] As another implementation of the first aspect, the management strategy for decoded data in the system-level cache includes:

[0061] The inter-frame multiplexing texture image is cached in the first storage space of the system-level cache. When the remaining storage resources in the first storage space meet the second condition, the least used decoding data in the longest cached decoding data in the first storage space is released. The remaining storage resources in the first storage space meet the second condition, which includes: the remaining storage resources in the first storage space are less than the second ratio or less than the fifth value.

[0062] Non-inter-frame reused texture images are cached in the second storage space of the system-level cache. When the remaining storage resources in the second storage space meet the third condition, the least used decoding data in the longest cached decoding data in the second storage space is released. The remaining storage resources in the first storage space meet the second condition, which includes: the remaining storage resources in the first storage space are less than the third ratio or less than the sixth value.

[0063] In this application, the system-level cache can use various management strategies to ensure that the caching time for the decoding data of inter-frame reused texture images is longer than that for the decoding data of non-inter-frame reused texture images.

[0064] In a second aspect, an electronic device is provided, including a processor for calling a computer program stored in a memory to implement the method of any one of the first aspects of this application.

[0065] Thirdly, a chip system is provided, including a processor coupled to a memory, wherein the processor executes a computer program stored in the memory to cause an electronic device to implement the method of any one of the first aspects of this application.

[0066] Fourthly, a computer-readable storage medium is provided, which stores a computer program that, when computer instructions are executed on an electronic device, causes the electronic device to implement the method of any one of the first aspects of this application.

[0067] Fifthly, embodiments of this application provide a computer program product that, when run on a device, causes the electronic device to execute the method of any one of the first aspects of this application.

[0068] It is understood that the beneficial effects of the second to fifth aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here. Attached Figure Description

[0069] Figure 1 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of this application;

[0070] Figure 2 A schematic diagram of the interface of a game application provided in an embodiment of this application;

[0071] Figure 3 A schematic diagram of the interface of a short video application provided in an embodiment of this application;

[0072] Figure 4 A timing diagram for GPU decoding and rendering provided in an embodiment of this application;

[0073] Figure 5 This is a schematic diagram of cache distribution in an electronic device provided in an embodiment of this application;

[0074] Figure 6 Another timing diagram for GPU decoding and rendering provided in an embodiment of this application;

[0075] Figure 7 A schematic diagram illustrating the process of caching decoded image data provided in an embodiment of this application;

[0076] Figure 8 A flowchart illustrating a method for caching texture images provided in an embodiment of this application;

[0077] Figure 9 A schematic diagram illustrating the process of determining the usage interval of scene images provided in the embodiments of this application;

[0078] Figure 10 This is a timing diagram of a texture image caching method provided in an embodiment of this application. Detailed Implementation

[0079] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limiting purposes, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details.

[0080] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0081] It should also be understood that in the embodiments of this application, "one or more" refers to one, two, or more; "and / or" describes the relationship between the associated objects, indicating that three relationships can exist; for example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following associated objects have an "or" relationship.

[0082] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," "fourth," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0083] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0084] This application provides a method for caching texture images, which can be applied to electronic devices. These electronic devices can be tablets, mobile phones, wearable devices, laptops, ultra-mobile personal computers (UMPCs), netbooks, personal digital assistants (PDAs), etc. This application does not limit the specific type of electronic device.

[0085] Figure 1A schematic diagram of an electronic device is shown. The electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, antenna 1, antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, a headphone jack 170D, a sensor module 180, buttons 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, a barometric pressure sensor 180C, a magnetic sensor 180D, an accelerometer sensor 180E, a distance sensor 180F, a proximity sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, etc.

[0086] It is understood that the structures illustrated in the embodiments of this application do not constitute a specific limitation on the electronic device 100. In other embodiments of this application, the electronic device 100 may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0087] Processor 110 may include one or more processing units, such as: application processor (AP), modem processor, graphics processing unit (GPU), image signal processor (ISP), controller, memory, video codec, digital signal processor (DSP), baseband processor, and / or neural network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.

[0088] The processor 110 may also include a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. This memory can store instructions or data that the processor 110 has just used or that are used repeatedly. If the processor 110 needs to use the instruction or data again, it can retrieve it directly from the memory. This avoids repeated accesses, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0089] Internal memory 121 can be used to store computer executable program code, including instructions. Processor 110 executes various functional applications and data processing of electronic device 100 by running the instructions stored in internal memory 121. Internal memory 121 may include a program storage area and a data storage area. The program storage area may store the operating system and at least one application program required for a function (such as image playback). Touch sensor 180K, also called a "touch panel," can be disposed on display screen 194. Touch sensor 180K and display screen 194 together form a touch screen, also called a "touch screen." Touch sensor 180K is used to detect touch operations applied to or near it. Touch sensor can transmit the detected touch operation to application processor to determine the type of touch event. Visual output related to the touch operation can be provided through display screen 194. In other embodiments, touch sensor 180K may also be disposed on the surface of electronic device 100, in a different location than display screen 194.

[0090] Electronic device 100 implements display functions through a GPU, a display screen 194, and an application processor. The GPU is a microprocessor for image processing, connected to the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations and for graphics rendering. Processor 110 may include one or more GPUs, which execute program instructions to generate or modify display information.

[0091] Display screen 194 is used to display images, videos, etc. Display screen 194 includes a display panel. The display panel may be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a minimized display, a microLED, a micro-OLED, a quantum dot light-emitting diode (QLED), etc. In some embodiments, electronic device 100 may include one or N displays 194, where N is a positive integer greater than 1.

[0092] This application does not specifically limit the structure of the execution subject of a texture image caching method. As long as communication is possible through running code containing the texture image caching method of this application, the execution subject of the texture image caching method provided in this application is acceptable. For example, the execution subject of the texture image caching method provided in this application can be a functional module in an electronic device capable of calling and executing programs, or a communication device applied in an electronic device, such as a chip.

[0093] Electronic devices can install and run a large number of applications, which users can use for learning, entertainment, and other conveniences. However, some applications consume a lot of power, such as games and short video apps. These applications display content at a high frame rate, requiring electronic devices to frequently decode and render the content, resulting in higher power consumption.

[0094] Some applications display content in their windows with certain characteristics. For example, in some applications, the content displayed in certain positions in the window is relatively fixed, meaning that the content of the elements in these specific positions remains unchanged across multiple consecutive frames.

[0095] Reference Figure 2 The image shown is a schematic diagram of a window of a game application provided in an embodiment of this application.

[0096] This window displays the game application's map scene, floating icons, and floating text. While the user is playing the game, the content of the map scene within the game application window changes constantly. However, these floating icons and floating text remain in a fixed position within the window, and their content remains almost unchanged (or changes very little). It should be noted that... Figure 2 This is merely an illustration of a game application interface. In actual applications, the game application interface may differ from... Figure 2 They are completely different; however, game applications typically contain three types of elements in their interfaces: map scenes, floating icons, and floating text.

[0097] Reference Figure 3 The image shown is a schematic diagram of a window of a short video application provided in an embodiment of this application.

[0098] The window contains short video footage, floating icons, and floating text. Similarly, while the user is watching the short video, the content of the short video footage within the app's window changes constantly. However, these floating icons and floating text remain in a fixed position within the window, and their content remains almost unchanged (or changes very little). It should be noted that... Figure 3 This is merely an illustration of a short video application's interface. In actual applications, the interface of a short video application may differ from... Figure 3 They are completely different; however, the interface of short video apps usually contains three types of elements: short video footage, floating icons, and floating text.

[0099] As mentioned earlier, electronic devices need to decode and render the content within the windows of these applications before displaying it.

[0100] Reference Figure 4 This is a decoding and rendering process provided in the embodiments of this application.

[0101] For game applications and short video applications, the frame data received from the server is encoded data. Therefore, it needs to be decoded on the electronic device side first. Generally, hardware decoding can be performed on the GPU or software decoding on the CPU. This application embodiment takes hardware decoding on the GPU as an example.

[0102] A1, the decoder in the GPU decodes the floating icon and floating text to obtain the decoded data.

[0103] A2, the decoder in the GPU caches the decoded data of the floating icons and floating text in the GPU's on-chip cache.

[0104] In this embodiment, the floating icon and the floating text are decoded separately. For ease of description, both the floating icon and the floating text are written in A1 and A2.

[0105] In addition, there may be multiple floating icons and multiple floating texts in a single frame. Therefore, in practical applications, multiple A1 and A2 steps are required to obtain the decoding data of the floating icons and floating texts that make up a single frame.

[0106] B1, the decoder in the GPU continues to decode to obtain the decoded data of map scene 1.

[0107] B2, the decoder in the GPU caches the decoded data of the map scene image 1 in the on-chip cache.

[0108] In this embodiment of the application, a map scene may contain multiple element scenes. Therefore, in practical applications, it may take multiple B1 and B2 steps to obtain the decoded data of map scene 1. In this embodiment of the application, the map scene will be obtained by decoding once.

[0109] Typically, the decoder and renderer work simultaneously and independently. So, while the decoder is decoding data, the renderer is also performing rendering work. For ease of understanding, the work performed by the renderer will be described starting with the rendering work related to the map scene image 1. The renderer usually performs rendering work based on the vsync signal.

[0110] B3, after receiving the vsync signal, the renderer in the GPU reads the decoded data of the floating icon, floating text, and map scene 1 from the GPU's on-chip cache.

[0111] B4, the renderer in the GPU renders the scene, including floating icons and floating text.

[0112] After B4, electronic devices can also perform tasks such as image composition and display, and the composed image can then be displayed on the screen.

[0113] As mentioned earlier, while the renderer is performing rendering tasks, the decoder is also decoding data. Before decoding data, the decoder needs to first write the data in the on-chip cache on the GPU back to memory to free up the cache space on the on-chip cache. After freeing up the cache space, the new decoded data obtained by the decoder can continue to be cached in the on-chip cache.

[0114] C1, the GPU sends the floating icon, floating text, and scene image 1 from the on-chip cache back to the memory cache.

[0115] C2, the decoder in the GPU continues to decode to obtain the decoded data of map scene 2.

[0116] C3, the decoder in the GPU caches the decoded data of the decoded map scene image 2 in the on-chip cache.

[0117] The rendering and compositing of map scene 2 requires the participation of floating icons and floating text. Therefore, the GPU also needs to read the decoding data of floating icons and floating text from memory.

[0118] In C4, the GPU reads the decoded data of the floating icons and floating text from memory into the on-chip cache.

[0119] C5, after receiving the vsync signal, the renderer in the GPU reads the floating icon, floating text, and map scene from the on-chip cache.

[0120] C6, the renderer in the GPU renders the map scene, floating icons, and floating text.

[0121] After C6, electronic devices can also perform tasks such as image composition and display, and the composed image can be displayed on the screen.

[0122] D1, the GPU sends the floating icon, floating text, and map scene image 2 from the on-chip cache back to the memory cache.

[0123] D2, the decoder in the GPU continues to decode to obtain the decoded data of map scene 3.

[0124] D3, the decoder in the GPU caches the decoded data of the decoded map scene image 3 in the on-chip cache.

[0125] The rendering and compositing of map scene 3 requires the participation of floating icons and floating text. Therefore, the GPU also needs to read the decoding data of floating icons and floating text from memory.

[0126] D4: The GPU reads the decoded data of the floating icons and floating text from memory into the on-chip cache.

[0127] D5, after receiving the vsync signal, the renderer in the GPU reads the floating icon, floating text, and map scene from the on-chip cache.

[0128] D6, the renderer in the GPU renders the map scene, including floating icons and floating text.

[0129] After D6, electronic devices can also perform image compositing, display, and other functions, and the composited image can be displayed on the screen.

[0130] It is understandable that map scene 1, map scene 2, and map scene 3 are three consecutive frame frames, and the floating icons and floating text are the same in all three frames. Therefore, the GPU needs to repeatedly fetch the floating icons and floating text from the on-chip cache back to memory, and then repeatedly read the floating icons and floating text from memory (refer to steps C1, C4, D1, and D4).

[0131] In practical applications, when electronic devices display the interface of game applications, floating icons and floating text are displayed for most of the game application's runtime. Therefore, in this embodiment, the floating icons and floating text can be cached in a system-level cache (a cache shared by multiple hardware units in the electronic device), thereby reducing the amount of data that the GPU writes back to memory and reads data from memory, reducing bandwidth consumption between memory and GPU, and reducing power consumption.

[0132] Typically, texture images such as floating icons and floating text occupy little storage space and have a high reusability; therefore, they are suitable for storage in system-level cache, thereby improving the performance of electronic devices and reducing power consumption.

[0133] Reference Figure 5 This is a schematic diagram of the hardware structure of an electronic device provided in an embodiment of this application. The electronic device includes processors such as CPU, GPU, and NPU. Only the CPU, GPU, and NPU are shown in the diagram. In actual applications, other hardware may also be present. Of course, in actual applications, an NPU may not be present.

[0134] A CPU consists of multiple core units, each with its own L1 and L2 caches. Multiple core units can share the CPU's L3 cache.

[0135] A GPU also includes multiple core units, which can share an L1 cache. The GPU also has an L2 cache shared by each core unit. In this embodiment, the L1 cache and L2 cache are referred to as the on-chip cache of the GPU.

[0136] The internal structure of the NPU will no longer be illustrated or described.

[0137] In electronic devices, multiple processors can share a system-level cache. This system-level cache can be used by hardware units such as the CPU, GPU, and NPU. Compared to on-chip cache, system-level cache has a larger storage space. Because of its larger capacity, decoded data can be stored in the system-level cache for a longer period, without frequent write-back to memory. Furthermore, accessing the system-level cache to retrieve floating icons and text is faster and consumes less power than accessing memory.

[0138] In the above example, the floating icon and floating text are examples of inter-frame reused texture images. These inter-frame reused texture images can be referred to as the first type of inter-frame reused texture images. In practical applications, there are other inter-frame reused texture images. For details, please refer to the following embodiments.

[0139] Reference Figure 6 This is another example of a method for caching texture images provided in the embodiments of this application. In this example, the GPU first dumps the decoded data of the cached floating icons and floating text into the system-level cache before dumping it into memory, so that it can be stored in the system-level cache for a longer period of time.

[0140] A1, the decoder in the GPU decodes the floating icon and floating text to obtain the decoded data.

[0141] In A2, the decoder in the GPU caches the decoded data of the floating icons and floating text in an on-chip cache.

[0142] In this embodiment, the floating icon and the floating text are decoded separately. For ease of description, both the floating icon and the floating text are written in A1 and A2.

[0143] In addition, there may be multiple floating icons and multiple floating texts in a single frame. Therefore, in practical applications, multiple A1 and A2 steps are required to obtain the decoding data of the floating icons and floating texts that make up a single frame.

[0144] B1, the decoder in the GPU continues to decode to obtain the decoded data of map scene 1.

[0145] B2, the decoder in the GPU caches the decoded data of the map scene image 1 in the on-chip cache.

[0146] In this embodiment of the application, a map scene may contain multiple element scenes. Therefore, in practical applications, it may take multiple B1 and B2 steps to obtain the decoded data of map scene 1. In this embodiment of the application, the map scene will be obtained by decoding once.

[0147] Typically, the decoder and renderer work simultaneously and independently. Therefore, while the decoder is decoding data, the renderer is also performing rendering tasks. For ease of understanding, the renderer's work will be described starting with the rendering tasks related to the map scene (image 1). The renderer usually performs rendering tasks based on the vsync signal.

[0148] B3, after receiving the vsync signal, the renderer in the GPU reads the floating icon, floating text, and map scene from the on-chip cache.

[0149] B4, the renderer in the GPU renders the map scene, including floating icons and floating text.

[0150] After B4, electronic devices can also perform tasks such as image composition and display, and the composed image can then be displayed on the screen.

[0151] As mentioned earlier, while the renderer is performing rendering tasks, the decoder is also decoding data. Before decoding data, the decoder needs to first write the data in the on-chip cache on the GPU back to memory to free up cache space on the decoder.

[0152] In this embodiment, before the GPU sends the data in the on-chip cache back to memory, a portion or all of the decoded data is moved to a system-level cache for caching.

[0153] This application focuses on describing the decoding data of inter-frame multiplexed texture images cached in a system-level cache. For decoding data of non-inter-frame multiplexed texture images, the data can be directly dumped to memory or cached in a system-level cache first. This application example demonstrates directly dumping the decoding data of the on-chip cached map scene into memory, while caching the decoding data of inter-frame multiplexed texture images such as floating icons and floating text in a system-level cache first, and then dumping it into memory when the space in the system-level cache is also limited. In practical applications, the decoding data of the map scene, floating icons, and floating text can all be cached in a system-level cache first.

[0154] C1, the GPU transfers the map scene image 1 from the on-chip cache back to the memory cache.

[0155] In E1, the GPU dumps the decoded data of the floating icons and floating text in the on-chip cache to the system-level cache.

[0156] C2, the decoder in the GPU continues to decode to obtain the decoded data of map scene 2.

[0157] C3, the decoder in the GPU caches the decoded data of the decoded map scene image 2 in the on-chip cache.

[0158] The rendering and compositing of map scene 2 requires the participation of floating icons and floating text. Therefore, the GPU also needs to read the decoding data of floating icons and floating text from the system-level cache.

[0159] In C4, the GPU reads the decoded data of the floating icon and floating text from the system-level cache to the on-chip cache.

[0160] C5, after receiving the vsync signal, the renderer in the GPU reads the floating icon, floating text, and map scene from the on-chip cache.

[0161] This application embodiment takes the example of first moving the decoding data of the floating icon and floating text from the system-level cache to the GPU's on-chip cache, and then the renderer directly obtaining the decoding data of the floating icon and floating text from the on-chip cache for rendering. In practical applications, the renderer can also directly obtain the decoding data of the floating icon and floating text from the system-level cache for rendering, and this application will not provide an example through illustrations.

[0162] C6, the renderer in the GPU renders the map scene, floating icons, and floating text.

[0163] After C6, electronic devices can also perform tasks such as image composition and display, and the composed image can be displayed on the screen.

[0164] D1, the GPU sends the map scene image 2 from the on-chip cache back to the memory cache.

[0165] In E2, the GPU dumps the decoded data of the floating icons and floating text in the on-chip cache to the system-level cache.

[0166] D2, the decoder in the GPU continues to decode to obtain the decoded data of map scene 3.

[0167] D3, the decoder in the GPU caches the decoded data of the decoded map scene image 3 in the on-chip cache.

[0168] D4: The GPU reads the decoded data of the floating icons and floating text from the system-level cache to the on-chip cache.

[0169] D5, after receiving the vsync signal, the renderer in the GPU reads the floating icon, floating text, and map scene from the on-chip cache.

[0170] D6, the renderer in the GPU renders the map scene, including floating icons and floating text.

[0171] After D6, electronic devices can also perform image compositing, display, and other functions, and the composited image can be displayed on the screen.

[0172] It is understandable that by caching the floating text and floating icons in the system-level cache, the GPU does not need to send back to memory and repeatedly read the decoding data of the floating icons and floating text, which can reduce the bandwidth resource consumption between memory and GPU and reduce power consumption.

[0173] Furthermore, the above example uses the scenario where the GPU dumps data from its on-chip cache to system-level cache and memory before decoding new data. In practical applications, the GPU has the internal conditions to dump data from its on-chip cache. That is, if the data stored in the GPU's on-chip cache meets the corresponding conditions, the step of dumping the data cached in the GPU's on-chip cache can be performed. These steps do not necessarily have to be performed before decoding new encoded data.

[0174] In practical applications, the storage space of the system-level cache is also limited. Therefore, the system-level cache cannot cache the decoding data of inter-frame reused texture images indefinitely. The system-level cache also sets some caching strategies to release some decoding data with a long cache time and dump it into memory.

[0175] Reference Figure 7 The diagram shown is a schematic representation of the caching process for decoded data provided in an embodiment of this application.

[0176] The decoded data obtained after GPU decoding can be temporarily cached in the GPU's on-chip cache.

[0177] The GPU dumps this decoded data to a system-level cache.

[0178] The system-level cache has a caching policy set up. When the system-level cache determines that some decoded data meets the conditions for being dumped to memory, it will dump the decoded data to memory.

[0179] It should be noted that, typically, inter-frame reused texture images are texture images used in multiple consecutive frames. Therefore, the cache duration of inter-frame reused texture images in the system-level cache is longer than that of non-inter-frame reused texture images in the system-level cache.

[0180] To distinguish between decoded data belonging to inter-frame multiplexed texture images and non-inter-frame multiplexed texture images, the GPU can be configured to transmit decoded data from the on-chip cache to the system-level cache through different ports. By using different ports, the system-level cache can differentiate between decoded data from inter-frame multiplexed texture images and non-inter-frame multiplexed texture images.

[0181] As an example, decoded data of inter-frame multiplexed texture images are transmitted through the first interface. This decoded data may carry a corresponding identifier, such as a first identifier.

[0182] Decoded data of non-inter-frame multiplexed texture images are transmitted through the second interface. This decoded data does not carry the first identifier. In practical applications, this type of data carries the second identifier, but it is also possible not to carry the second identifier.

[0183] As an example of an interface for a chip platform, the first interface is scid0 and the second interface is scid1.

[0184] In practical applications, when the GPU dumps decoded data to the system-level cache, there are several ways to distinguish between the decoded data of inter-frame multiplexed texture images and the decoded data of non-inter-frame multiplexed texture images. For example, the same interface is used to transmit the decoded data. The decoded data of inter-frame multiplexed texture images carries a first marker, while the decoded data of non-inter-frame multiplexed texture images does not carry the first marker or carries a second marker.

[0185] This application uses a first identifier to mark the decoding data of inter-frame multiplexed texture images.

[0186] This application does not limit the method by which the GPU distinguishes between the decoded data of inter-frame multiplexed texture images and the decoded data of non-inter-frame multiplexed texture images when dumping decoded data to the system-level cache.

[0187] When the GPU transmits decoded data to the system-level cache, it notifies the system-level cache whether the current decoded data belongs to the decoded data of an inter-frame multiplexed texture image or the decoded data of a non-inter-frame multiplexed texture image. Accordingly, the system-level cache manages the decoded data of inter-frame multiplexed texture images in a different way than it manages the decoded data of non-inter-frame multiplexed texture images. Typically, the cache duration of decoded data of inter-frame multiplexed texture images in the system-level cache is longer than the cache duration of decoded data of non-inter-frame multiplexed texture images in the system-level cache.

[0188] The following describes in detail the caching strategy for system-level managed decoded data. It should be noted that the system-level cache is shared by multiple processors; therefore, the decoded data for non-inter-frame multiplexed texture images in the system-level cache may also include data other than the map scene shown in the example above, such as some data from the CPU, some data from the NPU, etc.

[0189] As an example, a configuration could be established where, if the remaining storage resources in the system-level cache are less than a first proportion (or less than a fourth value), the least accessed decoded data among the longest-cached decoded data in the system-level cache would be released. In a practical implementation, if releasing the least accessed decoded data among the longest-cached decoded data still does not satisfy the condition of being greater than or equal to the first proportion (or greater than or equal to the fourth value), then the least accessed decoded data among the current longest-cached decoded data can continue to be released until the remaining storage resources in the system-level cache are greater than or equal to the first proportion (or greater than or equal to the fourth value).

[0190] In practical applications, in order to enable the decoding data of inter-frame reused texture images to be cached in the system-level cache for a longer period of time, other restrictions can be added.

[0191] Strategy 1: Each decoded data point corresponds to a write time, therefore, each decoded data point corresponds to a cache duration. When the remaining storage resources in the system-level cache are less than a first proportion (or less than a fourth value), the data with the longest cache duration among the least accessed decoded data points (those with a cache duration greater than the first value for inter-frame multiplexed texture images and those with a cache duration greater than the second value for non-inter-frame multiplexed texture images) is released, where the first value is greater than the second value. Similarly, this strategy continues until the remaining storage resources in the system-level cache are greater than or equal to the first proportion (greater than or equal to the fourth value), at which point the released data can be dumped into memory.

[0192] When the remaining storage resources in the system-level cache meet the first condition, the least used decoding data among the decoding data of inter-frame multiplexed texture images with a cache duration greater than the first value and the decoding data of non-inter-frame multiplexed texture images with a cache duration greater than the second value is released. The first value is greater than the second value. The remaining storage resources in the system-level cache meeting the first condition includes: the remaining storage resources in the system-level cache are less than a first proportion or less than a fourth value.

[0193] Strategy Two: The initial value of the buffer duration timer for non-inter-frame multiplexed texture image decoding data can be set to be greater than the initial value of the buffer duration timer for inter-frame multiplexed texture image decoding data. Then, if the remaining storage resources in the system-level cache are less than the first proportion (or less than the fourth value), the least accessed decoding data among the decoding data with the longest buffer time in the system-level cache will be released. Alternatively, the least accessed decoding data among the decoding data with a buffer duration greater than a certain value will be released.

[0194] Strategy 3: Locks can also be set for the decoding data of inter-frame multiplexed texture images. If the cache duration of the decoding data for an inter-frame multiplexed texture image is less than the first duration, the decoding data is locked, meaning it cannot be released. Then, if the remaining storage resources in the system-level cache are less than the first proportion (or less than the fourth value), the least used unlocked decoding data among the decoding data with a cache duration greater than the third value in the system-level cache is released.

[0195] When the remaining storage resources in the system-level cache meet the first condition, the least used decoding data among the decoding data whose cache duration is greater than the third value will be released. Specifically, the decoding data of the inter-frame multiplexed texture image is not allowed to be released before it is cached in the system-level cache for the first duration. The first duration is greater than the third value. The remaining storage resources in the system-level cache meeting the first condition include: the remaining storage resources in the system-level cache are less than a first proportion or less than a fourth value.

[0196] Strategy 4: The system-level cache can also be divided into two storage spaces. Decoding data for inter-frame multiplexed texture images is cached in the first storage space, and decoding data for non-inter-frame multiplexed texture images is cached in the second storage space. Decoding data for inter-frame multiplexed texture images in the first storage space competes for storage resources. For example, if the remaining storage resources in the first storage space are less than a second proportion or a fifth value, the least accessed decoding data among the longest-cached decoding data in the first storage space is released. Decoding data for non-inter-frame multiplexed texture images in the second storage space competes for storage resources. For example, if the remaining storage resources in the second storage space are less than a third proportion or a sixth value, the least accessed decoding data among the longest-cached decoding data in the second storage space is released.

[0197] That is, the inter-frame multiplexed texture image is cached in the first storage space of the system-level cache. When the remaining storage resources in the first storage space meet the second condition, the least used decoding data in the longest cached decoding data in the first storage space is released. The remaining storage resources in the first storage space meet the second condition, which includes: the remaining storage resources in the first storage space are less than the second ratio or less than the fifth value.

[0198] Non-inter-frame reused texture images are cached in the second storage space of the system-level cache. When the remaining storage resources in the second storage space meet the third condition, the least used decoding data in the longest cached decoding data in the second storage space is released. The remaining storage resources in the first storage space meet the second condition, which includes: the remaining storage resources in the first storage space are less than the third ratio or less than the sixth value.

[0199] In the above example, the released decoded data can be determined from two perspectives: cache duration and access count. For example, among decoded data with a cache duration exceeding one time, the decoded data with the fewest accesses is selected; among decoded data with the longest cache duration, the decoded data with the fewest accesses is selected; among decoded data with the fewest accesses, the decoded data with the longest cache duration is selected; and among decoded data with fewer than a certain number of accesses, the decoded data with the longest cache duration is selected. This application does not limit the specific method of limitation. In practical applications, other strategies can also be selected to allow the decoded data of inter-frame reused texture images to be cached in the system-level cache for a longer period.

[0200] As mentioned earlier, inter-frame reused texture images include not only floating icons and floating text, but may also include other images.

[0201] In game applications, there are many areas, such as castle areas, forest areas, and river areas. Taking the castle area as an example, when entering the castle area, the content displayed in the game application window includes not only the floating icons and floating text mentioned above, but also the castle scene. As the game character moves around in the castle, the game scene displayed in the game application window may change; however, these game scene scenes may contain the same texture images.

[0202] As an example, the floor texture images are identical in some scenes within the castle area; similarly, the courtyard floor texture images are identical within the castle courtyard. When the player walks in the castle courtyard, the floor texture images are identical across multiple consecutive frames. These images can be categorized as hotspot texture images, which are also types of inter-frame reused texture images (the second type of inter-frame reused texture image). These images can be pre-identified offline using software.

[0203] For example, on the side of electronic device manufacturers, a game application is pre-run, allowing game characters to move around in various areas, obtaining various texture images in the scene of the game application, and then obtaining the number of times and intervals in which each texture image is used during the running of the game application; based on the number of times and intervals in which each texture image is used, it is determined whether each texture image is a hotspot texture image.

[0204] Based on the above description, it can be understood that the inter-frame reused texture images include the floating icons and floating text in the above embodiments, as well as the hotspot texture images in the map scene.

[0205] The following is through Figure 8 Describe in detail the caching methods for these texture images.

[0206] F1, the upper-layer software 1, identifies the number of times and the interval between uses of each texture image in each area of ​​the game application during operation.

[0207] In this embodiment, game applications typically include multiple regions, and the texture images in different regions vary significantly. Therefore, the application can be divided based on these different regions. For example, if a game application includes n regions, the number of times each image is used and the interval between uses can be counted for each region.

[0208] In practical applications, a game application can be run once, allowing game characters to enter various areas. The number of times each image in each area is used and the interval between uses during the game application's execution can be obtained. Based on the number of times each image is used and the interval between uses during a single run of the game application, it can be determined whether each image is a hotspot texture image.

[0209] Alternatively, the game application can be run multiple times and enter different areas to obtain the number of times each image in each area is used and the usage interval during each run of the game application. Based on the number of times each image in each area is used and the usage interval during multiple runs of the game application, it can be determined whether each image is a hotspot texture image.

[0210] The number of times an image is used refers to the number of times the image is accessed, and the time interval between images refers to the time interval between the accesses of the image.

[0211] Reference Figure 9 This is a schematic diagram illustrating the time interval process for obtaining images provided in the embodiments of this application.

[0212] Taking an image from a certain scene area as an example, the image was accessed 11 times, and the corresponding access time is ti.

[0213] The time interval corresponding to the first access to the image is the difference between the time of the second access and the time of the first access: t2-t1.

[0214] The time interval corresponding to the i-th access of the image is the smaller of the left time interval and the right time interval of the i-th access. The left time interval of the i-th access is the difference between the access time of the i-th access and the access time of the (i-1)-th access, and the right time interval of the i-th access is the difference between the access time of the (i+1)-th access and the access time of the i-th access.

[0215] That is, the time interval corresponding to the i-th time the image is accessed is: t(i+1)-ti and ti-t(i-1).

[0216] For example, the time intervals corresponding to the 4th access include t4-t3 and t5-t4. For access sequences that include two time intervals, the smaller time interval t4-t3 can be retained, and the larger time interval t5-t4 can be deleted.

[0217] The time interval corresponding to the last access to the image is the difference between the access time of the last access and the access time of the penultimate access: t11-t10.

[0218] It's understandable that when an image is accessed multiple times, there's one time interval between the first and last accesses; and two time intervals between subsequent accesses (one from the previous access and one from the next). The smaller time interval among the access sequences with two time intervals needs to be used as the time interval for that access sequence. After processing in this way, each access sequence for each image has a unique time interval. The parameters for an image include the number of accesses and the time interval corresponding to each access sequence.

[0219] If you run the game application once and enter each area, you can get a set of parameters for each image in each area: the number of times it was accessed and the time interval corresponding to each access order.

[0220] If you run the game application multiple times and enter each area, you can obtain multiple sets of parameters for each image. Each set of parameters represents the number of times the image is accessed during the current run of the game application and entry into each area, as well as the time interval corresponding to each access.

[0221] Additionally, it should be noted that if an image is accessed only once during the process of running the game application and entering various areas, then there is no time interval for that image.

[0222] F2, the upper-layer software 1 determines the hotspot texture images in each area based on the number of times and the interval between uses of each image in each area of ​​the game application.

[0223] In this embodiment, images that are frequently accessed within a certain period of time are hotspot texture images. Cache these hotspot texture images in the system-level cache, which can greatly reduce the bandwidth between memory and GPU and reduce power consumption.

[0224] Methods for determining whether an image within a certain area is a hotspot texture image based on the frequency and interval of image usage include:

[0225] Image a was accessed during a single run of the game application:

[0226] Reference Figure 9 As shown, the time intervals corresponding to each access order of image a are clustered to obtain multiple time interval classes; each time interval class includes at least one access order and the time interval corresponding to the access order.

[0227] Determine if image 'a' contains a time interval class where the number of visits exceeds a threshold and the average visit interval is less than a threshold. If the number of such time interval classes exceeds a threshold, then the image is considered a hotspot texture image. The threshold can be a natural number greater than or equal to 0.

[0228] As another example, when running the game application multiple times (e.g., m times) and entering different areas, and obtaining multiple sets (e.g., m sets) of parameters for each image, further constraints can be added:

[0229] Determine if the j-th group of parameters for image a (where j is a positive integer from 1 to m) contains a time interval class whose access count is greater than a threshold and whose average access time interval is less than an interval threshold. If the number of such time interval classes is greater than the quantity threshold, then image a is identified as a candidate hotspot texture image for this test. Otherwise, image a is not identified as a candidate hotspot texture image for this test. The quantity threshold can be a natural number greater than or equal to 0.

[0230] Determine if the percentage of times image a is identified as a candidate hotspot texture image (n) out of m times is greater than a percentage threshold. If it is greater than the percentage threshold, then image a is identified as a hotspot texture image; otherwise, image a is not identified as a hotspot texture image.

[0231] In practical applications, this process can be simplified. As another example, based on the access times of the image, images with access times greater than the access threshold within the window can be identified as hotspot texture images by using a sliding window.

[0232] This application does not limit the method for determining whether each image within a region is a hotspot texture image. In practical applications, a trained network model can also be used to identify whether each image is a hotspot texture image.

[0233] The identification information of hotspot texture images in various regions of the game application is pre-stored in the electronic device. Subsequently, when the user runs the game application on the electronic device, when the game application enters a certain region, it can determine whether the image currently being decoded or cached by the GPU is a hotspot texture image based on the pre-stored identification information of the hotspot texture images in that region.

[0234] F3, the upper-level software 2 uses the OpenGL interface to identify whether the current texture image is a floating icon or floating text.

[0235] The OpenGL interface, or Open Graphics Library interface, is a cross-language, cross-platform application programming interface for rendering vector graphics. It can perform functions such as graphics rendering, texture mapping, and lighting calculations. It can also be used to identify whether an image contains floating icons or floating text.

[0236] During gameplay, the OpenGL interface can be used to identify whether the current texture image is a floating icon or floating text.

[0237] F4 indicates that the GPU needs to dump the decoded data.

[0238] F5 If the decoded data to be dumped is the decoded data of an inter-frame multiplexed texture image, a memory access request (scid0) is sent to the system-level cache, which carries the decoded data of the inter-frame multiplexed texture image.

[0239] In this embodiment of the application, the GPU's on-chip cache caches the decoding data. Before dumping the decoding data cached on the GPU's on-chip cache to memory or system-level cache, it is necessary to determine whether the decoding data is the decoding data of an inter-frame multiplexed texture image.

[0240] As mentioned earlier, the identification information stored after F2 can be used to determine whether the current decoded data is a hotspot texture image. If it is a hotspot texture image, it is the decoded data of an inter-frame multiplexed texture image. The interface in F3 can distinguish whether the current texture image is a floating icon or floating text. If it is a floating icon or floating text, the decoded data of the texture image belongs to the decoded data of an inter-frame multiplexed texture image.

[0241] Of course, if the texture image corresponding to a decoded data is neither a hotspot texture image nor a floating icon or floating text, then the decoded data is not inter-frame reused texture data.

[0242] F6 If the decoded data to be dumped is not the decoded data of an inter-frame multiplexed texture image, a memory access request (scid1) is sent to the system-level cache. This memory access request carries the decoded data of a non-inter-frame multiplexed texture image.

[0243] As mentioned earlier, images in the game application's scene that are not recognized as inter-frame reused texture images can be directly returned to memory or dumped to the system-level cache.

[0244] In addition, access requests sent from the GPU to the system-level cache can also carry data that can be dumped to the system-level cache.

[0245] F7, the system-level cache manages decoded data based on this memory access request.

[0246] F8, the system-level cache, will move a portion of the decoded data into memory under certain conditions.

[0247] As another embodiment, it can also be achieved through Figure 10 The interaction shown implements the aforementioned method for caching texture images. Of course, in practical applications, other methods may also exist. Figure 8 Based on the embodiments shown Figure 10 Implementations of other, more detailed steps are also provided. This timing diagram is only an example; in practical applications, some steps and the transmission of some information may take different forms.

[0248] S1, the upper-layer software 1 identifies the number of times and the interval between uses of each texture image in each area of ​​the game application.

[0249] S2, the upper-layer software 1 determines the hotspot texture images in each area based on the number of times each image is used and the usage interval in each area of ​​the game application.

[0250] S3, the upper-layer software 1 sends the identification information of the texture images identified as hotspots in each region to the memory.

[0251] S4, during the process of the user using the game application on the electronic device, the upper-layer software 2 detects that the character in the game application enters area A.

[0252] S5, the upper-layer software 2 retrieves the identification information of the hotspot texture icons in region A from the memory.

[0253] S6, the upper-layer software 2 receives the texture image 1 to be decoded.

[0254] S7, when the upper-layer software 2 determines that texture image 1 does not belong to the hotspot texture image based on the identification information of the hotspot texture image in region A, it calls the GL interface to transmit texture image 1.

[0255] In the S8 GPU, thread 1 identifies texture image 1 as a floating icon.

[0256] S9, GPU thread 1 sends texture image 1 to the decoder.

[0257] S10, the decoder decodes to obtain the decoded data of texture image 1.

[0258] S11, the decoder sends the decoding data of texture image 1 to the on-chip buffer.

[0259] S12, The decoded data of texture image 1 satisfies the conditions for dumping from the on-chip cache to the system-level cache.

[0260] S13, the GPU sends the decoded data of texture image 1 in the on-chip cache to the system-level cache through the SCID0 port. The transmitted decoded data may carry a first identifier.

[0261] S14, The system-level cache caches the decoded data of texture image 1 using a caching strategy with a longer caching time.

[0262] S15, the upper-layer software 2 receives scene screen 1.

[0263] In this embodiment of the application, scene screen 1 includes multiple image information, and scene screen 1 is used to represent the name of an image.

[0264] S16, when the upper-layer software 2 determines that the current scene frame 1 belongs to the hotspot texture image based on the identification information of the hotspot texture image in region A, it sends the scene frame 1 to the GPU thread 1, carrying the identification information of the hotspot texture image.

[0265] S17, Thread 1 in the GPU sends scene frame 1 to the decoder.

[0266] S18, the decoder decodes to obtain the decoded data of scene 1.

[0267] S19, the decoder sends the decoding data of scene 1 to the on-chip buffer.

[0268] S20, the decoded data of scene 1 meets the conditions for being dumped from the on-chip cache to the system-level cache.

[0269] S21, the GPU sends the decoded data of scene frame 1 in the on-chip cache to the system-level cache through the SCID0 port. The transmitted decoded data may carry a first tag.

[0270] S22, the system-level cache caches the decoded data of scene 1 with a caching strategy that uses a longer caching time.

[0271] As another example, if the texture image decoded by the GPU is not a hotspot texture image, but also a floating icon or floating text, the GPU uses the SCID1 port to transmit the decoded data of the texture image to the system-level cache.

[0272] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0273] This application also provides a computer-readable storage medium storing a computer program that, when run on an electronic device, can implement the steps in the above-described method embodiments.

[0274] This application also provides a computer program product that, when run on an electronic device or a wireless router, enables the electronic device to perform the steps described in the various method embodiments above.

[0275] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments of this application can be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include at least: any entity or device capable of carrying the computer program code to the first device, a recording medium, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium. Examples include USB flash drives, portable hard drives, magnetic disks, or optical disks. In some jurisdictions, according to legislation and patent practice, computer-readable media cannot be electrical carrier signals or telecommunication signals.

[0276] This application also provides a chip, which includes a processor coupled to a memory. The processor calls a computer program stored in the memory to implement the steps of any method embodiment of this application. The chip can be a single chip or a chip module composed of multiple chips.

[0277] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0278] Those skilled in the art will recognize that the units and method steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0279] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A method for caching texture images, characterized in that, include: The GPU decodes the first image to obtain the first decoded data, wherein the first image is an inter-frame reused texture image; The GPU sends the first decoded data to the system-level cache, wherein the first decoded data carries a first identifier, which is used to represent the decoded data of the inter-frame multiplexed texture image; The system-level cache manages the caching duration of the first decoded data in the system-level cache, wherein the caching duration of the decoded data carrying the first identifier in the system-level cache is greater than the caching duration of the decoded data not carrying the first identifier in the system-level cache; When the first decoded data meets the conditions for being released, the system-level cache dumps the first decoded data from the system-level cache to memory.

2. The caching method as described in claim 1, characterized in that, The method further includes: The GPU decodes the second image to obtain the second decoded data, wherein the second image is not an inter-frame reused texture image; The GPU sends the second decoded data to the system-level cache, wherein the second decoded data does not carry the first identifier; The system-level cache manages the caching duration of the second decoded data in the system-level cache; When the system-level cache meets the conditions for releasing the second decoded data, it dumps the second decoded data from the system-level cache to memory.

3. The caching method as described in claim 2, characterized in that, The GPU sending the first decoded data to the system-level cache includes: The GPU sends the first decoded data to the system-level cache through a first interface, the first interface being the scid0 port, and the data transmitted through the first interface carries the first identifier. The GPU sending the second decoded data to the system-level cache includes: The GPU sends the second decoded data to the system-level cache through a second interface, which is scid1. The data transmitted through the second interface does not carry the first identifier.

4. The caching method according to any one of claims 1 to 3, characterized in that, Before the GPU decodes the first image to obtain the first decoded data, the method further includes: The first upper-layer application identifies the first image as a first type of inter-frame multiplexing texture image through the OpenGL interface. The first type of inter-frame multiplexing texture image includes inter-frame multiplexing texture icons and inter-frame multiplexing texture text.

5. The caching method according to any one of claims 1 to 4, characterized in that, The method further includes: Run the first application; During the operation of the first application, obtain the number of times and the interval between the use of each scene image in the first application; Based on the number of times and the interval between uses of each scene image in the first application, determine whether each scene image is a second type of inter-frame reused texture image.

6. The caching method as described in claim 5, characterized in that, The first application is a game application, and the screen of the first application involves multiple scene areas; the method further includes: The number of times and the interval between uses of each scene image in the first scene area are obtained after the game character enters the first scene area during the operation of the first application. The first scene area can be any scene area. Based on the number of times each scene image in the first scene area is used and the usage interval, determine whether each scene image in the first scene area is a second type of inter-frame reused texture image.

7. The caching method as described in claim 6, characterized in that, The scene images in the first scene area include the first scene image; the number of times the first scene image is used is the number of times the first scene image is accessed; the usage interval of the first scene image is the time interval corresponding to each access sequence of the first scene image; The time interval corresponding to the first access of the first scene image is the difference between the access time of the first scene image when it is accessed for the second time and the access time when it is accessed for the first time. The time interval corresponding to the i-th access of the first scene image is the smaller of the left time interval and the right time interval of the i-th access of the first scene image. The left time interval of the i-th access is the difference between the access time of the i-th access and the access time of the (i-1)-th access, and the right time interval of the i-th access is the difference between the access time of the (i+1)-th access and the access time of the i-th access. The time interval corresponding to the last access of the first scene image is the difference between the access time of the last access of the first scene image and the access time of the second to last access.

8. The caching method as described in claim 7, characterized in that, The step of determining whether each scene image is a second type of inter-frame reused texture image based on the number of times and the interval between uses of each scene image in the first application includes: Cluster the time intervals corresponding to each access count of the first scene image to obtain multiple time interval classes, each time interval class including at least one access count and the corresponding time interval; If the number of time interval classes in the first scene image that are accessed more than the number threshold and whose average access time interval is less than the interval threshold is greater than the number threshold, then the first scene image is determined to be the second type of inter-frame reuse texture image. If, within the time interval class of the first scene image, the number of time interval classes that have been accessed more than the access threshold and have an average access time interval less than the interval threshold is less than or equal to the quantity threshold, then the first scene image is determined not to be the second type of inter-frame reused texture image.

9. The caching method as described in claim 8, characterized in that, The method further includes: During the m runs of the first application, the number of times n is the first scene image determined as the second type of inter-frame reused texture image; If the value of n / m is greater than the proportional threshold, the first scene image is determined to be the second type of inter-frame reused texture image.

10. The caching method according to any one of claims 6 to 9, characterized in that, After determining whether each scene image of the first application is a second type of inter-frame multiplexed texture image, the method further includes: During the operation of the first application, it was detected that a game character entered the first scene area; Set the first identifier for the scene image in the first scene region of the first application that is determined to be a second type of inter-frame multiplexed texture image.

11. The caching method as described in claim 10, characterized in that, The method further includes: The GPU decodes the third image to obtain third decoded data, wherein the third image is the first scene image in the first scene region; The GPU sends the third decoded data to the system-level cache, the third decoded data carrying the first identifier; The system-level cache manages the caching duration of the third decoded data in the system-level cache; When the third decoded data meets the conditions for being released, the system-level cache dumps the third decoded data from the system-level cache to memory.

12. The caching method according to any one of claims 1 to 11, characterized in that, The management strategy for decoded data in the system-level cache includes: When the remaining storage resources in the system-level cache meet the first condition, the least used decoding data among the decoding data of inter-frame multiplexed texture images with a cache duration greater than the first value and the decoding data of non-inter-frame multiplexed texture images with a cache duration greater than the second value is released, wherein the first value is greater than the second value, and the remaining storage resources in the system-level cache meeting the first condition includes: the remaining storage resources in the system-level cache are less than a first proportion or less than a fourth value.

13. The caching method according to any one of claims 1 to 11, characterized in that, The management strategy for decoded data in the system-level cache includes: When the remaining storage resources in the system-level cache meet the first condition, the least used decoding data among the decoding data whose cache duration is greater than the third value is released. Specifically, the decoding data of the inter-frame multiplexed texture image is not allowed to be released before it is cached in the system-level cache for the first duration. The first duration is greater than the third value. The remaining storage resources in the system-level cache meeting the first condition include: the remaining storage resources in the system-level cache are less than a first proportion or less than a fourth value.

14. The caching method according to any one of claims 1 to 11, characterized in that, The management strategy for decoded data in the system-level cache includes: The inter-frame multiplexing texture image is cached in the first storage space of the system-level cache. When the remaining storage resources in the first storage space meet the second condition, the least used decoding data in the longest cached decoding data in the first storage space is released. The remaining storage resources in the first storage space meet the second condition, which includes: the remaining storage resources in the first storage space are less than the second ratio or less than the fifth value. Non-inter-frame reused texture images are cached in the second storage space of the system-level cache. When the remaining storage resources in the second storage space meet the third condition, the least used decoding data in the longest cached decoding data in the second storage space is released. The remaining storage resources in the first storage space meet the second condition, which includes: the remaining storage resources in the first storage space are less than the third ratio or less than the sixth value.

15. An electronic device, characterized in that, The device includes one or more processors and one or more memories; wherein the one or more memories are coupled to the one or more processors, and the one or more memories are used to store a computer program that, when executed by the one or more processors, causes the electronic device to perform the method as described in any one of claims 1-14.

16. A chip system applied to an electronic device, the chip system comprising one or more processors, characterized in that, The processor is configured to invoke computer instructions to cause the electronic device to perform the method as described in any one of claims 1-14.

17. A computer-readable storage medium comprising a computer program, characterized in that, When the computer program is run on an electronic device, it causes the electronic device to perform the method as described in any one of claims 1-14.

18. A computer program product, characterized in that, When the computer program product is run on an electronic device, it causes the electronic device to perform the method as described in any one of claims 1-14.

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