Nitride polarity gan-based e / d integrated device and method of manufacturing the same

Abstract

This invention discloses a nitrogen-polar GaN-based E / D integrated device and its fabrication method. This invention utilizes a nitrogen-polar AlGaN / GaN / AlGaN double heterojunction to intrinsically obtain a GaN-based enhancement-mode device at the epitaxial structure level, and then achieves GaN-based E / D integration through subsequent processes. The fabrication method of the nitrogen-polar GaN-based E / D integrated device provided by this invention eliminates the need for etching or ion implantation processes on the gate region; therefore, the threshold voltage of the enhancement-mode device is more stable during E / D integration, improving device reliability.

Description

Technical Field

[0001] This invention specifically relates to a nitrogen-polar GaN-based E / D integrated device and its fabrication method, belonging to the field of semiconductor technology. Background Technology

[0002] Gallium nitride (GaN) possesses a large bandgap and breakdown electric field. Its unique polarization effect also enables AlGaN / GaN heterojunctions to generate high-density, high-mobility two-dimensional electron gases (2DEG), gradually replacing traditional silicon-based devices in high-voltage and high-frequency applications. In high-speed circuit applications, GaN, with its high breakdown electric field, high mobility, and excellent high-temperature resistance, offers a larger operating voltage swing, faster circuit response, and greater resistance to extreme environments compared to Si-based devices.

[0003] In practical circuit design, logic circuits require enhancement-mode devices as control inputs. In terms of circuit safety design, enhancement-mode devices, as the control component, effectively prevent transistors from remaining in the conducting state and generating excessive heat when circuit errors occur. Therefore, with the development of GaN in high-speed integrated circuits, GaN-based E / D integration research has gradually become a research focus both domestically and internationally. Among these, high-performance, high-reliability GaN-based enhancement-mode devices are a key issue that urgently needs to be addressed in the development of GaN-based integrated circuits.

[0004] To achieve GaN enhancement-mode devices, there are currently several mainstream methods: First, by doping a p-type dopant during the epitaxial growth of a GaN-based thin film to form a p-GaN layer, thereby depleting the underlying 2DEG and achieving enhancement mode. Second, by performing F-ion implantation or oxygen plasma treatment on the gate during the device fabrication process to achieve enhancement mode. Third, by employing a grooved insulated gate structure, the channel is broken by etching the AlGaN barrier layer under the gate, and then an insulating material is deposited on top to reduce leakage current.

[0005] For p-GaN, Mg, as the most commonly used p-type dopant, not only suffers from memory effect and numerous defect energy levels, but also exhibits very low ionization efficiency, requiring annealing for activation. Furthermore, p-GaN typically requires a thin barrier layer to achieve a positive threshold voltage, but this thin barrier layer can negatively impact the performance of the underlying 2DEG. In summary, the epitaxial control and fabrication processes of p-GaN are quite complex, resulting in poor performance and stability of p-GaN enhancement-mode devices. For F ion implantation, this process is unstable, leading to significant threshold voltage fluctuations and potential failures and negative threshold voltage bias at high temperatures, thus limiting its mass production. The grooved insulated gate involves etching the barrier layer in the gate region, making it difficult to control the gate interface quality and resulting in unstable threshold voltage. Summary of the Invention

[0006] The main objective of this invention is to provide a nitrogen-polar GaN-based E / D integrated device and its fabrication method. By combining the fact that the c-axis direction of nitrogen-polar GaN is opposite to that of gallium-polar GaN, this invention innovatively utilizes a nitrogen-polar double heterojunction structure to intrinsically realize GaN-based enhancement-mode devices at the epitaxial structure level. This invention can effectively avoid processes such as etching or ion implantation of the gate region of the E-mode device in E / D integration. Furthermore, by designing a cap layer in the epitaxial structure to regulate the threshold voltage of the E-mode device, the performance and stability of the E-mode device are improved, thus overcoming the shortcomings of existing technologies.

[0007] To achieve the aforementioned objectives, the technical solution adopted by this invention includes:

[0008] The first aspect of this invention provides a method for fabricating a nitrogen-polar GaN-based E / D integrated device, comprising:

[0009] A nitrogen-polar epitaxial structure is fabricated, comprising a barrier layer, a channel layer, and a cap layer stacked sequentially along the longitudinal direction, wherein the cap layer is capable of depleting the two-dimensional electron gas in the channel layer located below it.

[0010] A D-mode region, an E-mode region, and an isolation region are defined on the epitaxial structure. The isolation region is distributed around the D-mode region and the E-mode region. The D-mode region includes a first ohmic region and a first gate region. The E-mode region includes a second ohmic region and a second gate region.

[0011] At least a portion of the cap layer of the D-mode region and the E-mode region, excluding the second gate region, is removed to restore the two-dimensional electron gas of the D-mode region and the E-mode region, excluding the second gate region.

[0012] Remove a portion of the channel layer located in the first ohmic region and the second ohmic region, or remove all the cap layer and a portion of the channel layer located in the first ohmic region and the second ohmic region, and fabricate a first ohmic electrode on the channel layer in the first ohmic region and a second ohmic electrode on the channel layer in the second ohmic region, respectively, and make the first ohmic electrode and the second ohmic electrode electrically connected to the two-dimensional electron gas in the channel layer.

[0013] An isolation structure is formed in the isolation region. A first gate is fabricated in the first gate region and a second gate is fabricated in the second gate region. The first gate, the first ohmic electrode, and the epitaxial structure cooperate to form a D-mode device. The second gate, the second ohmic electrode, and the epitaxial structure cooperate to form an E-mode device. The E-mode device is an enhancement-mode device.

[0014] A second aspect of the present invention provides a nitrogen-polar GaN-based E / D integrated device obtained by the fabrication method of the nitrogen-polar GaN-based E / D integrated device.

[0015] Compared with the prior art, the advantages of the present invention include:

[0016] This invention provides a method for fabricating a nitrogen-polar GaN-based E / D integrated device, which innovatively utilizes a nitrogen-polar double heterojunction to intrinsically obtain a GaN-based enhancement-mode device at the epitaxial structure level, and realizes GaN-based E / D integration through subsequent processes;

[0017] The present invention provides a method for fabricating a nitrogen-polar GaN-based E / D integrated device, which does not require etching or ion implantation of the gate region. Therefore, the threshold voltage of the enhancement-mode device in the E / D integration is more stable, and the device reliability is improved.

[0018] The present invention provides a nitrogen-polar GaN-based E / D integrated device, which can directly control the threshold voltage of the enhancement-mode device by setting the composition and thickness of the cap layer;

[0019] The present invention provides a nitrogen-polar GaN-based E / D integrated device. For nitrogen-polar epitaxial structures, the barrier layer is located below the channel layer. Therefore, the etching of the cap layer will not affect the barrier layer. Thus, the 2DEG in both D-mode and E-mode devices is less affected by etching, thereby ensuring the performance of E-mode and D-mode devices. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of a heterojunction HEMT epitaxial structure based on nitrogen polar GaN provided in Embodiment 1 of the present invention;

[0021] Figure 2 This is a schematic diagram of the structure after etching the cap layer in Embodiment 1 of the present invention;

[0022] Figure 3 This is a schematic diagram of the structure after etching away part of the channel layer in the E-mode region and the ohmic region of the D-mode region in Embodiment 1 of the present invention;

[0023] Figure 4This is a schematic diagram of the structure after depositing ohmic metal in the ohmic regions of the E-mode and D-mode regions in Embodiment 1 of the present invention;

[0024] Figure 5 This is a schematic diagram of the structure after the deposition of the medium layer in Embodiment 1 of the present invention;

[0025] Figure 6 This is a schematic diagram of the structure after the isolation structure is formed in Embodiment 1 of the present invention;

[0026] Figure 7 This is a schematic diagram of the structure after depositing gate metal in the gate regions of the E-mode and D-mode regions in Embodiment 1 of the present invention;

[0027] Figure 8 This is a schematic diagram of the structure after opening a window in the dielectric layer in Embodiment 1 of the present invention;

[0028] Figure 9 This is a schematic diagram of the structure of a nitrogen-polar GaN-based E / D integrated device formed in Embodiment 1 of the present invention;

[0029] Figure 10 This is a schematic diagram of a heterojunction HEMT epitaxial structure based on nitrogen polar GaN provided in Embodiment 2 of the present invention;

[0030] Figure 11 This is a schematic diagram of the structure after etching away the mask layer, all cap layers, and part of the channel layer in Embodiment 2 of the present invention to remove the ohmic regions of the E-mode region and the D-mode region;

[0031] Figure 12 This is a schematic diagram of the structure of GaN after secondary epitaxy and removal of the secondary epitaxial mask in Embodiment 2 of the present invention;

[0032] Figure 13 This is a schematic diagram of the structure after etching away part of the cap layer in the D-mode region and the E-mode non-gate region in Embodiment 2 of the present invention;

[0033] Figure 14 This is a schematic diagram of the structure after the deposition of the medium layer in Embodiment 2 of the present invention;

[0034] Figure 15 This is a schematic diagram of the structure after the isolation structure is formed in Embodiment 2 of the present invention;

[0035] Figure 16 This is a schematic diagram of the structure after depositing gate metal in the gate regions of the E-mode and D-mode regions in Embodiment 2 of the present invention;

[0036] Figure 17 This is a schematic diagram of the structure after opening a window in the dielectric layer in Embodiment 2 of the present invention;

[0037] Figure 18 This is a schematic diagram of the structure of a nitrogen-polar GaN-based E / D integrated device formed in Embodiment 2 of the present invention. Detailed Implementation

[0038] In view of the shortcomings of the prior art, the inventors of this invention, through long-term research and extensive practice, have proposed the technical solution of this invention. The following will further explain and illustrate this technical solution, its implementation process, and its principles.

[0039] The first aspect of this invention provides a method for fabricating a nitrogen-polar GaN-based E / D integrated device, comprising:

[0040] A nitrogen-polar epitaxial structure is fabricated, comprising a barrier layer, a channel layer, and a cap layer stacked sequentially along the longitudinal direction, wherein the cap layer is capable of depleting the two-dimensional electron gas in the channel layer located below it.

[0041] A D-mode region, an E-mode region, and an isolation region are defined on the epitaxial structure. The isolation region is distributed around the D-mode region and the E-mode region. The D-mode region includes a first ohmic region and a first gate region. The E-mode region includes a second ohmic region and a second gate region.

[0042] At least a portion of the cap layer of the D-mode region and the E-mode region, excluding the second gate region, is removed to restore the two-dimensional electron gas of the D-mode region and the E-mode region, excluding the second gate region.

[0043] Remove a portion of the channel layer located in the first ohmic region and the second ohmic region, or remove all the cap layer and a portion of the channel layer located in the first ohmic region and the second ohmic region, and fabricate a first ohmic electrode on the channel layer in the first ohmic region and a second ohmic electrode on the channel layer in the second ohmic region, respectively, and make the first ohmic electrode and the second ohmic electrode electrically connected to the two-dimensional electron gas in the channel layer.

[0044] An isolation structure is formed in the isolation region, and a first gate is formed in the first gate region and a second gate is formed in the second gate region. The first gate, the first ohmic electrode and the epitaxial structure cooperate to form a D-mode device, and the second gate, the second ohmic electrode and the epitaxial structure cooperate to form an E-mode device. The E-mode device is an enhancement-mode device.

[0045] In a typical implementation, the fabrication method of the nitrogen-polar GaN-based E / D integrated device includes: removing a portion of the cap layer of the D-mode region and the E-mode region excluding the second gate region, and thinning the cap layer to restore the two-dimensional electron gas of the D-mode region and the E-mode region excluding the second gate region.

[0046] In another typical embodiment, the fabrication method of the nitrogen-polar GaN-based E / D integrated device includes: removing all cap layers from the D-mode region and the E-mode region except for the second gate region, to restore the two-dimensional electron gas in the D-mode region and the E-mode region except for the second gate region.

[0047] Furthermore, the preparation method includes, but is not limited to, fabricating nitrogen-polar epitaxial structures using processes such as metal-organic chemical vapor deposition (MOCVD).

[0048] Furthermore, the material of the channel layer includes GaN, but is not limited to this.

[0049] Furthermore, the material of the barrier layer includes any one or a combination of two or more of AlGaN-based materials, AlInN-based materials, and AlInGaN-based materials, but is not limited thereto.

[0050] Furthermore, the material of the cap layer includes any one or a combination of two or more of AlGaN-based materials, AlInN-based materials, AlInGaN-based materials, and AlN-based materials, but is not limited thereto.

[0051] Furthermore, the preparation method includes: depositing ohmic metal in the first ohmic region and the second ohmic region, and subjecting the ohmic metal to high-temperature annealing treatment to form ohmic contact between the ohmic metal and the channel layer, thereby forming the first ohmic electrode and the second ohmic electrode. The ohmic metal can be a metal system such as Ti / Al / Ni / Au, Ti / Al / Ti / Au, Ti / Al / Pt / Au, etc., which can form ohmic contact with GaN, and the thickness of each metal layer can be adjusted.

[0052] Of course, the ohmic contact in the embodiments of the present invention is achieved through high-temperature annealing of the metal, or it can be achieved by secondary epitaxial n+ technology or by ion implantation of Si ions to form an n-type layer. Any technology for achieving GaN ohmic contacts is included within the scope of protection of the present invention. A first ohmic electrode and a second ohmic electrode can be fabricated on the ohmic contact layer after secondary epitaxial heavy doping in the first ohmic region and the second ohmic region. Furthermore, the first ohmic region and the second ohmic region can extend to the barrier layer, and side contact between the metal or secondary epitaxial heavy doped region and the channel region is also possible.

[0053] Furthermore, the gate metals forming the first gate and the second gate can be metal systems such as Ni / Au, Ni / Pt / Au, and Ni / Pt that can form Schottky contacts with the barrier layer, and the thickness of each layer in the gate metal can also be adjusted.

[0054] In a typical implementation, the fabrication method of the nitrogen-polar GaN-based E / D integrated device includes: ion implantation of the isolation region to transform at least a portion of the epitaxial structure located in the isolation region into an ion-implanted region electrically isolated from the rest, and using the ion-implanted region as the isolation structure; or, at least a portion of the epitaxial structure located in the isolation region is removed to form a trench structure in the isolation region, and using the trench structure as the isolation structure.

[0055] Furthermore, the isolation structure extends at least longitudinally along the epitaxial structure into the barrier layer, and isolates the two electrically isolated portions of the barrier layer.

[0056] Furthermore, the ions used for ion implantation can be N ions, and of course, other ions that can achieve isolation of GaN devices are included within the scope of protection of this invention.

[0057] In a typical embodiment, the epitaxial structure further includes an n-type doped layer, comprising a first n-type doped layer and a second n-type doped layer stacked sequentially, with a barrier layer stacked on top of the second n-type doped layer. The Al composition in the second n-type doped layer is gradually distributed. Further, the thickness of the second n-type doped layer can be set as needed and is not limited here. The Al composition content in the second n-type doped layer gradually increases from the first n-type doped layer towards the barrier layer. The thickness of the first n-type doped layer can be set as needed, and the material of the first n-type doped layer includes GaN, but is not limited to this. The material of the second n-type doped layer includes AlGaN, but is not limited to this. Specifically, the first n-type doped layer is a Si-doped GaN doped layer, and the second n-type doped layer is a Si-doped AlGaN doped layer. The Si doping concentration in both the GaN and AlGaN doped layers is (3~5)*e18. The thickness of the GaN doped layer is about 10 nm, and the thickness of the AlGaN doped layer is about 20 nm. The Al content in the AlGaN doped layer gradually changes from 0.05 to 0.3 from the side closest to the GaN doped layer.

[0058] It should be noted that the purpose of the n-type doped layer is to adjust the band structure near the nitrogen polar AlGaN / GaN heterojunction, so that the Fermi level is far away from the valence band, thereby avoiding the influence of hole trap near the valence band and ensuring the output of the device; the gradual change of Al composition in the second n-type doped layer can reduce the required concentration of n-type doping and avoid excessive doping to form parasitic channels.

[0059] In a typical embodiment, the nitrogen-polar epitaxial structure further includes a buffer layer stacked on a substrate, a barrier layer stacked on the buffer layer, and an isolation structure extending longitudinally into the buffer layer along the epitaxial structure.

[0060] Furthermore, the buffer layer includes a doped high-resistivity layer and an undoped layer stacked together. The specific thickness and structure of the doped high-resistivity layer and the undoped layer can be adjusted according to actual needs. This buffer layer can improve the breakdown voltage of the device and enhance the performance of E-mode and D-mode devices.

[0061] Furthermore, the buffer layer material includes any one or a combination of two or more of GaN, AlGaN-based, AlInN-based, AlInGaN-based, and AlN-based materials, but is not limited thereto. Even further, the doped atoms of the high-resistivity layer include Fe atoms and / or C atoms, with a doping concentration of 1e*18 to 2e*19, and the thickness of the undoped layer is 50nm to 200nm. It should be noted that the undoped layer is used to separate the high-resistivity layer from the overlying first barrier layer, preventing doped atoms (such as Fe) in the high-resistivity layer from diffusing into the channel due to the memory effect during epitaxy, thus affecting device performance. If there is no high-resistivity layer, the undoped layer is not required. Additionally, it should be noted that this buffer layer is not essential depending on the epitaxial growth conditions.

[0062] Furthermore, the substrate includes a silicon substrate, a sapphire substrate, a silicon carbide substrate, or a composite substrate formed from two or more of silicon substrate, sapphire, and silicon carbide, but is not limited thereto.

[0063] In a typical implementation, the fabrication method of the nitrogen-polar GaN-based E / D integrated device further includes: forming a dielectric layer in the first gate region and the second gate region of the epitaxial structure, wherein the first gate and the second gate are disposed on the dielectric layer.

[0064] Furthermore, the material of the dielectric layer includes at least one or a combination of two or more of Al2O3, SiN, SiO2, HfO2, and La2O3, but is not limited thereto.

[0065] In a typical embodiment, the fabrication method of the nitrogen-polar GaN-based E / D integrated device further includes: forming the dielectric layer over the entire area of ​​the top surface of the epitaxial structure, the dielectric layer also covering the first ohmic electrode and the second ohmic electrode; and forming windows on the dielectric layer to expose the first ohmic electrode and the second ohmic electrode, respectively, and fabricating metal pads electrically connected to the first ohmic electrode and the second ohmic electrode, respectively.

[0066] Furthermore, the preparation method includes: removing a portion of the dielectric layer using processes such as dry etching or wet etching, thereby forming the window.

[0067] A second aspect of the present invention provides a nitrogen-polar GaN-based E / D integrated device obtained by the fabrication method of the nitrogen-polar GaN-based E / D integrated device.

[0068] This invention proposes to intrinsically realize GaN-based enhancement-mode devices from the epitaxial structure level using a nitrogen polar double heterojunction structure. This invention can effectively avoid processes such as etching or ion implantation in the gate region of E-mode devices in E / D integration, thereby improving the performance and stability of E-mode devices.

[0069] The following explanation uses nitrogen-polar GaN-HEMT as an example, along with accompanying drawings and specific implementation examples, to further illustrate the technical solution, its implementation process, and principles. Unless otherwise specified, the epitaxial growth, etching, ion implantation, and other equipment and processes used in the embodiments of this invention are all known in the art and will not be specifically described here.

[0070] Example 1

[0071] A method for fabricating an E / D integrated device based on full etching of a nitrogen-polar AlN cap layer includes the following steps:

[0072] 1) Heterojunction HEMT epitaxial structures oriented towards nitrogen-polar GaN-E / D integration are epitaxially grown using MOCVD (organic metal chemical vapor deposition) technology, such as... Figure 1 As shown, the HEMT epitaxial structure includes a buffer layer, an AlGaN barrier layer, a GaN channel layer, and an AlN cap layer sequentially stacked on a substrate; the thickness of the AlGaN barrier layer is 10nm to 40nm, and the Al content is 0.3%; the thickness of the GaN channel layer is 20nm to 100nm, preferably 20nm to 30nm; and the thickness of the AlN cap layer is 3nm to 10nm.

[0073] 2) Define a D-mode region, an E-mode region, and an isolation region on the HEMT epitaxial structure. The isolation region is disposed laterally along the epitaxial structure between the D-mode region, the E-mode region, and adjacent E / D integrated devices. The D-mode region includes a first ohmic region and a first gate region. The E-mode region includes a second ohmic region and a second gate region.

[0074] Using photoresist (e.g., AZ5214) as a mask (1 μm to 2 μm thick), the AlN cap layer in the entire D-mode region and the non-gate region (i.e., the region of the E-mode region excluding the second gate region) is etched away using ICP slow etching. This recovers the two-dimensional electron gas in the entire D-mode region and the non-gate region of the E-mode, thereby achieving E-mode enhancement mode. Figure 2 As shown.

[0075] It should be noted that the first ohmic region includes a first source region and a first drain region, and the first gate region is located between the first source region and the first drain region. The second ohmic region includes a second source region and a second drain region, and the second gate region is located between the second source region and the second drain region.

[0076] 3) Using photoresist (e.g., AZ5214) as a mask (1μm–2μm thick), the GaN channel layer with a thickness of 0nm–10nm is etched away using ICP slow etching to remove the first ohmic region of the D-mode region and the second ohmic region of the E-mode region. Figure 3 As shown.

[0077] 4) Ohmic metal Ti / Al / Ni / Au is deposited in the first ohmic region of the D-mode region and the second ohmic region of the E-mode region using electron beam evaporation. The thicknesses of Ti / Al / Ni / Au are 20nm / 100nm / 50nm / 50nm, respectively, to electrically connect the ohmic metal with the two-dimensional electron gas within the GaN channel layer. Subsequently, it is annealed at a high temperature of 810℃~890℃ for 15s~60s using an RTP (Rapid Retardation Processing) furnace. Figure 4 As shown, the ohmic metal formed in the first ohmic region of the D-mode region serves as the first source and the first drain, and the ohmic metal formed in the second ohmic region of the E-mode region serves as the second source and the second drain.

[0078] 5) Al2O3 was deposited on the top surface of the epitaxial structure using ALD (Atom Layer Deposition) as the dielectric layer for the E-mode and D-mode gate regions. The thickness of the Al2O3 dielectric layer was 2 nm to 50 nm. Figure 5 As shown. Further, the Al2O3 dielectric layer is subjected to post-annealing treatment in an N2 atmosphere at a temperature of 300℃ to 500℃ for a time of 1 min to 20 min, preferably 1 min to 3 min, to reduce the interface states at the interface between the dielectric and the semiconductor, thereby improving the dynamic characteristics of the device.

[0079] 6) Nitrogen ions were implanted into the isolation region of the epitaxial structure using nitrogen ion implantation. The implantation energy was 20 keV to 400 keV, and the implantation dose was 10. 12 / cm 2 ~10 14 / cm 2 The injection depth is approximately 50nm to 250nm into the buffer layer, thereby forming an isolation structure, such as... Figure 6 As shown.

[0080] 7) Electron beam evaporation is used to deposit Ni / Au gate metal on the dielectric layers of the first and second gate regions. The Ni / Au thicknesses are 50nm and 300nm, respectively, thus forming the first gate in the first gate region and the second gate in the second gate region. The first gate is located above the GaN channel layer, and the second gate is located above the AlN cap layer. Figure 7 As shown.

[0081] 8) Using photoresist (e.g., AZ5214) as a mask, ICP plasma etching is used to remove a portion of the Al2O3 dielectric layer covering the first source, first drain, second source, and second drain, thereby achieving windowing at the source and drain ends in E-mode and D-mode. Figure 8 As shown.

[0082] 9) Electron beam evaporation is used to deposit pad metal Ti / Au on the exposed first source, first drain, second source, and second drain. The thickness of Ti / Au is 20nm / 200nm. This completes the entire device fabrication process, and the resulting device structure is as follows. Figure 9 As shown.

[0083] Example 2

[0084] A method for fabricating an E / D integrated device based on partial etching of the nitrogen-polar AlN cap layer and secondary epitaxy in the ohmic region includes the following steps:

[0085] 1) Heterojunction HEMT epitaxial structures oriented towards nitrogen-polar GaN-E / D integration are epitaxially grown using MOCVD (organic metal chemical vapor deposition) technology, such as... Figure 10 As shown, the HEMT epitaxial structure includes a buffer layer AlGaN barrier layer, a GaN channel layer, and an AlN cap layer sequentially stacked on a substrate. The thickness of the AlGaN barrier layer is 10nm to 40nm, and the Al content is 0.3%. The thickness of the GaN channel layer is 20nm to 100nm, and the thickness of the AlN cap layer is 3nm to 10nm.

[0086] 2) A silicon oxide layer is grown on the HEMT epitaxial structure as a secondary epitaxial mask. Then, using a photoresist (e.g., AZ5214) as an etching mask, ICP slow etching is used to etch away the oxide layers of the first ohmic region in the D-mode region, the second ohmic region in the E-mode region, the entire AlN cap layer, and the GaN channel layer with a thickness of 5nm to 10nm. Figure 11 As shown.

[0087] 3) Using a secondary epitaxial growth technique, n+(In)GaN material is deposited in the first ohmic region of the D-mode region and the second ohmic region of the E-mode region, connecting the n+(In)GaN with the two-dimensional electron gas within the GaN channel layer. Then, all silicon oxide layers are removed using hydrofluoric acid. Figure 12 As shown.

[0088] 4) A D-mode region, an E-mode region, and an isolation region are defined in the HEMT epitaxial structure. The isolation region is distributed around the D-mode region and the E-mode region. The D-mode region includes a first ohmic region and a first gate region. The E-mode region includes a second ohmic region and a second gate region.

[0089] Using photoresist (e.g., AZ5214) as a mask, a 1nm-2nm thick AlN cap layer is etched away from the non-gate regions (i.e., the E-mode region excluding the second gate region) in the D-mode and E-mode regions using ICP slow etching. This thinning of the AlN cap layer in these regions restores the two-dimensional electron gas in the non-gate regions of the D-mode and E-mode regions, thereby achieving E-mode enhancement. Figure 13 As shown.

[0090] It should be noted that the first ohmic region includes a first source region and a first drain region, and the first gate region is located between the first source region and the first drain region. The second ohmic region includes a second source region and a second drain region, and the second gate region is located between the second source region and the second drain region.

[0091] 5) Al2O3 is deposited as a dielectric layer on the surface of the epitaxial structure using ALD (Atomic Layer Deposition). The thickness of the Al2O3 dielectric layer is 2nm to 50nm. Figure 14 As shown. Further, the Al2O3 dielectric layer was post-annealed in an N2 atmosphere at a temperature of 200℃ to 400℃ for 2 min to 10 min.

[0092] 6) Nitrogen ions were implanted into the isolation region of the epitaxial structure using nitrogen ion implantation. The implantation energy was 20 keV to 400 keV, and the implantation dose was 10. 12 / cm 2 ~10 14 / cm 2 The injection depth is approximately 50nm to 250nm into the buffer layer, thereby forming an isolation structure, such as... Figure 15 As shown.

[0093] 7) Electron beam evaporation is used to deposit gate metal Ni / Au on the dielectric layers of the first gate region and the second gate region. The Ni / Au thickness is 50nm / 300nm, thereby forming the first gate in the first gate region and the second gate in the second gate region. Figure 16 As shown.

[0094] 8) Using photoresist (e.g., AZ5214) as a mask, partially remove the Al2O3 dielectric layer covering the first source, first drain, second source, second drain, first gate, and second gate by ICP plasma etching, thereby achieving windowing at the source / drain and gate terminals in E-mode and D-mode, such as... Figure 17 As shown.

[0095] 9) By depositing ohmic metal Ti / Au = 50 / 100nm in the first ohmic region of the D-mode region and the second ohmic region of the E-mode region using photoresist, an ohmic contact is formed between the metal and n+(In)GaN, such as... Figure 1 As shown in Figure 8.

[0096] This invention provides a method for fabricating a nitrogen-polar GaN-based E / D integrated device. It innovatively utilizes a nitrogen-polar double heterojunction to intrinsically obtain a GaN-based enhancement-mode device at the epitaxial structure level, and then achieves GaN-based E / D integration through subsequent processes. Furthermore, this method eliminates the need for etching or ion implantation of the gate region, resulting in a more stable threshold voltage for the enhancement-mode device during E / D integration and improved device reliability. Additionally, the threshold voltage of the enhancement-mode device can be directly controlled by adjusting the Al composition and thickness in the cap layer. Moreover, in this nitrogen-polar GaN-based E / D integrated device, for the nitrogen-polar epitaxial structure, the barrier layer is located below the channel layer; therefore, etching of the cap layer does not affect the barrier layer. Consequently, the 2DEG in both D-mode and E-mode devices is minimally affected by etching, thus ensuring the performance of both E-mode and D-mode devices.

[0097] It should be understood that the above embodiments are merely illustrative of the technical concept and features of the present invention, and are intended to enable those skilled in the art to understand the content of the present invention and implement it accordingly. They should not be construed as limiting the scope of protection of the present invention. All equivalent changes or modifications made in accordance with the spirit and essence of the present invention should be covered within the scope of protection of the present invention.

Claims

1. A method for fabricating a nitrogen-polar GaN-based E / D integrated device, characterized in that, include: A nitrogen-polar epitaxial structure is fabricated, comprising a barrier layer, a channel layer, and a cap layer stacked sequentially along the longitudinal direction, wherein the cap layer is capable of depleting the two-dimensional electron gas in the channel layer located below it. A D-mode region, an E-mode region, and an isolation region are defined on the epitaxial structure. The isolation region is distributed around the D-mode region and the E-mode region. The D-mode region includes a first ohmic region and a first gate region. The E-mode region includes a second ohmic region and a second gate region. At least a portion of the cap layer of the D-mode region and the E-mode region, excluding the second gate region, is removed to restore the two-dimensional electron gas of the D-mode region and the E-mode region, excluding the second gate region. Remove a portion of the channel layer located in the first ohmic region and the second ohmic region, or remove all the cap layer and a portion of the channel layer located in the first ohmic region and the second ohmic region, and fabricate a first ohmic electrode on the channel layer in the first ohmic region and a second ohmic electrode on the channel layer in the second ohmic region, respectively, and make the first ohmic electrode and the second ohmic electrode electrically connected to the two-dimensional electron gas in the channel layer. An isolation structure is formed in the isolation region, and a first gate is formed in the first gate region and a second gate is formed in the second gate region. The first gate, the first ohmic electrode and the epitaxial structure cooperate to form a D-mode device, and the second gate, the second ohmic electrode and the epitaxial structure cooperate to form an E-mode device. The E-mode device is an enhancement-mode device.

2. The method for fabricating the nitrogen-polar GaN-based E / D integrated device according to claim 1, characterized in that, include: By removing a portion of the cap layer in the D-mode region and the E-mode region excluding the second gate region, and by thinning the thickness of the cap layer, the two-dimensional electron gas in the D-mode region and the E-mode region excluding the second gate region is restored.

3. The method for fabricating the nitrogen-polar GaN-based E / D integrated device according to claim 1, characterized in that, include: Remove all cap layers from the D-mode region and the E-mode region except for the second gate region to restore the two-dimensional electron gas in the D-mode region and the E-mode region except for the second gate region.

4. The method for fabricating the nitrogen-polar GaN-based E / D integrated device according to claim 1, 2, or 3, characterized in that: The channel layer is made of GaN; Preferably, the material of the barrier layer includes any one or a combination of two or more of AlGaN-based materials, AlInN-based materials, AlInGaN-based materials, and AlN-based materials. Preferably, the material of the cap layer includes any one or a combination of two or more of AlGaN-based materials, AlInN-based materials, AlInGaN-based materials, and AlN-based materials.

5. The method for fabricating the nitrogen-polar GaN-based E / D integrated device according to claim 1, characterized in that, include: Ion implantation is performed on the isolation region to transform at least a portion of the epitaxial structure located in the isolation region into an ion-implanted region electrically isolated from the rest, and the ion-implanted region serves as the isolation structure; or, at least a portion of the epitaxial structure located in the isolation region is removed to form a trench structure in the isolation region, and the trench structure serves as the isolation structure.

6. The method for fabricating the nitrogen-polar GaN-based E / D integrated device according to claim 1, characterized in that: The nitrogen-polar epitaxial structure further includes a buffer layer, which is stacked on a substrate, and a barrier layer is stacked on the buffer layer. The isolation structure extends longitudinally into the buffer layer along the epitaxial structure. Preferably, the substrate includes any one of a silicon substrate, a sapphire substrate, and a silicon carbide substrate, or the substrate is a composite substrate formed from two or more of a silicon substrate, sapphire, and silicon carbide.

7. The method for fabricating the nitrogen-polar GaN-based E / D integrated device according to claim 6, characterized in that: The buffer layer comprises a doped high-resistivity layer and an undoped layer stacked together.

8. The method for fabricating the nitrogen-polar GaN-based E / D integrated device according to claim 1, characterized in that, Also includes: A dielectric layer is formed in the first gate region and the second gate region of the epitaxial structure, and the first gate and the second gate are disposed on the dielectric layer; Preferably, the material of the dielectric layer includes at least one or a combination of two or more of Al2O3, AlN, SiN, SiO2, HfO2, and La2O3.

9. The method for fabricating the nitrogen-polar GaN-based E / D integrated device according to claim 8, characterized in that, Also includes: The dielectric layer is formed over the entire area of ​​the top surface of the epitaxial structure, the dielectric layer also covering the first ohmic electrode and the second ohmic electrode, and windows exposing the first ohmic electrode and the second ohmic electrode are respectively formed on the dielectric layer, and metal pads electrically connected to the first ohmic electrode and the second ohmic electrode are respectively fabricated.

10. A nitrogen-polar GaN-based E / D integrated device obtained by the fabrication method of any one of claims 1-9.

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