Test method, medium and product for output board card channel and input board card channel

Abstract

The embodiment of the application provides a kind of output board card passage and input board card passage test method, medium and product, it is related to board card test technical field;Output channel of output board card and input channel of input board card are electrically connected, the processor of output board card, by determining channel test data, and then according to channel test data, channel test signal is input to the multiple output channels of output board card;The processor of input board card, by reading input channel state;Input channel state is the channel state of the multiple input channels corresponding to the multiple output channels of output board card in input board card;And then according to input channel state, drive the nixie tube display channel test result of input board card;Wherein, channel test result is used to indicate whether multiple output channels and corresponding multiple input channels exist fault.

Description

Technical Field

[0001] This application relates to the field of circuit board testing technology, and in particular to a testing method, medium and product for output circuit board channels and input circuit board channels. Background Technology

[0002] In scenarios such as industrial automation, intelligent manufacturing, power systems, rail transportation, and intelligent manufacturing, output boards and input boards are responsible for the functions of acquiring equipment status and outputting control signals.

[0003] In existing technologies, external instruments (such as multimeters and logic analyzers) are typically used to test the continuity of each channel on the board in order to perform channel testing on output and input boards.

[0004] However, existing solutions suffer from low efficiency in board channel testing. Summary of the Invention

[0005] The test methods, media, and products for output and input board channels provided in this application are intended to solve the problem of low testing efficiency for board channels.

[0006] In a first aspect, embodiments of this application provide a testing method for output board channels and input board channels, applied to a processor of an output board, wherein the output channels of the output board and the input channels of the input board are electrically connected accordingly; the method includes: determining channel test data; inputting channel test signals to multiple output channels of the output board according to the channel test data, so that the processor of the input board reads the input channel status; the input channel status is the channel status of multiple input channels in the input board corresponding to the multiple output channels, and causing the processor of the input board to drive the digital tube of the input board to display the channel test results according to the input channel status; wherein the channel test results are used to indicate whether there is a fault in the multiple output channels and the corresponding multiple input channels.

[0007] In this application, the output channels of the output board are electrically connected to the corresponding input channels of the input board. The processor of the output board determines the channel test data and then inputs the channel test signal to the multiple output channels of the output board based on the channel test data. The processor of the input board reads the input channel status, which is the channel status of the multiple input channels in the input board that correspond to the multiple output channels of the output board. Based on the input channel status, the processor drives the digital tube of the input board to display the channel test results. The channel test results are used to indicate whether there is a fault in the multiple output channels and the corresponding multiple input channels.

[0008] Optionally, in the method described above, the step of inputting the channel test signal to the multiple output channels of the output board according to the channel test data includes: dividing the multiple output channels into multiple output channel groups according to the number of output channels of the output board; wherein, each output channel group includes at least one output channel; and sequentially inputting the channel test signal to the output channel in each of the output channel groups according to the channel test data and a preset test order.

[0009] In this application, by dividing all output channels into multiple groups and applying channel test signals to each group in a preset order, sequential control of the channel testing process is achieved. This method transforms large-scale parallel testing into time-division multiplexing, avoiding problems such as excessive instantaneous power consumption, signal crosstalk, or bus conflicts that may be caused by all channels operating simultaneously. Group testing simplifies the synchronization identification logic of the input board for the input channel status, enabling it to accurately correspond the input channel status with the current test group, thereby achieving orderly, reliable, and easily verifiable channel continuity testing in multi-channel testing.

[0010] Optionally, in the method described above, determining the channel test data includes: acquiring board test environment data; determining the signal strength, signal frequency, or test duration of the channel test signal based on the board test environment data; and generating the channel test data based on the signal strength, signal frequency, or test duration of the channel test signal.

[0011] This application acquires real-time board testing environment data, such as temperature and vibration, from the output board and dynamically adjusts the signal strength, frequency, or duration of the channel test signals based on this data. This incorporates environmental variables into the channel test data generation process, enabling the channel test data to adapt to different operating conditions. For example, signal strength is enhanced to compensate for attenuation in high-temperature environments, and test duration is extended or sampling frequency is increased to resist transient interference in vibration environments. This makes the generated channel test data environmentally adaptable, improving the accuracy and reliability of channel testing for both output and input boards under different operating conditions, and reducing the risk of misjudgments caused by environmental factors.

[0012] Secondly, embodiments of this application provide a testing method for output board channels and input board channels, applied to a processor of an input board, wherein the input channels of the input board are electrically connected to the output channels of the output board; the method includes: reading the input channel status; the input channel status being the channel status of multiple input channels in the input board corresponding to multiple output channels of the output board; and driving the digital tube of the input board to display the channel test results based on the input channel status; wherein the channel test results are used to indicate whether there is a fault in the multiple output channels and the corresponding multiple input channels.

[0013] In this application, the output channels of the output board are electrically connected to the corresponding input channels of the input board. The processor of the output board determines the channel test data and then inputs the channel test signal to the multiple output channels of the output board based on the channel test data. The processor of the input board reads the input channel status, which is the channel status of the multiple input channels in the input board that correspond to the multiple output channels of the output board. Based on the input channel status, the processor drives the digital tube of the input board to display the channel test results. The channel test results are used to indicate whether there is a fault in the multiple output channels and the corresponding multiple input channels.

[0014] Optionally, in the method described above, driving the digital tube display of the input board to display the channel test results according to the input channel state includes: determining whether the level state of each input channel is high or low according to the input channel state; if the level state of the input channel is high, driving the corresponding segment code of the digital tube to display; and / or, if the level state of the input channel is low, driving the corresponding segment code of the digital tube not to display.

[0015] In this application, the intuitive visualization of channel test results is achieved by directly associating the level state of each input channel with the specific segment code display of the digital tube. A high level drives the corresponding segment code to light up, while a low level turns it off, so that the on / off state of the channel can be mapped in real time and accurately to the complete or missing strokes of the "8." graphic on the digital tube, thereby converting the abstract electrical signal into an easily observable graphical fault indication.

[0016] Optionally, the method described above, after the step of driving the corresponding segment code of the digital tube not to be displayed if the level state of the input channel is low, further includes: determining the channel position code of the input channel based on the low level state of the input channel; sending one or more of the channel position codes to the terminal device, so that the display unit of the terminal device displays the channel position codes, and so that the terminal device outputs a channel fault prompt tone with corresponding frequency and / or volume through the audio input / output unit according to the number of channel position codes.

[0017] In this application, when the input channel is at a low level, its channel position code is determined and sent to the terminal device, enabling the display unit to directly display the specific faulty channel. Simultaneously, based on the received number of codes, the terminal device controls the audio unit to output a corresponding frequency and / or volume prompt tone, converting the fault quantity information into a perceptible audio signal. This process converts the channel level state into displayable coded information and audible audio signals, allowing users to simultaneously locate the faulty channel and its quantity through both visual and auditory means. This enhances the intuitiveness of fault location and remote monitoring capabilities, improving the accuracy and efficiency of fault identification.

[0018] Thirdly, embodiments of this application provide a testing device for output board channels and input board channels, applied to the processor of an output board, wherein the output channels of the output board and the input channels of the input board are correspondingly electrically connected; including:

[0019] The determination module is used to determine the channel test data;

[0020] The output module is used to input channel test signals to multiple output channels of the output board according to the channel test data, so that the processor of the input board can read the input channel status; the input channel status is the channel status of multiple input channels in the input board corresponding to the multiple output channels, and the processor of the input board drives the digital tube of the input board to display the channel test results according to the input channel status; wherein, the channel test results are used to indicate whether there is a fault in the multiple output channels and the corresponding multiple input channels.

[0021] Optionally, in the apparatus described above, when the output module inputs the channel test signal to the multiple output channels of the output board according to the channel test data, it is specifically used to: divide the multiple output channels into multiple output channel groups according to the number of output channels of the output board; wherein, each output channel group includes at least one output channel; and input the channel test signal sequentially to the output channel in each of the output channel groups according to the channel test data and a preset test order.

[0022] Optionally, in the apparatus described above, the determining module, when determining the channel test data, is specifically configured to: acquire board test environment data; determine the signal strength, signal frequency, or test duration of the channel test signal based on the board test environment data; and generate the channel test data based on the signal strength, signal frequency, or test duration of the channel test signal.

[0023] Fourthly, embodiments of this application provide a testing device for output board channels and input board channels, applied to the processor of an input board, wherein the input channels of the input board and the output channels of the output board are correspondingly electrically connected; including:

[0024] The reading module is used to read the input channel status; the input channel status refers to the channel status of the multiple input channels in the input board that correspond to the multiple output channels of the output board.

[0025] The driving module is used to drive the digital tube display of the input board to display the channel test results according to the input channel status; wherein the channel test results are used to indicate whether there is a fault in the multiple output channels and the corresponding multiple input channels.

[0026] Optionally, in the device described above, when the driving module drives the digital tube of the input board to display the channel test results according to the input channel status, it is specifically used to: determine whether the level state of each input channel is high or low according to the input channel status; if the level state of the input channel is high, drive the corresponding segment code of the digital tube to display; and / or, if the level state of the input channel is low, drive the corresponding segment code of the digital tube not to display.

[0027] Optionally, in the apparatus described above, after the step of driving the corresponding segment code of the digital tube not to be displayed if the level state of the input channel is low, the driving module is further configured to: determine the channel position code of the input channel based on the low level state of the input channel; send one or more of the channel position codes to the terminal device, so that the display unit of the terminal device displays the channel position codes, and so that the terminal device outputs a channel fault prompt tone with corresponding frequency and / or volume through the audio input / output unit according to the number of channel position codes.

[0028] Fifthly, embodiments of this application provide an electronic device, including: a memory and a processor;

[0029] The memory stores computer-executed instructions;

[0030] The processor executes computer execution instructions stored in the memory, causing the processor to perform the first aspect and / or various possible implementations of the first aspect, or the second aspect and / or various possible implementations of the second aspect.

[0031] Sixthly, embodiments of this application provide a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, are used to implement the first aspect and / or various possible implementations of the first aspect, or the second aspect and / or various possible implementations of the second aspect.

[0032] In a seventh aspect, embodiments of this application provide a computer program product, including a computer program that, when executed by a processor, implements the first aspect and / or various possible implementations of the first aspect, or the second aspect and / or various possible implementations of the second aspect.

[0033] The present application provides a testing method, medium, and product for output and input card channels. The output channels of the output card are electrically connected to the corresponding input channels of the input card. The processor of the output card determines channel test data and then inputs channel test signals to the multiple output channels of the output card based on the channel test data. The processor of the input card reads the input channel status, which is the channel status of the multiple input channels in the input card corresponding to the multiple output channels of the output card. Based on the input channel status, the processor drives the digital tube of the input card to display the channel test results. The channel test results are used to indicate whether there are faults in the multiple output channels and their corresponding multiple input channels. Attached Figure Description

[0034] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0035] Figure 1 A schematic diagram illustrating the test method for the output and input channels of the card provided in this application;

[0036] Figure 2 A flowchart illustrating a testing method for output and input board channels provided in one embodiment of this application;

[0037] Figure 3 A flowchart illustrating a testing method for output and input board channels provided in another embodiment of this application;

[0038] Figure 4 A schematic diagram of a digital tube display based on the level state of the input channel provided in an embodiment of this application;

[0039] Figure 5 A schematic diagram of the structure of a test device for output and input card channels provided in one embodiment of this application. Figure 1 ;

[0040] Figure 6 A schematic diagram of the structure of a test device for output and input card channels provided in one embodiment of this application. Figure 2 ;

[0041] Figure 7 A schematic diagram of the structure of the electronic device provided in this application.

[0042] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0043] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0044] In industrial automation, intelligent manufacturing, power systems, rail transportation, and other scenarios, output and input boards are responsible for acquiring equipment status and outputting control signals. Current technologies typically employ external instruments (e.g., multimeters, logic analyzers) to individually test the continuity of each channel on the board, thus performing channel testing on the output and input boards. However, existing solutions suffer from low efficiency in board channel testing.

[0045] To address the aforementioned technical problems, this application proposes the following technical concept: The output board processor automatically generates and outputs channel test signals to all output channels, driving the input board to synchronously read the corresponding input channel status, and directly displays the comprehensive test results via a digital tube. This integrates multi-channel testing between the output and input boards, replacing manual point-by-point measurements with external instruments, reducing manual operation and instrument dependence, and improving testing efficiency. In other words, it solves the problem of low channel testing efficiency in existing solutions where external instruments (e.g., multimeters, logic analyzers) are used to individually test the continuity of each channel on the board.

[0046] The application scenarios of the embodiments of this application are explained below:

[0047] Figure 1 A schematic diagram illustrating the test method for the output and input channels of the card provided in this application is shown below. Figure 1As shown, the output channels of the output board are electrically connected to the corresponding input channels of the input board. The processor of the output board determines the channel test data and then inputs the channel test signal to the multiple output channels of the output board based on the channel test data. The processor of the input board reads the input channel status, which is the channel status of the multiple input channels in the input board that correspond to the multiple output channels of the output board. Based on the input channel status, the processor drives the digital tube of the input board to display the channel test results. The channel test results are used to indicate whether there is a fault in the multiple output channels and the corresponding multiple input channels.

[0048] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will be described below with reference to the accompanying drawings.

[0049] Figure 2 A flowchart illustrating a testing method for output and input board channels provided in one embodiment of this application is shown below. Figure 2 As shown, the testing method for output and input card channels provided in this embodiment is applied to the processor of the output card, where the output channel of the output card and the input channel of the input card are electrically connected accordingly. The testing method for output and input card channels provided in this embodiment includes the following steps:

[0050] Step S201: Determine the channel test data.

[0051] Step S202: Based on the channel test data, input the channel test signal to the multiple output channels of the output board so that the processor of the input board can read the input channel status. The input channel status is the channel status of the multiple input channels in the input board that correspond to the multiple output channels, and the processor of the input board drives the digital tube of the input board to display the channel test results according to the input channel status.

[0052] The channel test results are used to indicate whether there are faults in the multi-output channels and the corresponding multi-input channels.

[0053] The processor of the output board is a programmable logic device on the output board; the processor of the input board is a programmable logic device on the input board; the programmable logic device is, for example, an FPGA or a CPLD; specifically, the FPGA generates channel test data and detects channel status by loading a logic circuit configuration file.

[0054] Output board, a hardware module containing multiple output channels, is used to output logic signals to external devices; for example, the 64 output channels of the output board are controlled by an FPGA to output high and low levels.

[0055] The input board contains a hardware module with multiple input channels for receiving logic signals from external devices; the 64 input channels of the input board read the external high and low level status through the FPGA.

[0056] A digital tube is a display module consisting of 7 LED segments and a decimal point. It forms characters or symbols by lighting up different segments; for example, the character "8." can be displayed by controlling the conduction state of the common cathode digital tubes of segments a to g (a total of 7 segments) and the decimal point.

[0057] For example, each output channel of the output board is directly electrically connected (through physical lines) to the corresponding input channel on the input board, forming a one-to-one test loop. The processor of the output board generates channel test data according to preset test logic or test parameters loaded from a configuration file; wherein, the channel test data defines the signal attributes of the channel test signal to be output, such as the level standard of the channel test signal (e.g., TTL high level is 3.3V), pulse width, and timing requirements of the channel test signal.

[0058] Then, based on the channel test data, a channel test signal (e.g., a continuous high-level pulse) is applied to the output channel under test synchronously or in a preset grouping order. The channel test signal is transmitted to the corresponding input channel of the input board through the physical line between the output channel of the output board and the input channel of the input board.

[0059] The processor on the input board monitors the real-time voltage levels of all its input channels. Upon receiving a channel test signal from the output board, the processor scans the ports of the input channels on the input board to read the real-time voltage level of the corresponding input channel, thus obtaining the input channel status. Then, based on the input channel status, the processor drives the onboard digital tube to display the information. Specifically, the display logic maps the status of multiple input channels (e.g., 8 channels) to specific segment codes on the digital tube (e.g., the 8 input channels correspond to segments a through g and the decimal point when displaying the number "8"). If an input channel correctly receives a high voltage level, its corresponding segment code on the digital tube lights up; if a valid high voltage level is not detected (indicating an open circuit, short circuit, or channel fault), its corresponding segment code turns off. Ultimately, the digital tube displays a complete or incomplete "8." shape, which is the intuitive channel test result, directly indicating which "output-input channel pairs" are working correctly and which "output-input channel pairs" are faulty.

[0060] Furthermore, in another possible implementation, the specific implementation steps of step S201 include:

[0061] Step S2011: Obtain board test environment data.

[0062] The circuit board testing environment data includes circuit board testing temperature data and circuit board testing vibration data.

[0063] For example, the processor of the output board acquires real-time environmental parameters of the output board through onboard sensors, i.e., board test environment data. The board test environment data includes board test temperature data (e.g., the current temperature value of the output board's operating environment or the output board chip obtained through a temperature sensor), and / or board test vibration data (e.g., the amplitude or frequency of mechanical vibration experienced by the output board obtained through an accelerometer or vibration sensor).

[0064] Step S2012: Based on the board test environment data, determine the signal strength, signal frequency, or test duration of the channel test signal.

[0065] For example, based on the board test environment data, a preset environment parameter-test parameter mapping table is matched to determine the signal strength, signal frequency, or test duration of the channel test signal. Specifically, for example, based on the board test temperature data, when the board temperature is detected to be higher than a preset temperature threshold, the drive current or voltage of the channel test signal is increased to compensate for possible signal attenuation caused by high temperature, thereby increasing the signal strength. Based on the board test vibration data, when continuous or strong vibration is detected in the external environment of the output board, the test duration of a single channel test signal is extended, or the frequency of the channel test signal is increased to perform multiple rapid sampling verifications in order to reduce the momentary misjudgment caused by poor contact between the output channel of the output board and the input channel of the input board.

[0066] Step S2013: Generate channel test data based on the signal strength, signal frequency, or test duration of the channel test signal.

[0067] For example, the dynamically adjusted parameters (signal strength, signal frequency, or test duration of the channel test signal) are summarized to generate a set of channel test data adapted to the current environmental conditions. This channel test data is then used in subsequent steps to control the output board to generate and send the corresponding channel test signals.

[0068] In this embodiment, by acquiring real-time board test environment data such as temperature and vibration of the output board, and dynamically adjusting the signal strength, signal frequency, or test duration of the channel test signals based on this data, environmental variables are introduced into the channel test data generation process, enabling the channel test data to adapt to different operating conditions. For example, signal strength is enhanced to compensate for attenuation in high-temperature environments, and test duration is extended or sampling frequency is increased to resist transient interference in vibration environments. This makes the generated channel test data environmentally adaptable, improving the accuracy and reliability of channel testing for both output and input board channels under different operating conditions, and reducing the risk of misjudgment caused by environmental factors.

[0069] Furthermore, in another possible implementation, the specific implementation steps of step S202 include:

[0070] Step S2021: Divide the multiple output channels into multiple output channel groups according to the number of output channels of the output board; wherein each output channel group includes at least one output channel.

[0071] Step S2022: Based on the channel test data and the preset test sequence, the channel test signals are sequentially input to the output channels in each output channel group.

[0072] For example, taking an output board with 64 output channels as an example, the 64 output channels are divided into 8 output channel groups according to a preset grouping strategy (e.g., arranged by physical ports or electrical isolation units), and each output channel group includes 8 consecutive output channels.

[0073] Furthermore, based on a preset test sequence, such as sequentially executing tests from group 1 to group 8, at the start of the test, firstly, according to the channel test data, only the 8 output channels in group 1 (e.g., channels 1 to 8) are simultaneously given a channel test signal (e.g., a high-level pulse), while the other 56 output channels remain in an inactive state (e.g., low level). The corresponding channels of the output board and the input board have been pre-connected physically. The processor of the input board synchronously reads the status of its 64 input channels, but at this time only the responses of the 8 input channels corresponding to the output channels of group 1 are monitored. After the test of the first group of output channels is completed and a response is obtained, the processor of the output board switches the channel test signal to the second group of output channels (channels 9 to 16) according to the preset test sequence, and repeats the above test process until the test of group 8 is completed; that is, by testing in groups sequentially, all 64 channels are tested.

[0074] In this embodiment, by dividing all output channels into multiple groups and applying channel test signals to each group in a preset order, sequential control of the channel testing process is achieved. This method transforms large-scale parallel testing into time-division multiplexing, avoiding problems such as excessive instantaneous power consumption, signal crosstalk, or bus conflicts that may be caused by all channels operating simultaneously. Group testing simplifies the synchronization identification logic of the input board for the input channel status, enabling it to accurately correspond the input channel status with the current test group, thereby achieving orderly, reliable, and easily verifiable channel continuity testing in multi-channel testing.

[0075] In this embodiment, the output channels of the output board are electrically connected to the corresponding input channels of the input board. The processor of the output board determines the channel test data and then inputs the channel test signal to the multiple output channels of the output board based on the channel test data. The processor of the input board reads the input channel status, which is the channel status of the multiple input channels in the input board that correspond to the multiple output channels of the output board. Based on the input channel status, the processor drives the digital tube of the input board to display the channel test results. The channel test results are used to indicate whether there is a fault in the multiple output channels and the corresponding multiple input channels.

[0076] Furthermore, in another possible implementation, prior to step S201, based on the corresponding electrical connection between the output channel of the output board and the input channel of the input board, the testing method for the output board channel and the input board channel provided in this application embodiment further includes:

[0077] Step S2001: Send an authentication request to the input board and receive the input board identifier returned by the input board.

[0078] Step S2002: Verify whether the input board identifier matches the pre-stored valid input board identifier; if they match, proceed to step S201; if they do not match, generate a board matching failure alarm message.

[0079] For example, an encrypted authentication request is sent to the input board through one or more dedicated authentication channels preset from the multiple output channels, or through at least one output channel from the multiple output channels; so that after receiving the authentication request sent by the output board, the input board responds to the authentication request by sending its own input board identifier to the output board, that is, receiving the input board identifier returned by the input board.

[0080] Then, the input board identifier is matched and verified with the pre-stored valid input board identifier; if they match, step S201 is executed; if they do not match, a board matching failure alarm message is generated and step S201 is stopped.

[0081] In this embodiment, an identity interlock verification is added before physical channel testing. The output board actively requests and verifies the input board identifier. The subsequent channel testing process is only initiated if the identifier matches a pre-stored list of valid identifiers. This process establishes a trusted association between boards, excluding unauthorized or mismatched boards from the system's operational chain, thus improving the security of board channel testing.

[0082] Figure 3 A flowchart illustrating a testing method for output and input board channels provided in another embodiment of this application is shown below. Figure 3 As shown, the testing method for output and input card channels provided in this embodiment is applied to the processor of the input card, where the input channels of the input card and the output channels of the output card are electrically connected accordingly. The testing method for output and input card channels provided in this embodiment includes the following steps:

[0083] Step S301: Read the input channel status; the input channel status is the channel status of the multiple input channels in the input board that correspond to the multiple output channels of the output board.

[0084] The process of changing the channel status of the input channel is described in reference to this application. Figure 2 The processor of the output board in the illustrated embodiment determines the channel test data and inputs the channel test signal to the multiple output channels of the output board according to the channel test data.

[0085] Step S302: Based on the input channel status, drive the digital tube of the input board to display the channel test results; wherein, the channel test results are used to indicate whether there are faults in the multiple output channels and the corresponding multiple input channels.

[0086] For example, the processor of the input board monitors the level status of all its input channels in real time. Upon receiving a channel test signal from the output board, the processor scans the ports of the input channels on the input board to read the real-time level of the corresponding input channel, thus obtaining the input channel status. Then, the processor drives its onboard digital tube to display the status based on the input channel status. Specifically, the display logic maps the status of multiple input channels (e.g., 8 channels) to specific segment codes on the digital tube (e.g., the 8 input channels correspond to segments a through g and the decimal point when displaying the number "8"). If an input channel correctly receives a high level, its corresponding segment code on the digital tube lights up; if a valid high level is not detected (indicating an open circuit, short circuit, or channel fault), its corresponding segment code turns off. Ultimately, the digital tube displays a complete or incomplete "8." shape, which is the intuitive channel test result, directly indicating which "output-input channel pairs" are working normally and which "output-input channel pairs" are faulty.

[0087] In this embodiment, the output channels of the output board are electrically connected to the corresponding input channels of the input board. The processor of the output board determines the channel test data and then inputs the channel test signal to the multiple output channels of the output board based on the channel test data. The processor of the input board reads the input channel status, which is the channel status of the multiple input channels in the input board that correspond to the multiple output channels of the output board. Based on the input channel status, the processor drives the digital tube of the input board to display the channel test results. The channel test results are used to indicate whether there is a fault in the multiple output channels and the corresponding multiple input channels.

[0088] Specifically, in one possible implementation, step S302 includes the following steps:

[0089] Step S3021: Determine whether the level of each input channel is high or low based on the input channel status.

[0090] Step S3022: If the input channel is at a high level, then drive the corresponding segment code of the digital tube to display.

[0091] In step S3023, and / or, if the input channel is at a low level, the corresponding segment code of the driven digital tube will not be displayed.

[0092] For example, taking each output channel group as having 8 consecutive output channels, the processor of the input board judges and determines the level state of each input channel as high or low based on the read input channel status; the level state is used to indicate whether the channel test signal of the corresponding output channel has been successfully transmitted to this input channel through the physical connection.

[0093] Furthermore, according to the preset display mapping logic, the level state of each input channel is converted into a driving instruction for a specific segment code of the digital tube. The preset display mapping logic, for example, means that the first output channel (or the first input channel, or the first output-input channel pair) to the eighth output channel (or the eighth input channel, or the eighth output-input channel pair) in the output channel group respectively control the a-segment code, b-segment code, c-segment code, d-segment code, e-segment code, f-segment code, g-segment code, and decimal point (dp-segment code) when the digital tube displays the number "8.". Furthermore, if the level state of an input channel is determined to be high, the corresponding segment code on the digital tube is driven to light up; if the level state of an input channel is determined to be low, the corresponding segment code on the digital tube remains off and is not displayed.

[0094] For example, Figure 4 A schematic diagram of a digital tube display based on the level state of the input channel provided in an embodiment of this application is shown below. Figure 4 As shown in (a), the first to eighth input channels correspond to the a-segment code, b-segment code, c-segment code, d-segment code, e-segment code, f-segment code, g-segment code, and decimal point (dp-segment code) when the digital tube displays the number "8.", respectively. If all eight output-input channels are normal, the digital tube will display a complete number "8" and a decimal point, as shown in (a). Figure 4 As shown in (b), all eight segment codes are filled; if any output-input channel pair fails, its corresponding segment code will be missing, thus identifying the specific channel loop (output-input channel pair) with the problem. For example, if the third output channel (output-input channel pair) fails, segment code c will remain off and not displayed, i.e. Figure 4 As shown in (c), segment c is not filled, while the other 7 segment codes are filled.

[0095] In this embodiment, by directly associating the level state of each input channel with the specific segment code displayed on the digital tube, the channel test results are visualized intuitively. A high level drives the corresponding segment code to light up, while a low level turns it off, allowing the on / off state of the channel to be mapped in real time and accurately to the complete or missing strokes of the "8." graphic on the digital tube, thereby converting the abstract electrical signal into an easily observable graphical fault indication.

[0096] Furthermore, after step S3023, if the level state of at least one input channel is low, the steps provided by the method in this application embodiment further include:

[0097] Step S3024: Determine the channel position code of the input channel based on the low level of the input channel.

[0098] For example, after the processor of the input board completes the scanning and determination of the level status of the input channels, it generates a corresponding channel position code for the input channels that are determined to be in a low level state (i.e., indicating a channel fault), based on their physical location or logical address on the board. For example, if the 3rd and 7th input channels are low, the channel position codes determined by the processor are "CH03" and "CH07" respectively.

[0099] Step S3025: Send one or more channel position codes to the terminal device so that the display unit of the terminal device displays the channel position codes, and the terminal device outputs a channel fault prompt tone with corresponding frequency and / or volume through the audio input / output unit according to the number of channel position codes.

[0100] For example, the processor of the input board sends data packets, including channel location codes, to a connected terminal device (such as a host computer, industrial touch screen, or mobile maintenance terminal) via its communication interface (e.g., Bluetooth, Universal Asynchronous Receiver / Transmitter (UART), Controller Area Network (CAN), or Ethernet).

[0101] Subsequently, after receiving the data packet (one or more channel position codes), the terminal device's display unit (e.g., an LCD screen) will parse and display the received list of channel position codes, for example, presenting "Faulty Channels: CH03, CH07" as a text list or graphically highlighted. Simultaneously, based on the number of received channel position codes, the terminal device will output a corresponding frequency and / or volume of channel fault alert tone through its audio input / output unit (e.g., a speaker). For example, when there is one faulty channel, a short, single-tone alert will be played; when there is more than one faulty channel, a warning tone with varying frequency or gradually increasing volume will be played, thus providing the user with immediate alerts regarding the different numbers of faults in the "output-input channel pair" through audio signals.

[0102] In this embodiment, when the input channel is at a low level, its channel position code is determined and sent to the terminal device, allowing the display unit to directly display the specific faulty channel. Simultaneously, based on the received number of codes, the terminal device controls the audio unit to output a corresponding frequency and / or volume prompt tone, converting the fault quantity information into a perceptible audio signal. This process converts the channel level state into displayable coded information and audible audio signals, enabling users to simultaneously locate the faulty channel and its quantity through both visual and auditory means. This enhances the intuitiveness of fault location and remote monitoring capabilities, improving the accuracy and efficiency of fault identification.

[0103] Figure 5 A schematic diagram of the structure of a test device for output and input card channels provided in one embodiment of this application. Figure 1 ,like Figure 5 As shown, the output and input card channel testing device 50 provided in this embodiment is applied to the processor of the output card, and the output channels of the output card and the input channels of the input card are electrically connected accordingly; it includes: a determination module 501, used to determine channel test data; and an output module 502, used to input channel test signals to the multiple output channels of the output card according to the channel test data, so that the processor of the input card can read the input channel status; the input channel status is the channel status of the multiple input channels in the input card corresponding to the multiple output channels, and the processor of the input card drives the digital tube of the input card to display the channel test results according to the input channel status; wherein, the channel test results are used to indicate whether there is a fault in the multiple output channels and the corresponding multiple input channels.

[0104] Optionally, the output module 502 of the above-mentioned test device 50 for output and input card channels, when inputting channel test signals to multiple output channels of the output card according to channel test data, is specifically used to: divide the multiple output channels into multiple output channel groups according to the number of output channels of the output card; wherein, each output channel group includes at least one output channel; and input the channel test signals to the output channels in each output channel group in sequence according to the channel test data and the preset test order.

[0105] Optionally, in the test device 50 for the output board channel and the input board channel as described above, the determining module 501, when determining the channel test data, is specifically used to: acquire board test environment data; determine the signal strength, signal frequency, or test duration of the channel test signal based on the board test environment data; and generate channel test data based on the signal strength, signal frequency, or test duration of the channel test signal.

[0106] The test device 50 for output and input card channels provided in this embodiment can perform the following: Figure 2 The technical solutions of the method embodiments shown are similar in principle and in effect, and will not be described again here.

[0107] Figure 6 A schematic diagram of the structure of a test device for output and input card channels provided in one embodiment of this application. Figure 2 ,like Figure 6As shown, the output and input card channel testing device 60 provided in this embodiment is applied to the processor of the input card, and the input channels of the input card and the output channels of the output card are electrically connected accordingly; it includes: a reading module 601, used to read the input channel status; the input channel status is the channel status of the multiple input channels in the input card that correspond to the multiple output channels of the output card; a driving module 602, used to drive the digital tube of the input card to display the channel test results according to the input channel status; wherein, the channel test results are used to indicate whether there is a fault in the multiple output channels and the corresponding multiple input channels.

[0108] Optionally, in the above-mentioned test device 60 for output and input card channels, the driving module 602, when driving the digital tube of the input card to display the channel test results according to the input channel status, is specifically used to: determine whether the level status of each input channel is high or low according to the input channel status; if the level status of the input channel is high, drive the corresponding segment code of the digital tube to display; and / or, if the level status of the input channel is low, drive the corresponding segment code of the digital tube not to display.

[0109] Optionally, in the above-mentioned test device 60 for output and input channels, after the corresponding segment code of the digital tube is not displayed if the input channel's level is low, the driving module 602 is further configured to: determine the channel position code of the input channel based on the low level of the input channel; send one or more channel position codes to the terminal device so that the terminal device's display unit displays the channel position codes; and enable the terminal device to output a channel fault prompt tone with corresponding frequency and / or volume through the audio input / output unit according to the number of channel position codes.

[0110] The test device 60 for output and input card channels provided in this embodiment can perform the following: Figures 3-4 The technical solutions of any of the method embodiments shown are similar in implementation principle and technical effect, and will not be described again here.

[0111] Figure 7 A schematic diagram of the structure of the electronic device provided in this application. Figure 7 As shown, the electronic device 70 provided in this embodiment includes at least one processor 701 and a memory 702. Optionally, the device 70 further includes a communication component 703. The processor 701, memory 702, and communication component 703 are connected via a bus.

[0112] In a specific implementation, at least one processor 701 executes computer execution instructions stored in memory 702, causing at least one processor 701 to perform the above-described method.

[0113] The specific implementation process of processor 701 can be found in the above method embodiments, and its implementation principle and technical effect are similar. It will not be repeated here.

[0114] In the above embodiments, it should be understood that the processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), etc. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in this invention can be directly implemented by a hardware processor, or implemented by a combination of hardware and software modules within the processor.

[0115] The memory may include random access memory (RAM) and may also include non-volatile memory (NVM), such as at least one disk storage device.

[0116] The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of illustration, the buses shown in the accompanying drawings are not limited to a single bus or a single type of bus.

[0117] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the above-described method.

[0118] This application also provides a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the above-described method.

[0119] The aforementioned readable storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. The readable storage medium can be any available medium accessible to a general-purpose or special-purpose computer.

[0120] An exemplary readable storage medium is coupled to a processor, enabling the processor to read information from and write information to the readable storage medium. Of course, the readable storage medium can also be a component of the processor. The processor and the readable storage medium can reside in an Application Specific Integrated Circuit (ASIC). Alternatively, the processor and the readable storage medium can exist as discrete components in the device.

[0121] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are all optional embodiments, and the actions and modules involved are not necessarily essential to this application.

[0122] It should be further noted that although the steps in the flowchart are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowchart may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the sub-steps or stages of other steps.

[0123] It should be understood that the above-described device embodiments are merely illustrative, and the device of this application can also be implemented in other ways. For example, the division of units / modules in the above embodiments is only a logical functional division, and there may be other division methods in actual implementation. For example, multiple units, modules, or components may be combined, or integrated into another system, or some features may be ignored or not executed.

[0124] Furthermore, unless otherwise specified, the functional units / modules in the various embodiments of this application can be integrated into one unit / module, or each unit / module can exist physically separately, or two or more units / modules can be integrated together. The integrated units / modules described above can be implemented in hardware or as software program modules.

[0125] When integrated units / modules are implemented in hardware, the hardware can be digital circuits, analog circuits, etc. The physical implementation of the hardware structure includes, but is not limited to, transistors, memristors, etc. Unless otherwise specified, the processor can be any suitable hardware processor, such as a CPU, GPU, FPGA, DSP, and ASIC, etc. Unless otherwise specified, the storage unit can be any suitable magnetic or magneto-optical storage medium, such as Resistive Random Access Memory (RRAM), Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), Enhanced Dynamic Random Access Memory (EDRAM), High-Bandwidth Memory (HBM), Hybrid Memory Cube (HMC), etc.

[0126] If the integrated unit / module is implemented as a software program module and sold or used as an independent product, it can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned memory includes various media capable of storing program code, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard drive, magnetic disk, or optical disk.

[0127] In the above embodiments, the descriptions of each embodiment have their own emphasis. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments. The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as the combination of these technical features does not contradict each other, it should be considered within the scope of this specification.

[0128] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.

[0129] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. A method for testing output board channels and input board channels, characterized in that, A processor applied to an output board, wherein the output channels of the output board are electrically connected to the corresponding input channels of the input board; The method includes: Determine the channel test data; Based on the channel test data, the channel test signal is input to the multiple output channels of the output board so that the processor of the input board can read the input channel status; the input channel status is the channel status of the multiple input channels in the input board that correspond to the multiple output channels, and the processor of the input board drives the digital tube of the input board to display the channel test results according to the input channel status; The channel test results are used to indicate whether there are any faults in the multi-output channels and the corresponding multi-input channels.

2. The method according to claim 1, characterized in that, The step of inputting the channel test signal to the multiple output channels of the output board based on the channel test data includes: Based on the number of output channels of the output board, the multiple output channels are divided into multiple output channel groups; wherein, each output channel group includes at least one output channel. Based on the channel test data and the preset test sequence, the channel test signals are sequentially input to the output channels of each of the output channel groups.

3. The method according to claim 2, characterized in that, The determined channel test data includes: Obtain board test environment data; Based on the board test environment data, determine the signal strength, signal frequency, or test duration of the channel test signal; The channel test data is generated based on the signal strength, signal frequency, or test duration of the channel test signal.

4. A method for testing output board channels and input board channels, characterized in that, A processor applied to an input board, wherein the input channels of the input board are electrically connected to the corresponding output channels of the output board; The method includes: Read the input channel status; the input channel status refers to the channel status of the multiple input channels in the input board that correspond to the multiple output channels of the output board; Based on the input channel status, drive the digital tube display of the input board to show the channel test results; The channel test results are used to indicate whether there is a fault in the multi-output channel and the corresponding multi-input channel.

5. The method according to claim 4, characterized in that, The step of driving the digital tube display channel test results of the input board according to the input channel status includes: Based on the input channel status, determine whether the level of each input channel is high or low. If the input channel is at a high level, the corresponding segment code of the digital tube will be driven to display. And / or, if the input channel is at a low level, the corresponding segment code of the digital tube will not be displayed.

6. The method according to claim 5, characterized in that, After stating that if the input channel's level is low, the corresponding segment code of the digital tube will not be displayed, the method further includes: Based on the low level state of the input channel, the channel position code of the input channel is determined; One or more of the channel location codes are sent to the terminal device so that the display unit of the terminal device displays the channel location codes, and the terminal device outputs a channel fault prompt tone with corresponding frequency and / or volume through the audio input / output unit according to the number of channel location codes.

7. A testing device for output board channels and input board channels, characterized in that, A processor applied to an output board, wherein the output channels of the output board are electrically connected to the corresponding input channels of an input board; comprising: The determination module is used to determine the channel test data; The output module is used to input channel test signals to multiple output channels of the output board according to the channel test data, so that the processor of the input board can read the input channel status; the input channel status is the channel status of multiple input channels in the input board corresponding to the multiple output channels, and the processor of the input board drives the digital tube of the input board to display the channel test results according to the input channel status; wherein, the channel test results are used to indicate whether there is a fault in the multiple output channels and the corresponding multiple input channels.

8. An electronic device, characterized in that, include: A processor, and a memory communicatively connected to the processor; The memory stores computer-executed instructions; The processor executes computer execution instructions stored in the memory to implement the method as described in any one of claims 1 to 3, or to implement the method as described in any one of claims 4 to 6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when executed by a processor, are used to implement the method as described in any one of claims 1 to 3, or to implement the method as described in any one of claims 4 to 6.

10. A computer program product, characterized in that, Includes a computer program that, when executed by a processor, implements the method of any one of claims 1 to 3, or implements the method of any one of claims 4 to 6.

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