Storage control methods, apparatus, equipment, media and program products

Abstract

This disclosure relates to a storage control method, apparatus, device, medium, and program product. The storage control method includes: acquiring device status information of an electronic device; and, in response to the device status information meeting preset conditions affecting writing, sending a first storage control instruction to a storage controller, causing the storage controller to, in response to the first storage control instruction, write cached runtime data in the storage controller to memory and / or restrict the writing of at least a portion of non-running data to memory. By sending the first storage control instruction to the storage controller when the device status information meets preset conditions affecting writing, the storage controller can be controlled to perform forced writing of runtime data and restricted writing of non-running data, thereby reducing the risk of runtime data loss when write data is affected. Furthermore, the method of sending the control instruction ensures the efficiency and flexibility of the processor controlling the storage controller, improving the user experience.

Description

Technical Field

[0001] This disclosure relates to the field of storage, specifically to a storage control method, apparatus, device, medium, and program product. Background Technology

[0002] In recent years, with the rapid development of storage technology and the continuous iteration of storage devices, electronic devices with data writing capabilities have been widely used in people's daily lives and work. During use, the storage controller of an electronic device can write different types of cached data into the memory to achieve data storage.

[0003] However, storage control methods using related technologies may encounter data writing anomalies in special scenarios such as excessively low voltage or excessively high temperature, which could lead to the risk of permanent data loss and a poor user experience. Summary of the Invention

[0004] To overcome the problems existing in related technologies, this disclosure provides a storage control method, apparatus, device, medium, and program product.

[0005] According to a first aspect of the present disclosure, a storage control method is provided, the storage control method comprising:

[0006] Acquire device status information of an electronic device, wherein the device status information is status information that can affect the storage controller's writing of data to the memory;

[0007] In response to the device status information meeting the preset conditions affecting writing, a first storage control command is sent to the storage controller, so that the storage controller, in response to the first storage control command, writes the cached running data in the storage controller into the memory and / or restricts at least a portion of the non-running data from being written into the memory.

[0008] In some embodiments of this disclosure, the device status information includes voltage-related information, which is used to characterize the current battery voltage level of the electronic device.

[0009] The preset conditions affecting writing include: the battery voltage is in a low voltage state.

[0010] In some embodiments of this disclosure, the voltage-related information includes battery power, and the storage control method further includes:

[0011] If the battery charge is less than a preset charge threshold, the battery voltage state is determined to be the low voltage state.

[0012] or,

[0013] The voltage-related information includes battery voltage, and the storage control method further includes:

[0014] If the battery voltage is less than a preset voltage threshold, the battery voltage state is determined to be the low voltage state.

[0015] In some embodiments of this disclosure, the first storage control instruction includes:

[0016] A data write instruction is provided to instruct the storage controller to write the cached data into the memory.

[0017] Non-running data write restriction instruction, which is used to restrict the storage controller from writing at least a portion of non-running data into the memory.

[0018] In some embodiments of this disclosure, the non-running data restriction write instruction includes:

[0019] A fragmentation operation stop instruction is used to stop the fragmentation operation of the storage controller, thereby restricting the writing of non-running data generated by the fragmentation operation into the memory; and / or,

[0020] The bad block management operation stop instruction is used to stop the bad block management operation of the storage controller, so as to restrict the writing of non-running data generated by the bad block management operation into the memory.

[0021] In some embodiments of this disclosure, after the device status information meets the preset conditions affecting writing and a first storage control command is sent to the storage controller, the storage control method further includes:

[0022] If no feedback information is received from the storage controller within a preset time, the first storage control command is sent to the storage controller again. The feedback information is sent by the storage controller in response to the completion of the execution of the first storage control command.

[0023] In some embodiments of this disclosure, the storage control method further includes:

[0024] In response to the device status information switching from meeting the preset condition to not meeting the preset condition, a second storage control instruction is sent to the storage controller. The second storage control instruction is used to release the restriction on writing non-operating data into the memory.

[0025] According to a second aspect of the present disclosure, a storage control method is provided, the storage control method comprising:

[0026] In response to receiving a first storage control instruction sent by the processor, cached running data is written to memory and / or at least some non-running data is restricted from being written to memory, wherein the first storage control instruction is generated in response to the device status information of the electronic device satisfying preset conditions affecting the writing.

[0027] In some embodiments of this disclosure, the device status information includes voltage-related information, which is used to characterize the current battery voltage level of the electronic device.

[0028] The preset conditions affecting writing include: the battery voltage is in a low voltage state. In some embodiments of this disclosure, the step of writing cached runtime data to memory and / or restricting at least a portion of non-runtime data from being written to memory in response to receiving a first storage control instruction from the processor includes:

[0029] In response to receiving a runtime data write instruction sent by the processor, the runtime data is written to the memory;

[0030] In response to receiving a non-running data write restriction instruction sent by the processor, at least a portion of the non-running data is restricted from being written to the memory.

[0031] In some embodiments of this disclosure, the step of restricting the writing of at least a portion of non-running data to the memory in response to receiving a non-running data restriction write instruction sent by the processor includes:

[0032] In response to receiving a fragmentation operation stop command, the fragmentation operation is stopped to restrict the writing of non-running data generated by the fragmentation operation into the memory; and / or,

[0033] In response to receiving a bad block management operation stop command, the bad block management operation is stopped to restrict the writing of non-running data generated by the bad block management operation into the memory.

[0034] In some embodiments of this disclosure, the storage control method further includes:

[0035] In response to the completion of the first storage control instruction, feedback information is sent to the processor.

[0036] In some embodiments of this disclosure, the storage control method further includes:

[0037] In response to receiving a second storage control instruction sent by the processor, the restriction on writing non-running data into the memory is lifted. The second storage control instruction is generated in response to the device status information switching from meeting the preset conditions to not meeting the preset conditions.

[0038] According to a third aspect of the present disclosure, a storage control device is provided, the storage control device comprising:

[0039] The acquisition module is used to acquire device status information of the electronic device, wherein the device status information is status information that can affect the storage controller to write data to the memory.

[0040] The sending module is configured to send a first storage control command to the storage controller in response to the device status information meeting a preset condition affecting writing, so that the storage controller, in response to the first storage control command, writes the cached running data in the storage controller into the memory and / or restricts at least a portion of the non-running data from being written into the memory.

[0041] According to a fourth aspect of the present disclosure, a storage control device is provided, the storage control device comprising:

[0042] An execution module is configured to, in response to receiving a first storage control instruction sent by a processor, write cached running data into a memory and / or restrict at least a portion of non-running data from being written into a memory, wherein the first storage control instruction is generated in response to the device status information of the electronic device satisfying preset conditions affecting the writing.

[0043] According to a fifth aspect of the present disclosure, an electronic device is provided, the electronic device comprising:

[0044] processor;

[0045] Memory used to store processor-executable instructions;

[0046] The processor is configured to execute the storage control method as described in the first aspect.

[0047] According to a sixth aspect of the present disclosure, an electronic device is provided, the electronic device comprising:

[0048] Storage controller;

[0049] Memory used to store instructions executable by the storage controller;

[0050] The storage controller is configured to perform the storage control method as described in the second aspect.

[0051] According to a seventh aspect of the present disclosure, a non-transitory computer-readable storage medium is provided, which, when instructions in the storage medium are executed by a processor of an electronic device, enables the electronic device to perform the storage control method as described in the first aspect.

[0052] When the instructions in the storage medium are executed by the storage controller of the electronic device, the electronic device is able to perform the storage control method as described in the second aspect.

[0053] According to an eighth aspect of the present disclosure, a computer program product is provided, including a computer program that, when executed by a processor, implements the storage control method as described in the first aspect.

[0054] When the computer program is executed by the storage controller, it implements the storage control method as described in the second aspect.

[0055] The technical solutions provided by the embodiments of this disclosure can include the following beneficial effects: by sending a first storage control instruction to the storage controller when the device status information meets the preset conditions affecting writing, the storage controller can be controlled to perform forced writing of running data and restricted writing of non-running data, thereby reducing the risk of loss of running data when the electronic device is affected by the writing data, and the way of sending control instructions ensures the efficiency and flexibility of the processor in controlling the storage controller, and improves the user experience.

[0056] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0057] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0058] Figure 1 This is a flowchart illustrating a storage control method according to an exemplary embodiment.

[0059] Figure 2 This is a flowchart illustrating a storage control method according to another exemplary embodiment.

[0060] Figure 3 This is a flowchart illustrating a storage control method according to another exemplary embodiment.

[0061] Figure 4 This is a block diagram of a storage control device according to an exemplary embodiment.

[0062] Figure 5 This is a block diagram of a storage control device according to another exemplary embodiment.

[0063] Figure 6 This is a block diagram of an electronic device according to an exemplary embodiment.

[0064] In the picture:

[0065] 10-Acquisition module; 20-Transmission module; 30-Execution module; 101-Processing component; 102-Memory; 103-Power component; 104-Multimedia component; 105-Audio component; 106-Input / output interface; 107-Sensor component; 108-Communication component; 109-Processor. Detailed Implementation

[0066] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Rather, they are merely examples of apparatuses and methods consistent with some aspects of the invention as detailed in the appended claims.

[0067] In recent years, with the rapid development of storage technology and the upgrading of storage devices, electronic devices with data writing capabilities have been widely used in people's daily lives and work. In related technologies, when an electronic device is in use, its storage controller stores cached operational data related to the currently performed task and non-operational data unrelated to the current task. During normal data writing and data relocation and organization tasks such as fragmentation processing, the operational data and non-operational data are written to the storage device respectively to achieve data storage.

[0068] However, the storage control methods using related technologies can cause data writing and storage malfunctions in special scenarios such as low voltage or high temperature of electronic devices. This can result in the inability to write cached data to memory, leading to the risk of data loss and a poor user experience.

[0069] Based on this, an exemplary embodiment of this disclosure provides a storage control method. By acquiring device status information, when the device status information meets preset conditions affecting writing, a first storage control instruction is sent to the storage controller. This causes the storage controller to respond to the first storage control instruction by performing at least one of the following actions: writing cached runtime data to memory and restricting at least a portion of non-running data from being written to memory. This achieves control over the storage actions performed by the storage controller. By sending the first storage control instruction to the storage controller when the device status information meets preset conditions affecting writing, the storage controller can be controlled to perform forced writing of runtime data and restricted writing of non-running data. This reduces the risk of runtime data loss when data writing is affected, and the method of sending the control instruction ensures the efficiency and flexibility of the processor controlling the storage controller, improving the user experience.

[0070] In one exemplary embodiment, a storage control method is provided, applied to a processor of an electronic device, such as a mobile phone or tablet computer, that has data write-to-store functionality. The processor may include, for example, a system-on-a-chip (SOC). (See reference...) Figure 1 As shown, the storage control method includes:

[0071] S100: Obtain the device status information of the electronic device, which is the status information that can affect the storage controller to write data to the memory.

[0072] In step S100, the storage controller is used to manage the memory, and is responsible for initializing, configuring and monitoring the memory. The storage controller coordinates and manages the data transmission process and can write and read data to and from the memory according to the processor's read and write requests.

[0073] The processor acquires the device status information of the electronic device. The device status information is the status information that can affect the storage controller's writing of data to the memory. Since the voltage of the electronic device is too low or the temperature is too high, it will affect the storage controller's writing of data to the memory. The status information may include voltage-related information and temperature-related information.

[0074] S200: In response to the device status information meeting the preset conditions affecting writing, a first storage control instruction is sent to the storage controller, so that the storage controller responds to the first storage control instruction to write the running data cached in the storage controller into the memory and / or restrict at least a portion of the non-running data from being written into the memory.

[0075] In step S200, when the device status information meets the preset conditions affecting writing, it means that in the current state of the electronic device, the data writing from the storage controller to the storage is affected, and there is a risk of data loss. At this time, the processor sends a first storage control command to the storage controller to control the data writing and storage operation, thereby avoiding the problem of data loss. If the device status information includes voltage-related information, the preset conditions affecting writing may include, for example, low voltage; if the device status information includes temperature-related information, the preset conditions affecting writing may include, for example, high temperature.

[0076] When the storage controller recognizes the first storage control instruction, it writes the cached runtime data to the memory, or restricts (prohibits) some or all of the non-running data from being written to the memory. It may also simultaneously write the cached runtime data to the memory and restrict at least some of the non-running data from being written to the memory. The memory may include, for example, flash memory. The cached runtime data in the storage controller refers to data directly related to the work or task being performed by the electronic device, i.e., user data. Non-running data refers to data not directly related to the work or task being performed by the electronic device, i.e., non-user data. Because runtime data involves the work being performed by the electronic device, there is a higher storage requirement for runtime data, i.e., user data.

[0077] Understandably, when device status information meets preset conditions affecting writing, the storage controller's ability and efficiency in writing data to memory are limited. If a storage strategy employing related technologies is adopted, it is difficult to avoid abnormal write operations. By using the aforementioned storage control methods to force the writing of operational data or restrict the writing of non-operational data, the system resources allocated by the storage controller to writing operational data to memory can be increased, thereby reducing or eliminating the risk of operational data loss.

[0078] In this embodiment, by acquiring device status information, when the device status information meets the preset conditions affecting writing, a first storage control command is sent to the storage controller. This causes the storage controller to respond to the first storage control command by either writing its cached runtime data to the memory or restricting the writing of at least some non-running data to the memory, thereby controlling the storage actions performed by the storage controller. By sending the first storage control command to the storage controller when the device status information meets the preset conditions affecting writing, the storage controller can be controlled to perform forced writing of runtime data and restricted writing of non-running data. This reduces the risk of runtime data loss when the electronic device's write operations are affected. Furthermore, the method of sending the control command ensures the efficiency and flexibility of the processor's control over the storage controller, improving the user experience.

[0079] In some embodiments, the device status information includes temperature-related information, which is used to characterize the current high or low device temperature of the electronic device. In this case, the preset conditions affecting writing include: the device temperature is in a high temperature state.

[0080] In other embodiments, the device status information includes voltage-related information, which characterizes the current battery voltage state of the electronic device. Preset conditions affecting the write operation include: the battery voltage state being low.

[0081] State information that can influence the memory controller's writing of data to the memory can include voltage-related information, which characterizes the current battery voltage level of the electronic device. Voltage-related information can include, for example, at least one of battery charge and battery voltage, which can be obtained through charge monitoring and voltage detection, respectively.

[0082] Battery voltage states include low voltage and non-low voltage states. When the current battery voltage of an electronic device is low, the battery voltage is lower than the voltage required for normal data writing, which may lead to abnormal data writing and storage operation, posing a risk of data loss. Therefore, a low battery voltage state can be used as a preset condition to send a first storage control command to the storage controller when the battery voltage is low. This command controls the storage controller to perform forced writing of running data and restricted writing of non-running data.

[0083] In this embodiment, voltage-related information is used as device status information, and the low voltage state of the battery is used as a preset condition affecting writing. When the battery voltage is low, a first storage control command can be sent to the storage controller to control the storage controller to perform forced writing of running data and restricted writing of non-running data. This solves the problem that data writing is affected when the battery voltage is too low and reduces the risk of loss of running data when the electronic device is affected by the writing of data.

[0084] In some embodiments, voltage-related information includes battery power, and the storage control method further includes: if the battery power is less than a preset power threshold, determining the battery voltage state as a low voltage state.

[0085] Voltage-related information may include the battery level of the electronic device, which indicates the current high or low voltage state of the device. The battery level can be obtained, for example, through a power monitoring system. When battery level is included in the voltage-related information, if the battery level is less than a preset power threshold, the battery voltage state is determined to be low; if the battery level is greater than or equal to the preset power threshold, the battery voltage state is determined to be non-low. The preset power threshold can be determined based on write protection requirements for operational data. For example, the preset power threshold can be set to 5%. If the battery level is less than 5%, the processor determines the battery voltage state to be low and sends a first storage control command to the storage controller.

[0086] In this embodiment, battery level is used as a voltage-related information. When the battery level is below a preset threshold, the battery voltage state is determined to be low. This allows the battery level to characterize the voltage state and identify the low-voltage state, providing a basis for sending the first storage control command. Using battery level as a voltage-related information is simple and accurate, ensuring the accuracy of the timing and response speed of sending the first storage control command, thus improving the user experience.

[0087] In other embodiments, voltage-related information includes battery voltage, and the storage control method further includes: if the battery voltage is less than a preset voltage threshold, determining the battery voltage state as a low voltage state.

[0088] Voltage-related information may include the battery voltage of the electronic device, which characterizes the current high or low battery voltage state of the electronic device. The battery voltage can be obtained, for example, through a voltage detection system. When battery voltage is included in the voltage-related information, if the battery voltage is less than a preset voltage threshold, the battery voltage state can be determined to be a low voltage state; if the battery voltage is greater than or equal to the preset voltage threshold, the battery voltage state can be determined to be a non-low voltage state. The preset voltage threshold can be determined based on write protection requirements for operational data. For example, the preset voltage threshold can be set to 3V. If the battery voltage is less than 3V, the processor determines the battery voltage state to be a low voltage state and sends a first storage control command to the storage controller.

[0089] In this embodiment, battery voltage is used as a voltage-related information. When the battery voltage is lower than a preset voltage threshold, the battery voltage state is determined to be a low voltage state. This allows the battery voltage to characterize the high and low voltage states and identify the low voltage state, providing a basis for sending the first storage control command. Using battery voltage as a voltage-related information is simple and accurate, ensuring the accuracy of the timing and response speed of sending the first storage control command, thus improving the user experience.

[0090] In some embodiments, the first storage control instruction includes: a runtime data write instruction, which instructs the storage controller to write cached runtime data to memory; and a non-running data restriction write instruction, which restricts the storage controller from writing at least a portion of non-running data to memory.

[0091] The first storage control instruction may include a runtime data write instruction, which instructs the storage controller to write cached runtime data into memory. When the processor detects that the device status information meets the preset conditions affecting the write operation, it sends a runtime data write instruction to the storage controller, enabling the storage controller to write the cached runtime data into memory in response to the runtime data write instruction. This achieves the effect of controlling the storage controller to force the write of runtime data, thereby reducing the risk of runtime data loss.

[0092] The first storage control instruction may further include a non-operational data restriction write instruction, which restricts, or prohibits, the storage controller from writing all or part of the non-operational data to the memory. When the processor recognizes that the device status information meets the preset conditions affecting writing, it sends a non-operational data restriction write instruction to the storage controller. This enables the storage controller to respond to the non-operational data restriction write instruction by restricting, or prohibiting, at least part of the non-operational data from being written to the memory, thereby controlling the storage controller to perform non-operational data restriction writing and reducing the risk of operational data loss.

[0093] In this embodiment, the running data write instruction and the non-running data restricted write instruction are used as the first storage control instruction. This allows for separate control of the storage controller to perform forced running data writes and restricted running data writes, thereby reducing the risk of running data loss. The running data write instruction and the non-running data restricted write instruction are simple to generate and have a fast response time. Furthermore, by selecting different instructions, independent control of forced running data writes and restricted running data writes can be achieved, further ensuring the efficiency and flexibility of the processor's control over the storage controller and improving the user experience.

[0094] In some embodiments, the non-running data write restriction instruction includes a fragmentation operation stop instruction to stop the fragmentation operation of the storage controller, thereby restricting the writing of non-running data generated by the fragmentation operation to memory. Alternatively, the non-running data write restriction instruction includes a bad block management operation stop instruction to stop the bad block management operation of the storage controller, thereby restricting the writing of non-running data generated by the bad block management operation to memory. It is also possible that the non-running data write restriction instruction includes both a fragmentation operation stop instruction and a bad block management operation stop instruction.

[0095] Non-running data write restriction instructions, used to limit the memory controller from writing at least a portion of non-running data to memory, include at least one of a fragmentation operation stop instruction and a bad block management operation stop instruction. The fragmentation operation stop instruction stops the memory controller's fragmentation operation, thereby limiting, or prohibiting, the writing of non-running data generated by the fragmentation operation to memory. The memory controller performs fragmentation operations periodically under normal circumstances to address the fragmentation problem caused by discontinuous memory cells generated during memory allocation and deallocation, leading to inefficient memory utilization. During fragmentation operations, the memory controller analyzes the data distribution and reorganizes the data, involving the generation and writing of non-running data. By sending a fragmentation operation stop instruction to the memory controller, the processor enables the memory controller to respond by stopping the fragmentation operation, thereby preventing the writing of non-running data to memory during the fragmentation process.

[0096] The bad block management operation stop instruction is used to halt the bad block management operation of the storage controller, thereby limiting or prohibiting the writing of non-operational data generated during the bad block management operation to memory. Under normal circumstances, the storage controller performs bad block management operations periodically to promptly detect and resolve bad block problems caused by faulty or unreadable physical storage units in the storage space. During bad block management operations, the storage controller needs to move and reorganize the valid data in the bad blocks, which involves the generation and writing of non-operational data. By sending a bad block management operation stop instruction to the storage controller, the processor enables the storage controller to respond to the instruction and stop executing the bad block management operation, thus preventing the writing of non-operational data to memory during the bad block management operation.

[0097] In this embodiment, at least one of the fragmentation processing operation stop instruction and the bad block management operation stop instruction is used as a non-running data restriction write instruction to limit the storage controller from writing at least a portion of non-running data into the memory. This allows the storage controller's fragmentation processing operation and bad block management operation to be stopped separately, thus limiting the writing of non-running data generated by these operations into the memory. This reduces the risk of running data loss. The fragmentation processing operation stop instruction and bad block management operation stop instruction are simple to generate and have a fast response time. Furthermore, different instructions can be selected to achieve independent control of the fragmentation processing operation and bad block management operation, further ensuring the efficiency and flexibility of the processor's control over the storage controller and improving the user experience.

[0098] In some embodiments, after sending a first storage control instruction to the storage controller in response to the device status information meeting the preset conditions affecting writing, the storage control method further includes: in response to not receiving feedback information from the storage controller within a preset time, sending the first storage control instruction to the storage controller again, wherein the feedback information is sent by the storage controller in response to the completion of the execution of the first storage control instruction.

[0099] After the processor sends a first storage control instruction to the storage controller in response to the device status information meeting the preset conditions affecting writing, the storage controller can send feedback information to the processor upon completion of the first storage control instruction. This feedback information indicates that the storage control action instructed by the first storage control instruction has been completed. It should be noted that if the first storage control instruction only instructs the storage controller to perform either a forced write of running data or a restricted write of non-running data, the storage controller can send feedback information to the processor upon completion of either the forced write of running data or the restricted write of non-running data. If the first storage control instruction instructs the storage controller to simultaneously perform a forced write of running data and a restricted write of non-running data, the storage controller can send feedback information to the processor upon completion of either the forced write of running data or the restricted write of non-running data, or it can send feedback information to the processor when both have been completed.

[0100] If the processor does not receive feedback from the storage controller within a preset time, it means that the storage controller has failed to execute the first storage control instruction due to instruction execution failure or other reasons within the preset time. Therefore, it cannot effectively control the storage controller to perform forced writing of running data or restricted writing of non-running data, and the electronic device still faces the risk of data loss. Thus, if the processor does not receive feedback from the storage controller within the preset time, it resends the first storage control instruction to the storage controller. This allows the storage controller to again perform forced writing of running data or restricted writing of non-running data according to the first storage control instruction. The repeated sending of the first storage control instruction ensures the protection of running data. The preset time can be determined based on the required response speed of the first storage control instruction.

[0101] In this embodiment, after the processor sends a first storage control instruction to the storage controller in response to the device status information meeting the preset conditions affecting writing, if no feedback information is received from the storage controller within a preset time, the processor sends the first storage control instruction to the storage controller again, so that the storage controller can respond to the first storage control instruction again to force write the running data or restrict write the non-running data. Thus, when the execution of the first storage control instruction is abnormal, the protection effect of the running data is ensured by repeatedly sending the first storage control instruction.

[0102] In some embodiments, the storage control method further includes: in response to a device status information switching from meeting a preset condition to not meeting a preset condition, sending a second storage control instruction to a storage controller, the second storage control instruction being used to release the restriction on writing non-operating data into the storage.

[0103] If an electronic device is removed from a low-voltage state through charging or voltage regulation, or if the temperature drops to a level above the high-temperature state, the storage controller's writing of data to the memory will no longer be affected. In this case, even if the storage controller writes non-operating data, it will not affect the ability and efficiency of writing operating data. It is necessary to remove the writing restriction on non-operating data to restore the normal storage operation of non-operating data.

[0104] Therefore, when the processor detects that the device status information has changed from meeting preset conditions to not meeting preset conditions, it sends a second storage control command to the storage controller. This allows the storage controller to respond to the second storage control command by releasing the restriction on writing non-running data to the memory, thereby resuming normal writing of non-running data when the risk of running data loss is low. For example, the processor can send the second storage control command to restart the storage controller's fragmentation processing and bad block management operations, thereby resuming the movement and organization of non-running data during the fragmentation processing and bad block management operations.

[0105] In this embodiment, when the device status information changes from meeting the preset conditions to not meeting the preset conditions, a second storage control command is sent to the storage controller to remove the restriction on writing non-operating data to the memory. This allows for the normal writing of non-operating data when the risk of losing operating data is low. This achieves adaptive adjustment of the storage control strategy to high and low voltage states, thus improving the user experience.

[0106] In one exemplary embodiment, a storage control method is provided, applied to a processor, with reference to... Figure 2 As shown, the storage control method includes:

[0107] S1. Obtain voltage-related information, which is used to characterize the current battery voltage level of the electronic device.

[0108] S2. In response to the battery voltage being in a low voltage state, a running data write command, a fragmentation operation stop command, and a bad block management operation stop command are sent to the storage controller. The running data write command is used to instruct the storage controller to write the cached running data to the memory. The fragmentation operation stop command is used to stop the storage controller's fragmentation operation. The bad block management operation stop command is used to stop the storage controller's bad block management operation.

[0109] S3. If no feedback information is received from the storage controller within a preset time, the first storage control command is sent to the storage controller again. The feedback information is that the storage controller has sent the first storage control command after execution is completed.

[0110] S4. In response to the battery voltage switching from a low voltage state to a non-low voltage state, a second storage control command is sent to the storage controller. The second storage control command is used to remove the restriction on writing non-operating data into the memory.

[0111] In this embodiment, by acquiring voltage-related information, when a low-voltage state is detected in the battery voltage, a running data write command, a fragmentation operation stop command, and a bad block management operation stop command are sent to the storage controller. This causes the storage controller to respond to these commands by writing the cached running data to the memory, stopping the fragmentation operation, and stopping the bad block management operation, respectively, thus controlling the storage actions performed by the storage controller. By sending these commands to the storage controller during a low-voltage state, the forced writing of running data and the restricted writing of non-running data can be controlled, reducing the risk of running data loss when the electronic device is in a low-voltage state. Furthermore, the method of sending control commands ensures the efficiency and flexibility of the processor's control over the storage controller, improving the user experience.

[0112] In one exemplary embodiment, a storage control method is provided, applied to a storage controller of an electronic device, such as a mobile phone or tablet computer, which has a data write-to-storage function. The storage control method includes: in response to receiving a first storage control instruction sent by a processor, writing cached running data into a memory and / or restricting at least a portion of non-running data from being written into a memory. The first storage control instruction is generated in response to the device state information of the electronic device satisfying preset conditions affecting the writing.

[0113] When the processor detects that the device status information of the electronic device meets the preset conditions that affect writing, it indicates that there is a risk of data loss during operation. At this time, the processor generates and sends the first storage control instruction to the storage controller to control the data writing and storage operation, thereby avoiding the problem of data loss during operation.

[0114] The memory controller manages the memory, handling initialization, configuration, and monitoring. It coordinates and manages data transfer, writing and retrieving data based on processor requests. When the memory controller detects a first memory control instruction, it writes cached runtime data to memory, or restricts (prohibits) some or all non-running data from being written to memory. It can also simultaneously write cached runtime data to memory and restrict at least some non-running data from being written to memory.

[0115] It is understandable that when the device status information of an electronic device meets the preset conditions affecting writing, the storage controller's ability and efficiency in writing data to the memory are limited. If a storage strategy based on related technologies is adopted, it is difficult to avoid abnormalities in the writing of operational data. By forcing the writing of operational data or restricting the writing of non-operational data through the aforementioned storage control methods, the system resources invested by the storage controller in writing operational data to the memory can be increased, thereby reducing or eliminating the risk of operational data loss.

[0116] In this embodiment, the storage controller, in response to a first storage control instruction, performs at least one of the following actions: writing its cached runtime data to the memory and restricting at least a portion of non-running data from being written to the memory. This controls the storage actions performed by the storage controller. By sending the first storage control instruction to the storage controller when the device state information of the electronic device meets preset conditions affecting writing, the processor enables the storage controller to perform forced writing of runtime data and restricted writing of non-running data. This reduces the risk of runtime data loss when the writing of data is affected, and the method of receiving the control instruction ensures the efficiency and flexibility of controlling the storage controller, improving the user experience.

[0117] In some embodiments, the device status information includes temperature-related information, which is used to characterize the current high or low device temperature of the electronic device. In this case, the preset conditions affecting writing include: the device temperature is in a high temperature state.

[0118] In other embodiments, the device status information includes voltage-related information, which characterizes the current battery voltage state of the electronic device. Preset conditions affecting the write operation include: the battery voltage state being low.

[0119] State information that can influence the memory controller's writing of data to the memory can include voltage-related information, which characterizes the current battery voltage level of the electronic device. Voltage-related information can include, for example, at least one of battery charge and battery voltage, which can be obtained through charge monitoring and voltage detection, respectively.

[0120] Battery voltage states include low voltage and non-low voltage states. When the current battery voltage of an electronic device is low, the battery voltage is lower than the voltage required for normal data writing, which may lead to abnormal data writing and storage operation, posing a risk of data loss. Therefore, a low battery voltage state can be used as a preset condition to send a first storage control command to the storage controller when the battery voltage is low. This command controls the storage controller to perform forced writing of running data and restricted writing of non-running data.

[0121] In this embodiment, voltage-related information is used as device status information, and the low voltage state of the battery is used as a preset condition affecting writing. When the battery voltage is low, the processor can send a first storage control instruction to the storage controller to control the storage controller to perform forced writing of running data and restricted writing of non-running data. This solves the problem that data writing is affected when the battery voltage is too low and reduces the risk of loss of running data when the electronic device is affected by the writing data.

[0122] In some embodiments, in response to receiving a first storage control instruction sent by the processor, writing cached runtime data to memory and / or restricting at least a portion of non-running data from being written to memory includes: writing runtime data to memory in response to receiving a runtime data write instruction sent by the processor; and restricting at least a portion of non-running data from being written to memory in response to receiving a non-running data restriction write instruction sent by the processor.

[0123] The first storage control instruction may include a runtime data write instruction, which instructs the storage controller to write cached runtime data into memory. When the processor detects that the device status information meets the preset conditions affecting the write operation, it sends a runtime data write instruction to the storage controller, enabling the storage controller to write the cached runtime data into memory in response to the runtime data write instruction. This achieves the effect of controlling the storage controller to force the write of runtime data, thereby reducing the risk of runtime data loss.

[0124] The first storage control instruction may further include a non-operational data restriction write instruction, which restricts, or prohibits, the storage controller from writing all or part of the non-operational data to the memory. When the processor recognizes that the device status information meets the preset conditions affecting writing, it sends a non-operational data restriction write instruction to the storage controller. This enables the storage controller to respond to the non-operational data restriction write instruction by restricting, or prohibiting, at least part of the non-operational data from being written to the memory, thereby controlling the storage controller to perform non-operational data restriction writing and reducing the risk of operational data loss.

[0125] In this embodiment, the running data write instruction and the non-running data restricted write instruction are used as the first storage control instruction. This allows for separate control of the storage controller to perform forced running data writes and restricted running data writes, thereby reducing the risk of running data loss. The running data write instruction and the non-running data restricted write instruction are simple to generate and have a fast response time. Furthermore, they allow for independent control of forced running data writes and restricted running data writes upon receiving different instructions, further ensuring the efficiency and flexibility of the storage controller control and improving the user experience.

[0126] In some embodiments, restricting the writing of at least a portion of non-running data to memory in response to receiving a non-running data restriction write instruction sent by the processor includes: stopping the fragmentation operation in response to receiving a fragmentation operation stop instruction to restrict the writing of non-running data generated by the fragmentation operation to memory. Alternatively, stopping the bad block management operation in response to receiving a bad block management operation stop instruction to restrict the writing of non-running data generated by the bad block management operation to memory. It may also be possible to stop the fragmentation operation in response to receiving a fragmentation operation stop instruction, and stop the bad block management operation in response to receiving a bad block management operation stop instruction.

[0127] Non-running data write restriction instructions, used to limit the storage controller from writing at least a portion of non-running data to memory, include at least one of a fragmentation operation stop instruction and a bad block management operation stop instruction. The fragmentation operation stop instruction stops the storage controller's fragmentation operation to limit, or prohibit, the writing of non-running data generated by the fragmentation operation to memory. The storage controller performs fragmentation operations periodically under normal circumstances to address the fragmentation problem caused by discontinuous storage cells generated during storage allocation and deallocation, leading to inefficient storage space utilization. During fragmentation operations, the storage controller analyzes the data distribution and reorganizes the data, involving the generation and writing of non-running data. The storage controller can respond to the fragmentation operation stop instruction by ceasing the execution of the fragmentation operation, thereby preventing the writing of non-running data to memory during the fragmentation process.

[0128] The bad block management operation stop command is used to halt the bad block management operation of the storage controller, thereby limiting or prohibiting the writing of non-operational data generated during the bad block management operation to memory. Under normal circumstances, the storage controller performs bad block management operations periodically to promptly detect and resolve bad block issues caused by faulty or unreadable physical storage units in the storage space. During bad block management operations, the storage controller needs to move and reorganize the valid data in the bad blocks, which involves the generation and writing of non-operational data. The storage controller can respond to the bad block management operation stop command to stop executing the bad block management operation, thereby preventing non-operational data from being written to memory during the bad block management process.

[0129] In this embodiment, at least one of the fragmentation processing operation stop instruction and the bad block management operation stop instruction is used as a non-running data restriction write instruction to limit the storage controller from writing at least a portion of non-running data to the memory. This allows the storage controller's fragmentation processing operation and bad block management operation to be stopped separately by the fragmentation processing operation stop instruction and the bad block management operation stop instruction, thereby limiting the writing of non-running data generated by the fragmentation processing operation and bad block management operation to the memory. This reduces the risk of running data loss when the fragmentation processing operation stop instruction and the bad block management operation stop instruction are received. The generation of the fragmentation processing operation stop instruction and the bad block management operation stop instruction is simple and has a fast response speed. Furthermore, independent control of the fragmentation processing operation and the bad block management operation can be achieved when different instructions are received, further ensuring the efficiency and flexibility of the storage controller control and improving the user experience.

[0130] In some embodiments, the storage control method further includes: sending feedback information to the processor in response to the completion of the execution of the first storage control instruction.

[0131] The storage controller can send feedback information to the processor upon completion of the first storage control instruction, indicating that the storage control action instructed by the first storage control instruction has been completed. If the processor does not receive feedback information from the storage controller within a preset time, it means that the storage controller has not completed the execution of the first storage control instruction due to reasons such as instruction execution failure within the preset time. Therefore, it cannot achieve the function of controlling the storage controller to force the writing of running data or restrict the writing of non-running data, and the electronic device still faces the risk of losing running data.

[0132] Therefore, in response to the completion of the first storage control instruction, the storage controller sends feedback information to the processor. If the processor does not receive feedback information from the storage controller within a preset time, it can send the first storage control instruction to the storage controller again. This allows the storage controller to perform forced writing of running data or restricted writing of non-running data according to the first storage control instruction. Thus, by sending feedback information, the processor can determine whether it is necessary to send the first storage control instruction again.

[0133] In this embodiment, in response to the completion of the first storage control instruction, the storage controller sends feedback information to the processor, which provides the processor with a basis for determining whether the first storage control instruction needs to be sent again. This allows the processor to send the first storage control instruction to the storage controller again if it does not receive feedback information from the storage controller within a preset time. This enables the storage controller to perform forced writing of running data or restricted writing of non-running data according to the first storage control instruction. In this way, the protection effect of running data is ensured by receiving the first storage control instruction again when the execution of the first storage control instruction is abnormal.

[0134] In some embodiments, the storage control method further includes: in response to receiving a second storage control instruction sent by the processor, releasing the restriction on writing non-running data to the memory, wherein the second storage control instruction is generated in response to the device status information switching from meeting a preset condition to not meeting a preset condition.

[0135] If an electronic device is removed from a low-voltage state through charging or voltage regulation, or if the temperature drops to a level above the high-temperature state, the storage controller's writing of data to the memory will no longer be affected. In this case, even if the storage controller writes non-operating data, it will not affect the ability and efficiency of writing operating data. It is necessary to remove the writing restriction on non-operating data to restore the normal storage operation of non-operating data.

[0136] Therefore, when the processor detects that the device status information has changed from meeting preset conditions to not meeting preset conditions, it sends a second storage control command to the storage controller. This allows the storage controller to respond to the second storage control command by releasing the restriction on writing non-running data to the memory, thereby resuming normal writing of non-running data when the risk of running data loss is low. For example, the processor can send the second storage control command to restart the storage controller's fragmentation processing and bad block management operations, thereby resuming the movement and organization of non-running data during the fragmentation processing and bad block management operations.

[0137] In this embodiment, upon receiving the second storage control command, by removing the restriction on writing non-operating data to the memory, normal writing of non-operating data can be resumed when the risk of losing operating data is low. This achieves adaptive adjustment of the storage control strategy to high and low voltage states, thereby improving the user experience.

[0138] In one exemplary embodiment, a storage control method is provided, applied to a storage controller, with reference to... Figure 3 As shown, the storage control method includes:

[0139] S11. In response to receiving the running data write instruction sent by the processor, write the running data into the memory;

[0140] S12. In response to receiving a fragmentation processing operation stop instruction, stop the fragmentation processing operation to restrict the writing of non-running data generated by the fragmentation processing operation into the memory;

[0141] S13. In response to receiving a bad block management operation stop instruction, stop the bad block management operation to restrict the writing of non-running data generated by the bad block management operation into the memory;

[0142] S14. In response to the completion of at least one of the running data write instruction, the fragmentation processing operation stop instruction, and the bad block management operation stop instruction, send feedback information to the processor;

[0143] S15. In response to receiving a second storage control instruction from the processor, the restriction on writing non-running data into the memory is lifted.

[0144] In this embodiment, the storage controller responds to runtime data write commands, fragmentation operation stop commands, and bad block management operation stop commands by writing cached runtime data to the memory, stopping fragmentation operations, and stopping bad block management operations, respectively, thereby controlling the storage actions performed by the storage controller. The processor sends runtime data write commands, fragmentation operation stop commands, and bad block management operation stop commands to the storage controller when the device status information of the electronic device meets preset conditions affecting writing. This allows the processor to control the storage controller to perform forced writing of runtime data and restricted writing of non-running data, thereby reducing the risk of runtime data loss when write operations are affected. Furthermore, the method of receiving control commands ensures the efficiency and flexibility of the processor's control over the storage controller, improving the user experience.

[0145] In one exemplary embodiment, a storage control device is provided, applied to a processor, with reference to... Figure 4As shown, the storage control device includes an acquisition module 10 and a transmission module 20. The acquisition module 10 is used to acquire device status information of the electronic device, which is status information that can affect the storage controller's ability to write data to the memory. The transmission module 20 is used to send a first storage control command to the storage controller in response to the device status information meeting a preset condition affecting writing, so that the storage controller, in response to the first storage control command, writes the cached running data in the storage controller to the memory and / or restricts at least a portion of the non-running data from being written to the memory.

[0146] In this embodiment, by acquiring device status information through the acquisition module 10, the sending module 20 can send a first storage control command to the storage controller when it detects that the device status information meets the preset conditions affecting writing. This causes the storage controller to respond to the first storage control command by either writing its cached running data to the memory or restricting the writing of at least some non-running data to the memory, thereby controlling the storage actions performed by the storage controller. By sending the first storage control command to the storage controller when the device status information meets the preset conditions affecting writing, the storage controller can be controlled to perform forced writing of running data and restricted writing of non-running data. This reduces the risk of running data loss when the electronic device's writing is affected, and the method of sending the control command ensures the efficiency and flexibility of the processor's control over the storage controller, improving the user experience.

[0147] In one embodiment, the device status information includes voltage-related information, which is used to characterize the current battery voltage level of the electronic device; the preset conditions affecting writing include: the battery voltage level is low.

[0148] In one embodiment, the voltage-related information includes battery power, and the acquisition module 10 is further configured to: if the battery power is less than a preset power threshold, determine that the battery voltage state is a low voltage state; or, the voltage-related information includes battery voltage, and the acquisition module 10 is further configured to: if the battery voltage is less than a preset voltage threshold, determine that the battery voltage state is a low voltage state.

[0149] In one embodiment, the first storage control instruction includes: a running data write instruction, which instructs the storage controller to write cached running data into the memory; and a non-running data restriction write instruction, which restricts the storage controller from writing at least a portion of non-running data into the memory.

[0150] In one embodiment, the non-running data write restriction instruction includes: a fragmentation operation stop instruction for stopping the fragmentation operation of the storage controller to restrict the writing of non-running data generated by the fragmentation operation to the memory; and / or a bad block management operation stop instruction for stopping the bad block management operation of the storage controller to restrict the writing of non-running data generated by the bad block management operation to the memory.

[0151] In one embodiment, the sending module 20 is further configured to: in response to not receiving feedback information from the storage controller within a preset time, send the first storage control command to the storage controller again, wherein the feedback information is that the storage controller has sent the command after the first storage control command has been executed.

[0152] In one embodiment, the sending module 20 is further configured to: in response to the device status information switching from meeting preset conditions to not meeting preset conditions, send a second storage control instruction to the storage controller, the second storage control instruction being used to release the restriction on writing non-running data into the storage.

[0153] In one exemplary embodiment, a storage control device is provided, applied to a storage controller, with reference to... Figure 5 As shown, the storage control device includes an execution module 30, which is used to write cached running data into the memory and / or restrict at least some non-running data from being written into the memory in response to receiving a first storage control instruction sent by the processor. The first storage control instruction is generated in response to the device status information of the electronic device satisfying preset conditions affecting the writing.

[0154] In this embodiment, the storage controller, in response to a first storage control instruction, executes at least one of the following actions through the execution module 30: writing its cached runtime data to the memory and restricting at least a portion of non-running data from being written to the memory. This controls the storage actions performed by the storage controller. By sending the first storage control instruction to the storage controller when the device status information of the electronic device meets preset conditions affecting writing, the processor enables the storage controller to perform forced writing of runtime data and restricted writing of non-running data. This reduces the risk of runtime data loss when data writing is affected, and the method of receiving the control instruction ensures the efficiency and flexibility of controlling the storage controller, improving the user experience.

[0155] In one embodiment, the device status information includes voltage-related information, which is used to characterize the current battery voltage level of the electronic device; the preset conditions affecting writing include: the battery voltage level is low.

[0156] In one embodiment, the execution module 30 is further configured to: write running data to memory in response to receiving a running data write instruction sent by the processor; and restrict at least a portion of non-running data from being written to memory in response to receiving a non-running data restriction write instruction sent by the processor.

[0157] In one embodiment, the execution module 30 is further configured to: stop the fragmentation processing operation in response to receiving a fragmentation processing operation stop instruction, so as to restrict the writing of non-running data generated by the fragmentation processing operation to the memory; and / or, stop the bad block management operation in response to receiving a bad block management operation stop instruction, so as to restrict the writing of non-running data generated by the bad block management operation to the memory.

[0158] In one embodiment, the execution module 30 is further configured to: send feedback information to the processor in response to the completion of the first storage control instruction.

[0159] In one embodiment, the execution module 30 is further configured to: in response to receiving a second storage control instruction sent by the processor, release the restriction on writing non-running data into the memory, wherein the second storage control instruction is generated in response to the device status information switching from meeting preset conditions to not meeting preset conditions.

[0160] In one exemplary embodiment, an electronic device is provided, which may include, for example, a mobile phone, a tablet computer, or other device with storage capabilities.

[0161] refer to Figure 6 As shown, the electronic device may include one or more of the following components: processing component 101, memory 102, power component 103, multimedia component 104, audio component 105, input / output (I / O) interface 106, sensor component 107, and communication component 108.

[0162] Processing component 101 typically controls the overall operation of an electronic device, such as operations associated with display, telephone calls, data communication, camera operation, and recording. Processing component 101 may include one or more processors 109 to execute instructions to perform all or part of the steps of the methods described above. Furthermore, processing component 101 may include one or more modules to facilitate interaction between processing component 101 and other components. For example, processing component 101 may include a multimedia module to facilitate interaction between multimedia component 104 and processing component 101.

[0163] Memory 102 is configured to store various types of data to support the operation of the electronic device. Examples of such data include instructions for any application or method used to operate on the electronic device, contact data, phonebook data, messages, pictures, videos, etc. Memory 102 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0164] Power component 103 provides power to various components of the electronic device. Power component 103 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the electronic device.

[0165] Multimedia component 104 includes a screen that provides an output interface between the electronic device and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors may sense not only the boundaries of touch or swipe actions but also the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 104 includes a front-facing camera and / or a rear-facing camera. When the electronic device is in an operating mode, such as a shooting mode or a video mode, the front-facing camera and / or the rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0166] Audio component 105 is configured to output and / or input audio signals. For example, audio component 105 includes a microphone (MIC) configured to receive external audio signals when the electronic device is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 102 or transmitted via communication component 108. In some embodiments, audio component 105 also includes a speaker for outputting audio signals.

[0167] I / O interface 106 provides an interface between processing component 101 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, power buttons, and lock buttons.

[0168] Sensor assembly 107 includes one or more sensors for providing state assessments of various aspects of the electronic device. For example, sensor assembly 107 can detect the on / off state of the electronic device, the relative positioning of components such as the display and keypad of the electronic device, changes in the position of the electronic device or a component of the electronic device, the presence or absence of user contact with the electronic device, the orientation or acceleration / deceleration of the electronic device, and temperature changes of the electronic device. Sensor assembly 107 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 107 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, sensor assembly 107 may also include an accelerometer, a gyroscope, a magnetometer, a pressure sensor, or a temperature sensor.

[0169] Communication component 108 is configured to facilitate wired or wireless communication between electronic devices and other devices. Devices can access wireless networks based on communication standards, such as WiFi, 2G, or 3G, or combinations thereof. In one exemplary embodiment, communication component 108 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 108 also includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0170] In an exemplary embodiment, the electronic device may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the memory control method applied to the processor 109 described above.

[0171] In one exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 102 including instructions. These instructions can be executed by a processor 109 of an electronic device to perform the storage control method applied to the processor 109, and can also be executed by a storage controller of the electronic device to perform the storage control method applied to the storage controller. For example, the non-transitory computer-readable storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, or optical data storage device. When the instructions in the storage medium are executed by the processor 109 of the electronic device, the processor 109 is able to perform the storage control method applied to the processor 109 shown in the above embodiment. When the instructions in the storage medium are executed by the storage controller of the electronic device, the storage controller is able to perform the storage control method applied to the storage controller shown in the above embodiment.

[0172] In one exemplary embodiment, a computer program product is also provided, including a computer program that, when executed by a processor 109, implements the storage control method applied to the processor shown in the above embodiments, and when executed by a storage controller, implements the storage control method applied to the storage controller shown in the above embodiments.

[0173] Other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of the invention are indicated by the following claims.

[0174] It should be understood that the present invention is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.

Claims

1. A storage control method, characterized in that, The storage control method includes: Acquire device status information of an electronic device, wherein the device status information is status information that can affect the storage controller's writing of data to the memory; In response to the device status information meeting the preset conditions affecting writing, a first storage control command is sent to the storage controller, so that the storage controller, in response to the first storage control command, writes the cached running data in the storage controller into the memory and / or restricts at least a portion of the non-running data from being written into the memory.

2. The storage control method according to claim 1, characterized in that, The device status information includes voltage-related information, which is used to characterize the current battery voltage level of the electronic device. The preset conditions affecting writing include: the battery voltage is in a low voltage state.

3. The storage control method according to claim 2, characterized in that, The voltage-related information includes battery power, and the storage control method further includes: If the battery charge is less than a preset charge threshold, the battery voltage state is determined to be the low voltage state. or, The voltage-related information includes battery voltage, and the storage control method further includes: If the battery voltage is less than a preset voltage threshold, the battery voltage state is determined to be the low voltage state.

4. The storage control method according to claim 1, characterized in that, The first storage control instruction includes: A data write instruction is provided to instruct the storage controller to write the cached data into the memory. Non-running data write restriction instruction, which is used to restrict the storage controller from writing at least a portion of non-running data into the memory.

5. The storage control method according to claim 4, characterized in that, The non-running data write restriction instructions include: A fragmentation operation stop instruction is used to stop the fragmentation operation of the storage controller, thereby restricting the writing of non-running data generated by the fragmentation operation into the memory; and / or, The bad block management operation stop instruction is used to stop the bad block management operation of the storage controller, so as to restrict the writing of non-running data generated by the bad block management operation into the memory.

6. The storage control method according to any one of claims 1 to 5, characterized in that, After the storage control method sends a first storage control command to the storage controller in response to the device status information satisfying a preset condition affecting writing, the storage control method further includes: If no feedback information is received from the storage controller within a preset time, the first storage control command is sent to the storage controller again. The feedback information is sent by the storage controller in response to the completion of the execution of the first storage control command.

7. The storage control method according to any one of claims 1 to 5, characterized in that, The storage control method further includes: In response to the device status information switching from meeting the preset condition to not meeting the preset condition, a second storage control instruction is sent to the storage controller. The second storage control instruction is used to release the restriction on writing non-operating data into the memory.

8. A storage control method, characterized in that, The storage control method includes: In response to receiving a first storage control instruction sent by the processor, cached running data is written to memory and / or at least some non-running data is restricted from being written to memory, wherein the first storage control instruction is generated in response to the device status information of the electronic device satisfying preset conditions affecting the writing.

9. The storage control method according to claim 8, characterized in that, The device status information includes voltage-related information, which is used to characterize the current battery voltage level of the electronic device. The preset conditions affecting writing include: the battery voltage is in a low voltage state.

10. The storage control method according to claim 8, characterized in that, The step of responding to receiving a first storage control instruction sent by the processor to write cached runtime data to memory and / or restrict at least a portion of non-running data from being written to memory includes: In response to receiving a runtime data write instruction sent by the processor, the runtime data is written to the memory; In response to receiving a non-running data write restriction instruction sent by the processor, at least a portion of the non-running data is restricted from being written to the memory.

11. The storage control method according to claim 10, characterized in that, The response to receiving a non-running data write restriction instruction sent by the processor, restricting the writing of at least a portion of non-running data into the memory, includes: In response to receiving a fragmentation operation stop command, the fragmentation operation is stopped to restrict the writing of non-running data generated by the fragmentation operation into the memory; and / or, In response to receiving a bad block management operation stop command, the bad block management operation is stopped to restrict the writing of non-running data generated by the bad block management operation into the memory.

12. The storage control method according to any one of claims 8 to 11, characterized in that, The storage control method further includes: In response to the completion of the first storage control instruction, feedback information is sent to the processor.

13. The storage control method according to any one of claims 8 to 11, characterized in that, The storage control method further includes: In response to receiving a second storage control instruction sent by the processor, the restriction on writing non-running data into the memory is lifted. The second storage control instruction is generated in response to the device status information switching from meeting the preset conditions to not meeting the preset conditions.

14. A storage control device, characterized in that, The storage control device includes: The acquisition module is used to acquire device status information of the electronic device, wherein the device status information is status information that can affect the storage controller to write data to the memory. The sending module is configured to send a first storage control command to the storage controller in response to the device status information meeting a preset condition affecting writing, so that the storage controller, in response to the first storage control command, writes the cached running data in the storage controller into the memory and / or restricts at least a portion of the non-running data from being written into the memory.

15. A storage control device, characterized in that, The storage control device includes: An execution module is configured to, in response to receiving a first storage control instruction sent by a processor, write cached running data into a memory and / or restrict at least a portion of non-running data from being written into a memory, wherein the first storage control instruction is generated in response to the device status information of the electronic device satisfying preset conditions affecting the writing.

16. An electronic device, characterized in that, The electronic device includes: processor; Memory used to store processor-executable instructions; The processor is configured to perform the storage control method as described in any one of claims 1 to 7.

17. An electronic device, characterized in that, The electronic device includes: Storage controller; Memory used to store instructions executable by the storage controller; The storage controller is configured to perform the storage control method as described in any one of claims 8 to 13.

18. A non-transitory computer-readable storage medium, characterized in that, When the instructions in the storage medium are executed by the processor of the electronic device, the electronic device is able to perform the storage control method as described in any one of claims 1 to 7; When the instructions in the storage medium are executed by the storage controller of the electronic device, the electronic device is able to perform the storage control method as described in any one of claims 8 to 13.

19. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the storage control method as described in any one of claims 1 to 7; When the computer program is executed by the storage controller, it implements the storage control method as described in any one of claims 8 to 13.

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