A display memory expansion method, device, equipment and storage medium

Abstract

This application provides a method, apparatus, device, and storage medium for expanding video memory. The method includes: acquiring an access request associated with a computing task; suspending the execution of the computing task in the event of a data page table failure, and determining a target thread based on the structure of the data page table; generating read / write instructions based on the target thread; in response to the read / write instructions, acquiring target data from a remote storage node and writing the target data to a local storage node; updating the data page, and resuming the execution of the computing task. In this embodiment, in the event of a data page table failure, the target thread is determined based on the structure of the data page table; read / write instructions are generated based on the target thread; and then target data is acquired from a remote storage node and written to a local storage node. This approach sinks the data path down to the hardware layer, achieving video memory expansion through data interaction between hardware layers, thus eliminating the latency overhead caused by operating system software stack switching and interrupt handling.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a method, apparatus, device and storage medium for expanding video memory. Background Technology

[0002] As the number of parameters in large-scale artificial intelligence models exceeds trillions, the onboard high-bandwidth memory capacity of GPUs has become a major bottleneck limiting model training efficiency and inference concurrency.

[0003] In existing technologies, one approach is a unified virtual memory technology based on the operating system. This approach allows the GPU to directly access host memory. However, this approach severely wastes bus bandwidth, leading to frequent pauses in the computational pipeline.

[0004] In existing technologies, one approach is a hardware offloading scheme based on a dedicated data processor. This scheme introduces a dedicated smart network interface card (NIC) with an independent computing core to take over storage protocols and data transfer. However, this approach is costly and has high development and maintenance complexity.

[0005] In existing technologies, one approach is the traditional GPU-Pass Remote Direct Memory Access (RDMA) technology. However, this approach cannot truly enable the GPU to autonomously access remote heterogeneous storage resources.

[0006] Therefore, how to provide a memory expansion technology that can reduce latency interference and has a low cost is a technical problem that needs to be solved in this field. Summary of the Invention

[0007] This application provides a method, apparatus, device, and storage medium for expanding video memory, aiming to provide a video memory expansion technology that can reduce latency interference and has a low cost.

[0008] In a first aspect, embodiments of this application provide a method for expanding video memory, the method comprising:

[0009] During the execution of a computing task, an access request associated with the computing task is obtained; the access request is used to access the data page table associated with the computing task in the local storage node;

[0010] In the event of a data page table failure, the execution of the computation task is suspended, and the target thread is determined based on the structure of the data page table.

[0011] Based on the target thread, generate read and write instructions;

[0012] In response to the read / write command, the target data is retrieved from the remote storage node and written to the local storage node;

[0013] Update the data page and resume the computation task.

[0014] Optionally, before suspending the execution of the computation task and determining the target thread based on the structure of the data page table in the event of a data page table failure, the method further includes:

[0015] Read the page table entries of the data page table associated with the computing task;

[0016] If the valid bit of the page table entry is a first preset value, the data page table is determined to be valid.

[0017] If the valid bit of the page table entry is a second preset value, the data page table is determined to be invalid.

[0018] Optionally, determining the target thread based on the structure of the data page table includes:

[0019] Identify multiple threads within the same thread bundle that are associated with the data page table;

[0020] The target thread is determined from the plurality of threads using bit manipulation instructions.

[0021] Optionally, generating read / write instructions based on the target thread includes:

[0022] Access the page table entries in the data page through the target thread;

[0023] Read the position flag bit in the page table entry;

[0024] When the location flag indicates that the remote storage node is a first storage medium, a first work queue element is constructed;

[0025] When the location flag indicates that the remote storage node is a second storage medium, a second work queue element is constructed;

[0026] Read and write instructions are generated based on the first work queue element or the second work queue element.

[0027] Optionally, updating the data page includes:

[0028] When the target data is written to the local storage node, a completion entry is written to the completion queue in the local storage node;

[0029] The target thread polls the completion queue in the local storage node.

[0030] If the completion entry is detected in the completion queue, the data page is updated.

[0031] Optionally, updating the data page further includes:

[0032] The valid bit in the page table entry of the data page table is modified to a first preset value that indicates the validity of the data page table.

[0033] Optionally, the method further includes:

[0034] If the storage space of the local storage node is detected to be lower than a preset threshold, a set of data blocks is sampled from the local storage node;

[0035] If the storage space of the data block is not occupied, detect the modification status of the data block;

[0036] When the modification status of the data block indicates that the data block has been modified, after storing the database data to the remote storage node, a data overwrite operation is performed on the database.

[0037] If the modification status of the data block indicates that the data block has not been modified, a data overwrite operation is performed on the database.

[0038] Secondly, embodiments of this application provide a video memory expansion device, the video memory expansion device comprising:

[0039] The acquisition module is used to acquire access requests associated with the computing task during the execution of the computing task; the access requests are used to access the data page table associated with the computing task in the local storage node;

[0040] The first processing module is used to suspend the execution of the computing task in the event that the data page table fails, and to determine the target thread based on the structure of the data page table.

[0041] The generation module is used to generate read and write instructions based on the target thread;

[0042] The write module is used to respond to the read / write command, obtain target data from the remote storage node, and write the target data to the local storage node;

[0043] The second processing module is used to update the data page and resume the execution of the computing task.

[0044] Thirdly, embodiments of this application provide an electronic device, including: a processor, a memory, and a program stored in the memory and executable on the processor, wherein when the program is executed by the processor, it implements the steps of the video memory expansion method as described in the first aspect.

[0045] Fourthly, embodiments of this application provide a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the video memory expansion method as described in the first aspect.

[0046] This application provides a method, apparatus, device, and storage medium for expanding video memory. The method includes: during the execution of a computing task, acquiring an access request associated with the computing task; the access request being used to access a data page table associated with the computing task in a local storage node; in the event of a data page table failure, suspending the execution of the computing task and determining a target thread based on the structure of the data page table; generating read / write instructions based on the target thread; in response to the read / write instructions, acquiring target data from a remote storage node and writing the target data to the local storage node; updating the data page table and resuming the execution of the computing task. In this embodiment, in the event of a data page table failure, the target thread is determined based on the structure of the data page table; read / write instructions are generated based on the target thread; and then target data is acquired from a remote storage node and written to the local storage node. This approach sinks the data path down to the hardware layer and achieves video memory expansion through data interaction between hardware layers, eliminating the latency overhead caused by operating system software stack switching and interrupt handling. Attached Figure Description

[0047] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0048] Figure 1 This is a flowchart of a video memory expansion method provided in an embodiment of this application;

[0049] Figure 2 This is a schematic diagram of a system architecture for an application of a video memory expansion method provided in an embodiment of this application;

[0050] Figure 3 This is a schematic diagram of the structure of the data page table provided in an embodiment of this application;

[0051] Figure 4 This is a schematic diagram of a circular queue area page provided in an embodiment of this application;

[0052] Figure 5 This is an application flowchart of a method for expanding video memory provided in an embodiment of this application;

[0053] Figure 6 This is a schematic diagram of the structure of a video memory expansion device provided in an embodiment of this application;

[0054] Figure 7 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0055] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0056] See Figure 1 , Figure 1 This is a flowchart of a video memory expansion method provided in an embodiment of this application, such as... Figure 1 As shown in the figure, a method for expanding video memory provided in this application includes the following steps:

[0057] Step S101: During the execution of the computing task, an access request associated with the computing task is obtained; the access request is used to access the data page table associated with the computing task in the local storage node.

[0058] In this step, during the execution of the computing task, an access request is intercepted. This access request is used to access the data page table in the local storage node that is associated with the computing task.

[0059] Optionally, the aforementioned local storage node is local high-bandwidth device memory (HBM).

[0060] In step S102, if the data page table fails, the execution of the computing task is suspended, and the target thread is determined based on the structure of the data page table.

[0061] In this step, given the data page table, we determine whether the data page table is valid or invalid.

[0062] In the event of a data page table failure, the execution of the computation task is suspended, and a target thread is determined based on the structure of the data page table. This target thread is also known as the main thread.

[0063] If the data page table is valid, the target data can be read directly from the local storage node, and the computation task can continue to be executed.

[0064] Step S103: Generate read / write instructions based on the target thread.

[0065] Step S104: In response to the read / write instruction, obtain the target data from the remote storage node and write the target data to the local storage node.

[0066] In this step, after determining the target thread, read / write instructions are generated using the target thread. Based on these instructions, target data is retrieved from the remote storage node and written to the local storage node. Optionally, the remote storage node is a remote non-volatile storage pool.

[0067] Step S105: Update the data page and resume the execution of the computing task.

[0068] In this step, after writing the target data to the local storage node, the data page is updated, and the computation task is resumed.

[0069] In this embodiment, when the data page table fails, the target thread is determined based on the structure of the data page table; based on the target thread, read and write instructions are generated; then the target data is obtained from the remote storage node and written to the local storage node. In this way, by sinking the data path to the hardware layer and realizing the expansion of video memory through data interaction between hardware layers, the latency overhead caused by operating system software stack switching and interrupt handling is eliminated.

[0070] Furthermore, the memory expansion method provided in this embodiment utilizes a general-purpose control processing unit to handle complex connection management and protocol handshakes, and uses a standard network interface device for data transfer. It eliminates the need to purchase expensive dedicated hardware, resulting in lower costs and easier maintenance.

[0071] Please see Figure 2 and Figure 3 It should be noted that, Figure 2 In the diagram, label 101 represents the host processor, label 100 represents the local compute node, label 102 represents the host memory, label 103 represents the GPU, label 104 represents the RDMA network card, label 105 represents the bus, label 200 represents the high-speed network, label 300 represents the remote storage node, label 301 represents the remote controller, label 302 represents the remote memory pool, and label 303 represents the remote non-volatile storage pool.

[0072] Next, through Figure 2 and Figure 3The system initialization process led by the host processor (101) is described. In this stage, the system utilizes the general computing power of the host CPU (101) to handle complex RDMA connection management and resource mapping, thereby building a "control and data separation" operating environment.

[0073] Specifically, it includes the following three steps:

[0074] 1. RDMA Context and Queue Pair (QP) Construction: The Host CPU (101) loads the kernel-mode driver via the PCIe bus (105) and identifies the generic RNIC (104). The Host CPU (101) allocates protection domains on the RNIC (104) and creates multiple queue pairs.

[0075] The host CPU (101) configures these QPs in user-mode passthrough mode. Simultaneously, the host CPU (101) requests a contiguous physical memory region in the high-bandwidth device memory (1031) of the graphics processor (103) by calling the GPU driver interface, and registers it as a send queue (SQ) and receive queue (RQ) buffer for RDMA, instead of using host memory (102). This ensures that subsequent control instruction flow is entirely completed within the local video memory domain of the GPU (103).

[0076] 2. Doorbell Register pass-through mapping: In order to enable the GPU (103) to directly drive the RNIC (104), a key address remapping operation is performed.

[0077] The hardware doorbell register of RNIC (104) is physically located in the BAR (BaseAddressRegister) space of the network card.

[0078] The host CPU (101) first maps the physical address of the doorbell register to the virtual address space of the host process.

[0079] Subsequently, the Host CPU (101) uses a heterogeneous programming interface (such as cudaHostRegister) to further map the aforementioned host virtual address to a specific segment in the unified virtual address space (400) accessible to the GPU (103).

[0080] After the above steps, the internal thread of GPU (103) obtains a pointer that directly points to the hardware doorbell of RNIC (104). By writing data to this pointer address, the hardware engine of RNIC (104) can be directly accessed, thus bypassing the control flow of Host CPU (101).

[0081] 3. Software Page Table and Metadata Synchronization: The Host CPU (101) communicates out-of-band with the remote controller (301) of the remote storage node (300) via a high-speed network (200). The Host CPU (101) obtains the remote access key (R_Key) and logical address range of the remote memory pool (302) and the remote non-volatile memory pool (303). The Host CPU (101) formats this metadata into a page table entry structure (including location flags (422) and remote keys (425)) and loads it all at once into the reserved software page table area (411) in the high-bandwidth device memory for the GPU (103) to query at runtime.

[0082] Optionally, before suspending the execution of the computation task and determining the target thread based on the structure of the data page table in the event of a data page table failure, the method further includes:

[0083] Read the page table entries of the data page table associated with the computing task;

[0084] If the valid bit of the page table entry is a first preset value, the data page table is determined to be valid.

[0085] If the valid bit of the page table entry is a second preset value, the data page table is determined to be invalid.

[0086] In this embodiment, the page table entries of the data page table are read, and the valid bits of the page table entries are checked.

[0087] If the valid bit of a page table entry is a first preset value, the data page table is determined to be valid. If the valid bit of a page table entry is a second preset value, the data page table is determined to be invalid.

[0088] Optionally, the first preset value is set to 1, and the second preset value is 0.

[0089] Optionally, determining the target thread based on the structure of the data page table includes:

[0090] Identify multiple threads within the same thread bundle that are associated with the data page table;

[0091] The target thread is determined from the plurality of threads using bit manipulation instructions.

[0092] In this embodiment, multiple threads within the same warp may simultaneously trigger page fault access to the same page. Therefore, in this embodiment, multiple threads within the same warp that are associated with the data page table are identified. Optionally, hardware synchronization primitives can be used to identify all threads within the warp that access the same failed page, and bit manipulation instructions can be used to select a unique main thread from the bitmask to determine the target thread.

[0093] Optionally, generating read / write instructions based on the target thread includes:

[0094] Access the page table entries in the data page through the target thread;

[0095] Read the position flag bit in the page table entry;

[0096] When the location flag indicates that the remote storage node is a first storage medium, a first work queue element is constructed;

[0097] When the location flag indicates that the remote storage node is a second storage medium, a second work queue element is constructed;

[0098] Read and write instructions are generated based on the first work queue element or the second work queue element.

[0099] In this embodiment, after determining the target thread, the page table entry in the data page is accessed through the target thread, and the position flag bit in the page table entry is read.

[0100] When the location flag indicates that the remote storage node is the first storage medium, a first work queue element is constructed; when the location flag indicates that the remote storage node is the second storage medium, a second work queue element is constructed.

[0101] Optionally, the first storage medium is a dynamic random access memory (DRAM), and the second storage medium is a non-volatile memory.

[0102] It should be understood that the above-mentioned work queue element is also called a Work Queue Entry, abbreviated as WQE.

[0103] Optionally, the first work queue element is an RDMA Read work queue element. The second work queue element is a work queue element encapsulated according to the NVMe-oF protocol.

[0104] One alternative implementation involves generating read / write instructions based on elements of the first work queue.

[0105] Another alternative implementation is to generate read / write instructions based on the elements of the second work queue.

[0106] In this embodiment, a media identifier is introduced into the metadata table to support the fusion of the massive capacity of non-volatile storage media with the low latency characteristics of remote volatile storage media, thereby constructing a hierarchical, large-capacity extended storage pool.

[0107] Please see Figure 2 and Figure 3 , combined Figure 2 and Figure 3 The system elaborates on how it incorporates a remote non-volatile memory pool (303) into a unified address space and enables low-overhead access to block storage devices on the GPU (103) side.

[0108] 1. Pseudo-physical mapping of logical block addresses During the system initialization phase, the Host CPU (101) negotiates with the remote storage node (300) through the management link. The Host CPU (101) maps the logical block address (LBA) range in the remote non-volatile storage pool (300) to pseudo-physical memory addresses.

[0109] When constructing the software page table area (411), the Host CPU (101) sets the location flag (422) of the page table entry mapped to non-volatile memory to 1 (identifying it as a storage medium) and encodes the corresponding non-volatile memory namespace ID and LBA start address into the remote key and offset (425) field.

[0110] 2. Media-aware request encapsulation: When the main thread of the GPU (103) detects a page fault and reads that the position flag (422) of the page table entry (420) is 1, it executes a different construction logic than accessing DRAM.

[0111] This includes Capsule Construction: Instead of constructing a standard RDMA Read request, the main thread constructs a CommandCapsule that conforms to the NVMe-over-Fabrics (NVMe-oF) protocol standard. This Capsule directly utilizes the LBA information stored in the page table entry (420).

[0112] Transparent transmission: The main thread sends the encapsulated packet to the remote storage node (300) via RNIC (104) through the doorbell mechanism.

[0113] No CPU conversion required: Protocol encapsulation is entirely done in the microcode of the GPU (103) or the CUDA core. The Host CPU (101) does not participate in the protocol conversion of each I / O request, thus eliminating the software interrupt overhead in the traditional I / O path.

[0114] 3. Remote Response and Direct Write: After receiving the encapsulated packet, the remote controller (301) parses the command of the non-volatile storage and directly reads the data from the remote non-volatile storage pool (303). Subsequently, the remote controller (301) uses the RDMA Write operation to directly write the data back to the data cache area (412) in the high-bandwidth device memory of the GPU (103), thus completing the data loading.

[0115] Optionally, updating the data page includes:

[0116] When the target data is written to the local storage node, a completion entry is written to the completion queue in the local storage node;

[0117] The target thread polls the completion queue in the local storage node.

[0118] If the completion entry is detected in the completion queue, the data page is updated.

[0119] Optionally, updating the data page further includes:

[0120] The valid bit in the page table entry of the data page table is modified to a first preset value that indicates the validity of the data page table.

[0121] In this embodiment, when the target data is written to the local storage node, a completion entry is written to the completion queue in the local storage node. The completion entry is also called the Completion Queue Entry, abbreviated as CQE.

[0122] The target thread polls the completion queue in the local storage node. If a completion entry is detected in the completion queue, it means that the local storage node stores the target data. The valid bit in the page table entry of the data page table is then modified to a first preset value that indicates the validity of the data page table, thereby updating the data page.

[0123] Optionally, the method further includes:

[0124] If the storage space of the local storage node is detected to be lower than a preset threshold, a set of data blocks is sampled from the local storage node;

[0125] If the storage space of the data block is not occupied, detect the modification status of the data block;

[0126] When the modification status of the data block indicates that the data block has been modified, after storing the database data to the remote storage node, a data overwrite operation is performed on the database.

[0127] If the modification status of the data block indicates that the data block has not been modified, a data overwrite operation is performed on the database.

[0128] Please see Figure 3 and Figure 4 The following explains how to ensure data consistency and computational security through fine-grained state management when the high-bandwidth device memory space of the GPU (103) is exhausted.

[0129] The system organizes the data cache area (412) in the memory of the high-bandwidth device into... Figure 4 The high-bandwidth device memory circular queue area (500) shown contains several fixed-size physical page frames (501).

[0130] 1. Dynamic maintenance of reference count (RefCnt): In order to prevent data being overwritten by the computed thread, the system uses the reference count (423) in the software page table area (411) as a safety lock.

[0131] Lock: When the main thread of any Warp successfully obtains the address mapping of a page, it uses the AtomicAdd instruction to increment the reference count (502) of that page by 1.

[0132] Unlock: After Warp completes its calculations on the page, it decrements the reference count (502) by 1 using the AtomicSub instruction.

[0133] 2. Eviction Decision Logic: When the tail pointer (510) catches up with the head pointer (520), it indicates that the buffer is full and an eviction operation must be performed. The GPU (103) executes the eviction decision logic (530):

[0134] Step A: The busy check system checks the physical page frame (501a) pointed to by the head pointer (520). If its reference count (502) is greater than 0, it indicates that there are still threads using the page.

[0135] Operation: Perform a skip operation (531). Instead of forcibly reclaiming the page, the system moves the head pointer (520) clockwise to the next page frame to avoid blocking subsequent data loading requests (Head-of-Line Blocking).

[0136] Step B: Dirty Data Check. If the physical page frame (501b) pointed to by the head pointer (520) or the reference count (502) is 0, it indicates that the page is in a free state and can be reclaimed. At this time, further check the dirty bit (503) (corresponding to...). Figure 4 (D424 in the middle).

[0137] Case B1 (CleanEvict): If the dirty bit (503) is 0, it indicates that the data has not been modified. The system performs an overwrite operation (532), directly marking the page frame as available and allocating it to the new data request.

[0138] Scenario B2 (DirtyWrite-back): If the dirty bit (503) is 1, it indicates that the data has been modified and not synchronized. The system pauses recycling, triggers a remote storage write operation (540), and constructs an RDMAWrite request to flush the data back to the remote storage node (300). After the write-back is completed, the dirty bit is cleared, and then the overwrite is performed.

[0139] The above strategy implements an improved Clock page replacement algorithm, which maximizes the utilization of video memory bandwidth while ensuring no concurrent contention, and effectively avoids video memory allocation deadlock caused by individual long-tail tasks.

[0140] For a better understanding of the overall technical solution, please refer to [link / reference]. Figure 2 , Figure 3 and Figure 5 In an optional application scenario, the video memory expansion method provided in this application embodiment includes the following steps:

[0141] 1. Page Fault Detection Based on Software Page Tables: When the GPU (103) computation thread is executing kernel function computation tasks, it intercepts access requests to the unified virtual address space (400). The thread first uses the target logical address as an index to query the software page table area (411) located in the local high-bandwidth device memory.

[0142] The thread reads the corresponding page table entry (420) and checks the valid bits (421) within it.

[0143] If the valid bit (421) is 1, it indicates that the data has been stored in the local data cache (412), and the thread directly performs read and write operations.

[0144] If the valid bit (421) is 0, it indicates that the target data is located in the remote memory pool (302) or the remote non-volatile storage pool (303), and is judged as a "soft page fault". The program flow jumps to the exception handling logic.

[0145] 2. Warp-level request merging: Given that the GPU (103) adopts a SIMT architecture, multiple threads within the same warp may simultaneously trigger page faults to the same page. To avoid sending redundant requests to the RNIC (104) and causing congestion on the PCIe bus (105), this embodiment executes the following logic:

[0146] Among them, the GPU (103) uses hardware synchronization primitives (such as __match_any_sync) to identify all threads in Warp that access the same invalid page.

[0147] Specifically, bit manipulation instructions are used to select a unique main thread from the bitmask.

[0148] Only the main thread executes the subsequent RDMA request construction steps, while the other threads enter a spin-wait state.

[0149] 3. Zero-copy request construction and direct hardware triggering include the following steps:

[0150] Read metadata: The main thread accesses the page table entry (420) in the software page table area (411) again to read the location flag (422) and the remote key and offset (425).

[0151] If the location flag (422) indicates that the medium is DRAM, the main thread constructs a standard RDMARead work queue element (WQE).

[0152] If the location flag (422) indicates that the medium is non-volatile memory, the main thread constructs a WQE package that conforms to the NVMe-oF protocol.

[0153] Constructing the WQE: The WQE is filled with the remote key (425) obtained from the page table entry (420), the remote physical address, and the target address pre-allocated in the local data cache (412).

[0154] Trigger the doorbell: The main thread executes a memory-mapped write (MMIOWrite) instruction to directly write the index value of the WQE to the doorbell register address of the RNIC (104) that has been mapped in Example 1.

[0155] Execution flow: In response to the doorbell signal, the RNIC (104) initiates the DMA engine, pulls data from the remote storage node (300) via the high-speed network (200), and writes it directly to the data buffer (412) of the high-bandwidth device memory. This process completely bypasses the Host CPU 101.

[0156] 4. Asynchronous completion of confirmation and status restoration includes the following steps:

[0157] After the RNIC (104) completes the data transfer, it writes a completion entry (CQE) to the completion queue in the memory of the high-bandwidth device.

[0158] The main thread polls the completion queue in the memory of the high-bandwidth device. Once the corresponding CQE is detected, it is certain that the data has been safely written to disk.

[0159] The thread atomically updates the valid bit (421) of the page in the software page table area (411) to 1 and updates the reference count (423).

[0160] The main thread wakes up the waiting threads in the same warp, and all threads re-initiate access to the address. At this time, the local cache is hit, and the calculation is resumed.

[0161] Please see Figure 6 , Figure 6 This is a schematic diagram of the structure of a video memory expansion device provided in an embodiment of this application, as shown below. Figure 6 As shown, the video memory expansion device 600 includes:

[0162] The acquisition module 601 is used to acquire an access request associated with the computing task during the execution of the computing task; the access request is used to access the data page table associated with the computing task in the local storage node;

[0163] The first processing module 602 is used to suspend the execution of the computing task in the event that the data page table fails, and to determine the target thread based on the structure of the data page table.

[0164] The generation module 603 is used to generate read and write instructions based on the target thread;

[0165] The write module 604 is used to, in response to the read / write command, obtain target data from the remote storage node and write the target data to the local storage node;

[0166] The second processing module 605 is used to update the data page and resume the execution of the computing task.

[0167] Optionally, the video memory expansion device 600 further includes:

[0168] The reading module is used to read page table entries of the data page table associated with the computing task;

[0169] The first determining module is used to determine that the data page table is valid when the valid bit of the page table entry is a first preset value;

[0170] The second determining module is used to determine that the data page table is invalid when the valid bit of the page table entry is a second preset value.

[0171] Optionally, the first processing module 602 is specifically used for:

[0172] Identify multiple threads within the same thread bundle that are associated with the data page table;

[0173] The target thread is determined from the plurality of threads using bit manipulation instructions.

[0174] Optionally, the generation module 603 is specifically used for:

[0175] Access the page table entries in the data page through the target thread;

[0176] Read the position flag bit in the page table entry;

[0177] When the location flag indicates that the remote storage node is a first storage medium, a first work queue element is constructed;

[0178] When the location flag indicates that the remote storage node is a second storage medium, a second work queue element is constructed;

[0179] Read and write instructions are generated based on the first work queue element or the second work queue element.

[0180] Optionally, the second processing module 605 is specifically used for:

[0181] When the target data is written to the local storage node, a completion entry is written to the completion queue in the local storage node;

[0182] The target thread polls the completion queue in the local storage node.

[0183] If the completion entry is detected in the completion queue, the data page is updated.

[0184] Optionally, the second processing module 605 is further specifically used for:

[0185] The modification module is used to modify the valid bit in the page table entry of the data page table to a first preset value that indicates the validity of the data page table.

[0186] Optionally, the video memory expansion device 600 further includes:

[0187] The sampling module is used to sample a set of data blocks from the local storage node when the storage space of the local storage node is detected to be lower than a preset threshold.

[0188] The detection module is used to detect the modification status of the data block when the storage space of the data block is not occupied;

[0189] The third processing module is used to perform a data overwrite operation on the database after storing the database data to the remote storage node when the modification status of the data block indicates that the data block has been modified.

[0190] The fourth processing module is used to perform a data overwrite operation on the database when the modification status of the data block indicates that the data block has not been modified.

[0191] The video memory expansion device is capable of implementing each process of the above-described video memory expansion method, with one-to-one correspondence of technical features and achieving the same technical effect. To avoid repetition, it will not be described in detail here.

[0192] For details, see Figure 7 This application also provides an electronic device, including a bus 701, a transceiver 702, an antenna 703, a bus interface 704, a processor 705, and a memory 706.

[0193] The transceiver 702 is used to acquire an access request associated with the computing task during the execution of the computing task; the access request is used to access the data page table associated with the computing task in the local storage node;

[0194] The processor 705 is configured to suspend the execution of the computing task in the event of a data page table failure, and to determine the target thread based on the structure of the data page table.

[0195] Based on the target thread, generate read and write instructions;

[0196] The transceiver 702 is used to retrieve target data from a remote storage node in response to the read / write command;

[0197] The processor 705 is used to write the target data into the local storage node;

[0198] Update the data page and resume the computation task.

[0199] exist Figure 7 In this document, a bus architecture (represented by bus 701) is used. Bus 701 can include any number of interconnected buses and bridges, linking various circuits including one or more processors represented by processor 705 and memory represented by memory 706. Bus 701 can also link various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and therefore will not be described further herein. Bus interface 704 provides an interface between bus 701 and transceiver 702. Transceiver 702 can be a single element or multiple elements, such as multiple receivers and transmitters, providing a unit for communicating with various other devices over a transmission medium. Data processed by processor 705 is transmitted over a wireless medium via antenna 703, which further receives data and transmits data to processor 705.

[0200] Processor 705 manages bus 701 and general processing, and also provides various functions, including timing, peripheral interface, voltage regulation, power management, and other control functions. Memory 706 can be used to store data used by processor 705 during operation.

[0201] Optionally, the processor 705 may be a central processing unit (CPU), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or a complex programmable logic device (CPLD).

[0202] This application also provides a computer-readable storage medium storing a computer program. When executed by a processor, this computer program implements the various processes of the above-described video memory expansion method embodiments and achieves the same technical effects. To avoid repetition, it will not be described again here. The computer-readable storage medium may be a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc.

[0203] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0204] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0205] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A method for expanding video memory, characterized in that, The method includes: During the execution of a computing task, an access request associated with the computing task is obtained; the access request is used to access the data page table associated with the computing task in the local storage node; In the event of a data page table failure, the execution of the computation task is suspended, and the target thread is determined based on the structure of the data page table. Based on the target thread, generate read and write instructions; In response to the read / write command, the target data is retrieved from the remote storage node and written to the local storage node; Update the data page and resume the computation task.

2. The method according to claim 1, characterized in that, Before suspending the execution of the computation task and determining the target thread based on the structure of the data page table in the event of a data page table failure, the method further includes: Read the page table entries of the data page table associated with the computing task; If the valid bit of the page table entry is a first preset value, the data page table is determined to be valid. If the valid bit of the page table entry is a second preset value, the data page table is determined to be invalid.

3. The method according to claim 1, characterized in that, The determination of the target thread based on the structure of the data page table includes: Identify multiple threads within the same thread bundle that are associated with the data page table; The target thread is determined from the plurality of threads using bit manipulation instructions.

4. The method according to claim 1, characterized in that, The step of generating read / write instructions based on the target thread includes: Access the page table entries in the data page through the target thread; Read the position flag bit in the page table entry; When the location flag indicates that the remote storage node is a first storage medium, a first work queue element is constructed; When the location flag indicates that the remote storage node is a second storage medium, a second work queue element is constructed; Read and write instructions are generated based on the first work queue element or the second work queue element.

5. The method according to claim 1, characterized in that, Updating the data page includes: When the target data is written to the local storage node, a completion entry is written to the completion queue in the local storage node; The target thread polls the completion queue in the local storage node. If the completion entry is detected in the completion queue, the data page is updated.

6. The method according to claim 1, characterized in that, Updating the data page further includes: The valid bit in the page table entry of the data page table is modified to a first preset value that indicates the validity of the data page table.

7. The method according to claim 1, characterized in that, The method further includes: If the storage space of the local storage node is detected to be lower than a preset threshold, a set of data blocks is sampled from the local storage node; If the storage space of the data block is not occupied, detect the modification status of the data block; When the modification status of the data block indicates that the data block has been modified, after storing the database data to the remote storage node, a data overwrite operation is performed on the database. If the modification status of the data block indicates that the data block has not been modified, a data overwrite operation is performed on the database.

8. A video memory expansion device, characterized in that, The device includes: The acquisition module is used to acquire access requests associated with the computing task during the execution of the computing task; the access requests are used to access the data page table associated with the computing task in the local storage node; The first processing module is used to suspend the execution of the computing task in the event that the data page table fails, and to determine the target thread based on the structure of the data page table. The generation module is used to generate read and write instructions based on the target thread; The write module is used to respond to the read / write command, obtain target data from the remote storage node, and write the target data to the local storage node; The second processing module is used to update the data page and resume the execution of the computing task.

9. An electronic device, characterized in that, include: A processor, a memory, and a program stored in the memory and executable on the processor, wherein the program, when executed by the processor, implements the steps of the video memory expansion method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the video memory expansion method as described in any one of claims 1 to 7.

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