Affine frequency division multiplexing modulation, demodulation method, device, system, medium and product

Abstract

The application discloses an affine frequency division multiplexing modulation and demodulation method, device, system, medium and product, the affine frequency division multiplexing modulation transmitting method comprises the following steps: obtaining a target frequency domain signal to be transmitted, and calculating two chirp matrices based on two chirp parameters; the target frequency domain signal is multiplied in parallel by the conjugate matrix of the second chirp matrix to obtain a target rotating frequency domain signal; the signal is inversely discrete fourier transformed to obtain a first target time domain signal; the first target time domain signal is secondly phase-rotated based on the conjugate matrix of the first chirp matrix to obtain a second target time domain signal; the target time domain signal is preprocessed before transmission to generate a target time domain transmitting signal and perform radio frequency transmission, and the technical scheme of the embodiment of the application can effectively solve the performance bottleneck problems, such as Doppler frequency shift sensitivity and weak anti-interference ability, of the orthogonal frequency division multiplexing technology in the high-speed mobile scene.

Description

Technical Field

[0001] This invention relates to the field of signal communication technology, and in particular to a simulated radio frequency multiplexing modulation and demodulation method, device, system, medium and product. Background Technology

[0002] As wireless communication technology evolves to the sixth generation, new application scenarios such as integrated communication and sensing, high-speed rail communication, and low-orbit satellite internet are rapidly developing. The channel environment faced by communication equipment is shifting from relatively static to extremely dynamic. In these scenarios, the high-speed relative motion between the transmitting and receiving ends generates significant Doppler frequency shifts, causing the channel to change rapidly in both the time and frequency domains. This places unprecedented robustness requirements on the design of physical layer waveforms.

[0003] In existing technologies, orthogonal frequency division multiplexing (OFDM) waveforms are widely used due to their high spectral efficiency. However, they are extremely sensitive to carrier frequency offset and are prone to severe inter-carrier interference due to Doppler spread in high-speed mobile scenarios. Current mainstream solutions mainly rely on complex frequency offset estimation algorithms, iterative channel equalization, or the insertion of numerous pilots in the time-frequency domain for compensation. These methods not only increase the system's signal processing overhead and power consumption but also suffer from performance bottlenecks in extremely dynamic environments. In recent years, some new waveform designs, such as schemes based on offset orthogonal amplitude modulation (OEM), have been proposed. However, achieving a good balance between combating double-spread channels and achieving efficient hardware processing remains challenging, limiting their practical application in high-dynamic communication systems. Summary of the Invention

[0004] This invention provides a radio frequency multiplexing modulation and demodulation method, device, system, medium, and product to achieve reliable and efficient wireless communication in high-speed mobile scenarios.

[0005] According to one aspect of the present invention, a radio frequency multiplexing modulation method is provided, the method comprising: Acquire the target frequency domain signal that matches the target service data to be transmitted, and calculate two chirp matrices based on two chirp parameters, wherein each chirp matrix has a preset matrix length; Based on the conjugate matrix of the second chirped matrix among the two chirped matrices, the target frequency domain signal is subjected to parallel conjugate complex multiplication to generate the target rotated frequency domain signal; Perform an inverse discrete Fourier transform on the target rotation frequency domain signal to generate the first target time domain signal; Based on the conjugate matrix of the first chirp matrix among the two chirp matrices, the first target time-domain signal is subjected to a second phase rotation to generate the second target time-domain signal; Perform at least one pre-transmission processing operation on the second target time-domain signal to obtain the target time-domain transmission signal, and then perform radio frequency transmission on the target time-domain transmission signal.

[0006] According to another aspect of the present invention, a radio frequency multiplexing demodulation method is also provided, the method comprising: After receiving the target time-domain received signal, at least one post-reception processing operation is performed on the target time-domain received signal to obtain the processed time-domain signal; Get two chirp matrices calculated based on the two currently updated chirp parameters, where each chirp matrix has a preset matrix length; Based on the first chirp matrix among the two chirp matrices, the processed time-domain signal is subjected to parallel conjugate complex multiplication to generate the target rotation time-domain signal; Perform a parallel discrete Fourier transform on the target rotation time-domain signal to generate a first target frequency-domain signal; Based on the second chirp matrix among the two chirp matrices, the first target frequency domain signal is subjected to parallel conjugate complex multiplication to generate the second target frequency domain signal; The target service data sent by the transmitting end is reconstructed from the second target frequency domain signal, and the target service data is reported to the upper layer application.

[0007] According to another aspect of the present invention, a radio frequency multiplexing modulation apparatus is provided, the apparatus comprising: The data acquisition module is used to acquire the target frequency domain signal that matches the target service data to be transmitted, and to calculate two chirp matrices based on two chirp parameters, wherein each chirp matrix has a preset matrix length; The parallel conjugate complex multiplication module is used to perform parallel conjugate complex multiplication on the target frequency domain signal based on the conjugate matrix of the second chirped matrix among the two chirped matrices, to generate the target rotated frequency domain signal; The inverse discrete Fourier transform module is used to perform an inverse discrete Fourier transform on the target rotated frequency domain signal to generate a first target time domain signal; The second phase rotation module is used to perform a second phase rotation on the first target time domain signal based on the conjugate matrix of the first chirp matrix among the two chirp matrices, to generate a second target time domain signal; The radio frequency transmission module is used to perform at least one pre-transmission processing operation on the second target time domain signal to obtain a target time domain transmission signal, and to perform radio frequency transmission on the target time domain transmission signal.

[0008] According to another aspect of the present invention, a radio frequency multiplexing demodulation apparatus is provided, the apparatus comprising: The receiving signal module is used to perform at least one post-reception processing operation on the target time domain received signal after receiving the target time domain received signal to obtain a processed time domain signal. The chirp matrix acquisition module is used to acquire two chirp matrices calculated based on the two currently updated chirp parameters, wherein each chirp matrix has a preset matrix length; The parallel conjugate complex multiplication module is used to perform parallel conjugate complex multiplication on the processed time-domain signal based on the first chirp matrix of the two chirp matrices to generate the target rotation time-domain signal; The Discrete Fourier Transform module is used to perform a parallel Discrete Fourier Transform on the target rotation time-domain signal to generate a first target frequency-domain signal; The second phase rotation module is used to perform parallel conjugate complex multiplication on the first target frequency domain signal according to the second chirp matrix in the two chirp matrices to generate the second target frequency domain signal; The data recovery module is used to recover the target service data sent by the transmitter from the second target frequency domain signal and report the target service data to the upper layer application.

[0009] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising: At least one processor; and A memory communicatively connected to the at least one processor; wherein, The memory stores a computer program that can be executed by the at least one processor, which is then executed by the at least one processor to enable the at least one processor to perform a radio frequency division multiplexing modulation and demodulation method as described in any embodiment of the present invention.

[0010] According to another aspect of the present invention, a radio frequency multiplexing modulation and demodulation system is provided, including a transmitting terminal and a receiving terminal; The transmitting terminal is used to implement a radio frequency division multiplexing modulation method as described in any embodiment of the present invention; The receiving terminal is used to implement a simulated radio frequency multiplexing demodulation method as described in any embodiment of the present invention.

[0011] According to another aspect of the present invention, a computer-readable storage medium is provided, characterized in that the computer-readable storage medium stores computer instructions, the computer instructions being used to cause a processor to execute a radio frequency multiplexing modulation and demodulation method as described in any embodiment of the present invention.

[0012] According to another aspect of the present invention, a computer program product is provided, characterized in that the computer program product includes a computer program, which is executed by a processor in the steps of a simulated radio frequency multiplexing modulation and demodulation method according to any embodiment of the present invention.

[0013] The technical solution of this invention involves acquiring a target frequency domain signal that matches the target service data to be transmitted, and calculating two chirp matrices with preset matrix lengths based on two chirp parameters; performing parallel conjugate complex multiplication on the target frequency domain signal according to the conjugate matrix of the second chirp matrix to generate a target rotated frequency domain signal; performing an inverse discrete Fourier transform on this signal to generate a first target time domain signal; then performing a second phase rotation on the first target time domain signal according to the conjugate matrix of the first chirp matrix to generate a second target time domain signal; finally, performing pre-transmission processing on the second target time domain signal to obtain a target time domain transmission signal and performing radio frequency transmission; correspondingly, at the receiving end, performing post-reception processing on the target time domain received signal to obtain... The process involves processing the time-domain signal and obtaining the chirp matrix calculated based on the currently updated chirp parameters. Parallel conjugate complex multiplication is then performed on the processed time-domain signal using the first chirp matrix to generate a target rotated time-domain signal. This signal is then subjected to a discrete Fourier transform to generate a first target frequency-domain signal. A phase rotation is performed on the first target frequency-domain signal using the second chirp matrix to generate a second target frequency-domain signal. Finally, the target service data is recovered from the second target frequency-domain signal and reported. This process solves the problem of severe performance degradation caused by Doppler frequency shift in existing orthogonal frequency division multiplexing (OFDM) technology in high-dynamic scenarios such as high-speed mobile environments. It achieves beneficial effects such as enhancing the robustness of communication waveforms in fast-time-varying channels, improving system anti-interference capabilities, and enhancing transmission reliability.

[0014] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This is a flowchart of a simulated radio frequency multiplexing modulation method according to Embodiment 1 of the present invention; Figure 2 This is a flowchart of another simulated radio frequency multiplexing modulation method provided according to Embodiment 2 of the present invention; Figure 3 This is a flowchart of a simulated radio frequency multiplexing demodulation method provided in Embodiment 3 of the present invention; Figure 4 This is a flowchart of a parallel simulated radio frequency multiplexing modulation system transmission process in a specific scenario applicable to the embodiments of the present invention; Figure 5 This is a schematic diagram of an 8-point FFT butterfly calculation in a specific scenario applicable to an embodiment of the present invention; Figure 6 This is a flowchart illustrating a multi-level FFT grouping implementation in a specific scenario applicable to an embodiment of the present invention. Figure 7 This is a demodulation flowchart of a parallel simulated radio frequency multiplexing receiving system applicable to a specific scenario in which this invention is implemented; Figure 8 This is a schematic diagram of a radio frequency multiplexing modulation device according to Embodiment 4 of the present invention; Figure 9 This is a schematic diagram of a simulated radio frequency multiplexing demodulation device according to Embodiment 5 of the present invention; Figure 10 This is a schematic diagram of the structure of an electronic device that implements a radio frequency multiplexing modulation and demodulation method according to an embodiment of the present invention. Detailed Implementation

[0017] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0018] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0019] Example 1 Figure 1This is a flowchart of a simulated radio frequency division multiplexing modulation transmission method provided in Embodiment 1 of the present invention. This embodiment is applicable to wireless communication systems in high-speed mobile or high-dynamic environments to combat Doppler frequency shift. The method can be executed by a simulated radio frequency division multiplexing modulation transmission device, which can be implemented in hardware and / or software and is generally configured in an electronic device used as a transmitting terminal.

[0020] Correspondingly, such as Figure 1 As shown, the method includes: S110. Acquire the target frequency domain signal that matches the target service data to be transmitted, and calculate two chirp matrices based on two chirp parameters, wherein each chirp matrix has a preset matrix length.

[0021] The chirp parameter can be understood as the curvature of the signal phase as it changes over time. The magnitude of the chirp parameter controls the specific phase offset that is superimposed on each signal component and is proportional to the square of the index.

[0022] In this embodiment, the transmitting end obtains the target frequency domain signal that has been encoded and modulated. At the same time, based on two key modulation parameters pre-configured for this communication link, namely the first chirp parameter and the second chirp parameter, a specific calculation process is performed to construct two diagonal matrices (i.e., chirp matrices) with the same preset dimensions. These two diagonal matrices are the mathematical basis for realizing the subsequent core affine transformation.

[0023] In this embodiment, each chirp matrix is ​​a square matrix, and each chirp matrix has a preset matrix length. The two chirp matrices have the same matrix length, for example, both can be N, where N can be 128 or 256, etc., and this embodiment does not impose any restrictions on this. That is, both chirp matrices can be N*N square matrices.

[0024] S120. Based on the conjugate matrix of the second chirped matrix among the two chirped matrices, perform parallel conjugate complex multiplication on the target frequency domain signal to generate the target rotated frequency domain signal.

[0025] In this context, parallel conjugate complex multiplication can be understood as the first phase modulation operation executed in the simulated radio frequency multiplexing modulation process. It is based on the matrix corresponding to the second chirp parameter and its function is to perform the first phase rotation on the mapped frequency domain signal.

[0026] In this embodiment, the conjugate of the calculated second chirp matrix is ​​taken to obtain its conjugate matrix. The conjugate matrix is ​​then used to perform point-to-point complex multiplication on the prepared target frequency domain signal. This operation is equivalent to applying a specific phase deflection related to the square of its ordinal number to each frequency domain symbol component, thereby completing the first phase rotation operation in the transmission process and obtaining the pre-modulated frequency domain signal, i.e., the target rotated frequency domain signal.

[0027] S130. Perform a discrete inverse Fourier transform on the target rotating frequency domain signal to generate a first target time domain signal.

[0028] In this embodiment, the target rotated frequency domain signal obtained after the first phase rotation is subjected to a discrete Fourier inverse transform operation. The transformation process is a standard process in the communication system. Its function is to convert the representation domain of the signal from the frequency domain to the time domain, thereby generating a waveform sample sequence that can be processed by the subsequent radio frequency circuit, namely the first target time domain signal.

[0029] S140. Based on the conjugate matrix of the first chirped matrix among the two chirped matrices, perform a second phase rotation on the first target time-domain signal to generate a second target time-domain signal.

[0030] In this embodiment, a conjugate matrix is ​​used again, this time the conjugate matrix of the first chirp matrix. The matrix is ​​multiplied point-to-point with the first target time-domain signal obtained in the previous step. This operation constitutes the second phase rotation in the transmission process, further modulating the time-domain waveform, and finally generating a second target time-domain signal that fully conforms to the definition of a simulated radio frequency multiplexing waveform.

[0031] S150. Perform at least one pre-transmission processing operation on the second target time-domain signal to obtain a target time-domain transmission signal, and perform radio frequency transmission on the target time-domain transmission signal.

[0032] In this embodiment, to ensure the reliability of signal transmission in the actual channel and to adapt to the radio frequency analog circuit, a series of necessary post-processing is required on the second target time domain signal. This typically includes inserting a cyclic prefix to combat multipath delay, converting the digital sample sequence into an analog waveform, and up-converting and amplifying it through the radio frequency front-end circuit to obtain the target time domain transmission signal. Finally, the target time domain transmission signal is transmitted through the antenna to complete the entire transmission process.

[0033] The technical solution of this invention acquires a target frequency domain signal that matches the target service data to be transmitted, and calculates two chirp matrices with preset matrix lengths based on two chirp parameters. Then, based on the conjugate matrix of the second chirp matrix, parallel conjugate complex multiplication is performed on the target frequency domain signal to generate a target rotated frequency domain signal. Subsequently, an inverse discrete Fourier transform is performed on this signal to generate a first target time domain signal. Then, based on the conjugate matrix of the first chirp matrix, a second phase rotation is performed on the first target time domain signal to generate a second target time domain signal. Finally, the second target time domain signal undergoes pre-transmission processing, including adding a cyclic prefix and digital-to-analog conversion, to obtain the target time domain transmission signal and perform radio frequency transmission. This solves the problem of severe performance degradation caused by Doppler frequency shift sensitivity in high-speed mobile scenarios such as high-speed rail and satellite communication using orthogonal frequency division multiplexing (OFDM) technology, achieving significant improvements in signal transmission reliability and enhanced system anti-interference capabilities in high-dynamic, fast-time-varying channels.

[0034] Example 2 Figure 2 This is a flowchart of another simulated radio frequency division multiplexing modulation transmission method provided in Embodiment 2 of the present invention. This embodiment is based on the above embodiments and optimized. Specifically, the operation of "calculating two chirp matrices based on two chirp parameters" has been refined.

[0035] Correspondingly, such as Figure 2 As shown, the method includes: S210. Acquire the target frequency domain signal that matches the target service data to be transmitted.

[0036] S220. The matrix length of the complex exponential factor corresponding to each chirp parameter is calculated in parallel by Taylor fitting.

[0037] Among them, the complex exponential factor can be understood as the basic unit for constructing the chirp matrix. Each factor is a complex number. From a physical perspective, each such factor represents a complex number with a specific rotation phase.

[0038] In this embodiment, the first step is to generate the core elements constituting the chirp matrix, namely a series of complex exponential factors. This process is accomplished using an efficient Taylor fitting calculation method, which transforms complex trigonometric function calculations into simple lookup and multiplication-addition operations. Specifically, a table of baseline values ​​is pre-stored, and then a large number of required complex numbers are calculated simultaneously by looking up the table and combining it with the polynomial expansion formula. Each result corresponds to a complex exponential factor with a specific phase.

[0039] The formula for obtaining the chirp matrix using Taylor fitting is shown below: in, (.) represents constructing a diagonal matrix using the vectors within the parentheses. It is represented as a complex exponential factor, j represents the imaginary unit, n represents the index, and c represents the chirp parameter.

[0040] Optionally, based on the above embodiments, the matrix-length complex exponential factors corresponding to each chirp parameter can be calculated in parallel using Taylor fitting, which may include: For the target chirp parameter c to be processed, construct a matrix of length N with complex exponential factors. The computational task, where n takes different values ​​in different computational tasks. .

[0041] Based on the preset hardware parallelism P, the N computing tasks are divided into Set up a set of tasks and execute each set of tasks sequentially; where ceil(). is the up-value function; When the current task set begins execution, P parallel threads are started simultaneously to execute the following operations concurrently: calculate ,in, for The quantization fixed-point value, C is The quantization fixed-point value, mod is the modulo operation; according to The search is performed in a pre-built sine and cosine lookup table, and the result is obtained based on the lookup table. and The specific value; Will and Substitute into the formula This yields the result of calculating a complex exponential factor.

[0042] in, It is the intermediate phase value obtained first during the generation of the chirped signal in order to calculate the nth complex exponential factor.

[0043] Generally, the first step is to define the core content to be calculated and its scale. The goal here is to calculate the number of complex exponential factors along the diagonal of a matrix, given a specific chirp parameter *c*. Each independent computational task is responsible for generating a complex fundamental unit with a unique phase characteristic based on a specific index. These indices cover the entire range from start to finish, ensuring that the complete set of fundamental units required to construct the full matrix is ​​generated.

[0044] Generally, the computing strategy is then determined based on the capabilities of the hardware design. The number of computing units that hardware can process simultaneously is limited; this maximum number is called the parallelism. To fully utilize this capability, the vast number of computing tasks needs to be grouped according to this parallelism, forming several task sets. The hardware then processes these sets one by one. Specifically, since the hardware parallelism is P and the total number of tasks is N, the tasks are divided into [number] sets, rounded up. There are several task sets, and each group of tasks is executed sequentially according to the grouping order.

[0045] Generally, when processing each set of tasks, the hardware fully utilizes its parallel capabilities, simultaneously launching multiple computing threads to handle all tasks within that set. Each thread independently and synchronously executes a series of identical operational steps, specifically including: First, performing the core phase value calculation. This process involves converting floating-point parameters into a fixed-point form that is easier for the hardware to process, and performing a modulo operation to obtain a base phase value within the standard period range. Specifically, The original phase value is determined by the chirp parameter c and the square of the index n. It can be very large. The modulo operation is used to extract the "fractional part" of this original phase, or in other words, to normalize it to [0, 2]. Within this fundamental period. This is because sine and cosine functions are periodic functions, with a phase difference of 2. Points whose values ​​are integer multiples of each other have the same function value. This operation is a crucial prerequisite for correctly performing table lookup calculations later.

[0046] Generally, the second step in the calculation is to look up the calculated base phase value in a pre-built data table. This table stores the sine and cosine function values ​​at different reference points. By looking up the table, the sine and cosine values ​​corresponding to the reference point closest to the calculated phase value can be quickly obtained, serving as the starting point for subsequent precise calculations.

[0047] Generally, the third step in the calculation is to substitute the fundamental sine and cosine values ​​obtained from the lookup table, along with the previously calculated fundamental phase value, into an approximate calculation formula. This formula, based on a reference value, can quickly and accurately calculate the precise sine and cosine values ​​corresponding to the target phase through simple polynomial operations. Finally, combining these values ​​yields the desired complex number result. In this way, one thread completes the task of one computational unit.

[0048] Furthermore, based on the above embodiments, and according to... Before performing a lookup in a pre-built sine and cosine lookup table, the following may also be included: Will Divide the interval into K sub-intervals, and determine the midpoint of each sub-interval k. ; Calculate the midpoint of each interval sine value and cosine value And according to each , and with each Corresponding to and Construct a sine and cosine lookup table; Accordingly The search is performed in a pre-built sine and cosine lookup table to obtain... and The specific values ​​include: Sure exist The target sub-interval within And obtain the target sub-interval in the lookup table. midpoint of the interval corresponding and ; According to the formula: Calculations yielded and The specific value.

[0049] Generally, the first step is to lay the foundation for subsequent fast approximation calculations. This is done by uniformly dividing a complete phase period into multiple consecutive segments of equal length, called sub-intervals. To obtain a representative reference position within each sub-interval, the exact midpoint of each sub-interval is typically chosen as the reference point for that interval; this point is called the interval midpoint.

[0050] Generally, after determining the midpoints of all sub-intervals, the sine and cosine function values ​​corresponding to all these midpoints are pre-calculated and calculated all at once. Then, the phase values ​​of these midpoints, along with the corresponding sine and cosine values, are stored sequentially to form a data structure called a sine / cosine lookup table. The core purpose of constructing this table is to avoid performing complex trigonometric function calculations in real time during signal processing, thereby greatly improving the efficiency of subsequent calculations.

[0051] Generally, when calculating the sine and cosine values ​​of a specific phase value, we first determine which specific subinterval it belongs to based on the magnitude of the phase value. This subinterval is called the target subinterval. Next, the midpoint phase value corresponding to the target subinterval is quickly retrieved from the previously constructed lookup table. , and the sine value stored at the midpoint Sum of cosine values .

[0052] Generally, after obtaining the reference point information, a specific approximate calculation formula is used to obtain the final result. Specifically, the target phase value will be... The reference point phase value obtained by looking up the table Phase value with reference point Corresponding reference sine value and the reference cosine value Substituting both into the second-order Taylor expansion, we get the following from the second-order Taylor expansion: This allows for the efficient derivation of approximate sine and cosine functions corresponding to the target phase value, thus obtaining... and The specific value.

[0053] S230. Construct a standard all-zero matrix based on the matrix length.

[0054] In this embodiment, after obtaining all complex twitch factors, a blank matrix of a specific dimension needs to be prepared as a basis. All elements of this matrix are initially set to zero, and its number of rows and columns are determined by the signal length of the entire communication waveform design. Its function is to serve as an empty container to hold and arrange the calculated complex exponential factors. When the matrix length is N, a standard N*N all-zero square matrix can be constructed.

[0055] S240. Place the complex exponential factors corresponding to each chirp parameter in sequence at the diagonal positions of the standard all-zero matrix to obtain the chirp matrix corresponding to each chirp parameter.

[0056] In this embodiment, all the complex exponential factors obtained through parallel computation are placed one by one on the main diagonal of the aforementioned all-zero matrix, according to their original index order. Thus, this originally all-zero matrix is ​​transformed into a special matrix with values ​​only on the main diagonal. Each value on this diagonal contains specific phase information determined by the chirp parameter, thereby forming the chirp matrix necessary for the subsequent affine transformation.

[0057] S250. Based on the conjugate matrix of the second chirped matrix among the two chirped matrices, perform parallel conjugate complex multiplication on the target frequency domain signal to generate the target rotated frequency domain signal.

[0058] S260. Perform a discrete inverse Fourier transform on the target rotating frequency domain signal to generate a first target time domain signal.

[0059] Optionally, based on the above embodiments, performing a parallel inverse discrete Fourier transform on the target rotating frequency domain signal to generate a first target time domain signal may include: Based on the frequency domain signal length N of the target rotating frequency domain signal and the preset butterfly operation level M, the number of groups L is determined, where, The series number M is determined based on the hardware parallelism. Based on the number of groups L, construct L butterfly computing tasks that need to be executed serially; During the execution of the current butterfly calculation task, N input points are acquired, wherein the N input points are N frequency domain points in the target rotating frequency domain signal, or N intermediate calculation points output by the previous butterfly calculation task; by For single-load granularity, load in batches in parallel across N input points. The input points are used, and the rotation factor matrix of the pre-generated discrete inverse Fourier transform is used. Obtain the butterfly factor corresponding to each input point in the current batch, where, , ; Based on the currently loaded Given input points and matching butterfly factors, perform M-level discrete inverse Fourier transforms in parallel to obtain... One intermediate calculation point; Return to execution For single-load granularity, load in batches in parallel across N input points. The operation continues for each input point until all N input points have been processed and the corresponding N intermediate calculation points are obtained, at which point the current butterfly calculation task ends. After splicing together the N intermediate calculation points output by the last butterfly calculation task to obtain N time-domain signals, multiply the N time-domain signals by 1 / N to obtain the normalized first target time-domain signal. In the process of generating the first target time domain signal, continuous or non-continuous data reading and writing is performed by using parallel data reading and writing hardware, and interleaving and filling processing of the processed data according to the index is achieved by using parallel data interleaving hardware.

[0060] Generally, the inverse discrete Fourier transform (IFT) of the target rotating frequency domain signal begins by determining how many sequentially executed groups the entire computation needs to be divided into, based on the total length N of the target rotating frequency domain signal and the number of butterfly operation stages M that the hardware can process simultaneously. The number of butterfly operation stages M is directly determined by the parallel processing capability of the hardware design; the greater the parallel processing capability, the larger the value of the number of butterfly operation stages M. The number of groups L is then calculated. The total length N of the target rotating frequency domain signal is the number of input data points, typically corresponding to the total number of subcarriers allocated within a transmission time interval, or the length of the signal block. In the simulated radio frequency division multiplexing modulation process, the generated target rotating frequency domain signal contains exactly N complex values, representing the symbols on all subcarriers. To ensure the completeness and reversibility of the mathematical transformation, an inverse discrete Fourier transform with the exact same number of points must be performed to map all frequency domain information to a time domain waveform without distortion.

[0061] Generally, due to the extremely high hardware cost of directly implementing large-scale N-point fully parallel transformations, a divide-and-conquer strategy is required to adapt to actual hardware capabilities. The hardware parallelism determines the number M of butterfly operations that can be executed consecutively in a single iteration. Based on this, the total... The complete computation of a level is decomposed into L sequential groups. Essentially, this breaks down a deep and complex computation graph into multiple shallower computational stages that can be repeatedly executed by hardware. Based on this grouping strategy, L sequentially executed butterfly computation tasks need to be constructed. "Sequential" means that the tasks start sequentially in time, forming a computational pipeline. Each task corresponds to processing a data block at a specific stage. This design ensures the orderly flow of data between multiple computational stages, with the output of the previous stage serving as the input of the next. This is the standard hardware pipeline organization for implementing multi-level iterative computations. Generally, the physical source of the N input points acquired during the execution of the current task depends on the task's position in the pipeline. For the first task, the input is the initial target rotating frequency domain signal; for subsequent tasks, the input is the intermediate result output by the preceding task after completing its current stage of computation. These intermediate result data have changed in value and meaning, but the number N must remain constant. This is determined by the non-decimation characteristic of the Discrete Fourier Transform algorithm itself, ensuring that data is neither lost nor redundant during the process.

[0062] Generally, due to the limited on-chip storage capacity of the hardware computing unit, it is impossible to simultaneously handle all N data points. Therefore, the N data points need to be loaded in batches. Loading at a granularity of N / L points matches the number of groups L, meaning that each batch of data will independently undergo the full set of M-level operations required by the current task. Simultaneously, the data is loaded from the pre-stored rotation factor matrix... The real-time matching butterfly factor is used to provide each batch of data with the specific rotation coefficients necessary for that operation stage.

[0063] Furthermore, the single-load granularity can be configured as follows: Where X is the expansion factor. By adjusting the value of X, the input port width and internal storage depth of the hardware computing core can be flexibly matched. Specifically, this design allows the processing flow to be cyclically called... In a single operation, a complete radix-2 FFT or IFFT operation of length N points, based on an M-level computational kernel, can be performed. Generally, after the data and pre-stored twitch factors are ready, the hardware executes the M-level butterfly operation in parallel. By fixing the M-level operation into a single execution unit, the hardware maximizes the utilization of its computational kernel. This operation is the essential computational step of the transform, progressively mixing and converting the characteristics of the frequency domain signal into the characteristics of the time domain waveform through complex addition and multiplication.

[0064] Generally, batch processing requires a loop until all N input points have been traversed. This loop is an essential means of handling large-scale data relative to limited hardware buffering capabilities. Completing the loop means that the current task stage has applied the specified M-level operations to all data, producing complete N intermediate results for this stage, thus preparing for the next task stage or the final output.

[0065] Generally, after all tasks are completed, the output sequence needs to be multiplied by normalization coefficients. This step is a necessary requirement of the mathematical definition of the Inverse Discrete Fourier Transform (IDFT formula includes 1 / N coefficients) to ensure the consistency of signal energy before and after the transform or to meet specific specifications. Throughout the data processing, dedicated parallel data read / write and interleaving hardware provides the necessary data scheduling and reassembly capabilities to adapt to the specific requirements of different computational stages for data arrangement patterns (such as sequential, inverted, and block interleaving). This is an indispensable foundation for achieving high-performance pipelined batch processing.

[0066] Furthermore, in this embodiment of the invention, the Discrete Fourier Transform (DFT) and its inverse transform are implemented at the hardware level through a configurable unified computing architecture. This is based on the fact that the transformation rotation matrices of the DFT and IDFT are conjugates. Based on this mathematical relationship, this embodiment designs a butterfly-shaped computational core with a configurable operating mode. This core can seamlessly switch between forward and inverse transform operations on the same physical circuitry by loading different pre-stored rotation factor tables (one set corresponding to the FFT, and another set corresponding to its conjugates for the IFFT) and accepting a simple mode selection signal. This "one set of hardware, two functions" design fundamentally achieves high reuse of hardware resources, significantly saves logic area and power consumption, and enhances system flexibility.

[0067] S270. Based on the conjugate matrix of the first chirp matrix in the two chirp matrices, perform a second phase rotation on the first target time-domain signal to generate a second target time-domain signal.

[0068] Optionally, based on the above embodiments, performing a second phase rotation on the first target time-domain signal according to the conjugate matrix of the first chirp matrix among the two chirp matrices to generate a second target time-domain signal may include: Construct N complex multiplication tasks that match N data points in the first target time-domain signal, wherein different complex multiplication tasks are used to perform calculations on data points at different positions in the first target time-domain signal; Based on the preset hardware parallelism P, the N complex multiplication tasks are divided into... Set up a set of multiplication tasks and execute each set of multiplication tasks sequentially. When processing the current set of multiplication tasks, P parallel threads are started simultaneously to execute the following operations concurrently: Acquire the data points of the target location in the time-domain signal of the first target; Load the conjugate factor of the conjugate matrix from the first chirped matrix corresponding to the target data point; Calculate the complex multiplication operation between the data point and the conjugate factor to obtain the target result data point; After completing the execution of the entire multiplication task set, the calculated N target result data points are organized to obtain the second target time domain signal.

[0069] Perform at least one pre-transmission processing operation on the second target time-domain signal to obtain the target time-domain transmission signal, and then perform radio frequency transmission on the target time-domain transmission signal.

[0070] Generally, the first step is to define the total workload to be completed in this calculation. This workload is exactly the same as the total number of data points in the input signal, because each data point needs to undergo a complex multiplication operation independently. Therefore, a number of computational tasks will be created that are equal to the total number of data points. Each task is explicitly assigned to a specific data point in the input signal, with the aim of systematically and comprehensively processing all data subsequently.

[0071] Generally, the execution method of the computational tasks is then planned based on the specific capabilities of the hardware design. The number of computational tasks that the hardware can execute simultaneously is fixed; this upper limit is called the degree of parallelism. To efficiently utilize this parallel computing capability, the massive number of computational tasks needs to be packaged according to their degree of parallelism, forming several task sets. These task sets are then submitted to the hardware sequentially for processing one by one, thus transforming a large problem into a series of smaller batches of problems that can be efficiently handled by the hardware.

[0072] Generally, when hardware begins processing a set of tasks, it simultaneously launches a number of computing units equal to the number of parallel processing units. Each computing unit independently processes one task in the set. Each computing unit performs three operations sequentially: First, it reads the data point at its assigned location from the input signal; next, based on the data point's location index, it accurately locates and loads the corresponding twiddle factor from the storage unit. This twiddle factor originates from the conjugate matrix of a pre-defined chirp matrix; finally, it performs a complex multiplication operation on this data point and the corresponding twiddle factor to produce a new result data point. All these operations by the computing units are performed synchronously and concurrently.

[0073] Generally, after processing all task sets in the above manner, the result will be the same number of data points as the original input signal. These result data points are then reorganized and rearranged according to their original position order, forming a complete new signal after this phase rotation modulation. This new signal is the output that needs to be processed in the next step of the process.

[0074] Generally, generating the final transmittable radio frequency signal requires a series of necessary processing steps on the new signal. These processing operations are standard components of the wireless communication transmission link and typically include adding a cyclic prefix to resist channel multipath effects and converting the digital signal sequence into an analog waveform. After these processes are completed, the signal is sent to the radio frequency front end for up-conversion and power amplification, and finally radiated through the antenna.

[0075] S280. Perform at least one pre-transmission processing operation on the second target time-domain signal to obtain a target time-domain transmission signal, and perform radio frequency transmission on the target time-domain transmission signal.

[0076] The technical solution of this invention acquires a target frequency domain signal that matches the target service data to be transmitted, and calculates the corresponding number of complex exponential factors in parallel using Taylor fitting based on two chirp parameters. A standard all-zero matrix is ​​then constructed, and each complex exponential factor is sequentially placed on its diagonal to generate two chirp matrices. Subsequently, the target frequency domain signal is subjected to parallel conjugate complex multiplication based on the conjugate matrix of the second chirp matrix to generate a first rotated frequency domain signal. This signal is then subjected to an inverse discrete Fourier transform to generate a first target time domain signal. Finally, the first target time domain signal is subjected to a second phase rotation based on the conjugate matrix of the first chirp matrix to generate the final second target time domain signal. This solves the problem of severely reduced communication reliability caused by Doppler frequency shift sensitivity in high-dynamic scenarios such as high-speed movement in orthogonal frequency division multiplexing (OFDM) technology, achieving the beneficial effects of effectively suppressing inter-carrier interference and improving signal transmission quality and system robustness in fast time-varying channels.

[0077] Example 3 Figure 3 This is a flowchart of a simulated radio frequency division multiplexing (RFD) receiving and demodulation method provided in Embodiment 3 of the present invention. This embodiment is applicable to wireless communication systems in high-speed or high-dynamic environments to combat Doppler frequency shift. The method can be executed by a simulated RFD receiving and demodulation device, which can be implemented in hardware and / or software and is generally configured in an electronic device that serves as a receiving terminal.

[0078] Correspondingly, such as Figure 3 As shown, the method includes: S310. After receiving the target time-domain received signal, perform at least one post-reception processing operation on the target time-domain received signal to obtain a processed time-domain signal.

[0079] In this embodiment, the receiver first captures the target time-domain received signal from the wireless channel and performs a series of necessary preprocessing steps. These processes typically include converting the analog signal to a digital signal, removing protective prefixes added to combat multipath interference, and performing clock synchronization and compensation to correct time-frequency deviations generated during transmission, ultimately obtaining a clean and aligned time-domain signal that can be processed by subsequent core algorithms.

[0080] S320. Obtain two chirp matrices calculated based on the two currently updated chirp parameters, wherein each chirp matrix has a preset matrix length.

[0081] In this embodiment, the receiver calculates two chirp matrices, which are generated based on two chirp parameters configured for the current communication link and possibly adaptively updated according to channel conditions. Each chirp matrix is ​​a diagonal matrix with a specific dimension matching the signal format of the communication, and each element on the diagonal contains specific phase information determined by the corresponding chirp parameter.

[0082] S330. Based on the first chirp matrix among the two chirp matrices, perform parallel conjugate complex multiplication on the processed time-domain signal to generate the target rotation time-domain signal; In this embodiment, the first of the two calculated chirp matrices is used to perform point-to-point complex multiplication on the preprocessed time-domain signal. This operation is one of the inverse operations of the transmitting end's corresponding process. Its purpose is to apply the first phase rotation to the received time-domain signal, which has already been distorted by the wireless channel, to begin stripping away the specific modulation applied during transmission, preparing the signal for conversion to a domain where it can be better separated.

[0083] S340. Perform a parallel discrete Fourier transform on the target rotation time-domain signal to generate a first target frequency-domain signal.

[0084] In this embodiment, a Discrete Fourier Transform is performed on the time-domain signal obtained after the first phase rotation process. This transform is a standard operation in communication systems, and its function is to convert the signal representation from the time domain to the frequency domain. Through this transform, the distribution of the rotated time-domain signal in the frequency domain can be obtained. The first target frequency domain signal contains the symbol information originally mapped by the transmitter, but also has the influence of the channel superimposed.

[0085] Optionally, based on the above embodiments, a parallel discrete Fourier transform is performed on the target rotation time-domain signal to generate a first target frequency-domain signal, including: Based on the signal length N of the target rotating time-domain signal and the preset butterfly operation level M, the number of groups L is determined, where, The series number M is determined based on the hardware parallelism. Based on the number of groups L, construct L butterfly computing tasks that need to be executed serially; During the execution of the current butterfly calculation task, N input points are acquired, wherein the N input points are N time-domain points in the target rotation time-domain signal, or N intermediate calculation points output by the previous butterfly calculation task; by For single-load granularity, load in batches in parallel across N input points. Input points, and in the pre-generated discrete Fourier transform rotation factor matrix Obtain the butterfly factor corresponding to each input point in the current batch, where, , ; Based on the currently loaded Given input points and matching butterfly factors, perform M-level discrete Fourier transforms in parallel to obtain... One intermediate calculation point; Return to execution For single-load granularity, load in batches in parallel across N input points. The operation continues for each input point until all N input points have been processed and the corresponding N intermediate calculation points are obtained, at which point the current butterfly calculation task ends. The N-point frequency domain signal obtained by splicing the N intermediate calculation points output by the last butterfly calculation task is used as the first target frequency domain signal. In the process of generating the first target frequency domain signal, continuous or non-continuous data reading and writing is performed by using parallel data reading and writing hardware, and interleaving and filling processing of the processed data according to the index is achieved by using parallel data interleaving hardware.

[0086] Generally, the implementation process of the Discrete Fourier Transform (DFT) at the receiving end is the same as that of the Inverse Discrete Fourier Transform (IFT) at the transmitting end in terms of core grouped parallel hardware architecture and execution method. The process begins by calculating the number of butterfly operation levels determined by the length of the target time-domain signal and the hardware parallelism, and then constructing multiple butterfly computation tasks that need to be executed serially. During the execution of the current task, the method of obtaining input points (i.e., target rotated time-domain signal points, or intermediate result points of previous tasks) is the same as in the inverse transform process. During processing, data is loaded in batches from all input points in parallel, with the same single-load granularity, and the logic for cyclic loading and processing is also the same. The key difference is that the butterfly factors matched for each batch of data are derived from the pre-generated Discrete Fourier Transform rotation factor matrix, rather than its conjugate matrix. Subsequently, the process of using these factors to perform multi-level butterfly operations on the loaded data in parallel shares the same computational core as the inverse transform in terms of hardware mechanism. After all serial tasks are completed, the intermediate calculation points output by the last task are concatenated to obtain the frequency domain points of the first target frequency domain signal. This process does not require post-processing with normalization coefficients as in the inverse transform. Similarly, this process also relies on parallel data read / write and interleaving hardware to achieve efficient data scheduling and reassembly.

[0087] S350. Based on the second chirp matrix among the two chirp matrices, perform parallel conjugate complex multiplication on the first target frequency domain signal to generate the second target frequency domain signal.

[0088] In this embodiment, a second chirp matrix is ​​used to perform point-to-point complex multiplication on the converted first target frequency domain signal. This is the final inverse operation of the core modulation process at the transmitter, namely the second phase rotation. After completing this step, the fully demodulated second target frequency domain signal is obtained.

[0089] S360. Reconstruct the target service data sent by the transmitting end from the second target frequency domain signal, and report the target service data to the upper layer application.

[0090] In this embodiment, it is necessary to recover the original transmitted target service data from the second target frequency domain signal. This process typically includes channel estimation and equalization using known pilot symbols to compensate for amplitude attenuation and phase shift introduced by the wireless channel; then, demapping is performed on the equalized frequency domain symbols, i.e., determining the bit represented by each symbol according to the modulation scheme; then, these bit streams are subjected to inverse processing such as decoding and deinterleaving, and the correctness of the data is confirmed by verification; finally, the successfully recovered and complete service data is delivered to the upper layer of the communication protocol for processing or application.

[0091] Furthermore, based on the above embodiments, after the target service data sent by the transmitting end is reconstructed from the second target frequency domain signal, the method may further include: The target service data reconstructed from the second target frequency domain signal is verified and its performance is evaluated. Based on the results of the verification and performance evaluation, a decision feedback message is generated; Based on the judgment feedback information, the updated first chirp parameter and second chirp parameter are calculated using a preset parameter update algorithm; Using the updated first chirp parameter and the updated second chirp parameter, the updated first chirp matrix and the updated second chirp matrix are calculated, and the updated chirp matrix is ​​applied to the processing flow of the subsequently received target time-domain received signal.

[0092] Generally, the process does not end immediately after successfully recovering the target service data from the second target frequency domain signal. To ensure long-term communication reliability, especially in response to potentially changing channel environments, the recovered data undergoes rigorous inspection and analysis. This process includes verifying the integrity of the data and evaluating the overall performance metrics of the current communication link, such as bit error rate or signal-to-noise ratio, to determine whether the current demodulation parameters are still in optimal working condition.

[0093] Generally, the conclusions drawn from the above verification and performance evaluation will form a clear guiding information, namely, decision feedback information. This information is essentially a "diagnostic report" of the current communication quality, which clearly indicates whether the current demodulation effect is good or poor, and if poor, the general direction or extent of its deterioration, thus providing a basis for decision-making for subsequent adjustments.

[0094] Generally, after receiving the "diagnostic report" on the current communication quality, a pre-designed parameter optimization rule, namely the parameter update algorithm, is invoked. This algorithm uses the received decision feedback information as its core input, and through its internal calculation logic, it deduces the adjustment amounts for the currently used first and second chirp parameters, ultimately outputting a set of updated first and second chirp parameters that theoretically better match the current channel conditions.

[0095] Generally, after obtaining the updated first and second chirp parameters, the chirp matrix generation process is immediately repeated. That is, an updated first chirp matrix is ​​calculated and generated based on the new first chirp parameters, and an updated second chirp matrix is ​​generated based on the new second chirp parameters. This new set of matrices is then immediately deployed to process subsequent received signals, thereby achieving tracking and adaptation to channel changes.

[0096] The technical solution of this invention involves processing the received target time-domain signal at the receiving end to obtain a processed time-domain signal, and acquiring a chirp matrix calculated based on the currently updated chirp parameters. Next, a target rotated time-domain signal is generated by performing parallel conjugate complex multiplication on the processed time-domain signal according to the first chirp matrix, and then a first target frequency-domain signal is obtained by performing a discrete Fourier transform on this signal. Furthermore, the first target frequency-domain signal is phase-rotated according to the second chirp matrix to generate a second target frequency-domain signal. Finally, the transmitted target service data is recovered from this signal and reported. This solves the core problem of inter-carrier interference caused by severe Doppler frequency shift in high-dynamic channels such as high-speed mobile networks, leading to a sharp drop in communication reliability. It achieves the beneficial effect of significantly improving signal recovery accuracy and ensuring high-quality continuous communication in fast-time-varying and harsh channel environments.

[0097] To facilitate understanding, the specific application scenarios applicable to the embodiments of the present invention are described below. In this specific embodiment, in order to resolve the core contradiction between the urgent need for high reliability of data transmission in high-speed mobile communication scenarios such as high-speed rail and satellite internet and the sharp performance degradation of existing waveform technologies due to severe Doppler frequency shift, the embodiments of the present invention propose a complete high dynamic channel reliable transmission scheme based on parallel simulated radio frequency multiplexing modulation and demodulation.

[0098] Specifically, Figure 4 This is a flowchart of a parallel simulated radio frequency division multiplexing modulation system. In this parallel simulated radio frequency division multiplexing modulation system, it is used to implement the simulated radio frequency division multiplexing modulation method as described in any embodiment of the present invention through a combination of hardware and software.

[0099] like Figure 4 As shown, the parallel simulated radio frequency multiplexing modulation system receives the raw bit stream from the upper-layer service source ( Figure 4 After the control information and service data (also known as target service data) are processed, the frequency domain symbol stream is generated through operations such as channel coding, constellation modulation, and frequency domain resource mapping. Next, the frequency domain symbol stream. The process then proceeds to the parallel RF-like multiplexing modulation core processing stage, which implements the Discrete Affine Fourier Transform (IDAFT) in hardware. .

[0100] Specifically, firstly, based on the preset first and second chirp parameters... , A parallel chirp signal generation method and apparatus relying on Taylor fitting is used to quickly calculate the first chirp matrix. Second chirp matrix All diagonal elements (i.e., complex exponential factors) are used. This method efficiently generates the required phase rotation factor by uniformly segmenting the phase interval, pre-stored lookup tables, and performing parallel fixed-point operations and Taylor expansion approximation. Then, by combining the aforementioned diagonal elements, the first chirp matrix can be finally obtained. Second chirp matrix .

[0101] After generating the first and second chirp matrices, the process first utilizes Through a parallel multiplication computing device, wherein Represents the conjugate transpose of complex matrices and vectors, and frequency domain signals. Perform efficient point-to-point complex multiplication (i.e., parallel conjugate complex multiplication) to complete the first phase rotation, i.e. The target rotation frequency domain signal is obtained. Subsequently, on An IFFT (Inverse Discrete Fourier Transform) is performed to convert the signal into the first target time-domain signal. This IFFT transformation is efficiently accomplished through a grouped parallel implementation method and device. The core idea is to divide the complete N-point IFFT calculation into multiple groups, each group reusing the same set of configurable M-stage FFT or IFFT computation kernels. By configuring different input data (with parallel data interleaving devices extracting the results from the previous stage) and pre-stored twiddle factors for different groups, hardware resources are significantly saved. This design, which can flexibly implement IFFT or its inverse operation using the same set of computation kernels, is fundamentally based on the core mathematical connection between the Discrete Fourier Transform (DFT) and its inverse (IDFT).

[0102] The specific formulas for DFT and IDFT are as follows: , ; because They are conjugates and can be used to... Stored as DFT and IDFT matrices respectively, these matrices are accessed using a unified calculation method, and then multiplied by 1 or... as needed. This allows for compatible software or hardware implementations of DFT and IDFT. Similarly, FFT and IFFT can be designed and implemented in the same way. The FFT implementation process is as follows: Figure 5 As shown, Figure 5 This is a schematic diagram of an 8-point FFT butterfly calculation, as shown below. Figure 5 As shown, Level FFT evenly divided into Group Level FFT, where For each M-level FFT, the internal interleaving method is consistent; the only differences lie in the input data and the butterfly factor. Therefore, a set of M-level FFTs can be implemented by extracting and pre-storing the results of the previous level FFT to different degrees. This method enables the reuse of M-level FFTs. The flowchart for multi-level FFT grouping is as follows: Figure 6 As shown, in Figure 6 The process first decomposes the complete N-point FFT computation task into multiple sequentially processable computation groups. For each computation group, the process begins with parallel loading of input data, followed by parallel execution of the first-level butterfly operation within that group and output of the result. Next, a pre-stored rotation factor is applied to the intermediate result to complete phase adjustment. Subsequently, by reusing a set of configurable M-level FFT computation cores, the core FFT operation is performed on the data with the rotation factor applied. After completing a computation group, the process determines whether all N data points have been processed. If not, the data index or address is updated, and the parallel loading, rotation factor loading, and FFT computation steps of the next computation group are executed in a loop; if all are completed, the process ends and the final transform result is output. In this way, an M-level computation core can complete an N-point FFT computation far exceeding its single-processing capacity using only one set of M-level computation cores through loop configuration and data scheduling, greatly improving the utilization efficiency of hardware resources and computational throughput.

[0103] The core advantage of this parallel FFT or IFFT implementation lies in its ingenious design, enabling the execution of multiple computations using a single method. Since the transformation matrices of DFT and IDFT are mathematically conjugate, and the butterfly operation structures of FFT and IFFT are completely identical (only the twitch factor coefficients are conjugate), it becomes possible to develop a configurable, unified computational core. By dynamically loading different pre-stored twitch factor tables for the same set of hardware computation units, seamless switching between forward and inverse transformations can be achieved, resulting in high hardware reuse and significant savings in logic resources and chip area. Simultaneously, the adopted grouped parallel strategy (decomposing large-scale N-point computations into multiple sequentially processed task groups) cleverly adapts unlimited computational demands to limited hardware parallelism. Through a small-scale, efficient computational core working in a loop, it achieves an optimal balance between performance, power consumption, and cost, ultimately achieving extremely high system-level data throughput and meeting the requirements of high-speed real-time processing.

[0104] After obtaining the first target time-domain signal output by the IFFT transform, the parallel multiplication calculation device is then used again to combine the first target time-domain signal with... To perform point-to-point complex multiplication, that is: The second phase rotation is completed, ultimately generating the simulated radio frequency multiplexing time-domain signal to be transmitted. (That is, the second target time-domain signal), finally, the time-domain signal generated in parallel After parallel-to-serial conversion, adding a cyclic prefix to combat multipath interference, converting the signal from digital to analog, and performing spectrum shifting, the signal is finally up-converted and amplified by the RF front-end module before being transmitted to the wireless channel via the antenna.

[0105] After the signal is transmitted to the wireless channel via the antenna, the receiving end process immediately begins, and its complete data processing link is as follows: Figure 7 As shown, Figure 7 This is a flowchart of a parallel simulated radio frequency multiplexing (RFD) receiver system for demodulation. The process begins with signal reception and preprocessing: the receiving antenna captures the RF signal, which is then down-converted, analog-to-digital converted, and the cyclic prefix is ​​removed to obtain the time-domain received signal. (That is, the processed time-domain signal). Subsequently, the processed time-domain signal enters the parallel RF-like multiplexing demodulation core processing stage, which implements the discrete affine Fourier transform in hardware, i.e.: The demodulation process is strictly inverse of the transmitting end's operation: First, using the synchronization with the transmitting end... The matrix (provided by the same parallel chirp signal generator) is processed by a parallel multiplication computation unit. Perform the first phase rotation to obtain the target rotation time domain. Then on The FFT transformation is performed, a process that fully reuses the packet-parallel FFT or IFFT implementation device at the transmitting end. It can be efficiently completed simply by configuring the device to switch its operating mode to FFT and loading the corresponding rotation factor, thus obtaining the first target frequency domain signal. Then use The matrix undergoes a second parallel phase rotation, namely: The second target frequency domain signal was obtained through preliminary demodulation. The system utilizes embedded pilot signals in the frequency domain for channel estimation and equalization to compensate for channel impairments. Finally, the equalized signal is demapped and decoded to recover the original transmitted bitstream, i.e., control information and service data (target service data). Furthermore, the system may include an adaptive module to dynamically update the chirp parameters based on performance feedback after decoding. and It drives the chirp signal generator to update the corresponding matrix, thereby achieving tracking and adaptive optimization of the time-varying channel.

[0106] Example 4 Figure 8 This is a schematic diagram of a simulated radio frequency multiplexing modulation device provided in Embodiment 4 of the present invention. Figure 8 As shown, the device includes: The data acquisition module 810 is used to acquire the target frequency domain signal that matches the target service data to be transmitted, and to calculate two chirp matrices based on two chirp parameters, wherein each chirp matrix has a preset matrix length; The parallel conjugate complex multiplication module 820 is used to perform parallel conjugate complex multiplication on the target frequency domain signal based on the conjugate matrix of the second chirped matrix among the two chirped matrices, to generate the target rotated frequency domain signal; The discrete inverse Fourier transform module 830 is used to perform a discrete inverse Fourier transform on the target rotating frequency domain signal to generate a first target time domain signal. The second phase rotation module 840 is used to perform a second phase rotation on the first target time domain signal based on the conjugate matrix of the first chirp matrix among the two chirp matrices, to generate a second target time domain signal; The radio frequency transmission module 850 is used to perform at least one pre-transmission processing operation on the second target time domain signal to obtain a target time domain transmission signal, and to perform radio frequency transmission on the target time domain transmission signal.

[0107] The technical solution of this invention acquires a target frequency domain signal that matches the target service data to be transmitted, and calculates two chirp matrices with preset matrix lengths based on two chirp parameters. Then, based on the conjugate matrix of the second chirp matrix, parallel conjugate complex multiplication is performed on the target frequency domain signal to generate a target rotated frequency domain signal. Subsequently, an inverse discrete Fourier transform is performed on this signal to generate a first target time domain signal. Then, based on the conjugate matrix of the first chirp matrix, a second phase rotation is performed on the first target time domain signal to generate a second target time domain signal. Finally, the second target time domain signal undergoes pre-transmission processing, including adding a cyclic prefix and digital-to-analog conversion, to obtain the target time domain transmission signal and perform radio frequency transmission. This solves the problem of severe performance degradation caused by Doppler frequency shift sensitivity in high-speed mobile scenarios such as high-speed rail and satellite communication using orthogonal frequency division multiplexing (OFDM) technology, achieving significant improvements in signal transmission reliability and enhanced system anti-interference capabilities in high-dynamic, fast-time-varying channels.

[0108] Furthermore, based on the above embodiments, the data acquisition module 810 may further include: The complex exponential factor calculation submodule is used to calculate, in parallel, the matrix-length complex exponential factors corresponding to each chirp parameter using Taylor fitting. A submodule for constructing a standard all-zero matrix is ​​provided, which is used to construct a standard all-zero matrix based on the matrix length. The chirp matrix calculation submodule is used to sequentially place the complex exponential factors corresponding to each chirp parameter at the diagonal positions of the standard all-zero matrix to obtain the chirp matrix corresponding to each chirp parameter.

[0109] Furthermore, based on the above embodiments, the complex exponential factor calculation submodule may further include: The computational task building unit is used to construct a matrix of length N complex exponential factors for the target chirp parameter c being processed. The computational task, where n takes different values ​​in different computational tasks. ; The parallel task partitioning and scheduling unit is used to partition N computing tasks into N parts according to a preset hardware parallelism P. Group tasks into sets and execute each set of tasks sequentially; Where ceil(). is the up-value function; The parallel execution unit is used to simultaneously start P parallel threads when the current task set begins execution, and execute the following operations concurrently: A parallel phase value computing unit is used to calculate... ,in, for The quantization fixed-point value, C is The quantization fixed-point value, mod is the modulo operation; The sine and cosine lookup table lookup unit is used to... The search is performed in a pre-built sine and cosine lookup table, and the result is obtained based on the lookup table. and The specific value; Complex exponential factor calculation unit, used to calculate the complex exponential factor. and Substitute into the formula This yields the result of calculating a complex exponential factor.

[0110] Furthermore, based on the above embodiments, the complex exponential factor calculation submodule may further include: Determine the midpoint cell of the interval, used to determine the midpoint cell based on... Before performing a lookup in the pre-built sine and cosine lookup table, Divide the interval into K sub-intervals, and determine the midpoint of each sub-interval k. ; Construct a sine and cosine lookup table cell to calculate the midpoint of each interval. sine value and cosine value And according to each , and with each Corresponding to and Construct a sine and cosine lookup table; Based on the above embodiments, according to The search is performed in a pre-built sine and cosine lookup table to obtain... and The specific values ​​include: Obtain the corresponding information unit for determination exist The target sub-interval within And obtain the target sub-interval in the lookup table. midpoint of the interval corresponding and ; Specific numerical calculation units are used to calculate according to the formula: Calculations yielded and The specific value.

[0111] Optionally, based on the above embodiments, the discrete Fourier inverse transform module 830 is specifically used for: Based on the frequency domain signal length N of the target rotating frequency domain signal and the preset butterfly operation level M, the number of groups L is determined, where, The series number M is determined based on the hardware parallelism. Based on the number of groups L, construct L butterfly computing tasks that need to be executed serially; During the execution of the current butterfly calculation task, N input points are acquired, wherein the N input points are N frequency domain points in the target rotating frequency domain signal, or N intermediate calculation points output by the previous butterfly calculation task; by For single-load granularity, load in batches in parallel across N input points. The input points are used, and the rotation factor matrix of the pre-generated discrete Fourier inverse transform is used. Obtain the butterfly factor corresponding to each input point in the current batch, where, , ; Based on the currently loaded Given input points and matching butterfly factors, perform M-level discrete inverse Fourier transforms in parallel to obtain... One intermediate calculation point; Return to execution For single-load granularity, load in batches in parallel across N input points. The operation continues for each input point until all N input points have been processed and the corresponding N intermediate calculation points are obtained, at which point the current butterfly calculation task ends. After splicing together the N intermediate calculation points output by the last butterfly calculation task to obtain N time-domain signals, multiply the N time-domain signals by 1 / N to obtain the normalized first target time-domain signal. In the process of generating the first target time domain signal, continuous or non-continuous data reading and writing is performed by using parallel data reading and writing hardware, and interleaving and filling processing of the processed data according to the index is achieved by using parallel data interleaving hardware.

[0112] Based on the above embodiments, the second phase rotation module 840 is specifically used for: Construct N complex multiplication tasks that match N data points in the first target time-domain signal, wherein different complex multiplication tasks are used to perform calculations on data points at different positions in the first target time-domain signal; Based on the preset hardware parallelism P, the N complex multiplication tasks are divided into... Set up a set of multiplication tasks and execute each set of multiplication tasks sequentially. When processing the current set of multiplication tasks, P parallel threads are started simultaneously to execute the following operations concurrently: Acquire the data points of the target location in the time-domain signal of the first target; Load the conjugate factor of the conjugate matrix from the first chirped matrix corresponding to the target data point; Calculate the complex multiplication operation between the data point and the conjugate factor to obtain the target result data point; After completing the execution of the entire multiplication task set, the calculated N target result data points are organized to obtain the second target time domain signal.

[0113] The simulated radio frequency division multiplexing modulation device provided in the embodiments of the present invention can execute the simulated radio frequency division multiplexing modulation method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of executing the method.

[0114] The collection, storage, use, processing, transmission, provision, and disclosure of user personal information involved in the technical solution disclosed herein comply with the provisions of relevant laws and regulations and do not violate public order and good morals.

[0115] Example 5 Figure 9 This is a schematic diagram of a simulated radio frequency multiplexing demodulation device provided in Embodiment 5 of the present invention. Figure 9 As shown, the device includes: The receiving signal module 910 is used to perform at least one post-reception processing operation on the target time domain received signal after receiving the target time domain received signal to obtain a processed time domain signal. The chirp matrix acquisition module 920 is used to acquire two chirp matrices calculated based on the two currently updated chirp parameters, wherein each chirp matrix has a preset matrix length; The parallel conjugate complex multiplication module 930 is used to perform parallel conjugate complex multiplication on the processed time-domain signal according to the first chirp matrix of the two chirp matrices to generate the target rotation time-domain signal. The Discrete Fourier Transform module 940 is used to perform a parallel Discrete Fourier Transform on the target rotation time-domain signal to generate a first target frequency-domain signal. The second phase rotation module 950 is used to perform parallel conjugate complex multiplication on the first target frequency domain signal according to the second chirp matrix in the two chirp matrices to generate the second target frequency domain signal; The data recovery module is used to recover the target service data sent by the transmitter from the second target frequency domain signal and report the target service data to the upper layer application.

[0116] The technical solution of this invention involves processing the received target time-domain signal at the receiving end to obtain a processed time-domain signal, and acquiring a chirp matrix calculated based on the currently updated chirp parameters. Next, a target rotated time-domain signal is generated by performing parallel conjugate complex multiplication on the processed time-domain signal according to the first chirp matrix, and then a first target frequency-domain signal is obtained by performing a discrete Fourier transform on this signal. Furthermore, the first target frequency-domain signal is phase-rotated according to the second chirp matrix to generate a second target frequency-domain signal. Finally, the transmitted target service data is recovered from this signal and reported. This solves the core problem of inter-carrier interference caused by severe Doppler frequency shift in high-dynamic channels such as high-speed mobile networks, leading to a sharp drop in communication reliability. It achieves the beneficial effect of significantly improving signal recovery accuracy and ensuring high-quality continuous communication in fast-time-varying and harsh channel environments.

[0117] Optionally, based on the above embodiments, the Discrete Fourier Transform module 940 is specifically used for: Based on the signal length N of the target rotating time-domain signal and the preset butterfly operation level M, the number of groups L is determined, where, The series number M is determined based on the hardware parallelism. Based on the number of groups L, construct L butterfly computing tasks that need to be executed serially; During the execution of the current butterfly calculation task, N input points are acquired, wherein the N input points are N time-domain points in the target rotation time-domain signal, or N intermediate calculation points output by the previous butterfly calculation task; by For single-load granularity, load in batches in parallel across N input points. Input points, and in the pre-generated discrete Fourier transform rotation factor matrix Obtain the butterfly factor corresponding to each input point in the current batch, where, , ; Based on the currently loaded Given input points and matching butterfly factors, perform M-level discrete Fourier transforms in parallel to obtain... One intermediate calculation point; Return to execution For single-load granularity, load in batches in parallel across N input points. The operation continues for each input point until all N input points have been processed and the corresponding N intermediate calculation points are obtained, at which point the current butterfly calculation task ends. The N-point frequency domain signal obtained by splicing the N intermediate calculation points output by the last butterfly calculation task is used as the first target frequency domain signal. In the process of generating the first target frequency domain signal, continuous or non-continuous data reading and writing is performed by using parallel data reading and writing hardware, and interleaving and filling processing of the processed data according to the index is achieved by using parallel data interleaving hardware.

[0118] Furthermore, based on the above embodiments, a simulated radio frequency multiplexing demodulation device may further include: The verification and performance evaluation module is used to perform verification and performance evaluation on the target service data reconstructed from the second target frequency domain signal after the target service data sent by the transmitting end is reconstructed from the second target frequency domain signal. The decision feedback information generation module is used to generate decision feedback information based on the results of the verification and performance evaluation. The update module is used to calculate the updated first chirp parameter and second chirp parameter based on the judgment feedback information and a preset parameter update algorithm. The update processing module is used to calculate the updated first chirp matrix and the updated second chirp matrix using the updated first chirp parameter and the updated second chirp parameter, and to apply the updated chirp matrix to the processing flow of the subsequently received target time-domain received signal.

[0119] The simulated radio frequency multiplexing demodulation device provided in the embodiments of the present invention can execute the simulated radio frequency multiplexing demodulation method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of executing the method.

[0120] The collection, storage, use, processing, transmission, provision, and disclosure of user personal information involved in the technical solution disclosed herein comply with the provisions of relevant laws and regulations and do not violate public order and good morals.

[0121] Example 6 Figure 10 A schematic diagram of an electronic device 10, which can be used to implement embodiments of the present invention, is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.

[0122] like Figure 10 As shown, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer program stored in the ROM 12 or loaded from storage unit 18 into the RAM 13. The RAM 13 can also store various programs and data required for the operation of the electronic device 10. The processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0123] Multiple components in electronic device 10 are connected to I / O interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of displays, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and communication unit 19, such as network card, modem, wireless transceiver, etc. Communication unit 19 allows electronic device 10 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0124] Processor 11 can be various general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, central processing unit (CPU), graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as performing a radio frequency division multiplexing modulation method as described in any embodiment of the present invention, i.e.: Acquire the target frequency domain signal that matches the target service data to be transmitted, and calculate two chirp matrices based on two chirp parameters, wherein each chirp matrix has a preset matrix length; Based on the conjugate matrix of the second chirped matrix among the two chirped matrices, the target frequency domain signal is subjected to parallel conjugate complex multiplication to generate the target rotated frequency domain signal; Perform an inverse discrete Fourier transform on the target rotation frequency domain signal to generate the first target time domain signal; Based on the conjugate matrix of the first chirp matrix among the two chirp matrices, the first target time-domain signal is subjected to a second phase rotation to generate the second target time-domain signal; Perform at least one pre-transmission processing operation on the second target time-domain signal to obtain the target time-domain transmission signal, and then perform radio frequency transmission on the target time-domain transmission signal.

[0125] Alternatively, for example, a radio frequency multiplexing demodulation method as described in any one of the embodiments of the present invention is performed, namely: After receiving the target time-domain received signal, at least one post-reception processing operation is performed on the target time-domain received signal to obtain the processed time-domain signal; Get two chirp matrices calculated based on the two currently updated chirp parameters, where each chirp matrix has a preset matrix length; Based on the first chirp matrix among the two chirp matrices, the processed time-domain signal is subjected to parallel conjugate complex multiplication to generate the target rotation time-domain signal; Perform a parallel discrete Fourier transform on the target rotation time-domain signal to generate a first target frequency-domain signal; Based on the second chirp matrix among the two chirp matrices, the first target frequency domain signal is subjected to parallel conjugate complex multiplication to generate the second target frequency domain signal; The target service data sent by the transmitting end is reconstructed from the second target frequency domain signal, and the target service data is reported to the upper layer application.

[0126] In some embodiments, a simulated radio frequency division multiplexing modulation and demodulation method as described in any one of the embodiments of the present invention can be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed on electronic device 10 via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the simulated radio frequency division multiplexing modulation and demodulation method described above as described in any one of the embodiments of the present invention can be performed. Alternatively, in other embodiments, processor 11 can be configured by any other suitable means (e.g., by means of firmware) to perform the simulated radio frequency division multiplexing modulation and demodulation method as described in any one of the embodiments of the present invention.

[0127] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0128] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0129] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0130] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0131] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or middleware components (e.g., application servers), or frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0132] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0133] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0134] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A simulated radio frequency multiplexing modulation transmission method, characterized in that, The method includes: Acquire the target frequency domain signal that matches the target service data to be transmitted, and calculate two chirp matrices based on two chirp parameters, wherein each chirp matrix has a preset matrix length; Based on the conjugate matrix of the second chirped matrix among the two chirped matrices, the target frequency domain signal is subjected to parallel conjugate complex multiplication to generate the target rotated frequency domain signal; Perform an inverse discrete Fourier transform on the target rotation frequency domain signal to generate the first target time domain signal; Based on the conjugate matrix of the first chirp matrix among the two chirp matrices, the first target time-domain signal is subjected to a second phase rotation to generate the second target time-domain signal; Perform at least one pre-transmission processing operation on the second target time-domain signal to obtain the target time-domain transmission signal, and then perform radio frequency transmission on the target time-domain transmission signal.

2. The method according to claim 1, characterized in that, Two chirp matrices are calculated based on the two chirp parameters, including: The matrix length of the complex exponential factor corresponding to each chirp parameter is calculated in parallel using Taylor fitting. Construct a standard all-zero matrix based on the given matrix length; The complex exponential factors corresponding to each chirp parameter are placed sequentially on the diagonal positions of the standard all-zero matrix to obtain the chirp matrix corresponding to each chirp parameter.

3. The method according to claim 2, characterized in that, The matrix-length complex exponential factors corresponding to each chirp parameter are calculated in parallel using Taylor fitting, including: For the target chirp parameter c to be processed, construct a matrix of length N with complex exponential factors. The computational task, where n takes different values ​​in different computational tasks. ; Based on the preset hardware parallelism P, the N computing tasks are divided into... Set up a set of tasks and execute each set of tasks sequentially; where ceil(). is the up-fetch function; When the current task set begins execution, P parallel threads are started simultaneously to execute the following operations concurrently: calculate ,in, for The quantization fixed-point value, C is The quantization fixed-point value, mod is the modulo operation; according to The search is performed in a pre-constructed sine and cosine lookup table, and the result is obtained based on the lookup table. and The specific value; Will and Substitute into the formula This yields the result of calculating a complex exponential factor.

4. The method according to claim 3, characterized in that, According to Before performing the lookup in the pre-built sine and cosine lookup table, the following steps are also included: Will Divide the interval into K sub-intervals, and determine the midpoint of each sub-interval k. ; Calculate the midpoint of each interval sine value and cosine value And according to each , and with each Corresponding to and Construct a sine and cosine lookup table; Accordingly The search is performed in a pre-built sine and cosine lookup table to obtain... and The specific values ​​include: Sure exist The target sub-interval within And obtain the target sub-interval in the lookup table. midpoint of the interval corresponding and ; According to the formula: Calculations yielded and The specific value.

5. The method according to claim 3, characterized in that, Performing a parallel inverse discrete Fourier transform on the target rotated frequency domain signal to generate a first target time domain signal includes: Based on the frequency domain signal length N of the target rotating frequency domain signal and the preset butterfly operation level M, the number of groups L is determined, where, The series number M is determined based on the hardware parallelism. Based on the number of groups L, construct L butterfly computing tasks that need to be executed serially; During the execution of the current butterfly calculation task, N input points are acquired, wherein the N input points are N frequency domain points in the target rotating frequency domain signal, or N intermediate calculation points output by the previous butterfly calculation task; by For single-load granularity, load in batches in parallel across N input points. The input points are used, and the rotation factor matrix of the pre-generated discrete inverse Fourier transform is used. Obtain the butterfly factor corresponding to each input point in the current batch, where, , ; Based on the currently loaded Given input points and matching butterfly factors, perform M-level discrete inverse Fourier transforms in parallel to obtain... One intermediate calculation point; Return to execution For single-load granularity, load in batches in parallel across N input points. The operation continues for each input point until all N input points have been processed and the corresponding N intermediate calculation points are obtained, at which point the current butterfly calculation task ends. After splicing together the N intermediate calculation points output by the last butterfly calculation task to obtain N time-domain signals, multiply the N time-domain signals by 1 / N to obtain the normalized first target time-domain signal. In the process of generating the first target time domain signal, continuous or non-continuous data reading and writing is performed by using parallel data reading and writing hardware, and interleaving and filling processing of the processed data according to the index is achieved by using parallel data interleaving hardware.

6. The method according to any one of claims 1-5, characterized in that, Based on the conjugate matrix of the first chirp matrix among the two chirp matrices, a second phase rotation is performed on the first target time-domain signal to generate a second target time-domain signal, including: Construct N complex multiplication tasks that match N data points in the first target time-domain signal, wherein different complex multiplication tasks are used to perform calculations on data points at different positions in the first target time-domain signal; Based on the preset hardware parallelism P, the N complex multiplication tasks are divided into... Set up a set of multiplication tasks and execute each set of multiplication tasks sequentially. When processing the current set of multiplication tasks, P parallel threads are started simultaneously to execute the following operations concurrently: Acquire the data points of the target location in the time-domain signal of the first target; Load the conjugate factor of the conjugate matrix from the first chirped matrix corresponding to the target data point; Calculate the complex multiplication operation between the data point and the conjugate factor to obtain the target result data point; After completing the execution of the entire multiplication task set, the calculated N target result data points are organized to obtain the second target time domain signal.

7. A simulated radio frequency multiplexing receiving and demodulation method, characterized in that, The method includes: After receiving the target time-domain received signal, at least one post-reception processing operation is performed on the target time-domain received signal to obtain the processed time-domain signal; Get two chirp matrices calculated based on the two currently updated chirp parameters, where each chirp matrix has a preset matrix length; Based on the first chirp matrix among the two chirp matrices, the processed time-domain signal is subjected to parallel conjugate complex multiplication to generate the target rotation time-domain signal; Perform a parallel discrete Fourier transform on the target rotation time-domain signal to generate a first target frequency-domain signal; Based on the second chirp matrix among the two chirp matrices, the first target frequency domain signal is subjected to parallel conjugate complex multiplication to generate the second target frequency domain signal; The target service data sent by the transmitting end is reconstructed from the second target frequency domain signal, and the target service data is reported to the upper layer application.

8. The method according to claim 7, characterized in that, Performing a parallel discrete Fourier transform on the target rotation time-domain signal to generate a first target frequency-domain signal includes: Based on the signal length N of the target rotating time-domain signal and the preset butterfly operation level M, the number of groups L is determined, where, The series number M is determined based on the hardware parallelism. Based on the number of groups L, construct L butterfly computing tasks that need to be executed serially; During the execution of the current butterfly calculation task, N input points are acquired, wherein the N input points are N time-domain points in the target rotation time-domain signal, or N intermediate calculation points output by the previous butterfly calculation task; by For single-load granularity, load in batches in parallel across N input points. Input points, and in the pre-generated discrete Fourier transform rotation factor matrix Obtain the butterfly factor corresponding to each input point in the current batch, where, , ; Based on the currently loaded Given input points and matching butterfly factors, perform M-level discrete Fourier transforms in parallel to obtain... One intermediate calculation point; Return to execution For single-load granularity, load in batches in parallel across N input points. The operation continues for each input point until all N input points have been processed and the corresponding N intermediate calculation points are obtained, at which point the current butterfly calculation task ends. The N-point frequency domain signal obtained by splicing the N intermediate calculation points output by the last butterfly calculation task is used as the first target frequency domain signal. In the process of generating the first target frequency domain signal, continuous or non-continuous data reading and writing is performed by using parallel data reading and writing hardware, and interleaving and filling processing of the processed data according to the index is achieved by using parallel data interleaving hardware.

9. The method according to claim 7, characterized in that, After the target service data transmitted by the transmitting end is reconstructed from the second target frequency domain signal, the process further includes: The target service data reconstructed from the second target frequency domain signal is verified and its performance is evaluated. Based on the results of the verification and performance evaluation, a decision feedback message is generated; Based on the judgment feedback information, the updated first chirp parameter and second chirp parameter are calculated using a preset parameter update algorithm; Using the updated first chirp parameter and the updated second chirp parameter, the updated first chirp matrix and the updated second chirp matrix are calculated, and the updated chirp matrix is ​​applied to the processing flow of the subsequently received target time-domain received signal.

10. An electronic device, characterized in that, The electronic device includes: At least one processor; and A memory communicatively connected to the at least one processor; wherein, The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the simulated radio frequency division multiplexing modulation and transmission method according to any one of claims 1-6, or to perform the simulated radio frequency division multiplexing reception and demodulation method according to any one of claims 7-9.

11. A simulated radio frequency multiplexing modulation and demodulation system, characterized in that, Includes transmitting terminal and receiving terminal; The transmitting terminal is used to implement the radio frequency division multiplexing modulation transmission method as described in any one of claims 1-6; The receiving terminal is used to implement the simulated radio frequency multiplexing receiving and demodulation method as described in any one of claims 7-9.

12. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that cause a processor to execute the simulated radio frequency division multiplexing modulation and transmission method according to any one of claims 1-6, or to execute the simulated radio frequency division multiplexing reception and demodulation method according to any one of claims 7-9.

13. A computer program product, characterized in that, The computer program product includes a computer program that, when executed by a processor, implements the simulated radio frequency division multiplexing modulation and transmission method according to any one of claims 1-6, or implements the simulated radio frequency division multiplexing reception and demodulation method according to any one of claims 7-9.

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