Light emitting display device

Abstract

A light-emitting display device is disclosed, comprising: a substrate including an active region and an active region having an aperture; a plurality of sub-pixels in the active region spaced apart from the aperture by a distance greater than a first distance; a transistor disposed in each of the plurality of sub-pixels; a light-emitting element at each of the plurality of sub-pixels, the light-emitting element including a first electrode connected to the transistor, a second electrode opposite to the first electrode, and an intermediate layer between the first electrode and the second electrode; an intermediate layer disconnect structure disposed within the first distance to surround the aperture, the intermediate layer disconnect structure having an undercut cross-section; an encapsulation layer on the light-emitting element, the encapsulation layer covering the intermediate layer disconnect structure; and a touch sensor on the encapsulation layer.

Description

[0001] This application claims the benefit of Korean Patent Application No. 10-2024-0202822, filed on December 31, 2024, which is incorporated herein by reference as fully set forth herein. Technical Field

[0002] This disclosure relates to a light-emitting display device that improves the reliability of a structure having holes in the active region. Background Technology

[0003] Display devices used to display images on televisions, monitors, smartphones, tablets, and laptops are used in a wide variety of ways and forms.

[0004] The display device includes a plurality of pixels configured to display an image and transistors configured to control the operation of each pixel. Furthermore, transistors formed using the same process as those disposed in the pixels are also disposed in the non-active region surrounding the plurality of pixels.

[0005] In display devices, light-emitting display devices with light-emitting elements in the display panel but without a separate light source are considered competitive applications for the sake of compactness and clear color display.

[0006] Meanwhile, in recent years, display devices have been equipped with sensors for a wide variety of purposes. All or part of the substrate thickness is removed in the hole area, allowing the sensor to easily collect external light. Summary of the Invention

[0007] The embodiments of this disclosure provide a light-emitting display device that can prevent the influence of external air through the holes in the substrate and improve the reliability of the sub-pixels by changing the configuration between the holes and sub-pixels in the active region on the substrate.

[0008] The embodiments disclosed herein provide a light-emitting display device in which the reliability of elements including transistors is improved.

[0009] The embodiments of this disclosure provide a light-emitting indicator device capable of preventing external light through holes in a substrate from affecting the configuration of elements surrounding the holes.

[0010] The embodiments disclosed herein provide display devices manufactured through processes optimized by reducing manufacturing process costs, shortening manufacturing process time, reducing production energy, and reducing greenhouse gas emissions.

[0011] A light-emitting display device according to one embodiment of the present disclosure may include: a substrate including an active region having an aperture and an active region surrounding the active region; a plurality of sub-pixels disposed in the active region and spaced apart from the aperture by a distance greater than a first distance; a transistor at each of the plurality of sub-pixels; a light-emitting element at each of the plurality of sub-pixels, the light-emitting element including a first electrode connected to the transistor, a second electrode opposite to the first electrode, and an intermediate layer between the first electrode and the second electrode; an intermediate layer break structure within the first distance, the intermediate layer break structure surrounding the aperture and having an undercut cross-section; an encapsulation layer disposed on the light-emitting element, the encapsulation layer at least covering the intermediate layer break structure within the first distance; a touch sensor on the encapsulation layer; and a self-assembly layer included on the upper surface of at least one of the plurality of inorganic layers in the encapsulation layer and the touch sensor. Attached Figure Description

[0012] The accompanying drawings are included to provide a further understanding of this disclosure, and are incorporated in and constitute a part of this application. The drawings illustrate embodiments of the disclosure and, together with the description, serve to illustrate the principles of the disclosure. In the drawings:

[0013] Figure 1 This is a plan view showing a light-emitting display device according to one embodiment of the present disclosure;

[0014] Figure 2 yes Figure 1 A magnified view of region A;

[0015] Figure 3 It is shown Figure 1 Circuit diagram of the sub-pixel;

[0016] Figure 4 It is along Figure 2 A cross-sectional view of the light-emitting display device according to an embodiment of the present disclosure, taken by line I-I';

[0017] Figure 5 It is along Figure 2 A cross-sectional view of a light-emitting display device according to another embodiment of the present disclosure, taken by line I-I';

[0018] Figure 6 It is shown Figure 4 or Figure 5 A diagram of the internal structure of the self-assembly layer;

[0019] Figure 7 It is shown Figure 4 Enlarged cross-sectional view of region B;

[0020] Figure 8 It is shown Figure 4 An enlarged cross-sectional view of region C; and

[0021] Figure 9 This is a graph showing the conductivity of each assembled layer over time. Detailed Implementation

[0022] Reference will now be made in detail to preferred embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals will be used throughout the drawings to refer to the same or similar parts. In the following description of the present disclosure, detailed descriptions of known functions and configurations incorporated herein will be omitted where such descriptions might obscure the subject matter of the disclosure. Furthermore, the names of elements used in the following description have been chosen for clarity of description and may differ from the names of elements in actual products.

[0023] The shapes, dimensions, ratios, angles, numbers, etc., shown in the accompanying drawings to illustrate the various exemplary embodiments of this disclosure are given by way of example only. This disclosure is not limited to the illustrations in the accompanying drawings.

[0024] In this specification, where terms such as “comprising,” “having,” “including,” etc., are used, one or more components may be added unless a term such as “only” is used. As used herein, the term “and / or” includes a single related listed item as well as any and all combinations of two or more of the related listed items.

[0025] When appearing before a list of elements, expressions such as "at least one of" can modify the entire list of elements without modifying individual elements within the list. The term "at least one" should be understood to include any and all combinations of one, two, or more of the relevant listed items. For example, "at least one of the first, second, and third elements" means all combinations of the three listed elements, any combination of any two of the three elements, and each individual element, the first, second, and third elements.

[0026] The terminology used herein is for describing specific aspects and is not intended to limit this disclosure. As used herein, the terms “a” and “an” used to describe elements in the singular form are intended to include a plural number of elements. Unless the context clearly indicates otherwise, elements described in the singular form are intended to include a plural number of elements, and vice versa.

[0027] When interpreting a component or value, it should be interpreted as including a range of errors or tolerances, even if no explicit description of such a range of errors or tolerances is provided.

[0028] In describing the various example embodiments of this disclosure, when using terms such as "on," "above," "below," and "next to" to describe the positional relationship between two elements, at least one intermediate element may also exist between the two elements unless "immediately," "directly," or "closely" is used. It will be understood that when an element or layer is referred to as "connected to" or "attached to" another element or layer, it may be directly connected to or attached to the other element or layer, or one or more intermediate elements or layers may exist.

[0029] In describing the various example embodiments of this disclosure, when using terms such as “after,” “following,” “next,” and “before” to describe the temporal relationship between two events, another event may occur in between unless more restrictive terms such as “just,” “immediately,” or “directly” are used.

[0030] In describing the various exemplary embodiments of this disclosure, terms such as “first” and “second” may be used to describe a wide variety of components. These terms are intended to distinguish identical or similar components from one another rather than to limit those components. Therefore, throughout the specification, unless otherwise specifically mentioned, a “first” component may be the same as a “second” component within the technical concept of this disclosure.

[0031] The features of the various embodiments of this disclosure can be combined or integrated with each other, either partially or entirely, and can operate differently from each other and be technically driven, as will be fully understood by those skilled in the art. The embodiments of this disclosure can be carried out independently of each other or together in an interdependent relationship.

[0032] The display device according to this disclosure will be described below with reference to the accompanying drawings and embodiments.

[0033] Figure 1 This is a plan view showing a light-emitting display device according to one embodiment of the present disclosure. Figure 2 yes Figure 1 A magnified view of region A. Figure 3 It is shown Figure 1 The circuit diagram of the sub-pixel. Figure 4 It is along Figure 2 A cross-sectional view of the light-emitting display device according to an embodiment of the present disclosure, taken by line I-I'.

[0034] Reference Figure 1According to an embodiment of the present disclosure, the display device 100 includes: a display panel 110 including an active region AA and an inactive region NA; and a cover member 20 disposed on the display panel 110.

[0035] A cover member 20 may be disposed on the display panel 110 to cover the front surface of the display panel 110 and protect the display panel 110 from external impacts. The edge portion of the cover member 20 may have a curved portion or a curved surface portion that curves in the direction toward the rear surface of the display device 100 (Z-axis direction). As a result, the cover member 20 may be configured to cover the side surface area of ​​the display panel 110 disposed on the rear surface, thereby protecting the display panel 110 from external impacts not only on the front surface of the display device 100 but also on its side surfaces.

[0036] The active area AA of the display device 100 can be an area used to display images, and the area other than the active area AA can be referred to as the non-active area NA. The active area AA and the non-active area NA of the display device 100 can be applied equally to the display panel 110.

[0037] The display device 100 includes a substrate 111 having both an active region AA and an active region NA (see [reference]). Figure 4 (and subsequent figures). A plurality of data lines DL extending in the first direction and a plurality of gate lines GL extending in the second direction intersecting the first direction can be disposed in the active region AA on the substrate.

[0038] The area defined by the intersection of the data line DL and the gate line GL can each constitute a sub-pixel SP. A sub-pixel SP can be defined as an area in which a light-emitting part is provided, and is not limited to the area defined by the intersection of the data line DL and the gate line GL. That is, the light-emitting part can intersect with the data line DL and / or the gate line GL.

[0039] Each sub-pixel SP can be configured to emit white light (W) equally across sub-pixels, or to emit red light (R), green light (G), or blue light (B) differently across sub-pixels. If the sub-pixel SP emits white light, a color filter layer can be further disposed on the side from which the light is emitted from the sub-pixel SP to represent the color corresponding to each sub-pixel.

[0040] like Figure 2 As shown, hole H can be set in substrate 111 ( Figure 4 or Figure 5 The active region AA corresponds to the camera or sensor SS ( Figure 4In the portion of ), the sensor may include various sensors SS, such as image sensors, infrared sensors, and ultraviolet sensors. Multiple cameras may be configured for various purposes. All or part of the thickness of the substrate 111 is removed to correspond to the aperture H. The aperture H in the substrate 111 may overlap the camera or sensor SS. The camera or sensor is located below the substrate 111, at least the light-receiving portion of the camera or sensor corresponds to the aperture H, and modules surrounding the light-receiving portion of the camera or sensor may overlap the substrate 111.

[0041] After the array is configured on the substrate 111, the substrate 111 corresponding to the hole H and the configuration on the substrate 111 can be removed by irradiating the end line CEL of the hole with a laser.

[0042] The end line CEL of hole H is located at the boundary between the area where hole H is provided and substrate 111 is removed and the area where substrate 111 is provided outside hole H.

[0043] Simultaneously, the hole H of the substrate 111 is disposed in the active region AA of the substrate 111, and the sub-pixel SP is disposed around the periphery at a first distance HAA from the end line CEL of the hole H. The plurality of sub-pixels disposed in the active region are spaced from the hole by a distance greater than the first distance HAA from the end line CEL of the hole H.

[0044] In the display device according to the embodiments of this disclosure, such as Figure 2 and Figure 4 As shown, the sub-pixel SP can be set at a first distance HAA from the end line CEL of the aperture H to prevent the impact generated when removing the substrate 111 and the configuration on the substrate 111 from the area of ​​the aperture H from propagating to the sub-pixel SP.

[0045] Within the first distance HAA, the undercut cross section UC is set as an intermediate layer break structure to prevent the intermediate layer 162 from being directly exposed at the end line CEL of the hole after the hole H is formed.

[0046] The undercut cross-section UC can, for example, have a protruding pattern 148 on the first planarization layer 151. Here, the first planarization layer 151 (the configuration below the protruding pattern 148) has an undercut shape UC. With the undercut shape UC, during the deposition of the intermediate layer material, the intermediate layer material with strong flatness and poor step coverage will not stack in the undercut cross-section UC covering the protruding pattern 148, and a break will occur between the intermediate layer 162 deposited on the protruding pattern 148 and the intermediate layer virtual layer 162d surrounding the undercut shape UC. The intermediate layer 162 includes a plurality of organic material layers, each of which can be deposited on the substrate by a vapor deposition process. The vapor deposition process is achieved by placing a source of vapor deposition material in the lower part of the chamber, holding the substrate with the deposition surface on which the deposition material is to be deposited in the upper part of the chamber, and supplying the deposition material to the substrate in the vapor phase. Because vapor deposition has a lower step coverage than sputtering or printing processes, it cannot be deposited well on screen structures such as protruding patterns. Therefore, structures such as protruding pattern 148 can be formed before the deposition process to ensure that the intermediate layer is broken in a specific area.

[0047] The light-emitting display device according to the embodiments of the present disclosure has an intermediate layer disconnection structure within a first distance from the end line CEL of the aperture H, thereby separating the intermediate layer 162 of the sub-pixel SP from the exposed end line CEL of the aperture H and preventing moisture penetration and deterioration of the intermediate layer 162.

[0048] like Figures 1 to 4 As shown, the light-emitting display device 100 according to an embodiment of the present disclosure includes: a substrate 111, the substrate 111 including an active region AA having a hole and a non-active region NA surrounding the active region AA; and a plurality of sub-pixels SP disposed in the active region AA and spaced apart from the hole by a first distance HAA.

[0049] like Figure 3 and Figure 4 As shown, each of the plurality of sub-pixels SP includes transistors T1 and T2.

[0050] Each of the plurality of sub-pixels SP includes a light-emitting element 160 (ED), the light-emitting element 160 including a first electrode 161 connected to a transistor T2, a second electrode 163 opposite to the first electrode 161, and an intermediate layer 162 disposed between the first electrode 161 and the second electrode 163.

[0051] Each sub-pixel includes an intermediate layer disconnect structure configured to surround the aperture H within a first distance HAA and having an undercut shape UC. Figure 4 Region C in the middle.

[0052] In addition, each sub-pixel includes an encapsulation layer 180 disposed on the light-emitting element 160 (ED) and covering at least the intermediate layer break structure within the first distance HAA; and a touch sensor on the encapsulation layer 180.

[0053] The light-emitting display device according to an embodiment of the present disclosure may include self-assembled layers SAL1, SAL3, SAL4 and SAL5 disposed on at least one of a plurality of inorganic layers 181, 183, 204 and 205 included in the encapsulation layer 180 and the touch sensor.

[0054] Here, before describing the plurality of inorganic layers 181, 183, 204, and 205 used as the surface-forming layers by the self-assembled layers SAL1, SAL3, SAL4, and SAL5, reference will first be made to... Figure 3 and Figure 4 Describe the structure of the light-emitting display device.

[0055] Subpixels SP are positioned between intersecting gate lines GL and data lines DL, such as... Figure 3 As shown, it may include a first transistor T1, a second transistor T2, a storage capacitor Cst, a compensation circuit CC, and a light-emitting element ED.

[0056] For example, the first transistor T1 can be a switching transistor, and the second transistor T2 can be a driving transistor.

[0057] The first transistor T1 is electrically connected to the data line DL and to the first node N1. The gate electrode of the first transistor T1 is electrically connected to the gate line GL. In response to a scan signal supplied via the gate line GL, the first transistor T1 transmits a data signal supplied via the data line DL to the first node N1.

[0058] The storage capacitor Cst is electrically connected to the first node N1 to store the voltage applied to the first node N1.

[0059] The second transistor T2 receives a high-potential drive voltage EVDD and is electrically connected to the first electrode (e.g., the anode) of the light-emitting element ED. The second transistor T2 can control the amount of drive current flowing to the light-emitting element ED in response to the voltage applied to the gate electrode.

[0060] The semiconductor layer of each of the first transistor T1 and the second transistor T2 may contain an oxide semiconductor material, such as indium gallium zinc oxide (IGZO).

[0061] The light-emitting element ED outputs light corresponding to the driving current supplied by the second transistor T2. The light-emitting element ED can output light corresponding to any of red, green, blue, and white.

[0062] A light-emitting element (ED) may include a first electrode, an intermediate layer disposed on the first electrode, and a second electrode supplying a common voltage (EVSS) thereto. The intermediate layer includes a light-emitting layer and various functional layers, and may be configured to emit light of the same color, such as white light, on a per-pixel basis, or may be configured to emit light of different colors, such as red, green, or blue light, on a per-subpixel basis. The functional layers may include a hole injection layer, a hole transport layer, an electron transport layer, and a charge generation layer. The intermediate layer may include a plurality of stacks, wherein the plurality of stacks may have charge generation layers between adjacent stacks to facilitate the supply of holes and electrons to the two stacks. Each of the plurality of stacks may include at least one light-emitting layer, a hole transport layer, and an electron transport layer.

[0063] The first electrode can be used as the anode, and the second electrode can be used as the cathode. The light-emitting element ED is similar to the light-emitting element 160, which will be described later (see [link to documentation]). Figure 4 They are basically the same.

[0064] A compensation circuit CC can be disposed in the first sub-pixel SP1 to compensate for the threshold voltage of the second transistor T2. The compensation circuit CC may include one or more transistors. The compensation circuit CC may include one or more transistors and capacitors, and can be configured in various ways depending on the compensation method. The sub-pixel including the compensation circuit CC may include a variety of structures, such as 3T1C, 4T2C, 5T2C, 6T1C, 6T2C, 7T1C, and 7T2C. For example, a plurality of transistors may be electrically connected between the second transistor T2 and the light-emitting element ED.

[0065] Figure 3 The illustration shows a configuration in which the second transistor T2 and the light-emitting element ED are directly connected to each other, but embodiments of this disclosure are not limited thereto. Depending on the form of the compensation circuit CC, the light-emitting element ED may also include another transistor or compensation capacitor between the light-emitting element ED and the second transistor T2 that generates the drive current.

[0066] A light-emitting display device according to an embodiment of the present disclosure includes: a plurality of sub-pixels SP disposed in an active region AA and spaced apart from an aperture H by a first distance HAA; transistors T1 and T2 disposed in each of the plurality of sub-pixels SP; and a light-emitting element 160 connected to at least one of transistors T1 and T2.

[0067] The light-emitting element 160 includes a first electrode 161, an intermediate layer 162, and a second electrode 163.

[0068] The light-emitting part of the light-emitting element 160 is disposed in the opening of the dam 170, wherein the dam 170 may include a light-shielding dam made of a light-shielding organic material and / or a transparent dam made of a transparent organic material.

[0069] If the dam 170 includes a light-shielding dam, the dam can shield the non-light-emitting portion between adjacent sub-pixels SP and prevent light from each sub-pixel SP from entering adjacent sub-pixels SP and causing mixing. In addition, when external light enters from above, the dam can reduce or prevent external light from being reflected from the surfaces of the first electrode 161 and the second electrode 163 of the overlapping dam 170 to prevent external light visibility.

[0070] The substrate 111 can be made of a flexible material that can be easily removed after laser irradiation to form the aperture H. In one example, the substrate 111 may include a first organic layer 1111 and a second organic layer 1112 overlapping each other, with an inorganic interlayer insulating layer 1117 between them. The inorganic interlayer insulating layer 1117 may function to prevent the transfer of moisture or impurities between the first organic layer 1111 and the second organic layer 1112. The inorganic interlayer insulating layer 1117 may be formed on the first organic layer 1111 and may be partially patterned. The inorganic interlayer insulating layer 1117 may include at least one of a silicon nitride layer, a silicon oxide layer, and a silicon oxide nitride layer.

[0071] The first organic layer 1111 and the second organic layer 1112 may include, for example, polyimide. In addition to polyimide, the first organic layer 1111 and the second organic layer 1112 may include different organic layers.

[0072] The substrate 111 may include one of a first organic layer 1111 and a second organic layer 1112 as polyethylene terephthalate (PET) and the other as polyimide.

[0073] In another example, substrate 111 may include a flexible thin glass material.

[0074] The substrate 111 is used to support and protect the components of the light-emitting display device disposed thereon.

[0075] In the active region AA and the non-active region NA of the substrate 111, a plurality of laminated insulating layers 120 (121, 122, 123, 124, 125, 126, 127 and 128) and planarization layers 151 and 152 are provided, thereby insulating the active layers 131 and 132 and the gate electrodes 133 and 134 of transistors T1 and T2 from each other, insulating the gate electrodes 133 and 134 and the source-drain electrodes 137, 141 and 142 from each other, and insulating the first storage electrode 115 and the second storage electrode 118 constituting the storage capacitor Cst from each other.

[0076] In one example, the first transistor T1 includes a first light-shielding pattern 114, a first active layer 131, a first gate electrode 133, and source-drain electrodes 137. The first light-shielding pattern 114 can be connected to the first gate electrode 133 disposed on the first active layer 131 via a connection electrode 136 and serves as a dual gate. In this case, the same gate voltage is applied to both the first light-shielding pattern 114 and the first gate electrode 133.

[0077] In one example, the second transistor T2 includes a second light-shielding pattern 119, a second active layer 132, a second gate electrode 134, a first source-drain electrode 141, and a second source-drain electrode 142.

[0078] The storage capacitor Cst includes a first storage electrode 115 and a second storage electrode 118 that overlap each other, with a fourth insulating layer 124 between them. The first storage electrode 115 and the second storage electrode 118 can be connected to a first connection electrode 138 and a second connection electrode 139, which are configured to be metal layers on the same layer as the source-drain electrodes 137, 141 and 142 of the first transistor T1 and the second transistor T2.

[0079] The second transistor T2 can be connected to the light-emitting element 160 via the connecting electrode 146. Figure 3 The first electrode 161 of the ED in the middle.

[0080] like Figure 4 As shown, metal wire layers 119A, 119B, 143, 147, and 134d can also be arranged in a shape parallel to the end line CEL of the hole H within a first distance HAA from the end line CEL. Among metal wire layers 119A, 119B, 143, 147, and 134d, metal wire layer 134d to which a low potential voltage VSS or a high potential voltage VDD is applied can be wider than the other metal wire layers.

[0081] Metal line layers 119A, 119B, 143, 147 and 134d may be located on the same layer as any of the light-shielding patterns 114 and 119 of transistors T1 and T2, active layers 131 and 132, gate electrodes 133 and 134, source-drain electrodes 137, 141 and 142 and connection electrode 146.

[0082] Meanwhile, the metal layer 146A overlaying the first transistor T1 and the storage capacitor Cst can also be disposed on the same layer as the connecting electrode 146. The metal layer 146A can prevent the operation of the first transistor T1 or the storage capacitor Cst from causing electrical interference to the upper light-emitting element 160.

[0083] For example, insulating layer 120 may include a first insulating layer 121, a second insulating layer 122, a third insulating layer 123, a fourth insulating layer 124, a fifth insulating layer 125, a sixth insulating layer 126, a seventh insulating layer 127, and an eighth insulating layer 128. Insulating layer 120 may contain inorganic insulating material.

[0084] Simultaneously, all or some of the removed crack prevention portions CRS1 and CRS2 in the first to eighth insulating layers 121 can be configured adjacent to the end line CEL of the hole H. Each of the crack prevention portions CRS1 and CRS2 can have a circular shape surrounding the hole H in the plane and a diameter larger than that of the hole H. The crack prevention portions CRS1 and CRS2 can block or disperse the impact propagating to the vicinity of the end line CEL of the hole H during hole formation, which is horizontally transmitted via the inorganic insulating layer.

[0085] A first insulating layer 121 is disposed in the active region AA and the non-active region NA of the substrate 111. The first insulating layer 121 may be referred to as a buffer layer and may perform the same function as buffer layers known in the art. The first insulating layer 121 may be disposed on the substrate 111 to protect the structure located on the substrate 111 from the influence of moisture that permeates through the substrate 111 and to planarize the surface of the substrate 111. The first insulating layer 121 may include a plurality of inorganic insulating layers.

[0086] The first insulating layer 121 may extend to the edge of the non-active region NA of the substrate 111 to prevent moisture from penetrating from the edge of the substrate 111. The first insulating layer 121 may be composed of a single inorganic layer or a plurality of alternately stacked inorganic layers.

[0087] For example, the first insulating layer 121 may include at least one of the following: a silicon oxide (SiOx) layer, a silicon nitride (SiNx) layer, and a silicon nitride oxide (SiOxNy) layer, or a multilayer formed by stacking inorganic layers.

[0088] A second insulating layer 122 may be disposed on the first insulating layer 121. The second insulating layer 122 may serve as, for example, a second buffer layer. A polysilicon-type transistor having an active layer made of crystalline silicon may be included as a transistor disposed on the substrate 111. In this case, the second insulating layer 122 may stabilize and planarize the formation surface of the active layer including crystalline silicon. The second insulating layer 122 may include an inorganic layer, such as a silicon oxide (SiOx) layer, a silicon nitride (SiNx) layer, or multiple layers thereof.

[0089] The third insulating layer 123 may be disposed on the second insulating layer 122. The third insulating layer 123 may be used as the gate insulating layer of a transistor that includes crystalline silicon as the active layer.

[0090] The first light-shielding pattern 114 of the first transistor T1 and the first storage electrode 115 of the storage capacitor Cst can be disposed on the third insulating layer 123. Each of the first light-shielding pattern 114 and the first storage electrode 115 can be made of, for example, a conductive metal material. Specifically, the conductive metal material can include at least one of the following: aluminum-based metals, such as aluminum (Al) or aluminum alloys; silver-based metals, such as silver (Ag) or silver alloys; copper-based metals, such as copper (Cu) or copper alloys; molybdenum-based metals, such as molybdenum (Mo) or molybdenum alloys; chromium (Cr); tantalum (Ta); neodymium (Nd); and titanium (Ti).

[0091] The fourth insulating layer 124 may be disposed on the third insulating layer 123. The fourth insulating layer 124 serves as an insulator between the first storage electrode 115 and the second storage electrode 118, and may also serve as an interlayer insulating layer for a transistor that includes polysilicon as an active layer.

[0092] The fourth insulating layer 124 may include an inorganic material. The inorganic material may include, for example, a silicon nitride (SiNx) layer.

[0093] A second storage electrode 118 made of a conductive metallic material may be formed on the fourth insulating layer 124. Specifically, the conductive metallic material may include at least one of the following: aluminum-based metals, such as aluminum (Al) or aluminum alloys; silver-based metals, such as silver (Ag) or silver alloys; copper-based metals, such as copper (Cu) or copper alloys; molybdenum-based metals, such as molybdenum (Mo) or molybdenum alloys; chromium (Cr); tantalum (Ta); neodymium (Nd); and titanium (Ti).

[0094] Each of the first storage electrode 115 and the second storage electrode 118 may be a single layer, or may have a structure in which a plurality of different metallic materials are stacked.

[0095] The fifth insulating layer 125 can be disposed on the fourth insulating layer 124.

[0096] A second light-shielding pattern 119 made of a conductive metal material can be disposed on the fifth insulating layer 125 of the second transistor T2. The conductive metal material can be made of, for example, metal. The second light-shielding pattern 119 can be made of a single metal, or it can be made of two or more metals or an alloy of two or more metals. Furthermore, the second light-shielding pattern 119 can have a single-layer structure or a multi-layer structure.

[0097] The sixth insulating layer 126 may be disposed on the fifth insulating layer 125 to cover the second light-shielding pattern 119.

[0098] The fifth insulating layer 125 and the sixth insulating layer 126 are located below the first active layer 131 and the second active layer 132 and can be used as buffer layers.

[0099] The first transistor T1 and the second transistor T2 may include a first active layer 131 and a second active layer 132, each of which is an oxide semiconductor layer. When the active layer is formed to include an oxide semiconductor layer, the cutoff characteristics can be stabilized and a certain degree of carrier mobility can be ensured.

[0100] The fifth insulating layer 125 and the sixth insulating layer 126 can be used to planarize the formation surfaces of the first active layer 131 and the second active layer 132, which include oxide semiconductor layers, disposed thereon.

[0101] Each of the fifth insulating layer 125 and the sixth insulating layer 126 may include an inorganic material. The inorganic material may include, for example, a silicon oxide (SiOx) layer or a multilayer formed by stacking inorganic layers.

[0102] No hydrogen particles are released during heat treatment, thus preventing a decrease in the reliability of the first active layer 131 and the second active layer 132, each of which is an oxide semiconductor layer, disposed on the fifth insulating layer 125 and the sixth insulating layer 126 so as to be adjacent to each other due to hydrogen particles.

[0103] Each of the first active layer 131 and the second active layer 132 may comprise an oxide semiconductor material. The oxide semiconductor material may comprise a combination of at least one of zinc (Zn), indium (In), gallium (Ga), tin (Sn), and titanium (Ti) and an oxide. In some cases, the oxide semiconductor material may further comprise a highly conductive metal such as iron (Fe) to increase mobility.

[0104] More specifically, the oxide semiconductor material constituting each of the first active layer 131 and the second active layer 132 can be, for example, zinc oxide (ZnO), zinc-tin oxide (ZTO), zinc-indium oxide (ZIO), indium oxide (InO), titanium oxide (TiO), indium-gallium-zinc oxide (IGZO), indium-zinc-tin oxide (IZTO), or iron-indium-zinc oxide (FIZO).

[0105] Although each of the first active layer 131 and the second active layer 132 in the illustrated example comprises an oxide semiconductor, embodiments of this disclosure are not limited thereto. At least one of the transistors disposed in the sub-pixel SP may comprise crystalline silicon.

[0106] A seventh insulating layer 127, which acts as a gate insulating layer, can be disposed between the first active layer 131 and the second active layer 132 and the first gate electrode 133 and the second gate electrode 134. The seventh insulating layer 127 can be completely disposed between the first active layer 131 and the second active layer 132 and the first gate electrode 133 and the second gate electrode 134 (as shown), or it can be selectively disposed only in the channel regions of the first active layer 131 and the second active layer 132.

[0107] The seventh insulating layer 127 is made of an inorganic insulating material and may include, for example, a silicon oxide (SiOx) layer, a silicon nitride (SiNx) layer, or a multilayer formed by stacking inorganic layers.

[0108] The undoped overlapping regions of the first gate electrode 133 and the second gate electrode 134 can be used as channel regions of the first active layer 131 and the second active layer 132.

[0109] The doped regions of the first active layer 131 and the second active layer 132 can be provided respectively by using the first gate electrode 133 and the second gate electrode 134 as masks. The doped regions of the first active layer 131 and the second active layer 132 correspond to the regions located on both sides of the first gate electrode 133 and the second gate electrode 134, and the doped regions of the first active layer 131 and the second active layer 132 can then be connected to the spaced-out source-drain electrodes 137, 141 and 142 and act as conductive source-drain regions.

[0110] The first gate electrode 133 and the second gate electrode 134, each made of a conductive metal material, and the metal line layer 134d can be disposed on the seventh insulating layer 127. Specifically, the conductive metal material can include at least one of the following: aluminum-based metals, such as aluminum (Al) or aluminum alloys; silver-based metals, such as silver (Ag) or silver alloys; copper-based metals, such as copper (Cu) or copper alloys; molybdenum-based metals, such as molybdenum (Mo) or molybdenum alloys; chromium (Cr); tantalum (Ta); neodymium (Nd); and titanium (Ti). Each of the first gate electrode 133, the second gate electrode 134, and the metal line layer 134d can have a multilayer structure comprising at least two conductive metal materials.

[0111] An eighth insulating layer 128 may be disposed on the first gate electrode 133, the second gate electrode 134, and the metal line layer 134d. The eighth insulating layer 128 may cover the top and sides of each of the first gate electrode 133 and the second gate electrode 134, and may expose a portion of the metal line layer 134d disposed within the first distance HAA.

[0112] The eighth insulating layer 128 may be composed of a single inorganic layer or a plurality of stacked inorganic layers. At least one of silicon oxide (SiOx) layer, silicon nitride (SiNx) layer and silicon oxide nitride (SiOxNy) layer may be selected as the inorganic layer.

[0113] The source-drain electrode 137 of the first transistor T1, the connection electrode 136 connecting the first light-shielding pattern 114 and the first gate electrode 133 of the first transistor T1, and the first source-drain electrode 141 and the second source-drain electrode 142 connecting the second active layer 132 of the second transistor T2 can be disposed on the eighth insulating layer 128 by conductive metal. A first connection electrode 138 and a second connection electrode 139 are respectively disposed connecting to the first storage electrode 115 and the second storage electrode 118. Furthermore, a metal line layer 143 parallel to the terminal line CEL of the via can be disposed within the first distance HAA.

[0114] exist Figure 4 In the first transistor T1 shown, for example, the connection electrode 136 and the source-drain electrode 137 are shown on both sides of the first active layer 131 above the first gate electrode 133. However, Figure 4 The first transistor T1 is shown along one axis. Additional source-drain electrodes, different from the source-drain electrodes 137 of the first transistor T1, may be further arranged along another axis in a different configuration. Figure 4 At the location shown in the diagram, additional source-drain electrodes are connected to the first active layer 131 at the intersection of the additional source-drain electrodes. The first gate electrode 133 and the first light-shielding pattern 114 can be connected to each other via connecting electrodes 136. Furthermore, source-drain electrodes 137 and additional source-drain electrodes can be connected to the first active layer 131 along an additional axis on both sides of the first gate electrode 133.

[0115] In the second transistor T2, the first source-drain electrode 141 and the second source-drain electrode 142 can be spaced apart from each other, with the second gate electrode 134 located between them. In this case, the first source-drain electrode 141, the second source-drain electrode 142, and the second gate electrode 134 can be disposed on different layers.

[0116] Simultaneously, the first source-drain electrode 141 can extend to a region of the second transistor T2 away from the second active layer 132 to connect to the second light-shielding pattern 119 below it. In this case, the potential of the second light-shielding pattern 119 can be stabilized.

[0117] Each of the source-drain electrode 137, the connecting electrode 136, the first connecting electrode 138 and the second connecting electrode 139, the first source-drain electrode 141, and the second source-drain electrode 142 may be made of a conductive metal material. Specifically, the conductive metal material may include at least one of the following: aluminum-based metals, such as aluminum (Al) or aluminum alloys; silver-based metals, such as silver (Ag) or silver alloys; copper-based metals, such as copper (Cu) or copper alloys; molybdenum-based metals, such as molybdenum (Mo) or molybdenum alloys; chromium (Cr); tantalum (Ta); neodymium (Nd); and titanium (Ti). Each of the source-drain electrode 137, the connecting electrode 136, the first connecting electrode 138 and the second connecting electrode 139, the first source-drain electrode 141, and the second source-drain electrode 142 may have a multilayer structure comprising at least two conductive metal materials.

[0118] The first source-drain electrode 141 and the second source-drain electrode 142 are connected to both sides of the channel region of the second active layer 132.

[0119] The channel region of each of the first active layer 131 and the second active layer 132 can be an undoped intrinsic region, which can be a region where carriers move when a voltage is applied to transistors T1 and T2.

[0120] Each of the source-drain electrode 137, the first source-drain electrode 141, and the second source-drain electrode 142 can be directly connected to the first active layer 131 and the second active layer 132 via contact holes provided in the seventh insulating layer 127 and the eighth insulating layer 128.

[0121] The metal line layer 143 may be further disposed on the same layer as the source-drain electrode 137, the first source-drain electrode 141 and the second source-drain electrode 142 within the first distance HAA.

[0122] A first planarization layer 151 for protecting the first transistor T1, the second transistor T2, and the storage capacitor Cst can be disposed on the connecting electrode 136, the source-drain electrode 137, the first source-drain electrode 141, the second source-drain electrode 142, and the first connecting electrode 138 and the second connecting electrode 139. The first planarization layer 151 can be disposed within a portion of the first distance HAA and separated from the terminal line CEL of the via. This prevents the first planarization layer 151, containing organic material, from directly contacting the external air through the via H. The first planarization layer 151 can be positioned to directly contact the upper surface of the metal line layer 134d exposed through the eighth insulating layer 128 within the first distance HAA. The first planarization layer 151 located on the metal line layer 134d within the first distance HAA can be used to support the subsequently formed protruding pattern 148.

[0123] The connecting electrode 146 may also be disposed on the first planarization layer 151 and may be connected to the second source-drain electrode 142 via contact holes in the first planarization layer 151. The connecting electrode 146 may be made of, for example, a conductive metal material. Specifically, the conductive metal material may include at least one of the following: aluminum-based metals, such as aluminum (Al) or aluminum alloys; silver-based metals, such as silver (Ag) or silver alloys; copper-based metals, such as copper (Cu) or copper alloys; molybdenum-based metals, such as molybdenum (Mo) or molybdenum alloys; chromium (Cr); tantalum (Ta); neodymium (Nd); and titanium (Ti).

[0124] A protruding pattern 148 extending further than the top of the first planarization layer 151 and a metal line layer 147 parallel to the end line CEL of the via can be disposed on the same layer as the connecting electrode 146. The first planarization layer 151 beneath the protruding pattern 148 can be configured to have sufficient thickness to stably support the protruding pattern 148 and prevent it from deviating or separating. The protruding pattern 148 can be made of the same material as the connecting electrode 146, the first source-drain electrode 141, and the second source-drain electrode 142. For example, each of the protruding pattern 148, the connecting electrode 146, and the first source-drain electrode 141 and the second source-drain electrode 142 can be made of a triple-laminated metal layer, such as Ti / Al / Ti.

[0125] The area of ​​the first planarization layer 151 that is more recessed than the protruding pattern 148 is the area of ​​the undercut shape UC, and can be set in the area where the first planarization layer 151 is removed.

[0126] Furthermore, in the same process as connecting electrode 146, a metal layer 146A can be further formed that overlaps the first transistor T1 and the storage capacitor Cst.

[0127] The second planarization layer 152 may be further disposed on the metal layer including the connecting electrode 146. The second planarization layer 152 is spaced apart from the protruding pattern 148 and configured to expose the protruding pattern 148. This allows the protruding pattern 148 to break the intermediate layer when the intermediate layer 162 is subsequently formed.

[0128] The first electrode 161 may be further disposed on the second planarization layer 152 and may be connected to the connecting electrode 146 via a contact hole in the second planarization layer 152.

[0129] Each of the first planarization layer 151 and the second planarization layer 152 is made of an organic insulating material and can be functionally referred to as a planarization layer PLN.

[0130] Since the organic insulating material contained in the planarization layer PLN may be relatively more susceptible to moisture and other external reagents compared to inorganic insulating materials, the organic insulating material can be removed from around the hole H to separate it from the hole H and prevent direct contact with the terminal line CEL of the hole H.

[0131] In some cases, the connecting electrode 146 can be omitted, and the planarization layer PLN can be configured as a single layer. In this case, the second source-drain electrode 142 can be directly connected to the first electrode 161.

[0132] The first electrode 161 may include, for example, a reflective electrode, and may be used to prevent light from incident on transistors T1 and T2 below the light-emitting element 160. The first electrode 161 may include, for example, a structure in which a first transparent electrode, a reflective electrode, and a second transparent electrode are stacked. The second transparent electrode, which is the uppermost electrode of the first electrode 161, may be a dielectric material that can lower the hole injection barrier at the interface with the intermediate layer 162. Here, each of the first and second transparent electrodes may be a transparent oxide electrode, such as ITO or IZO. The reflective electrode may include silver, a silver alloy such as APC (Ag-Pd-Cu), aluminum, or an aluminum alloy.

[0133] The dam 170 can be configured to cover the edge of the first electrode 161, and the opening in the dam 170 can be defined as a light-emitting part.

[0134] Dike 170 may contain organic insulating material to maintain a certain vertical thickness. The organic insulating material of dike 170 may have a vertical thickness of, for example, 1 μm to 5 μm.

[0135] In some cases, during the same process of forming the dam 170 and the planarization layer PLN, a weir can be set within the first distance HAA to prevent the organic encapsulation layer, which is subsequently formed as a liquid, from overflowing around the orifice H.

[0136] The light-emitting element 160 includes a first electrode 161, an intermediate layer 162, and a second electrode 163. After the first electrode 161 is formed, a dam 170 can be formed.

[0137] Spacers may be further disposed on the dam 170. The spacers may be partially disposed on a portion of the upper surface of the dam 170, rather than on the entire upper surface of the dam 170, to prevent the spacers or the dam 170 below them from collapsing during the deposition of the intermediate layer 162 when the deposition mask is applied to the substrate 111. The spacers and the dam 170 may be made of the same material.

[0138] Intermediate layer 162 and second electrode 163 are sequentially disposed in a structure having a dam 170 and an intermediate layer disconnection ( Figure 4On the substrate 111 in region C).

[0139] Intermediate layer 162 may include a plurality of functional layers and a light-emitting layer. For example, intermediate layer 162 may include a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer. Intermediate layer 162 may be formed as a series structure including a plurality of stacked bodies and charge generation layers disposed between the stacked bodies, each stacked body including a hole transport layer, a light-emitting layer, and an electron transport layer. The charge generation layers may include, for example, an n-type charge generation layer and a p-type charge generation layer.

[0140] Subpixels SP exhibit individual colors through light-emitting elements 160, and the light-emitting layer can be patterned and disposed on each subpixel SP using a deposition mask that includes openings corresponding to the light-emitting portions of each subpixel.

[0141] The plurality of sub-pixels typically include functional layers other than the light-emitting layer, such as a hole injection layer, a hole transport layer, an electron transport layer, an electron injection layer, and a charge generation layer. Furthermore, the plurality of sub-pixels may also typically include a second electrode 163. A common layer is formed through a common mask having an opening shared by the plurality of sub-pixels, without being broken for each individual sub-pixel, and the forming materials of each layer are provided on the substrate through the common opening. In the light-emitting display device according to an embodiment of the present disclosure, due to the intermediate layer disconnect structure ( Figure 4 Region C) has an undercut cross section UC, so the common layer can be separated from the undercut cross section. During the deposition process for forming the common layer, the common layer forming material is evaporated and deposited on the substrate 111, and the deposited material can be formed uniformly in a straight direction. However, as in the undercut shape, it is difficult to form the common layer on the unexposed surface of the side of the first planarization layer 151 that is shielded by the protruding pattern 148 protruding from the first planarization layer 151 and a portion of the metal wire layer 134d, and the common layer is deposited very thinly or not at all, resulting in a break.

[0142] Therefore, the intermediate layer 162 and the second electrode 163 are disconnected on the side surface of the protruding pattern 148 with an undercut cross-section and on the first planarization layer 151, and the intermediate layer 162 and the second electrode 163 can be separated from the intermediate layer virtual layer 162d and the second electrode virtual layer 163d retained in the region of the end line CEL of the aperture. Therefore, even if the intermediate layer virtual layer 162d is adjacent to the aperture H and is permeated by moisture or oxygen through the aperture H, this does not affect the intermediate layer 162 included in the light-emitting element 160 of the sub-pixel SP. Therefore, the sub-pixel SP can reliably withstand moisture or oxygen through the aperture H.

[0143] The second electrode 163 can be formed by thinning a transmission electrode made of ITO or IZO or a reflective-transmission electrode made of silver, silver alloy, magnesium, magnesium alloy, ytterbium (Yb), or ytterbium alloy.

[0144] A cover layer (not shown) may be further formed on the second electrode 163 to protect the second electrode 163 of the light-emitting element 160 and increase the luminous efficiency in the upward direction.

[0145] The encapsulation layer 180 may be disposed on the second electrode 163 to prevent moisture from penetrating into the internal components and to protect the internal components from the influence of external air.

[0146] In one example, the encapsulation layer 180 may include a structure in which a first inorganic encapsulation layer 181, an organic encapsulation layer 182, and a second inorganic encapsulation layer 183 are stacked. The display device according to embodiments of this disclosure is not limited to the configuration shown. Here, the organic encapsulation layer 182 has a greater thickness than the first inorganic encapsulation layer 181 and the second inorganic encapsulation layer 183, which may make laser cutting along the end line CEL of the hole H difficult when the organic encapsulation layer 182 remains around the hole H. Furthermore, if the organic encapsulation layer 182 extends to the hole H, the organic encapsulation layer 182 may be directly affected by external air entering directly through it through the hole H.

[0147] Therefore, the organic encapsulation layer 182 is positioned at a distance from the end line CEL of the via. Although in the illustrated example, the organic encapsulation layer 182 has an end line surrounding the protruding pattern 148, embodiments of this disclosure are not limited thereto. For example, the end of the organic encapsulation layer 182 may be spaced further away from the end line CEL of the via than the protruding pattern 148. In this case, the organic encapsulation layer 182 may not overlap the protruding pattern 148.

[0148] In some cases, a packaging substrate such as glass may be included instead of the packaging layer 180. An adhesive layer may be further disposed between the packaging substrate and the light-emitting element 160, which are facing each other.

[0149] at the same time, Figure 4 The diagram shows a configuration in which a touch sensor, including a first touch metal line layer 201 and second touch metal line layers 202e and 191, is formed on an encapsulation layer 180.

[0150] A touch sensor can be disposed on the encapsulation layer 180 in the active region AA to sense touch input. The touch sensor can detect external touch information using a user's finger or stylus. The touch sensor may include a touch buffer layer 204, a first touch metal wire layer 201, a touch intermediate insulating layer 205, second touch metal wire layers 191 and 202e, and an upper protective layer 206.

[0151] Each of the touch buffer layer 204 and the touch intermediate insulating layer 205 may be made of inorganic materials such as silicon nitride (SiNx), silicon oxide (SiOx), or silicon nitride oxide (SiONx), but embodiments of the present disclosure are not limited thereto.

[0152] In the touch sensor, the first touch metal wire layer 201 and the second touch metal wire layer 202e, located on different layers, can be connected to each other and used as the first touch sensor Tx. A separate second touch metal wire layer 191, separated from the second touch metal wire layer 202e, can be electrically isolated from the first touch sensor Tx and used as the second touch sensor Rx. A touch sensing signal can be applied to either the first touch sensor Tx or the second touch sensor Rx, and the other can be used to sense changes caused by touch.

[0153] The first touch sensor Tx and the second touch sensor Rx can be configured to overlap by 170. For example, the first touch sensor Tx can be configured in the X-axis direction, and the second touch sensor Rx can be configured in the Y-axis direction. Alternatively, the first touch sensor Tx and the second touch sensor Rx can be configured in both the Y-axis and X-axis directions.

[0154] Each of the first touch metal line layer 201 and the second touch metal line layer 202e or 191 may be made of a metallic material, but embodiments of this disclosure are not limited thereto.

[0155] The upper protective layer 206 can be disposed on the touch intermediate insulating layer 205 on which the second touch metal line layers 202e and 191 are disposed. The upper protective layer 206 can be composed of an organic layer or a mixture of organic and inorganic layers for surface planarization.

[0156] Each of the self-assembled layers SAL1, SAL3, SAL4, and SAL5 included in the light-emitting display device according to the embodiments of this disclosure is a self-assembled monolayer, which is an organic material with a nanometer-scale thickness. The self-assembled layers SAL1, SAL3, SAL4, and SAL5 cover the upper surface of the inorganic layer and cover the internal pinholes of the inorganic layer, thereby preventing impurities that may enter through the internal pinholes and degassing. Figure 4 Region B in the text). Furthermore, at least one of the self-assembly layers SAL1, SAL3, SAL4, and SAL5 can be incorporated into the intermediate layer discontinuity structure with steep steps (…). Figure 4 In region C), the seams that may appear in the first inorganic encapsulation layer 181 and the second inorganic encapsulation layer 183 of the intermediate layer disconnect structure can be covered, and the configuration below the first inorganic encapsulation layer 181 and the second inorganic encapsulation layer 183 can be protected from the outside.

[0157] The inorganic layers included in the encapsulation layer 180 include a first inorganic encapsulation layer 181 and a second inorganic encapsulation layer 183. The inorganic layers included in the touch sensor may include a touch buffer layer 204 and a touch intermediate insulating layer 205.

[0158] In the light-emitting display device according to the embodiments of this disclosure, such as Figure 4 As shown, self-assembly layers SAL1, SAL3, SAL4 and SAL5 can be disposed on the upper surface of all plurality of inorganic layers 181, 183, 204 and 205 on the light-emitting element 160 to cover defects, such as pinholes or seams, that occur in all inorganic layers.

[0159] Alternatively, in the light-emitting display device according to an embodiment of the present disclosure, the first self-assembly layer SAL1 may optionally be disposed on the upper surface of the first inorganic encapsulation layer 181, which is one of a plurality of inorganic layers 181, 183, 204, and 205 on the light-emitting element 160. In this case, the first self-assembly layer SAL1 may cover pinholes in the first inorganic encapsulation layer 181 and may also cover seams appearing around the holes H or seams caused by steep steps in the light-emitting display device.

[0160] Alternatively, in the light-emitting display device according to an embodiment of the present disclosure, the second self-assembly layer SAL3 may optionally be disposed on the upper surface of the second inorganic encapsulation layer 183, which is one of a plurality of inorganic layers 181, 183, 204, and 205 on the light-emitting element 160. In this case, the second self-assembly layer SAL3 may cover the pinholes in the second inorganic encapsulation layer 183, and may also cover the seams appearing around the holes H or the seams caused by steep steps in the light-emitting display device.

[0161] Alternatively, in the light-emitting display device according to an embodiment of the present disclosure, a third self-assembly layer SAL4 may optionally be disposed on the upper surface of a touch buffer layer 204, which is one of a plurality of inorganic layers 181, 183, 204, and 205 on the light-emitting element 160. The third self-assembly layer SAL4 may cover pinholes in the touch buffer layer 204 and may cover seams appearing around the holes H or seams caused by steep steps in the light-emitting display device.

[0162] Alternatively, in the light-emitting display device according to an embodiment of the present disclosure, a fourth self-assembly layer SAL5 may optionally be disposed on the upper surface of a touch intermediate insulating layer 205, which is one of a plurality of inorganic layers 181, 183, 204, and 205 on the light-emitting element 160. The fourth self-assembly layer SAL5 may cover pinholes in the touch intermediate insulating layer 205 and may cover seams appearing around the holes H or seams caused by steep steps in the light-emitting display device.

[0163] Furthermore, as described, one of the first to fourth self-assembly layers, SAL1, SAL3, SAL4, and SAL5, can be optionally configured, or two or all three can be configured together. Alternatively, all four layers can be configured, such as... Figure 4 As shown in the image.

[0164] Each of the self-assembled layers SAL1, SAL3, SAL4, and SAL5 is seeded on a molecular basis, wherein molecules initially adsorbed on the surface diffuse and then form chemical bonds with the surface components. Subsequently, the molecules adsorbed on the surface undergo a diffusion process to generate island-like domains centered on the seed crystals, and the seed crystals are laterally connected through the growth of the island-like domains, thereby forming a layer.

[0165] Therefore, each of the self-assembled layers SAL1, SAL3, SAL4 and SAL5 can have a chemical bond with the inorganic layers 181, 183, 204 and 205 located below it.

[0166] like Figure 4 As shown, the thickness of each of the self-assembled layers SAL1, SAL3, SAL4 and SAL5 can be less than the thickness of each of the underlying bonded inorganic layers 181, 183, 204 and 205.

[0167] Roughly speaking, each of the self-assembled layers SAL1, SAL3, SAL4, and SAL5 can be as thin as 1 / 10 to 1 / 1000 of the thickness of each of the underlying inorganic layers 181, 183, 204, and 205. Therefore, multiple self-assembled layers SAL1, SAL3, SAL4, and SAL5 can be used without affecting the luminous efficacy or permeability of the light-emitting display device.

[0168] Reference Figure 4Each of the self-assembled layers SAL1, SAL3, SAL4, and SAL5 has a first surface (lower surface) corresponding to at least one of the plurality of inorganic layers 181, 183, 204, and 205 and a second surface (upper surface) opposite to the first surface. The second surface (upper surface) of the self-assembled layer can be hydrophobic and can effectively prevent moisture from flowing in from the upper surface. Here, the first surface of each of the self-assembled layers SAL1, SAL3, SAL4, and SAL5 is... Figure 4 The lower surface of each of the self-assembled layers SAL1, SAL3, SAL4 and SAL5, and the second surface is the upper surface of each of the self-assembled layers SAL1, SAL3, SAL4 and SAL5, wherein the second surface is positioned closer to the outside than the first surface.

[0169] Figure 5 For along Figure 2 A cross-sectional view of a light-emitting display device according to another embodiment of the present disclosure, taken by line I-I'.

[0170] like Figure 5 As shown, except Figure 4 In addition to the structure of the light-emitting display device, the light-emitting display device according to another embodiment of the present disclosure further includes a fifth self-assembly layer SAL2 disposed below the second self-assembly layer SAL3.

[0171] In this configuration, the fifth self-assembly layer SAL2 and the second self-assembly layer SAL3 are respectively disposed on the lower and upper surfaces of the second inorganic encapsulation layer 183, and the first self-assembly layer SAL1 is disposed on the upper surface of the first inorganic encapsulation layer 181. The upper and lower surfaces of the organic encapsulation layer 182 prevent separation between the second inorganic encapsulation layer 183 and the first inorganic encapsulation layer 181, and prevent impurities in the second inorganic encapsulation layer 183 and the first inorganic encapsulation layer 181 from affecting the organic encapsulation layer 182, or prevent particles remaining in the organic encapsulation layer 182 from affecting the second inorganic encapsulation layer 183 and the first inorganic encapsulation layer 181.

[0172] Here, after applying the material for the organic encapsulation layer 182 and plasticizing it, the fifth self-assembled layer SAL2 can be formed on the upper surface of the organic encapsulation layer 182.

[0173] The composition of the self-assembled layer will be described in detail below.

[0174] Figure 6 To show Figure 4 or Figure 5 A diagram of the internal structure of the self-assembly layer. Figure 7 To show Figure 4 An enlarged cross-sectional view of region B. Figure 8 To show Figure 4 An enlarged cross-sectional view of region C.

[0175] like Figure 6 As shown, the self-assembled layer includes a head group, an alkyl chain, and functional groups.

[0176] The head group is located on one side of the alkyl chain, and the functional group is located on the other side of the alkyl chain.

[0177] Here, the head group is on the side facing the inorganic layer to be formed, and can be combined with the components of the inorganic layer.

[0178] The head groups of the self-assembled layer may include at least one of the following: -COOH group, -SiH3 group, -SiCl3 group, and -SiF3 group. The head groups of the self-assembled layer have bonding properties with the underlying inorganic layer, particularly the inorganic insulating layer such as a silicon nitride layer or a silicon oxide layer.

[0179] The head groups of the self-assembled layer are covalently bonded to the components on the surface of the inorganic layer, and have excellent interlayer bonding with the inorganic layer.

[0180] Furthermore, the alkyl chains of the central component of the self-assembled layer have the property of stacking adjacent molecules, thereby producing excellent thermal stability of the layer.

[0181] Here, the alkyl chains of the self-assembled layers can have bond lengths L along the thickness direction from the upper surface of the inorganic layers 181, 183, 204 and 205.

[0182] The alkyl chain can have 2 to 30 -CH2- bonds and can be tunable in terms of thickness or height. The thickness of the self-assembled layer, which is tuned to adjust the number of bonds in the alkyl chain, can range from 1 nm to 50 nm.

[0183] The functional groups of the self-assembled layer can be -CH3 groups or -CF3 groups. In the light-emitting display device according to an embodiment of the present disclosure, the functional groups are located on the outermost side of the self-assembled layer. The self-assembled layer protects the configuration below it from external air, such as moisture or oxygen, wherein the functional groups located on its surface are hydrophobic.

[0184] In one example, the self-assembled layer could be an alkyltrichlorosilane in which the functional group is hydrophobic.

[0185] The self-assembled layer is seeded on a molecular basis, in which molecules initially adsorbed on the surface of the inorganic layer diffuse and then form chemical bonds with the surface components. Subsequently, the molecules adsorbed on the surface undergo a diffusion process to generate island-like domains centered on the seed crystal, and the seed crystals are laterally connected through the growth of the island-like domains, thereby forming a self-assembled layer.

[0186] The self-assembled layer chemically bonds with the underlying inorganic layer, which exhibits excellent interfacial bonding and can be formed at nanometer-scale thicknesses. Therefore, as... Figure 7 As shown, the pinholes PH in the touch buffer layer (inorganic layer) 204 can be covered with a thin layer, and as... Figure 8 As shown, the seams on the side of the intermediate layer disconnected structure or the pinholes of at least one of the plurality of inorganic layers 181, 183, 204 and 205 can be covered.

[0187] Not referenced Figure 8 The described configuration DP refers to the intermediate layer virtual layer 162d and the second electrode virtual layer 163d, which are separated from the intermediate layer 162 and the second electrode 163 of the light-emitting element connected to the sub-pixel SP, and are generated during the intermediate layer deposition process due to the intermediate layer disconnection structure.

[0188] like Figure 8 As shown, each of the self-assembly layers SAL1 and SAL3 covers the seam area caused by the failure of the first inorganic encapsulation layer 181 and the second inorganic encapsulation layer 183 formed at normal density below the protruding pattern 148 due to the steep steps in the intermediate layer disconnect structure, thereby ensuring reliability against external air and moisture.

[0189] Figure 9 The graph shows the electrical conductivity of each assembled layer over time.

[0190] Figure 9 A calcium layer connected to an aluminum pattern is shown disposed on a substrate, each layer forming a barrier layer, and the change in conductivity of the calcium layer is measured in an environment of 60°C and 85% humidity.

[0191] It can be seen that when the self-assembled SAM layer is simply formed as a 40 nm barrier layer, the conductivity changes significantly. On the other hand, it can be seen that the TiO2 metal oxide layer maintains conductivity for a longer period of time than a single self-assembled SAM layer. Furthermore, it can be seen that the conductivity retention time of the TiO2 metal oxide layer increases with increasing thickness.

[0192] Meanwhile, when both the self-assembled SAM layer and the metal oxide layer are provided, the conductivity retention time can be increased compared to when only the metal oxide layer TiO2 is provided.

[0193] Figure 9 The important aspect of the experiment is that it determined that when a self-assembled layer, which is an organic layer, is combined with a metal oxide layer, which is an inorganic layer, the resistance to high temperature and high humidity environments is improved.

[0194] In the light-emitting display device according to the embodiments of the present disclosure, a self-assembled layer of an organic layer component with a hydrophobic surface is provided for some or all of the inorganic layers among the plurality of inorganic layers located on the light-emitting element, thereby covering defects such as pinholes or seams in each inorganic layer and improving reliability against external air.

[0195] In the light-emitting display device according to the embodiments of the present disclosure, the disconnection portion of the light-emitting element is provided to surround the hole in the substrate corresponding to the sensor portion, thereby preventing external air or moisture from flowing in through the hole in the substrate and affecting the sub-pixel.

[0196] A light-emitting display device according to one embodiment of the present disclosure may include: a substrate including an active region having an aperture and an active region surrounding the active region; a plurality of sub-pixels in the active region spaced apart from the aperture by a distance greater than a first distance; a transistor at each of the plurality of sub-pixels; a light-emitting element at each of the plurality of sub-pixels, the light-emitting element including a first electrode connected to the transistor, a second electrode opposite to the first electrode, and an intermediate layer between the first electrode and the second electrode; an intermediate layer disconnection structure within the first distance, the intermediate layer disconnection structure surrounding the aperture and having an undercut cross-section; an encapsulation layer disposed on the light-emitting element, the encapsulation layer at least covering the intermediate layer disconnection structure within the first distance; a touch sensor on the encapsulation layer; and a self-assembly layer included on the upper surface of at least one of the plurality of inorganic layers in the encapsulation layer and the touch sensor.

[0197] In a light-emitting display device according to one embodiment of the present disclosure, the self-assembly layer may be an organic layer and may be combined with at least one of a plurality of inorganic layers.

[0198] In a light-emitting display device according to one embodiment of the present disclosure, the thickness of the self-assembled layer may be less than the thickness of the inorganic layer bonded thereto.

[0199] In a light-emitting display device according to one embodiment of the present disclosure, the self-assembled layer may have a first surface corresponding to at least one of a plurality of inorganic layers and a second surface opposite to the first surface. The second surface of the self-assembled layer may be hydrophobic, and the second surface may be positioned closer to the outside than the first surface.

[0200] In a light-emitting display device according to one embodiment of the present disclosure, the self-assembled layer may include a head group, an alkyl chain, and functional groups. The head group may be bonded to at least one of a plurality of inorganic layers.

[0201] In a light-emitting display device according to one embodiment of the present disclosure, the alkyl chain of the self-assembled layer may have a bond length along the thickness direction from the upper surface of at least one of the plurality of inorganic layers.

[0202] In a light-emitting display device according to one embodiment of the present disclosure, the alkyl chain may have 2 to 30 -CH2- bonds.

[0203] In a light-emitting display device according to one embodiment of the present disclosure, the head group of the self-assembled layer may include at least one of -COOH group, -SiH3 group, -SiCl3 group and -SiF3 group.

[0204] In a light-emitting display device according to one embodiment of the present disclosure, the functional groups of the self-assembled layer may be -CH3 groups or -CF3 groups.

[0205] In a light-emitting display device according to one embodiment of the present disclosure, the thickness of the self-assembled layer can be from 1 nm to 50 nm.

[0206] In one embodiment of the light-emitting display device according to the present disclosure, the self-assembly layer may cover the seam on the side of the intermediate layer disconnected structure or at least one pinhole of the plurality of inorganic layers.

[0207] In a light-emitting display device according to one embodiment of the present disclosure, the encapsulation layer may include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer sequentially disposed on the light-emitting element. The self-assembly layer may include at least one of a first self-assembly layer on the upper surface of the first inorganic encapsulation layer and a second self-assembly layer on the upper surface of the second inorganic encapsulation layer.

[0208] In one embodiment of the light-emitting display device according to the present disclosure, the touch sensor may include a touch buffer layer on the encapsulation layer, a first touch metal wire layer on the touch buffer layer, and a touch intermediate insulating layer on the first touch metal wire layer.

[0209] The touch metal wire layer is on the touch intermediate insulating layer, and an upper protective layer covers the second touch metal wire layer and the touch intermediate insulating layer. The self-assembly layer may include at least one of a third self-assembly layer on the touch buffer layer and a fourth self-assembly layer on the touch intermediate insulating layer.

[0210] In a light-emitting display device according to one embodiment of the present disclosure, the encapsulation layer may include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer sequentially disposed on the light-emitting element. The touch sensor may include a touch buffer layer on the encapsulation layer, a first touch metal wire layer on the touch buffer layer, a touch intermediate insulating layer on the first touch metal wire layer, a second touch metal wire layer on the touch intermediate insulating layer, and an upper protective layer covering the second touch metal wire layer and the touch intermediate insulating layer.

[0211] The self-assembly layer may include a first self-assembly layer on the upper surface of the first inorganic encapsulation layer, a second self-assembly layer on the upper surface of the second inorganic encapsulation layer, a third self-assembly layer on the touch buffer layer, and a fourth self-assembly layer on the touch intermediate insulating layer.

[0212] In one embodiment of the light-emitting display device according to this disclosure, any one of an infrared sensor, a camera, and an image sensor may be disposed below the aperture.

[0213] As is apparent from the above description, in a light-emitting display device according to one embodiment of the present disclosure, the disconnection portion of the light-emitting element is arranged to surround a hole in the substrate corresponding to the sensor portion, thereby preventing external air or moisture from flowing in through the hole in the substrate and affecting the sub-pixel.

[0214] In a light-emitting display device according to an embodiment of the present disclosure, a self-assembly layer is disposed on the upper surface of at least some of the inorganic layers (which are disposed on the light-emitting element), such that the self-assembly layer covers pinholes in the inorganic layers or seams appearing around the broken portions of the light-emitting element, thereby preventing deterioration due to external moisture penetration and ensuring the reliability of the display device.

[0215] In the light-emitting display device according to an embodiment of the present disclosure, the self-assembled layer comprises an alkyl chain, a head group located on one side of the alkyl chain corresponding to the upper surface of the inorganic layer, and a functional group located on the other side of the alkyl chain, wherein the functional group is hydrophobic, thereby facilitating the hydrophobicity of the self-assembled layer and thus making the self-assembled layer resistant to external air, such as moisture.

[0216] In the light-emitting display device according to the embodiments of the present disclosure, a self-assembled layer with a nanometer-thickness covers the seams or residual pinholes in the inorganic layer, thereby ensuring reliability even without increasing the thickness of the display device, so as not to impair the luminous efficacy or permeability in the display characteristics.

[0217] In the light-emitting display device according to the embodiments of this disclosure, the defect rate can be reduced by preventing the degradation of device reliability, and ESG (environmental, social, and governance) objectives can be achieved by reducing production energy through process optimization.

[0218] In addition to the effects described above, the specific effects of this disclosure have been described in the detailed description above.

Claims

1. A light-emitting display device, comprising: A substrate, the substrate including an active region having holes and an active region surrounding the active region; A plurality of sub-pixels in the active region that are spaced apart from the aperture by a first distance; A transistor at each of the plurality of sub-pixels; A light-emitting element at each of the plurality of sub-pixels, the light-emitting element comprising a first electrode connected to the transistor, a second electrode opposite to the first electrode, and an intermediate layer between the first electrode and the second electrode; An intermediate layer disconnect structure within the first distance, the intermediate layer disconnect structure surrounding the hole and having an undercut cross-section; An encapsulation layer disposed on the light-emitting element, the encapsulation layer at least covering the intermediate layer break structure within the first distance; Touch sensor on the encapsulation layer; and A self-assembly layer is included on the upper surface of at least one of the plurality of inorganic layers in the encapsulation layer and the touch sensor.

2. The light-emitting display device according to claim 1, wherein the self-assembled layer is an organic layer and is bonded to at least one of the plurality of inorganic layers.

3. The light-emitting display device according to claim 2, wherein the thickness of the self-assembled layer is less than the thickness of the inorganic layer bonded thereto.

4. The light-emitting display device according to claim 1, wherein: The self-assembled layer has a first surface corresponding to at least one of the plurality of inorganic layers and a second surface opposite to the first surface, and The second surface of the self-assembled layer is hydrophobic, and the second surface is positioned closer to the outside than the first surface.

5. The light-emitting display device according to claim 1, wherein: The self-assembled layer comprises a head group, an alkyl chain, and functional groups, and The head group is bonded to at least one of the plurality of inorganic layers.

6. The light-emitting display device according to claim 5, wherein the alkyl chain of the self-assembled layer has a bond length along the thickness direction from the upper surface of at least one of the plurality of inorganic layers.

7. The light-emitting display device according to claim 5, wherein the alkyl chain has 2 to 30 -CH2- bonds.

8. The light-emitting display device according to claim 5, wherein the head group of the self-assembled layer includes at least one of -COOH group, -SiH3 group, -SiCl3 group and -SiF3 group.

9. The light-emitting display device according to claim 5, wherein the functional group of the self-assembled layer is a -CH3 group or a -CF3 group.

10. The light-emitting display device according to claim 1, wherein the thickness of the self-assembled layer is from 1 nm to 50 nm.

11. The light-emitting display device according to claim 1, wherein: The self-assembly layer covers the seam on the side of the disconnected structure of the intermediate layer or at least one pinhole of the plurality of inorganic layers.

12. The light-emitting display device according to claim 1, wherein: The encapsulation layer includes a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer sequentially disposed on the light-emitting element, and The self-assembly layer includes at least one of a first self-assembly layer on the upper surface of the first inorganic encapsulation layer and a second self-assembly layer on the upper surface of the second inorganic encapsulation layer.

13. The light-emitting display device according to claim 1, wherein the touch sensor comprises: A touch buffer layer on the encapsulation layer; A first touch metal line layer on the touch buffer layer; A touch intermediate insulating layer on the first touch metal wire layer; A second touch metal wire layer on the touch intermediate insulating layer; and An upper protective layer covering the second touch metal wire layer and the touch intermediate insulating layer, and The self-assembly layer includes at least one of a third self-assembly layer on the touch buffer layer and a fourth self-assembly layer on the touch intermediate insulating layer.

14. The light-emitting display device according to claim 1, wherein: The encapsulation layer includes a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer sequentially disposed on the light-emitting element. The touch sensor includes a touch buffer layer on the encapsulation layer, a first touch metal wire layer on the touch buffer layer, a touch intermediate insulating layer on the first touch metal wire layer, a second touch metal wire layer on the touch intermediate insulating layer, and an upper protective layer covering the second touch metal wire layer and the touch intermediate insulating layer. The self-assembly layer includes a first self-assembly layer on the upper surface of the first inorganic encapsulation layer, a second self-assembly layer on the upper surface of the second inorganic encapsulation layer, a third self-assembly layer on the touch buffer layer, and a fourth self-assembly layer on the touch intermediate insulating layer.

15. The light-emitting display device according to claim 1, wherein any one of an infrared sensor, a camera, and an image sensor is disposed below the hole.

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