A method for determining factors affecting quantum bit decoherence time and application thereof

Abstract

The application discloses a method for determining factors influencing quantum bit decoherence time and application thereof, and belongs to the technical field of quantum chip characterization. The method for determining factors influencing quantum bit decoherence time comprises the following steps: positioning a first Josephson junction in a first region and a second Josephson junction in a second region, which have a preset difference in coherence time and are prefabricated in the same batch by the same process; detecting the first region to obtain first data and detecting the second region to obtain second data; the first data comprises topographic information and grain information of the first region, and the second data comprises topographic information and grain information of the second region; and determining process factors causing the preset difference in coherence time of the first Josephson junction and the second Josephson junction according to the first data and the second data. In the above manner, the process factors causing the preset difference in coherence time of the first Josephson junction and the second Josephson junction can be quickly determined.

Description

Technical Field

[0001] This application belongs to the field of quantum chip characterization technology, and in particular relates to a method for determining the factors affecting the decoherence time of a quantum bit and its application. Background Technology

[0002] The core components of a superconducting quantum chip mainly include superconducting qubits, the key to which is the Josephson junction, which has nonlinear characteristics and can rapidly change the frequency and coupling inductance of the qubit. It also includes control lines and readout lines for controlling the state of the qubit and reading its information, typically fabricated as coplanar waveguides.

[0003] Decoherence is a crucial concept in quantum bits (qubits). A quantum bit possesses coherence, maintaining properties such as superposition and entanglement, enabling parallel processing in quantum computing. However, due to the interaction between the quantum system and its environment, the coherence of a quantum bit gradually weakens and eventually disappears over time. This process, known as decoherence, leads to information loss and errors in quantum computing.

[0004] Therefore, there is an urgent need for a rapid detection method to determine if the decoherence time of qubits in a superconducting quantum chip is too short. Summary of the Invention

[0005] The purpose of this application is to provide a method for determining the factors affecting the decoherence time of qubits and its application, in order to solve the problem of the lack of a method for quickly judging the short decoherence time of qubits in superconducting quantum chips in the prior art. It can identify the process factors that affect the low decoherence time, improve the adverse effects of the process, and is of great significance for improving the decoherence time.

[0006] To address the aforementioned technical problems, this invention provides a method for determining the factors affecting the decoherence time of a quantum bit, the method comprising:

[0007] The first Josephson junction and the second Josephson junction in the second region are prefabricated in the same batch using the same process and have a preset difference in coherence time.

[0008] First data is obtained by detecting a first region, and second data is obtained by detecting a second region; the first data includes morphology information and grain information of the first region, and the second data includes morphology information and grain information of the second region;

[0009] Based on the first and second data, determine the process factors that cause the preset difference in the coherence time of the first Josephson junction and the second Josephson junction.

[0010] Preferably, the method for preparing the first Josephson node and the second Josephson node is as follows:

[0011] A substrate with a superconducting metal layer formed on its surface is provided; the superconducting metal layer is provided with a window exposing a portion of the substrate;

[0012] A first Josephson knot and a second Josephson knot are formed on the surface of the substrate through the window.

[0013] Preferably, the first region is further provided with a first resonant cavity, a first bus, a first capacitor, and a first transmission line;

[0014] And / or, the second region is also provided with a second resonant cavity, a second bus, a second capacitor, and a second transmission line.

[0015] Preferably, the method for detecting the first region is the same as the method for detecting the second region.

[0016] Preferably, the detection method includes:

[0017] A scanning electron microscope scans the target area to obtain corresponding first information, and the morphological information includes the first information.

[0018] The first information includes one or more of the following: the morphology of the Josephson junction, the morphology of the resonant cavity, the coupling length and coupling linewidth between the resonant cavity and the bus, the capacitor linewidth, and the transmission linewidth.

[0019] Preferably, after obtaining the corresponding first information by scanning the target area using a scanning electron microscope, the detection method further includes:

[0020] The target area is scanned using an atomic force microscope to obtain corresponding second and third information, wherein the morphology information includes the second information and the grain information includes the third information;

[0021] The second piece of information includes the surface roughness and morphology of the capacitor, and the superconducting layer size of the Josephson junction.

[0022] The third piece of information includes the grain morphology of the Josephson junction.

[0023] Preferably, after obtaining the corresponding second and third information by scanning the target area using an atomic force microscope, the detection method further includes:

[0024] The target area is scanned using a focused ion beam scanning electron microscope to obtain the corresponding fourth information. The morphological information includes the fourth information, which includes the etching angle, etching depth, and film thickness of the coupling interface between the resonant cavity and the bus.

[0025] Preferably, after obtaining the corresponding fourth information by scanning the target area using a focused ion beam scanning electron microscope, the detection method further includes:

[0026] The target area is scanned using a transmission electron microscope to obtain the corresponding fifth and sixth information, wherein the morphology information includes the fifth information and the grain information includes the sixth information;

[0027] The fifth piece of information includes the interface thickness between the substrate and the Josephson junction, the interface thickness between the two superconducting layers of the Josephson junction, and dislocation defects.

[0028] The sixth piece of information includes the grain size and grain orientation of the two superconducting layers of the Josephson junction.

[0029] The present invention also provides the application of the method for determining the factors affecting the decoherence time of qubits, including any of the foregoing embodiments, in the fabrication of Josephson junctions.

[0030] Preferably, the determination method is used to optimize the manufacturing process parameters of Josephson junctions.

[0031] Compared with the prior art, this application locates a first Josephson junction with a predetermined difference in coherence time on the surface of a superconducting quantum chip and a second Josephson junction in the same batch and fabricated in the same process in the first region and the second region, respectively, and obtains first data and second data by detecting the first region and the second region. Based on the morphology and grain information of the first region in the first data and the morphology and grain information of the second region in the second data, the process factors that cause the predetermined difference in coherence time between the first Josephson junction and the second Josephson junction can be quickly determined. Attached Figure Description

[0032] Figure 1 A schematic diagram illustrating the steps of the testing method provided in the embodiments of this application. Detailed Implementation

[0033] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0034] The specific embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description and claims. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0035] In the description of this invention, it should be understood that the terms "center", "upper", "lower", "left", "right", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0036] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0037] In superconducting quantum chips, superconducting qubits are the basic building blocks, and Josephson junctions are the core devices for constructing superconducting qubits. A Josephson junction consists of two superconducting layers sandwiching an extremely thin insulating layer or other weakly connected layer. This special structure allows electrons to tunnel through the insulating layer via quantum tunneling, generating superconducting current and providing nonlinear inductance for the superconducting qubit, thus enabling the qubit to function.

[0038] In superconducting quantum chips, the performance of the Josephson junction directly affects the overall performance of the superconducting quantum chip. For example, the accuracy and stability of parameters such as the critical current and inductance of the Josephson junction will affect the energy level structure and coherence time of the qubit.

[0039] The coherence of the Josephson junction originates from the quantum properties of superconducting electron pairs. In a superconductor, electrons form Cooper pairs, which exhibit boson-like properties. When two superconductors are weakly coupled through a Josephson junction, the Cooper pairs can pass through the insulating layer with a certain probability via quantum tunneling, causing a correlation between the macroscopic quantum wave functions of the two superconductors, thus exhibiting quantum coherence.

[0040] In superconducting qubits, the coherence of the Josephson junction is fundamental to the storage and manipulation of qubits. Qubits need to be in quantum superposition and entangled states to perform quantum computations, and the maintenance and manipulation of these quantum states depend on the coherence of the Josephson junction. Only with a sufficiently long coherence time can a qubit retain its quantum properties during operation, thereby enabling accurate quantum computation.

[0041] In the practical production and application of superconducting quantum chips, temperature, electromagnetic environment, material and structural defects, as well as the coupling and decoherence channels of qubits, all affect their coherence to varying degrees. Therefore, reducing defects and impurities in materials, while improving chip manufacturing processes and enhancing process precision and stability, such as precisely controlling the size, shape, and performance of Josephson junctions, can reduce the impact of material and process factors on decoherence.

[0042] Please refer to Figure 1 This invention provides a method for determining the factors affecting the decoherence time of a quantum bit, including:

[0043] S1: The first Josephson junction and the second Josephson junction in the second region are prefabricated in the same batch using the same process and have a preset difference in coherence time.

[0044] S2: Detect the first region to obtain the first data, and detect the second region to obtain the second data;

[0045] S3: Based on the first data and the second data, determine the process factors that cause the preset difference in the coherence time of the first Josephson junction and the second Josephson junction.

[0046] The first Josephson junction and the second Josephson junction are manufactured on the substrate surface in the same batch and with the same process; the first Josephson junction and the second Josephson junction are positioned with a predetermined difference; the first data obtained by detection includes the morphology information and grain information of the first region, and the second data includes the morphology information and grain information of the second region.

[0047] During the fabrication of superconducting quantum chips, the manufacturing process itself can lead to inhomogeneities in the growth and deposition of superconducting materials and barrier layer materials. This undoubtedly results in differences in material purity, cleanliness, and defect density among Josephson junctions at different locations on the same chip surface. Furthermore, due to limitations in the precision of processes such as photolithography and etching, slight variations in the size and shape of Josephson junctions at different locations can occur during chip manufacturing. These differences are often significant, altering electrical parameters such as capacitance and inductance, and consequently affecting the quantum properties and decoherence time of the junction.

[0048] Furthermore, the coupling strength between Josephson junctions at different locations and other components on the chip, such as qubits, resonant cavities, and transmission lines, varies. These different coupling strengths are influenced by the surrounding components, thus affecting the decoherence time of the Josephson junction.

[0049] For example, the interaction between microwave frequencies and Josephson junctions can be utilized. When the microwave frequency matches the energy level spacing of the Josephson junction, resonant absorption occurs. By measuring parameters such as the width and height of the resonance peak, the decoherence time at different bias points can be calculated. Alternatively, the relaxation process of the qubit from the excited state to the ground state can be directly measured. This can be used to determine the first and second Josephson junctions with predetermined differences in coherence times in the first and second regions. For instance, the Josephson junction regions with the highest and lowest decoherence times in on-chip fixed-frequency single-qubit samples prefabricated with the same process in the same batch can be selected as characterization objects, with the relevant regions labeled as the first region and the second region, respectively.

[0050] To evaluate coherence time from the perspective of material preparation process, a series of comparative experiments were designed. First data was obtained by detecting the first region, and second data was obtained by detecting the second region. The first and second data included various parameters, such as whether there were significant differences in the structure of the Josephson junction and the surrounding quantum devices in the first and second regions, the degree of impurity contamination on the device surface, grain size, grain size and morphology of the junction region, thin film roughness, etch trench roughness, superconducting layer thickness of the Josephson junction, and trench etching angle. The above information was tested to see if it met the design requirements. Characterization methods using experimental tools such as scanning electron microscope, atomic force microscope, focused ion beam scanning electron microscope, and transmission electron microscope were used.

[0051] Specifically, the size and shape of a superconducting qubit affect the area and manner in which it interacts with its external environment. Smaller sizes typically mean fewer surface states and lower decoherence. Furthermore, the surface roughness of the device also affects the performance of the superconducting material and the quality of its contact with other materials. A rough surface increases the number of scattering centers, making superconducting electrons more prone to scattering during transmission, thus leading to energy loss and decoherence.

[0052] In one embodiment of this application, a method for preparing a first Josephson node and a second Josephson node is provided, comprising:

[0053] Step 1: Provide a substrate with a superconducting metal layer formed on its surface; the superconducting metal layer is provided with a window exposing a portion of the substrate;

[0054] Step 2: Form a first Josephson knot and a second Josephson knot on the surface of the substrate through the window.

[0055] Josephson junctions are three-layer thin-film structures: superconductor (S) - insulator (I) - superconductor (S). The superconductor is typically made of aluminum or niobium, and the insulating layer is a barrier layer (usually a very thin layer of oxide material). In superconducting quantum chips, the superconducting quantum bit circuit includes a capacitance to ground, a superconducting quantum interference device (including two Josephson junctions), and control lines.

[0056] In the manufacturing process of superconducting quantum chips, firstly, a superconducting metal layer is formed on a substrate, and the superconducting metal layer is patterned (etched) to obtain a ground layer, a ground capacitance pattern structure, and a window exposing part of the substrate. Then, multiple Josephson junctions are formed on the substrate surface within the window using processes such as oblique evaporation.

[0057] In one embodiment of this application, the first region is further provided with a first resonant cavity, a first bus, a first capacitor and a first transmission line, and the second region is further provided with a second resonant cavity, a second bus, a second capacitor and a second transmission line.

[0058] In a superconducting quantum chip, the various quantum devices mentioned above cooperate and influence each other, together forming the core architecture of the superconducting quantum chip.

[0059] For example, a Josephson junction and a capacitor together constitute a superconducting qubit, which are connected in parallel and together determine the energy level structure and coherence time of the qubit.

[0060] Transmission lines (signal transmission lines) are used to control and read the state of qubits and have various coupling methods with Josephson junctions. For example, the Z control line can act on the Josephson junction through mutual inductance coupling to adjust its phase and magnetic flux, thereby manipulating the state of the qubit. The XY control line interacts with the bit capacitance through mutual capacitance coupling, affecting the charge distribution and phase difference on both sides of the Josephson junction, thereby achieving the purpose of controlling the qubit.

[0061] The bus is the hub channel connecting multiple superconducting qubits. The Josephson junction enables the interaction and signal transmission between qubits through coupling with the bus.

[0062] It is worth noting that when testing superconducting quantum chips, it is necessary to ensure that the method used to test the first region is the same as the method used to test the second region, and to compare the parameters tested in the two regions to prevent non-negligible errors from affecting the final result.

[0063] For example, when detecting a superconducting quantum chip, the methods for detecting a first region and the methods for detecting a second region include:

[0064] A scanning electron microscope scans the target area to obtain corresponding first information, including morphological information;

[0065] The first information includes one or more of the following: the morphology of the Josephson junction, the morphology of the resonant cavity, the coupling length and coupling linewidth between the resonant cavity and the bus, the capacitance linewidth, and the transmission linewidth.

[0066] Specifically, scanning electron microscopy is used to scan the first and second regions to obtain corresponding morphological information, which includes the morphology of the first Josephson junction and the second Josephson junction, the morphology of the first resonant cavity and the second resonant cavity, the coupling length of the first resonant cavity and the first bus, the coupling length of the second resonant cavity and the second bus, the coupling linewidth, the linewidth of the first capacitor, the linewidth of the second capacitor, the linewidth of the first transmission line, and the linewidth of the second transmission line.

[0067] Smaller Josephson junctions typically have fewer surface states and lower decoherence rates; asymmetric Josephson junctions can lead to non-uniform electric and magnetic field distributions. This non-uniformity alters the energy level structure of the junction region, affecting the coherence characteristics of the qubit and resulting in a shorter decoherence time. Symmetrical shapes, on the other hand, are more conducive to maintaining the stability and coherence of the qubit, although they generally have a longer decoherence time.

[0068] Different resonant cavity shapes lead to different internal electromagnetic field distributions. If the resonant cavity has an irregular shape or sharp edges, the electromagnetic environment in the region where the Josephson junction is located becomes complex, increasing the uncertainty of coupling with the external environment and potentially shortening the decoherence time of the Josephson junction. Furthermore, the surface roughness of the resonant cavity also affects the decoherence time of the Josephson junction. Similar to the Josephson junction, a rough surface increases the scattering centers of superconducting electrons, affecting the superconducting properties and quantum states of the Josephson junction, thus shortening the decoherence time.

[0069] The coupling length between the resonant cavity and the bus also has a significant impact on the decoherence time of the Josephson junction. For example, when the coupling length between the resonant cavity and the bus is short, the coupling strength between them is weak. This undoubtedly indirectly weakens the interaction between the Josephson junction and the bus, reducing the impact of noise and interference in the bus on the Josephson junction, which is beneficial for extending its decoherence time. However, it may affect the manipulation and readout speed of the qubits. Conversely, when the coupling length between the resonant cavity and the bus is long, the risk of decoherence increases, and the decoherence time is shortened.

[0070] Furthermore, wider signal transmission lines have lower resistance and inductance, which reduces resistive losses and inductive effects during signal transmission. When the transmission line is used to transmit control or read signals to the Josephson junction, lower resistive losses mean that signal energy can be transmitted to the Josephson junction more efficiently, reducing signal attenuation and energy dissipation caused by the transmission line's own resistance, thus helping to maintain the coherence of the Josephson junction. Conversely, narrower transmission lines have relatively higher resistance and inductance, which can cause greater signal attenuation and phase shift during transmission, affecting signal quality and accuracy, and consequently interfering with the normal operation of the Josephson junction and reducing its coherence.

[0071] For example, in a method for determining factors affecting the decoherence time of a quantum bit, after obtaining corresponding first information by scanning the target area with a scanning electron microscope, the detection method further includes:

[0072] The target area is scanned using an atomic force microscope to obtain corresponding second and third information. The morphology information includes the second information, and the grain information includes the third information.

[0073] The second piece of information includes the surface roughness and morphology of the capacitor, and the superconducting layer size of the Josephson junction.

[0074] The third piece of information includes the grain morphology of the Josephson junction.

[0075] Specifically, atomic force microscopy is used to scan the first and second regions to obtain corresponding morphology and grain information. The morphology information includes the roughness and morphology of the surfaces of the first and second capacitors, as well as the superconducting layer size of the first and second Josephson junctions.

[0076] The grain information includes the grain morphology of the first Josephson junction and the second Josephson junction.

[0077] Increased surface roughness of a capacitor increases the actual surface area of ​​the plates, leading to a larger capacitance. A larger capacitance affects the charge and electric field distribution in the circuit containing the Josephson junction, thus altering the electromagnetic environment and potentially changing the energy level structure of the junction, thereby affecting its coherence. Furthermore, a rough capacitor surface causes more electromagnetic wave scattering, increasing signal transmission losses. The surface roughness also affects the coupling capacitance between the capacitor and the Josephson junction, all of which impact coherence. Moreover, capacitors with different shapes, such as rectangular, circular, or other shapes, exhibit varying edge effects, leading to uneven electric field distribution and inconsistent electric field strength at the location of the Josephson junction, further affecting its coherence.

[0078] For example, after obtaining the corresponding second and third information by scanning the target area using an atomic force microscope, the detection method further includes:

[0079] The target area is scanned using a focused ion beam scanning electron microscope to obtain the corresponding fourth information. The morphological information includes the fourth information, which includes the etching angle, etching depth, and film thickness of the coupling interface between the resonant cavity and the bus.

[0080] Specifically, a focused ion beam scanning electron microscope is used to scan the first and second regions to obtain corresponding morphological information, including the etching angle, etching depth, and film thickness of the coupling interface between the first resonant cavity and the first bus.

[0081] The etching angle at the coupling interface affects the coupling mode and distribution of the electromagnetic field between the resonant cavity and the bus. A suitable etching angle can optimize the electromagnetic coupling efficiency between the resonant cavity and the bus, which improves the coherence of the Josephson junction. However, a non-perpendicular etching angle may alter the direction and intensity of the electric and magnetic fields at the location of the Josephson junction. If the direction of the electric or magnetic field is unfavorable to the operating state of the Josephson junction, such as generating additional electric field components that interfere with the energy level structure of the Josephson junction, its coherence will be reduced.

[0082] The etching depth of the coupling interface directly affects the coupling strength between the resonant cavity and the bus. Deeper etching may increase the effective coupling area between the two, enabling more efficient transmission of signals (including noise and interference) and reducing the coherence of the Josephson junction.

[0083] In the coupling structure of the resonant cavity and the bus, the thickness of the thin film affects electrical characteristics such as capacitance and inductance. A thicker film may lead to a decrease in capacitance and an increase in inductance, thereby changing the resonant frequency and impedance characteristics of the circuit. The thickness of the thin film is also related to energy loss and thermal noise; a thinner film may lead to an increase in resistance, increasing energy loss and thermal noise. Therefore, the thickness of the thin film can also significantly affect the coherence of the Josephson junction.

[0084] For example, after obtaining the corresponding fourth information by scanning the target area using a focused ion beam scanning electron microscope, the detection method further includes:

[0085] The target area is scanned using a transmission electron microscope to obtain the corresponding fifth and sixth information, wherein the morphology information includes the fifth information and the grain information includes the sixth information;

[0086] The fifth piece of information includes the interface thickness between the substrate and the Josephson junction, the interface thickness between the two superconducting layers of the Josephson junction, and dislocation defects.

[0087] The sixth piece of information includes the grain size and grain orientation of the two superconducting layers of the Josephson junction.

[0088] Specifically, after obtaining the corresponding morphological information by scanning the first and second regions using a focused ion beam scanning electron microscope, the process also includes:

[0089] The first and second regions were scanned using a transmission electron microscope to obtain the corresponding morphology and grain information. The morphology information included the interface thickness between the substrate and the first Josephson junction, the interface thickness between the substrate and the second Josephson junction, the interface thickness between the two superconducting layers of the first Josephson junction, the interface thickness between the two superconducting layers of the second Josephson junction, the dislocation defects in the two superconducting layers of the first Josephson junction, and the dislocation defects in the two superconducting layers of the second Josephson junction.

[0090] The grain information includes the grain size and grain orientation of the two superconducting layers of the first Josephson junction, and the grain size and grain orientation of the two superconducting layers of the second Josephson junction.

[0091] The interface thickness between the substrate and the Josephson junction affects charge transport efficiency, alters capacitance characteristics, and influences magnetic field shielding. For example, increasing the interface thickness reduces the superconducting current in the Josephson junction, thus shortening the coherence time. Furthermore, excessive interface thickness between the substrate and the Josephson junction can introduce impurity scattering, enhance phonon scattering, generate thermal noise, and increase energy loss—all factors that negatively impact the Josephson junction.

[0092] In one embodiment of this application, the aforementioned method for determining the factors affecting the decoherence time of qubits is applied to the fabrication of Josephson junctions.

[0093] Specifically, by using relevant characterization methods to identify the process factors that affect the low decoherence time, improving the adverse effects of the process is of great significance for improving the decoherence time and can be used to optimize the manufacturing process parameters of the structure.

[0094] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," or "specific example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0095] The above description, based on the embodiments shown in the drawings, details the structure, features, and effects of this application. The above description is only a preferred embodiment of this application, but this application does not limit the scope of implementation to what is shown in the drawings. Any changes made in accordance with the concept of this application, or modifications to equivalent embodiments, that do not exceed the spirit covered by the specification and drawings, should be within the protection scope of this application.

Claims

1. A method for determining the factors affecting the decoherence time of a quantum bit, characterized in that, The determination methods include: The first Josephson junction and the second Josephson junction in the second region are prefabricated in the same batch using the same process and have a preset difference in coherence time. First data is obtained by detecting a first region, and second data is obtained by detecting a second region; the first data includes morphology information and grain information of the first region, and the second data includes morphology information and grain information of the second region; Based on the first and second data, determine the process factors that cause the preset difference in the coherence time of the first Josephson junction and the second Josephson junction.

2. The determination method according to claim 1, characterized in that, The methods for preparing the first and second Josephson knots are as follows: A substrate with a superconducting metal layer formed on its surface is provided; the superconducting metal layer is provided with a window exposing a portion of the substrate; A first Josephson knot and a second Josephson knot are formed on the surface of the substrate through the window.

3. The determination method according to claim 1, characterized in that, The first region is also provided with a first resonant cavity, a first bus, a first capacitor, and a first transmission line; And / or, the second region is also provided with a second resonant cavity, a second bus, a second capacitor, and a second transmission line.

4. The determination method according to claim 3, characterized in that, The method for detecting the first region is the same as the method for detecting the second region.

5. The determination method according to claim 4, characterized in that, The detection method includes: A scanning electron microscope scans the target area to obtain corresponding first information, and the morphological information includes the first information. The first information includes one or more of the following: the morphology of the Josephson junction, the morphology of the resonant cavity, the coupling length and coupling linewidth between the resonant cavity and the bus, the capacitor linewidth, and the transmission linewidth.

6. The determination method according to claim 5, characterized in that, After obtaining the corresponding first information by scanning the target area using a scanning electron microscope, the detection method further includes: The target area is scanned using an atomic force microscope to obtain corresponding second and third information, wherein the morphology information includes the second information and the grain information includes the third information; The second piece of information includes the surface roughness and morphology of the capacitor, and the superconducting layer size of the Josephson junction. The third piece of information includes the grain morphology of the Josephson junction.

7. The determination method according to claim 6, characterized in that, After obtaining the corresponding second and third information by scanning the target area using an atomic force microscope, the detection method further includes: The target area is scanned using a focused ion beam scanning electron microscope to obtain the corresponding fourth information. The morphological information includes the fourth information, which includes the etching angle, etching depth, and film thickness of the coupling interface between the resonant cavity and the bus.

8. The determination method according to claim 7, characterized in that, After obtaining the corresponding fourth information by scanning the target area using a focused ion beam scanning electron microscope, the detection method further includes: The target area is scanned using a transmission electron microscope to obtain the corresponding fifth and sixth information, wherein the morphology information includes the fifth information and the grain information includes the sixth information; The fifth piece of information includes the interface thickness between the substrate and the Josephson junction, the interface thickness between the two superconducting layers of the Josephson junction, and dislocation defects. The sixth piece of information includes the grain size and grain orientation of the two superconducting layers of the Josephson junction.

9. The application of the method for determining the factors affecting the decoherence time of a quantum bit as described in any one of claims 1 to 8 in the fabrication of a Josephson junction.

10. The application according to claim 9, characterized in that, The method was used to optimize the manufacturing process parameters of Josephson junctions.

Images