A method of accessing a resource, a computing network, and related devices

Abstract

The embodiment of the present application provides a resource access method, a computing network and related equipment, which can realize flexible access between a processor and a computing card according to the demand of a computing service, and improves the utilization rate of computing resources. The method comprises the following steps: a management and control device sends a first resource allocation instruction to the computing card, the first resource allocation instruction carries first allocation information, and the first allocation information is used for instructing the computing card to allocate a first shared resource. The management and control device sends a second resource allocation instruction to the processor, the second resource allocation instruction carries second allocation information, and the second allocation information is used for instructing the processor to allocate a second shared resource. The management and control device receives a first shared message from the computing card, the first shared message carries first access information used for accessing the first shared resource. The management and control device sends a first access message to the processor, and the first access message is used for the second shared resource to access the first shared resource.

Description

Technical Field

[0001] This application relates to the field of communications, and more particularly to a method for accessing resources, a computing network, and related devices. Background Technology

[0002] Server virtualization is a process that improves resource utilization and enhances system flexibility and scalability. Taking artificial intelligence (AI) training as an example, AI training requires the processor and computing card to be bound together. This leverages the high-efficiency computing power of the computing card to accelerate the AI ​​training process, thereby reducing the processor's burden and improving computational efficiency. In implementing computing card virtualization, the computing card is treated as a peripheral component interconnect express (PCIe) network interface card, allowing it to connect to the server host via the PCIe interface. Through PCIe single root I / O virtualization (SRIOV) technology, the computing card's resources are partitioned at the hardware level into multiple virtual functions (VFs). These VFs are directly connected to the virtual machines via a virtualized function I / O (VFIO) framework. Each virtual machine can independently present and use a VF, thus achieving virtualization.

[0003] However, before virtualization, a binding relationship between the processor and the computing card needs to be established in advance so that the processor can scan the computing card through the PCIe bus. The computing card is managed by the operating system (OS) on the processor, and the binding relationship between the processor and the computing card cannot be flexibly bound according to the different AI training needs. Summary of the Invention

[0004] This application provides a resource access method, a computing network, and related devices, which can realize flexible access between the processor and the computing card according to the needs of computing services, thereby improving the utilization rate of computing resources.

[0005] In a first aspect, this application provides a method for accessing resources, the method being executed by a control device, wherein the control device may be an independent server included in a computing network, or a logical module or software within a server, or a component or device of the server (e.g., a chip, network interface card, etc.). The method includes: First, the control device sends a first resource allocation instruction to the computing card, the first resource allocation instruction carrying first allocation information, the first allocation information being used to instruct the computing card to allocate a first shared resource. The control device then sends a second resource allocation instruction to a processor, the second resource allocation instruction carrying second allocation information, the second allocation information being used to instruct the processor to allocate a second shared resource. Second, the control device receives a first sharing message from the computing card, the first sharing message carrying first access information for accessing the first shared resource. Third, the control device sends a first access message to the processor, the first access message carrying the first allocation information and the first access information, the first access message being used by the second shared resource to access the first shared resource.

[0006] As described in this aspect, the control device can send a first resource allocation instruction and a second resource allocation instruction to the computing card and the processor, respectively, according to the resource requirements of the computing service. This instructs the computing card to allocate a first shared resource and the processor to allocate a second shared resource. The first and second shared resources satisfy the resource requirements of the computing service, thereby enabling the first and second shared resources to successfully execute the computing service. Upon successful allocation of the first and second shared resources, the computing card sends a first shared message to the control device. Based on the first shared message, the control device establishes a binding relationship between the computing card and the processor. The control device then sends a first access message to the processor bound to the computing card, enabling the processor to successfully access the first shared resource on the computing card based on the first access message. Therefore, the control device will only send the first resource allocation instruction and the second resource allocation instruction to the computing card and the processor respectively when it obtains the resource requirements of the computing service. There is no need to bind the binding relationship between the computing card and the processor in advance (for example, before the control device knows the resource requirements of the computing service). It can dynamically bind the computing card and the processor according to the resource requirements of the computing service, so as to realize the purpose of the processor flexibly accessing the computing card according to the requirements of the computing service, thereby improving the utilization rate of the local resources of the computing card and the local resources of the processor.

[0007] Based on the first aspect, in an optional implementation, after the control device sends a first resource allocation instruction to the computing card, the method further includes: the control device receiving a second shared message from the processor, the second shared message carrying second access information for accessing the second shared resource; the control device sending a second access message to the computing card, the second access message carrying the second allocation information and the second access information, the second access message being used by the first shared resource to access the second shared resource.

[0008] In this implementation, upon successful allocation of the first and second shared resources, the processor sends a second shared message to the management device. The management device establishes a binding relationship between the computing card and the processor based on the first and second shared messages. The management device then sends a first access message to the processor bound to the computing card, enabling the processor to successfully access the first shared resource on the computing card. The management device then sends a second access message to the computing card bound to the processor, enabling the computing card to successfully access the second shared resource on the processor. This approach eliminates the need for the management device to pre-bind the computing card and processor (e.g., before the management device clearly defines the resource requirements of the computing services), allowing for dynamic and flexible access between the processor and computing card based on the resource needs of the computing services, thus improving the utilization rate of both the computing card's local resources and the processor's local resources.

[0009] Based on the first aspect, in an optional implementation, before the control device sends the first resource allocation instruction to the computing card, the method further includes: the control device receiving a resource request, wherein the first shared resource and the second shared resource satisfy the resource requested by the resource request.

[0010] Using this implementation, when a physical machine, virtual machine, or process needs to run computing services, it directly requests resources from the management device. Based on the resource request, the management device instructs the computing card to allocate a first shared resource and instructs the processor to allocate a second shared resource. The first and second shared resources can satisfy the resources requested by the resource request, ensuring the successful implementation of computing services. This improves the utilization rate of resources by flexibly and dynamically allocating resources according to the resource request.

[0011] Based on the first aspect, in one optional implementation, the first allocation information includes a first network address, the first allocation information is used to configure a first shared node on the computing card, the first shared node is used to carry the first shared resource, and the network address corresponding to the first shared node is the first network address.

[0012] In this implementation, the first allocation information sent by the control device to the computing card includes a first network address for identifying the first shared node, so that the computing card configures the address of the first shared node as the first network address, ensuring that the processor can access the first shared node based on the first network address.

[0013] Based on the first aspect, in one optional implementation, the first allocation information further carries a first identifier, and the identifier corresponding to the first shared node is the first identifier.

[0014] Using this implementation, different shared nodes on the computing card can be assigned different identifiers. The computing card configures the identifier of the first shared node as the first identifier, ensuring that the processor can successfully access the first shared node based on the first identifier, thereby improving the success rate of access.

[0015] Based on the first aspect, in an optional implementation, the first resource allocation indication further carries third allocation information, the third allocation information including at least one of the first resource indication, user partition identifier (UPI), and identifier of the first port, wherein the first resource indication is used to indicate the type and / or size of the first shared resource, the UPI is used to isolate the tenant corresponding to the first shared node, the first shared node is used to carry the first shared resource, the identifier of the first port is used to identify the first port of the computing card, and the first port is used to send an access message to the processor.

[0016] Using this implementation, the computing card can allocate specific second shared resources to a second shared node according to the first resource indication carried in the third allocation information. This ensures that the first shared resources carried by the second shared node can meet the needs of computing services and guarantee the successful execution of computing services. The computing card can configure the UPI of the first shared node to the UPI included in the third allocation information to isolate the tenant corresponding to the first shared node, achieving user isolation and improving the security of computing service implementation. The computing card can bind the first shared node to a first port, enabling the computing card to send access messages to the processor through this first port, ensuring successful access to the processor.

[0017] Based on the first aspect, in an optional implementation, the first resource allocation instruction is further used to instruct the computing card to allocate a first access address, a first memory size, and a first host physical address to the first shared node, the first shared node being used to carry the first shared resource, the first memory size being the memory size allocated to the first shared node, and the first host physical address being the physical address of the memory allocated to the first shared node; the first access information includes the first access address and the first memory size.

[0018] In this implementation, the computing card allocates a first access address, a first memory size, and a first host physical address to the first shared node according to the first resource allocation instruction, and sends first access information carrying the first access address and the first memory size to the control device. Based on the first access information, the processor can access the memory space identified by the first access address. The size of the memory space is the first memory size, which ensures that the processor can successfully access the first shared resource.

[0019] Based on the first aspect, in an optional implementation, the first resource allocation instruction is further used to instruct the computing card to allocate at least one of the following to the first shared node: a first shared identifier, a token value corresponding to the first shared node, and read / write permissions corresponding to the first shared node, wherein the first shared identifier is used to identify the computing service performed by the first shared node; the first access information includes at least one of the following: the first shared identifier, the token value corresponding to the first shared node, and read / write permissions corresponding to the first shared node.

[0020] In this implementation, the computing card can assign a first shared identifier to the first shared node according to a first resource allocation instruction. This first shared identifier identifies the computing service executed by the first shared node. For example, the computing card can assign different shared identifiers to different shared nodes used to execute different computing services, or it can assign different shared identifiers to different shared nodes used to execute different functions of the same computing service, thereby improving the efficiency and success rate of computing service execution. The computing card can also assign a corresponding token value to the first shared node according to the first resource allocation instruction. Only with this token value can the processor successfully access the first shared resource carried by the first shared node, ensuring secure access to the first shared resource and improving data security. Finally, the computing card can assign corresponding read and write permissions to the first shared node according to the first resource allocation instruction, enabling the processor to access the first shared node according to its corresponding read and write permissions.

[0021] Based on the first aspect, in an optional implementation, the first resource allocation instruction is further used to instruct the computing card to allocate a sub-access address, a sub-memory size, and a sub-host physical address to the sub-shared resource. The first shared resource includes K sub-shared resources, where the sub-shared resource is any one of the K sub-shared resources, and K is any integer greater than 1. The sub-memory size is the memory size allocated to the sub-shared resource, and the sub-host physical address is the physical address of the memory allocated to the sub-shared resource. The first access information includes the sub-access address and the sub-memory size.

[0022] Using this implementation, as hardware performance improves, the computing power of a single computing card may even exceed business requirements. Therefore, there is a need to further allocate the local resources of the computing card. For example, in cloud computing scenarios, it is necessary to allocate half of the computing card's computing power to a single virtual machine for inference operations, so that tenants can utilize the computing card's resources. It can be understood that, with the improvement of hardware performance, to improve the utilization of computing card resources, the primary shared resources of the computing card can be further divided into K sub-shared resources. Different sub-shared resources can be used to execute different computing operations, thereby improving the utilization of the local resources of the computing card.

[0023] Based on the first aspect, in an optional implementation, the first resource allocation indication is further used to instruct the computing card to allocate at least one of the following to the sub-shared resource: a sub-shared identifier, a token value corresponding to the sub-shared resource, and read / write permissions corresponding to the sub-shared resource. The sub-shared identifier is used to identify the computing service performed by the sub-shared resource. The first access information includes at least one of the sub-shared identifier, the token value corresponding to the sub-shared resource, and read / write permissions corresponding to the sub-shared resource.

[0024] In this implementation, the computing card, based on the first resource allocation instruction, assigns at least one of the following to each sub-shared resource: a sub-shared identifier, a token value corresponding to the sub-shared resource, and read / write permissions corresponding to the sub-shared resource. This improves the utilization rate of the first shared resource, enhances the efficiency and success rate of computing service execution, ensures secure access to each sub-shared resource, and improves data security. The computing card can assign corresponding read / write permissions to each sub-shared resource according to the first resource allocation instruction, enabling the processor to access the corresponding sub-shared resource according to its respective read / write permissions.

[0025] Based on the first aspect, in an optional implementation, the control device is connected to a network device, and the network device is connected between the computing card and the processor. After the control device receives the first shared message from the computing card, the method further includes: the control device sending a routing message to the network device, the routing message instructing the network device to transmit the first access packet from the processor to the computing card, wherein the routing message includes a first network address corresponding to the first shared resource and an identifier of a first output port, and the first output port is used to send the first access packet to the computing card.

[0026] In this implementation, when a network device is connected between the computing card and the processor, the control device sends a routing message to the network device so that the network device can successfully send the first access packet from the processor to the corresponding computing card based on the routing message, thus ensuring that the processor can successfully access the computing card.

[0027] Based on the first aspect, in an optional implementation, the routing message is further used to instruct the network device to transmit the second access message from the computing card to the processor, wherein the routing message includes a second network address corresponding to the second shared resource and an identifier of a second output port, and the second output port is used to send the second access message to the processor.

[0028] In this implementation, when a network device is connected between the computing card and the processor, the control device sends a routing message to the network device so that the network device can successfully send the second access message from the computing card to the corresponding processor based on the routing message, thus ensuring that the computing card can successfully access the processor.

[0029] Secondly, this application provides a method for accessing resources, the method comprising: a computing card receiving a first resource allocation instruction from a control device, the first resource allocation instruction carrying first allocation information, the first allocation information being used to instruct the computing card to allocate a first shared resource; the computing card sending a first sharing message to the control device, the first sharing message carrying first access information for accessing the first shared resource; and the computing card receiving a first access message from a processor, the first access message being used to access the first shared resource based on the first access message, the first access message carrying the first allocation information and the first access information. For an explanation of the beneficial effects of this aspect, please refer to the first aspect, which will not be elaborated further here.

[0030] Based on the second aspect, in an optional implementation, the local resources of the computing card are divided into a first shared resource and a third shared resource, and the first shared resource and the third shared resource are used to provide different computing services.

[0031] Based on the second aspect, in an optional implementation, the first allocation information includes a first network address. After the computing card receives the first resource allocation instruction from the control device, the method further includes: the computing card configures a first shared node according to the first allocation information, the first shared node is used to carry the first shared resource, and the network address corresponding to the first shared node is the first network address.

[0032] Based on the second aspect, in one optional implementation, the first allocation information further carries a first identifier, and the identifier corresponding to the first shared node is the first identifier.

[0033] Based on the second aspect, in an optional implementation, the first resource allocation indication further carries second allocation information, the second allocation information including at least one of the first resource indication, user partition identifier (UPI), and identifier of the first port, wherein the first resource indication is used to indicate the type and / or size of the first shared resource, the UPI is used to isolate the tenant corresponding to the first shared node, the first shared node is used to carry the first shared resource, the identifier of the first port is used to identify the first port of the computing card, and the first port is used to send an access message to the processor.

[0034] Based on the second aspect, in an optional implementation, after the computing card receives the first resource allocation instruction from the control device, the method further includes: the computing card allocating a first access address, a first memory size, and a first host physical address to the first shared node according to the first resource allocation instruction; the first shared node is used to carry the first shared resource; the first memory size is the memory size allocated to the first shared node; and the first host physical address is the physical address of the memory allocated to the first shared node; the first access information includes the first access address and the first memory size.

[0035] Based on the second aspect, in an optional implementation, after the computing card receives the first resource allocation instruction from the control device, the method further includes: the computing card allocating at least one of a first sharing identifier, a token value corresponding to the first sharing node, and read / write permissions corresponding to the first sharing node to the first sharing node according to the first resource allocation instruction, wherein the first sharing identifier is used to identify the computing service performed by the first sharing node; the first access information includes at least one of the first sharing identifier, the token value corresponding to the first sharing node, and read / write permissions corresponding to the first sharing node.

[0036] Based on the second aspect, in one optional implementation, the first access message carries a first network address and a first access address, wherein the first network address and the first access address respectively correspond to a first shared node, and the first shared node is used to carry the first shared resource.

[0037] Based on the second aspect, in an optional implementation, the first access message further carries at least one of the following: a first identifier corresponding to the first shared node, a first shared identifier, a UPI corresponding to the first shared node, and a token value corresponding to the first shared node; wherein, the UPI corresponding to the first shared node is used to isolate the tenant corresponding to the first shared node, and the first shared identifier is used to identify the computing service executed by the first shared node.

[0038] Based on the second aspect, in an optional implementation, after the computing card receives a first resource allocation instruction from the control device, the method further includes: the computing card receiving a second access message from the control device, the second access message carrying second allocation information and second access information, the second allocation information being used to instruct the processor to allocate a second shared resource, the second sharing message carrying second access information for accessing the second shared resource, the second access message being used by the first shared resource to access the second shared resource; the computing card sending a second access message to the processor, the second access message being used to access the second shared resource based on the second access message.

[0039] Based on the second aspect, in one optional implementation, the second access message carries a second network address and a second access address, wherein the second network address and the second access address respectively correspond to a second shared node, and the second shared node is used to carry the second shared resource.

[0040] Based on the second aspect, in an optional implementation, the second access message further carries at least one of the following: a second identifier corresponding to the second shared node, a second shared identifier, a UPI corresponding to the second shared node, and a token value corresponding to the second shared node; wherein, the UPI corresponding to the second shared node is used to isolate the tenant corresponding to the second shared node, and the second shared identifier is used to identify the computing service executed by the second shared node.

[0041] Based on the second aspect, in an optional implementation, the computing card sending the second access message to the processor includes: the computing card sending the second access message to the processor through a first port, the first port corresponding to a second network address, wherein the second network address corresponds to a second shared node, and the second shared node is used to carry the second shared resource.

[0042] Thirdly, this application provides a method for accessing resources, the method comprising: a processor receiving a second resource allocation instruction from a control device, the second resource allocation instruction carrying second allocation information, the second allocation information being used to instruct the processor to allocate a second shared resource; the processor receiving a first access message from the control device, the first access message carrying first allocation information and first access information, the first allocation information being used to instruct a computing card to allocate a first shared resource, the first access information being used to access the first shared resource, and the first access message being used by the second shared resource to access the first shared resource; the processor sending a first access message to the computing card, the first access message being used to access the first shared resource based on the first access message. For an explanation of the beneficial effects of this aspect, please refer to the first aspect, which will not be elaborated further.

[0043] Based on the third aspect, in an optional implementation, the processor local resources are divided into a second shared resource and a fourth shared resource, the second shared resource and the fourth shared resource being used to provide different computing services.

[0044] Based on the third aspect, in an optional implementation, after the processor receives the second resource allocation instruction from the control device, the method further includes: the processor sending a second sharing message to the control device, the second sharing message carrying second access information for accessing the second shared resource; the processor receiving a second access message from the computing card, the second access message being used to access the second shared resource based on the second access message.

[0045] Based on the third aspect, in an optional implementation, after the processor receives the first access message from the control device, the method further includes: the processor creating an intermediary device mdev, wherein the mdev is allocated the first shared resource and the second shared resource.

[0046] Fourthly, this application provides a computing network, including a control device, a processor, and a computing card. The processor is connected to the computing card, and the control device is connected to both the processor and the computing card. The control device is used to execute the method described in any of the first aspects above, the computing card is used to execute the method described in any of the second aspects above, and the processor is used to execute the method described in any of the third aspects above.

[0047] Fifthly, this application provides a computing device including a communication interface and a controller; the communication interface and the controller perform the method as described in any of the first aspects above, or the communication interface and the controller perform the method as described in any of the second aspects above, or the communication interface and the controller perform the method as described in any of the third aspects above.

[0048] In a sixth aspect, this application provides a computing device including a module for performing the method described in any of the first aspects above, or including a module for performing the method described in any of the second aspects above, or including a module for performing the method described in any of the third aspects above.

[0049] In a seventh aspect, this application provides a computer-readable storage medium comprising instructions that, when executed by a processor, implement the method as described in any one of the first aspects above, or implement the method as described in any one of the second aspects above, or implement the method as described in any one of the third aspects above.

[0050] Eighthly, this application provides a computer program product including instructions that, when executed on a processor, perform the method as described in any one of the first aspects above, or implement the method as described in any one of the second aspects above, or implement the method as described in any one of the third aspects above.

[0051] Ninthly, this application provides a chip including at least one processing unit and an interface circuit, wherein the interface circuit is used to provide program instructions or data to the at least one processing unit, and the at least one processing unit is used to execute the program instructions to implement the method described in any one of the first aspects, or to implement the method described in any one of the second aspects, or to implement the method described in any one of the third aspects. Attached Figure Description

[0052] Figure 1 This is an example diagram of the structure of an existing server.

[0053] Figure 2 Example diagram of the structure of a first embodiment of the computing network provided in this application;

[0054] Figure 3 A flowchart illustrating the steps of a first embodiment of the method for accessing resources provided in this application;

[0055] Figure 4 Example diagram of creating a binding relationship for the control device provided in this application;

[0056] Figure 5 A flowchart illustrating the steps of a first embodiment of accessing shared resources provided in this application;

[0057] Figure 6 A flowchart illustrating the steps of a second embodiment for accessing shared resources provided in this application;

[0058] Figure 7 Example diagram of the structure of a third embodiment of the computing network provided in this application;

[0059] Figure 8 A flowchart illustrating the steps of a second embodiment of the method for accessing resources provided in this application;

[0060] Figure 9 A flowchart illustrating the steps of a third embodiment of the method for accessing resources provided in this application;

[0061] Figure 10 Example structural diagram of a first embodiment of the computing device provided in this application;

[0062] Figure 11 Example structural diagram of a second embodiment of the computing device provided in this application;

[0063] Figure 12 This is a structural example diagram of one embodiment of the chip provided in this application. Detailed Implementation

[0064] Figure 1This is an example diagram of an existing server architecture. The server 130 includes a processor 110, memory 120, and W computing cards, where W is any integer greater than or equal to 1. For example, the W computing cards specifically include computing card 131, computing card 132, and so on up to computing card 13W. The processor 110 can be one or more integrated circuits, such as one or more application-specific integrated circuits (ASICs), one or more digital signal processors (DSPs), one or more field-programmable gate arrays (FPGAs), or a combination of at least two of these integrated circuit forms. Alternatively, when the processor is implemented using a scheduler, it can be a general-purpose processor, such as a central processing unit (CPU) or other processor capable of calling programs. Furthermore, these units can be integrated together as a system-on-a-chip (SOC). Taking computing card 131 as an example, computing card 131 may include a graphics processing unit (GPU) and / or a neural processing unit (NPU), etc. Memory 120 is typically used to store various running software, input and output data, and information exchanged with external storage in the operating system. To improve the processor's access speed, memory needs to have the advantage of high access speed; dynamic random access memory (DRAM) is typically used as memory. Processor 102 can access memory at high speed through the memory controller, performing read and write operations on any storage unit in memory 104. Besides DRAM, memory can also be other random access memories, such as static random access memory (SRAM). Additionally, memory can also be read-only memory (ROM). For example, read-only memory can be programmable read-only memory (PROM) or erasable programmable read-only memory (EPROM). The computing network may include one or more such... Figure 1 The server shown is used to enable the computing network to provide computing services.

[0065] exist Figure 1In the application shown, the processor 110 and computing card 131, which are in a bound relationship (i.e., the processor 110 has the ability to access the computing card 131), can collaboratively execute AI training. For example, the processor 110 preprocesses the data (e.g., loading, cleaning, transforming, standardizing), and sends the preprocessed data to the computing card 131. The computing card 131 is responsible for accelerating neural network-related calculations. After completing the calculations, the computing card 131 returns the results to the processor 110. It can be understood that the processor 110 and computing card 131 work together to complete complex computational tasks. Furthermore, the computing network based on virtualization technology refers to running multiple virtual machines (VMs) on the server 130. Each VM has its own operating system and applications, and the operation of the VMs depends on a virtualization manager (Hypervisor). The virtualization manager is responsible for allocating the resources included in the server 130 to each VM and ensuring that different VMs remain isolated from each other. However, since a binding relationship is pre-established between the processor 110 and the computing card 131, enabling the processor 110 to access the computing card 131, the binding relationship between the processor 110 and the computing card 131 cannot be flexibly configured according to the resource requirements of AI training during AI training.

[0066] Based on the resource access method provided in the embodiments of this application, taking AI training as an example, it can flexibly bind the relationship between the processor and the computing card according to the resource requirements of AI training, so as to realize the collaborative work between the processor and the computing card in the bound relationship to execute AI training. The computing network for implementing the resource access method provided in the embodiments of this application can be found in [link to relevant documentation]. Figure 2 As shown, where, Figure 2 This is a structural example diagram of a first embodiment of the computing network provided in this application. Figure 2 The computing network 200 shown employs resource pooling, which refers to the centralized management of multiple computing resources and their allocation in a virtualized manner. Specifically, the computing network 200 includes a processor resource pool 201, a computing card resource pool 202, an input / output (I / O) resource pool 203, a memory resource pool 204, and a management and control device 210. The processor resource pool 201 includes at least one processor, the computing card resource pool 202 includes at least one computing card, and the memory resource pool 204 includes at least one memory module. For descriptions of processors, computing cards, and memory, please refer to [link to relevant documentation]. Figure 1The corresponding explanations are not detailed here. Each I / O resource pool 203 includes at least one I / O device. An I / O device refers to hardware capable of data transmission, or a device that interfaces with an I / O interface. Common I / O devices include network cards, printers, keyboards, mice, etc. External storage can also be used as I / O devices, such as hard drives, floppy disks, and optical discs. The processor can access each I / O device via the PCIe bus. It should be noted that the PCIe bus is just one example and can be replaced by other buses, such as the unified bus (UB) bus. The management device 210 can connect to each processor included in the processor resource pool 201 via an in-band high-speed bus or an out-of-band channel. The management device 210 can also connect to each computing card included in the computing card resource pool 202 via an in-band high-speed bus or an out-of-band channel. The management device 210 can be a standalone server included in the computing network, or a logical module or software within a server, or a component or device of the server (such as a chip, network card, etc.).

[0067] based on Figure 2 The computational network shown, Figure 3 A flowchart illustrating the steps of a first embodiment of the method for accessing resources provided in this application. Figure 3 In the illustrated embodiment, the processor included in the computing network is a CPU and the computing card is an NPU. It should be clarified that for processors that are not CPU types and computing cards that are not NPU types, the execution... Figure 3 For a description of the resource access method process shown, please refer to the description of the CPU and NPU execution process shown in this embodiment, which will not be elaborated here.

[0068] Step 301: The control device receives a resource request.

[0069] The resource request shown in this embodiment is used to request resources from the control device. For example, the resource is used to perform computations for any type of business, such as AI training. The resource request specifically requests the size and type of the resource. For example, the resource type requested in the resource request is CPU cores, and the requested resource size is the number of CPU cores. Alternatively, the resource type requested in the resource request is computational power, which refers to the processing power during computation; the requested computational power resource size can be any size of trillions of floating-point operations (TFLOPS, T). Another example is the resource type requested in the resource request is the transmission bandwidth between the CPU and the NPU, and the requested resource size is the size of the transmission bandwidth. Furthermore, the resource request can specifically request the type of CPU and / or the type of NPU. For another example, the resource request can specifically request the capabilities of the CPU, including but not limited to the CPU's general processing capabilities, multi-threading, and multi-tasking capabilities. Similarly, the resource request can specifically request the capabilities of the NPU, including but not limited to parallel computing capabilities. For example, a resource request may carry information indicating a service, enabling the control device to obtain the type and size of resources that can meet the operational requirements of that service based on this information. For instance, the information indicating a service may include, but is not limited to, service type, service attributes, service identifier, service priority, and service latency requirements.

[0070] This embodiment takes the VM sending a resource request to the management device as an example. The management device can provide a user interface and an application programming interface (API) to receive the resource request input by the user through the VM. There are no limitations. For example, the resource request can also be sent to the management device by the server, physical machine, process, etc.

[0071] Step 302: The control device sends the first resource allocation instruction to the NPU.

[0072] based on Figure 2As shown, the control device selects the NPU and CPU to be bound from the computing card resource pool and the processor resource pool according to the resource request. The resources of the selected NPU and CPU can meet the resource request. For example, the type and size of the resources provided by the NPU and CPU match the type and size of the resources requested. The NPU selected by the control device can be one of multiple NPUs included in the computing card resource pool, and the CPU selected by the control device can be one of multiple CPUs included in the processor resource pool. It should be noted that this embodiment takes the example of the control device selecting one CPU and one NPU, and is not limited. In other examples, the number of CPUs selected by the control device according to the resource request can be greater than one, and / or the number of NPUs selected by the control device according to the resource request can be greater than one.

[0073] The control device sends a first resource allocation instruction to the NPU. This first resource allocation instruction instructs the NPU to allocate a first shared resource. Specifically, the first shared resource configured by the NPU must be accessible to the CPU, and the NPU must be able to access the CPU through this first shared resource. The first resource allocation instruction includes first allocation information and third allocation information. The first allocation information is shown in Table 1.

[0074] Table 1

[0075] First Identification First network address EID=2 CNA = 0x20000000

[0076] The first allocation information shown in this embodiment includes a first network address, which can be a domain network address (CNA), for example, CNA = 0x20000000. This first network address is used to identify the NPU. Optionally, the first allocation information may also include a first identifier, which can be a device identifier (Entity ID, EID), for example, EID = 2. For example, if multiple shared resources need to be configured on the NPU, specifically, a first shared resource and a third shared resource, the control device can assign different EIDs to the first shared resource and the third shared resource. It can be understood that the EID shown in this embodiment is used to identify shared resources on the NPU.

[0077] The third allocation information can be found in Table 2:

[0078] Table 2

[0079] Resource Request UPI Identifier of the first port First Resource Instruction UPI=1 port2

[0080] It is understood that the third allocation information may specifically include at least one of the following: a first resource indication, a UPI, and an identifier of a first port. The first resource indication refers to the management device requesting the NPU to allocate a first shared resource, which comprises all or a portion of the NPU's local resources, so that the NPU allocates the resource requested by the first resource indication to the management device to enable mutual access with the CPU. The first resource indication is used to indicate the type and / or size of the first shared resource. For example, the first resource indication may be a resource ratio; specifically, if the resource ratio is 1 / 2, then the first resource indication is used to request 1 / 2 of the total computing power resources of the NPU, or it may also be used to request 1 / 2 of the total transmission bandwidth of the NPU, etc. Furthermore, the first resource indication may be used to indicate a specific resource type and size; for example, the first resource indication may be used to request 400T of computing power resources in the NPU, or it may also be used to request 20 gigahertz (GHz) of communication resources, etc. The User Partition ID (UPI) is used to isolate different VMs. The first port is the port of the NPU, which is used to enable mutual access with the CPU. port2 is the identifier of the first port. It should be noted that the descriptions of the specific contents of the first resource indicator, the first identifier, the first network address, and the identifier of the first port in this embodiment are all optional examples and are not limited.

[0081] Step 303: The NPU creates the first shared node according to the first resource allocation instruction.

[0082] According to the first resource allocation instruction, the NPU calls the command of its bus driver module to create a first shared node. The bus driver module is part of the operating system kernel and communicates with the hardware via the system bus. For example, the command to create the first shared node could be `echo 2> / sys / bus / ubus / devices / create "Create first shared node"`. This embodiment does not limit the type of the first shared node; for example, the type of the first shared node could be a function entity (FE)1, which is used to carry the first shared resource requested by the first resource allocation instruction. To enable FE1 to carry the first shared resource requested by the first resource allocation instruction, the NPU configures the resources corresponding to the created FE1. Specifically, the NPU calls the FE1 driver to configure the FE1's EID, CNA, and bound port identifier. The configured FE1 has the following EID: the first identifier included in the first allocation information as shown in Table 1 (e.g., EID = 2); the network address of FE1: the first network address included in the first allocation information (e.g., CNA = 0x20000000); and the port identifier bound to FE1: the first port identifier included in the third allocation information as shown in Table 2 (e.g., port2). Furthermore, FE1 carries the resources indicated by the first resource allocation instruction. For example, if the first resource instruction is specifically a resource ratio (e.g., 1 / 2), then FE1 occupies 1 / 2 of the total NPU computing power and transmission bandwidth. The commands for configuring FE1 can be seen in the following example:

[0083] echo 2> / sys / bus / ubus / devices / FE1 / port "Configures the port bound to FE1 to port 2"

[0084] echo 2> / sys / bus / ubus / devices / FE1 / EID "Configure the first identifier EID corresponding to FE1 = 2"

[0085] echo 20000000> / sys / bus / ubus / devices / FE1 / CNA "Configures the CNA for FE1 to be 20000000"

[0086] echo 2> / sys / bus / ubus / devices / FE1 / ratio "Configures FE1 to use 1 / 2 of the local NPU resources".

[0087] For example, in the NPU's total local resources, the computing power is 400T, the memory size is 32G, and the supported transmission bandwidth is 20G. In this embodiment, with FE1 occupying half of the NPU resources, the configured FE1 carries 200T of resources, has 16G of memory, and supports 10G of transmission bandwidth. It should be noted that the description of resource types in this embodiment is an optional example and is not limited.

[0088] Step 304: The NPU sends the first shared message to the control device.

[0089] If the NPU successfully creates FE1, it sends the first shared message to the control device. This first shared message indicates that the NPU has successfully created FE1 and also carries first access information for accessing FE1, enabling the CPU to successfully access the first shared resource carried by FE1. Optionally, the NPU shown in this embodiment can divide its resources into first shared resources and internal resources according to a first resource allocation instruction. The first shared resources are accessed by the CPU, while the internal resources are accessed only by the NPU. The NPU shown in this embodiment can allocate a portion of its local resources to the first shared resources and another portion to the third shared resources. Specifically, computing networks have wide applications in many fields, including but not limited to image recognition and processing, natural language processing, recommender systems, speech recognition, machine learning and deep learning research, drug discovery and genomics, financial risk management, and supply chain optimization. Computing networks manage NPUs with the CPU at their core to accelerate AI computing, enabling them to handle large-scale, complex AI model training tasks and playing a crucial role in multiple fields. As hardware performance improves, the computing power of a single NPU may even exceed business demands. Therefore, there is a need to further allocate NPU computing resources. For example, in cloud computing scenarios, it may be necessary to allocate half of the NPU's computing resources to a single VM for inference operations, allowing tenants to utilize this NPU's resources. It's understandable that, with improved hardware performance, to enhance NPU resource utilization, a portion of the NPU's local resources could be divided into a first shared resource and a third shared resource. These first and third sub-shared resources could then be used by different VMs to execute inference operations.

[0090] The NPU allocates access information for the first shared node, specifically including the first access address, first memory size, and first host physical address corresponding to the first shared node. The first access address can be a virtual bus address (VBA), and the first host physical address can be a host physical address (HPA), which is the physical address of the memory allocated to the first shared node. The first memory size refers to the amount of memory allocated to the first shared resource. It can be understood that if the CPU needs to access the first shared resource, the range of access to that resource is the first memory size. Therefore, the first access information sent by the NPU to the control device includes the first access address and the first memory size corresponding to the first shared node.

[0091] Optionally, the NPU can further divide the first shared resource into K sub-shared resources according to the first resource allocation instruction, where K is any integer greater than 1. In this embodiment, K=3 is used as an example. The NPU allocates first access information for each sub-shared resource to access it. Based on the access information allocated to each sub-shared resource, the NPU creates a first resource access conversion table as shown in Table 3.

[0092] Table 3

[0093] Shared ID VBA HPA Size Token value Read and write permissions Shared ID=1 0x20000000000 0x4650000000 0x100000 0x100aaaabbbbb WR Shared ID=1 0x30000000000 0x4660000000 0x2000000 0x200ccccdddd RO Shared ID=1 0x40000000000 0x4670000000 0x4000000 0x300eeeeffff WR

[0094] Table 3 shows the first resource access translation table, which includes the sub-access address (VBA), sub-memory size, and sub-host physical address (HPA) corresponding to each sub-shared resource. The example in Table 3 uses the NPU dividing the first shared resource into three sub-shared resources: the first sub-shared resource, the second sub-shared resource, and the third sub-shared resource. Specifically, the VBA allocated to the first sub-shared resource by the NPU is 0x2000000000. The HPA allocated to the first sub-shared resource by the NPU is 0x4650000000. The memory SIZE allocated to the first sub-shared resource is 0x100000. Here, the memory SIZE of the first sub-shared resource refers to the size of the memory allocated to it. It can be understood that if the CPU needs to access the first sub-shared resource, the range of memory the CPU can access is 0x100000. Similarly, the second sub-shared resource is allocated VBA=0x30000000000, HPA=0x4660000000, and memory SIZE=0x2000000 by the NPU. The third sub-shared resource is allocated VBA=0x40000000000, HPA=0x4670000000, and memory SIZE=0x4000000 by the NPU.

[0095] Optionally, the NPU can also assign a first shared ID to the first shared resource. In this case, the first access information sent by the NPU to the management device may include the first shared ID. For example, if the first shared resource is divided into a first sub-shared resource, a second sub-shared resource, and a third sub-shared resource, the first resource access translation table may also include the first sub-shared ID, the second sub-shared ID, and the third sub-shared ID corresponding to the first sub-shared resource, the second sub-shared resource, and the third sub-shared resource, respectively. The sub-shared ID is used to identify the service allocated to the sub-shared resource. For example, if service 1 running on CPU1 is allocated to the first sub-shared resource, and service 2 running on CPU2 is allocated to the second sub-shared resource, then the first sub-shared ID corresponding to the first sub-shared resource may be different from the second sub-shared ID corresponding to the second sub-shared resource. As another example, if the service running on the CPU performs a first function and a second function, and the first function is allocated to the first sub-shared resource and the second function is allocated to the second sub-shared resource, then the first sub-shared ID corresponding to the first sub-shared resource may be different from the second sub-shared ID corresponding to the second sub-shared resource. For example, if the same service executed by the CPU is allocated to both a first sub-shared resource and a second sub-shared resource, then the first sub-shared ID corresponding to the first sub-shared resource can be the same as the second sub-shared ID corresponding to the second sub-shared resource. This embodiment uses the example where the first, second, and third sub-shared IDs are all the same and all 1. It should be clarified that this embodiment does not limit the value of any of the sub-shared IDs. When the first resource access translation table includes sub-shared identifiers, the first access information sent by the NPU to the management device includes the sub-shared identifiers corresponding to each sub-shared resource.

[0096] Optionally, the NPU can also assign a first token value to the first shared resource. In this case, the first access information sent by the NPU to the control device may include this first token value. For example, if the first shared resource is divided into a first sub-shared resource, a second sub-shared resource, and a third sub-shared resource, the first resource access translation table may include the token values ​​corresponding to the first, second, and third sub-shared resources, respectively. The value refers to the corresponding token value. The CPU can only successfully access the corresponding first sub-shared resource based on this specific token value, thereby improving access security. In this example, different sub-shared resources correspond to different token values. For example, the token value corresponding to the first sub-shared resource is 0x100aaaabbbb, the token value corresponding to the second sub-shared resource is 0x200ccccdddd, and the token value corresponding to the third sub-shared resource is 0x300eeeeffff. This example uses different token values ​​for different sub-shared resources; in other examples, different sub-shared resources may correspond to the same token value, without specific limitations. When the first resource access conversion table includes the TokenValue corresponding to each sub-shared resource, the first access information sent by the NPU to the control device includes the TokenValue corresponding to each sub-shared resource.

[0097] Optionally, the NPU can also assign read and write permissions to the first shared resource. In this case, the first access information sent by the NPU to the management device may include the read and write permissions. For example, if the first shared resource is divided into a first sub-shared resource, a second sub-shared resource, and a third sub-shared resource, the first resource access translation table may include the read and write permissions corresponding to the first, second, and third sub-shared resources, respectively. For example, the permission corresponding to the first sub-shared resource may be read and write (WR), the permission corresponding to the second sub-shared resource may be read only (RO), and the permission corresponding to the third sub-shared resource may be WR. The description of the read and write permission types corresponding to the sub-shared resources in this example is optional and not limited. When the first resource access translation table includes the read and write permissions corresponding to each sub-shared resource, the first access information sent by the NPU to the management device includes the read and write permissions corresponding to each sub-shared resource.

[0098] Step 305: The control device sends a second resource allocation instruction to the CPU.

[0099] The control device sends a second resource allocation instruction to the CPU based on the resource requested in the resource request. This second resource allocation instruction instructs the CPU to allocate a second shared resource. The second shared resource configured by the CPU can be accessed by the NPU. The second resource allocation instruction specifically includes second allocation information and fourth allocation information; the second allocation information is shown in Table 4.

[0100] Table 4

[0101] Second Identifier Second network address EID=3 CNA = 0x30000000

[0102] The second allocation information shown in this embodiment includes a second network address, which can be a CNA, for example, CNA = 0x30000000. This second network address is used to identify the CPU. Optionally, the second allocation information may also include a second identifier, which can be an EID, for example, EID = 3. For example, if multiple shared resources need to be configured on the CPU, specifically, a second shared resource and a fourth shared resource, the control device can assign different EIDs to the second shared resource and the fourth shared resource. It can be understood that the EID shown in this embodiment is used to identify shared resources on the CPU.

[0103] The fourth allocation information is shown in Table 5:

[0104] Table 5

[0105] Resource Request UPI Second port identifier Second resource indication UPI=1 port3

[0106] The fourth allocation information includes a second resource indicator, a UPI, and an identifier for the second port. The second resource indicator refers to the management device requesting all or part of the CPU's local resources from the CPU, so that the CPU allocates the requested resources to the second shared resource to enable mutual access with the NPU. For example, the second resource indicator can be a resource ratio or indicate a specific resource type and size; see Table 2 for details on the corresponding first resource indicator. The second port is the CPU's port used to enable mutual access with the NPU. port3 is the identifier for this second port. To ensure that the first and second shared resources provide services to the same VM, the UPI carried in the third allocation information is the same as the UPI carried in the fourth allocation information; for example, UPI = 1. It should be noted that the specific descriptions of the second resource indicator, second identifier, second network address, and second port identifier in this embodiment are optional examples and are not limited.

[0107] Step 306: The CPU creates a second shared node according to the second resource allocation instruction.

[0108] In this embodiment, the CPU, based on the second resource allocation instruction, calls a command from the CPU's bus driver module to create a second shared node. For example, the command to create the second shared node could be `echo 3> / sys / bus / ubus / devices / create "Create second shared node"`. This embodiment does not limit the type of the second shared node; for example, the type of the second shared node could be FE2, which is used to carry the resources requested by the second resource allocation instruction. To enable FE2 to carry the resources requested by the second resource allocation instruction, the CPU configures the resources corresponding to the created FE2. Specifically, the CPU calls the FE2 driver to configure the FE2's EID, CNA, and bound port identifier. The configured FE2's EID is the second identifier included in the second allocation information (e.g., EID = 3), the FE2's address is the second network address included in the second allocation information (e.g., CNA = 0x30000000), and the FE2's bound port identifier is the second port identifier included in the fourth allocation information (e.g., port3). Furthermore, FE2 carries the resources requested by the second resource allocation instruction. For example, if the second resource allocation instruction specifically requests the number of CPU cores (e.g., 2 CPU cores), then FE2 occupies two of the multiple CPU cores included in the CPU. Alternatively, the second resource allocation instruction may specifically request the transmission bandwidth between the CPU and the NPU. The commands for configuring FE2 are shown in the following example:

[0109] echo 3> / sys / bus / ubus / devices / FE2 / port "Configures the port bound to FE2 to port 3"

[0110] echo 3> / sys / bus / ubus / devices / FE2 / EID "Configures the second identifier EID=3 for FE2"

[0111] echo 30000000> / sys / bus / ubus / devices / FE2 / CNA "Configures the CNA for FE2 to be 30000000"

[0112] echo 2> / sys / bus / ubus / devices / FE2 / SQs "Configures the CPU bandwidth used by FE2"

[0113] Step 307: The CPU sends a second shared message to the control device.

[0114] If the CPU successfully creates FE2, it sends the second shared message to the control device. This second shared message indicates that the CPU has successfully created FE2 and also carries second access information for accessing FE2, enabling the NPU to successfully access the second shared resource carried by FE2. Optionally, the CPU in this embodiment can allocate its resources into second shared resources and internal resources according to the second resource allocation instruction. The second shared resources are accessed by the NPU, while the internal resources are accessed only by the CPU. This embodiment uses the example of the CPU not further dividing the second shared resource into L sub-shared resources. In other examples, the CPU can also divide the second shared resource into L sub-shared resources according to the second resource allocation instruction, where L is any integer greater than 1. For an explanation of the CPU dividing the second shared resource into L second sub-shared resources, please refer to the explanation of the NPU dividing the first shared resource into K first sub-shared resources; details will not be repeated here. The CPU allocates access information for the second shared resource, specifically including the second access address corresponding to the second shared node, the second memory size, and the second host physical address. The address type of the second access address can be VBA, and the address type of the second host physical address can be HPA. The second host physical address is the physical address of the memory allocated to the second shared node. The second memory size refers to the amount of memory allocated to the second shared resource. It can be understood that if the NPU needs to access the second shared resource, the range of the NPU's access to the second shared resource is the second memory size. Therefore, the second access information sent by the CPU to the control device includes the second access address and the second memory size corresponding to the second shared node. Based on the access information allocated for the second shared resource, the CPU creates a second resource access translation table as shown in Table 6.

[0115] Table 6

[0116] Shared ID VBA HPA SIZE TokenValue Read and write permissions Shared ID=2 0x30000000000 0x2650000000 0x10000 0x300aaaabbbb WR

[0117] Table 6 shows the second resource access translation table, which includes the second access address (VBA = 0x30000000000), the second memory size (SIZE = 0x10000), and the second host physical address (HPA = 0x2650000000) corresponding to the second shared resource. It can be understood that if the NPU needs to access the second shared resource, the range of the NPU's access to the second shared resource is 0x10000. Optionally, the CPU can also assign a second shared ID to the second shared resource. For example, if the second shared ID = 2, then the second access information sent by the NPU to the management device includes the second shared ID corresponding to the second shared resource. For an explanation of the second shared ID, please refer to the explanation of the first shared ID included in the first access information shown above; details will not be repeated here. Optionally, the CPU can also assign a second TokenValue to the second shared resource. For example, if the second TokenValue = 0x300aaaabbbb, then the second access information sent by the CPU to the management device may include this second token value. Optionally, the CPU can also assign read and write permissions to the second shared resource. For example, if the read and write permission is WR, then the second access information sent by the CPU to the control device may include the read and write permission.

[0118] Step 308: The control device sends a second access message to the NPU.

[0119] Step 309: The control device sends the first access message to the CPU.

[0120] In this embodiment, upon receiving the first shared message and the second shared message, the control device creates a binding relationship between the NPU and the CPU, enabling the CPU and NPU, which are bound together, to access each other. For example... Figure 4 As shown, where, Figure 4This is an example diagram illustrating the creation of binding relationships for the control device provided in this application. The shared nodes already created on the NPU include a third shared node FE3 and a first shared node FE1. For an explanation of how the NPU creates FE3, please refer to the explanation of how the NPU creates FE1 shown above; details will not be repeated here. The shared nodes already created on the CPU include a second shared node FE2 and a fourth shared node FE4. For an explanation of how the CPU creates FE4, please refer to the explanation of how the CPU creates FE2 above; details will not be repeated here. Upon receiving the first shared message and the second shared message, the control device creates a first binding relationship between FE1 and FE2. For an explanation of how the control device creates a second binding relationship between FE3 and FE4, please refer to the explanation of how the control device creates a first binding relationship between FE1 and FE2; details will not be repeated here. FE1 and FE2, in the first binding relationship, are located in communication domain 1 to enable mutual access between FE1 and FE2. FE3 and FE4, in the second binding relationship, are located in communication domain 0 to enable mutual access between FE3 and FE4. When the control device establishes a binding relationship between FE1 and FE2, the control device sends the first access message to the CPU. The first access message specifically carries first allocation information (e.g., as shown in Table 1) and first access information corresponding to the NPU bound to the CPU. The first access message is used for the CPU's second shared resource to access the NPU's first shared resource. Optionally, the first access message may also carry a portion of the third allocation information (e.g., as shown in Table 2). For example, the first access message carries a UPI. Optionally, the first access message may also carry a second network address and / or a second identifier, so that when the CPU receives the first access message, the second shared resource identified by the second network address and / or the second identifier can access the NPU's first shared resource based on the first access message. Similarly, the control device sends the second access message to the NPU. The second access message specifically carries second allocation information (e.g., as shown in Table 4) and second access information corresponding to the CPU bound to the NPU. The second access message is used for the NPU's first shared resource to access the CPU's second shared resource. Optionally, the second access message may also carry a portion of the fourth allocation information (e.g., as shown in Table 5). For example, the second access message carries a UPI. Optionally, the second access message may also carry a first network address and / or a first identifier, so that when the NPU receives the second access message, the first shared resource identified by the first network address and / or the first identifier can access the CPU's second shared resource based on the second access message.

[0121] To enable the CPU's second shared resource to access the NPU's first shared resource, the NPU creates a first device information table, as shown in Table 7.

[0122] Table 7

[0123] Index identifier (idx) First Identification First network address UPI First index identifier = 0 EID=2 CNA = 0x20000000 UPI=1

[0124] It is understood that the first device information table shown in this embodiment includes the correspondence between a first identifier (e.g., EID = 2) and a first network address (e.g., CNA = 0x20000000). Optionally, the first device information table may also include a UPI (e.g., UPI = 1) corresponding to the first identifier and the first network address. Optionally, the first device information table may also include a first index identifier (e.g., first index identifier = 0) corresponding to the first identifier and the first network address. For a description of the first identifier, the first network address, and the UPI, please refer to the above description; further details will not be repeated here.

[0125] To enable the NPU's first shared resource to access the CPU's second shared resource, the NPU creates a first routing table based on the second access message, as shown in Table 8:

[0126] Table 8

[0127] Idx Second network address UPI Identifier of the first port First index identifier = 0 CNA = 0x30000000 UPI=1 port2

[0128] It is understood that the first routing table described in this embodiment includes the correspondence between the second network address (e.g., CNA = 0x30000000) and the identifier of the first port (e.g., port2). Optionally, the first routing table also includes a first index identifier (e.g., first index identifier = 0) corresponding to the second network address and the identifier of the first port. Optionally, if the second access message carries a UPI, the first routing table also includes the UPI corresponding to the second network address and the identifier of the first port. This embodiment takes the example that the index identifier included in the first routing table is the same as the index identifier included in the first device information table and both are the first index identifier (e.g., idx = 0), which is not limited. In other examples, the index identifier included in the first routing table and the index identifier included in the first device information table may be different.

[0129] To enable the NPU's first shared resource to access the CPU's second shared resource, the CPU creates a second device information table, as shown in Table 9.

[0130] Table 9

[0131] Index identifier (idx) Second Identifier Second network address UPI Second index identifier = 0 EID=3 CNA = 0x30000000 UPI=1

[0132] It is understood that the second device information table shown in this embodiment includes the correspondence between the second identifier (e.g., EID = 3) and the second network address (e.g., CNA = 0x30000000). Optionally, the second device information table may also include a UPI (e.g., UPI = 1) corresponding to the second identifier and the second network address. Optionally, the second device information table may also include a second index identifier (e.g., second index identifier = 0) corresponding to the second identifier and the second network address. For a description of the second identifier, the second network address, and the UPI, please refer to the above description; further details will not be repeated here.

[0133] To enable the CPU's second shared resource to access the NPU's first shared resource, the CPU creates a second routing table based on the first access message. The second routing table is shown in Table 10.

[0134] Table 10

[0135] idx First network address UPI Second port identifier Second index identifier = 0 CNA = 0x20000000 UPI=1 Port3

[0136] It is understood that the second routing table described in this embodiment includes the correspondence between the first network address (e.g., CNA = 0x20000000) and the identifier of the second port (e.g., port3). Optionally, the second routing table also includes a second index identifier (e.g., second index identifier = 0) corresponding to the first network address and the identifier of the second port. Optionally, if the first access message carries a UPI, the second routing table also includes the UPI corresponding to the first network address and the identifier of the second port. This embodiment takes the example that the index identifier included in the second routing table is the same as the index identifier included in the second device information table and both are the second index identifier (e.g., idx = 0), which is not limited. In other examples, the index identifier included in the second routing table and the index identifier included in the second device information table may be different.

[0137] To enable the NPU's first shared resource to access the CPU's second shared resource, the NPU also needs to create a first shared resource access list, which can be seen in Table 11:

[0138] Table 11

[0139]

[0140] It can be understood that the first shared resource access list shown in Table 11 is used for the NPU to access the CPU's second shared resources. Therefore, this first shared resource access list includes the correspondence between the first local HPA (e.g., HPA = 0x20000000000), the memory SIZE corresponding to the second shared resource, the second access address (e.g., VBA = 0x30000000000), the second identifier (e.g., EID = 3), and the second network address (e.g., CNA = 0x30000000). The second network address and the second identifier are carried in the second allocation information from the control device (e.g., as shown in Table 4), and the memory SIZE and the second access address are carried in the second access information from the control device. Optionally, if the second access information also carries the second shared ID corresponding to the second shared resource (e.g., shared ID = 2), then the first shared resource access list also includes the second shared ID corresponding to the first local HPA, memory SIZE, second access address, second identifier, and second network address. Optionally, if the second access information also carries the TokenValue corresponding to the second shared resource (e.g., TokenValue = 0x300aaaabbbb), then the first shared resource access list also includes the TokenValue corresponding to the first local HPA, memory SIZE, second access address, second identifier, and second network address. Optionally, the first shared resource access list also includes a first index identifier (e.g., first index identifier = 0). Specifically, the NPU allocates a first index identifier corresponding to the first local HPA, memory SIZE, second access address, second identifier, second network address, second shared ID, and TokenValue. To achieve the purpose of NPU accessing the CPU, the first index identifier carried in the first shared resource access list shown in Table 11 is the same as the first index identifier carried in the first routing table shown in Table 8; for example, the first index identifier = 0.

[0141] To enable the CPU's second shared resource to access the NPU's first shared resource, the CPU also needs to create a second shared resource access list, which can be seen in Table 12:

[0142] Table 12

[0143]

[0144] It can be understood that the second shared resource access list shown in Table 12 is used for the CPU's second shared resource to access the NPU's first shared resource. As explained above, the NPU has divided the first shared resource into multiple sub-shared resources, such as the first sub-shared resource, the second sub-shared resource, and the third sub-shared resource. Therefore, the second shared resource access list includes the correspondence between the second local HPA, memory SIZE, first access address, first identifier, and first network address allocated to each sub-shared resource. Taking the first sub-shared resource as an example, the second shared resource access list includes the correspondence between the second local HPA (e.g., HPA = 0x10000000000), memory SIZE (e.g., memory SIZE = 0x100000), first access address (e.g., VBA = 0x20000000000), first identifier (e.g., EID = 2), and first network address (e.g., CNA = 0x20000000). The first network address and first identifier corresponding to the first sub-shared resource are carried in the first allocation information from the control device (e.g., as shown in Table 1), and the memory SIZE and first access address corresponding to the first sub-shared resource are carried in the first access information from the control device. Optionally, if the first access information also carries the first shared ID corresponding to the first sub-shared resource (e.g., shared ID = 1), then the second shared resource access list also includes the second local HPA, memory SIZE, first access address, first identifier, and the first shared ID corresponding to the first network address corresponding to the first sub-shared resource. Optionally, if the first access information also carries the TokenValue corresponding to the first sub-shared resource (e.g., TokenValue = 0x100aaaabbbb), then the second shared resource access list also includes the first local HPA, memory SIZE, first access address, first identifier, and the TokenValue corresponding to the first network address corresponding to the first sub-shared resource. Optionally, the second shared resource access list also includes a second index identifier (e.g., second index identifier = 0). Specifically, the CPU allocates a second index identifier corresponding to the first local HPA, memory SIZE, first access address, first identifier, first network address, first shared ID, and TokenValue. To enable the CPU to access the NPU, the second index identifier carried by the second shared resource access list shown in Table 12 is the same as the second index identifier carried by the second routing table shown in Table 10. For example, the second index identifier = 0.

[0145] Taking the second sub-shared resource as an example, the access list of the second shared resource includes the correspondence between the second local HPA (e.g., 0x10000100000), memory SIZE (e.g., memory SIZE = 0x2000000), first access address (e.g., VBA = 0x30000000000), first identifier (e.g., EID = 2), first network address (e.g., CNA = 0x20000000), first shared ID (e.g., first shared ID = 1), TokenValue (e.g., TokenValue = 0x200ccccdddd), and second index identifier (e.g., second index identifier = 0). For details, please refer to the description of the first sub-shared resource. Further details will not be elaborated here. Taking the third sub-shared resource as an example, the access list of the second shared resource includes the correspondence between the second local HPA (e.g., 0x10002100000), memory SIZE (e.g., memory SIZE = 0x4000000), first access address (e.g., VBA = 0x40000000000), first identifier (e.g., EID = 2), first network address (e.g., CNA = 0x20000000), first shared ID (e.g., first shared ID = 1), TokenValue (e.g., TokenValue = 0x300eeeefffff), and second index identifier (e.g., second index identifier = 0) corresponding to the third sub-shared resource. For details, please refer to the description of the first sub-shared resource. Detailed explanations will not be repeated here.

[0146] Step 310: The CPU creates the target intermediary device.

[0147] Specifically, the mediated device (mdev) created by the CPU is an instance created by partitioning physical devices (such as the CPU and NPU shown in this embodiment) in a virtualization environment. Different mdevs are used by different VMs. The target mdev shown in this embodiment is the mdev used by the VM. For example, the command for the CPU to create a target mdev can be:

[0148] echo xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx> / sys / bus / ubus / devices / fe2 / mdev_supported_types / <type-id> / create "Create target mdev"

[0149] The CPU allocates its second shared resources, internal resources, and the NPU's first shared resources to the target mdev. This can be understood as the CPU creating a mapping between the target mdev, the CPU's internal resources, the CPU's second shared resources, and the NPU's first shared resources. The CPU creates a list of target mdevs as shown in Table 13.

[0150] Table 13

[0151]

[0152] In this example, the target mdev can be simulated as a PCIe device using the Virtual Function I / O (VFIO)-mdev framework and the QuickEMUlator (QEMU). The configuration space for the target mdev list is a memory region of a specific size defined by PCIe (e.g., 4KB as shown in Table 13), specifically used to store the configuration information and status of the target mdev. The layout of the configuration space is standardized and follows the PCIe standard. The configuration space for the target mdev list may include a Device ID and a Vendor ID. The Device ID is used to uniquely identify the target mdev, while the Vendor ID identifies the company that manufactures the CPU and NPU. It should be noted that the configuration space shown in this embodiment may also include other types of information; no specific limitations are imposed.

[0153] BAR0 is an instance of a base address register (BAR) in the PCIe configuration space. BAR0 is typically located in a specific location within the configuration space, following the standard layout of PCIe devices. This example shows BAR0 occupying a 64KB memory area. BAR0 is used to indicate device information carried by the target mdev. For example, this device information could be the number of shared resources. This embodiment uses two shared resources as an example, specifically FE1 configured for the NPU and FE2 configured for the CPU. BAR0 can also include device information of the target mdev, such as device attribute information for the CPU and NPU included in the target mdev, such as type, device model, device status, performance parameters, etc. The BAR2 shown in this example occupies an 8MB memory area and is a PCIe message channel (PCIe Msg Channel). A PCIe MsgChannel refers to a channel or mechanism used for message transmission. When the PCIe MsgChannel corresponds to an internal message queue, messages are managed and transmitted within the target mdev through one or more queues. Shared memory between VM and target mdev refers to the ability of a VM to access the same physical memory area between itself and the host machine (physical machine) or between different virtual machines in a virtualization environment, so as to achieve fast data sharing and exchange.

[0154] BAR4 includes entry 1, which occupies 0x100000 memory, has read / write permissions for the first sub-shared resource, and its corresponding second local HPA is 0x10000000000. Entry 2 occupies 0x2000000, has read-only permissions for the second sub-shared resource, and its corresponding second local HPA is 0x10000100000. Entry 3 occupies 0x4000000, has read / write permissions for the third sub-shared resource, and its corresponding second local HPA is 0x10002100000. Entry 4 occupies 0x10000, has read / write permissions for the second shared resource, and its corresponding first local HPA is 0x2650000000.

[0155] The CPU passes the target mdev into the VM. Specifically, this means that the CPU directly assigns the target mdev to the VM for use. This process can be called "device passthrough" or "hardware passthrough".

[0156] Combination Figure 4 The illustration demonstrates the beneficial effects of this embodiment. Using the method shown in this embodiment, the control device can send a first resource allocation instruction and a second resource allocation instruction to the NPU and CPU respectively, based on the resource requirements of the resource request. This requests the NPU to allocate a first shared resource and the CPU to allocate a second shared resource. The first and second shared resources satisfy the requested resources. Upon successful allocation of the first and second shared resources, the NPU and CPU respectively send a first shared message and a second shared message to the control device. The control device establishes a binding relationship between the NPU and CPU based on the first and second shared messages. The control device then sends a second access message and a first access message to the bound NPU and CPU respectively, enabling the NPU to access the second shared resource on the CPU based on the second access message, and the CPU to access the first shared resource on the NPU based on the first access message. Therefore, the control device does not need to pre-bind the NPU and CPU before receiving the resource request, and can flexibly bind the NPU and CPU according to the business's resource requirements, enabling flexible access between the CPU and NPU based on business needs.

[0157] Furthermore, with the improvement of hardware performance, it is possible to bind a portion of the NPU's local resources (i.e., the first shared resources) to the CPU, thereby effectively improving the utilization rate of the NPU's local resources, and / or, it is possible to bind a portion of the CPU's local resources (i.e., the second shared resources) to the NPU, thereby effectively improving the utilization rate of the CPU's local resources.

[0158] Figure 5 A flowchart illustrating the steps of a first embodiment of accessing shared resources provided in this application. Based on Figure 5 The illustrated embodiment demonstrates the process of CPU accessing the NPU. CPU accessing the NPU refers to the process of the CPU writing or reading data from the NPU. For a description of the CPU and NPU, please refer to [link to documentation / reference]. Figure 3 The specific details of the corresponding embodiments are not elaborated here.

[0159] Step 501: The CPU obtains the first access message.

[0160] To access the NPU, the CPU can start a virtual machine (VM). Specifically, the tenant starts a VM on the virtualization platform. The VM's operating system (OS) recognizes the target mdev. For a description of the VM and the target mdev, please refer to [link to documentation / reference]. Figure 3 The corresponding explanations are not detailed here. After the OS recognizes the target mdev, the vPcie driver initializes the target mdev, configuring hardware resources and software interfaces. After initialization, the vPcie driver recognizes FE1 and FE2 configured on the target mdev. FE1 and FE2 will be presented as a standard device on the VM's OS, thereby achieving the aggregated presentation of FE1 and FE2. This embodiment does not limit the content presented by FE1 and FE2 on the OS. For example, it can display the SIZE, read / write permissions, attributes, types, and number of shared resources, etc. See Table 13 for details, which will not be elaborated here.

[0161] The VM initiates an access to a guest virtual address (GVA), which is then translated into a corresponding guest physical address (GPA). The CPU translates the GVA into a second local HPA. If the CPU needs to access the first sub-shared resource of the NPU, the second local HPA is 0x10000000000 in the second shared resource access list shown in Table 12. This embodiment uses VM-initiated CPU access to the NPU as an example, and the specific implementation is not limited. For example, in other embodiments, another server, physical machine, process, etc., can initiate CPU access to the NPU.

[0162] The CPU shown in this embodiment can access the first shared resource of the NPU. To this end, the CPU configures a first access message, which can be seen in Table 14:

[0163] Table 14

[0164]

[0165] First, the CPU obtains the second shared resource access list shown in Table 12 based on the second local HPA corresponding to the first sub-shared resource (e.g., second local HPA = 0x10000000000). When the CPU needs to access the first sub-shared resource of the NPU, the CPU obtains the corresponding destination network address, destination identifier, destination access address, destination TokenValue, number of bytes of memory accessed, and first shared ID according to Table 12. Among them, the destination network address, destination identifier, destination access address, destination TokenValue, and first shared ID all correspond to the first sub-shared resource to be accessed by the CPU. Therefore, the CPU obtains the destination network address as the first network address (e.g., first network address = 0x20000000), the destination identifier as the first identifier (e.g., first identifier = 2), the destination access address as the first access address (e.g., VBA = 0x20000000000), and the destination TokenValue as 0x100aaaabbbb according to Table 12. The number of bytes accessed refers to the size of the data accessed (written to or read from) by the CPU in the memory corresponding to the first sub-shared resource of the NPU (the size of which is 0x100000 as shown in Table 12), in bytes. The first access message also includes the first shared ID (e.g., shared ID = 1) corresponding to the first sub-shared resource.

[0166] The CPU obtains its own stored second network address (e.g., CNA = 0x30000000) and second identifier (e.g., second identifier = 3). For an explanation of the CPU's second network address and second identifier, please refer to [link to documentation]. Figure 3 The corresponding explanations are not detailed here. The first access message includes the source network address as the second network address (e.g., CNA = 0x30000000) and the source identifier as the second identifier (e.g., second identifier = 3). Optionally, the first access message also includes a UPI (e.g., UPI = 1). Among these, the source identifier, destination identifier, UPI, destination TokenValue, and first shared ID included in the first access message are all optional.

[0167] The CPU obtains read and write permissions corresponding to the first sub-shared resource. In this embodiment, the specific method of obtaining the permissions is not limited. For example, the CPU can obtain read and write permissions corresponding to the second local HPA = 0x10000000000 by querying Table 13. Alternatively, the CPU can obtain read and write permissions corresponding to the first sub-shared resource by the second access information from the control device. The write parameter carried in the first access message is the specific parameter value written by the CPU (for example, the parameter value written is 8). It should be noted that the specific parameter value written in this embodiment is only an example and is not limited.

[0168] Step 502: The CPU sends the first access message to the NPU.

[0169] If the CPU successfully obtains the first access message as shown in Table 14, it obtains the second index identifier (e.g., second Idx = 0) corresponding to the first sub-shared resource in the second shared resource access list shown in Table 12, and obtains the second routing table shown in Table 10 that is matched by the second index identifier. Specifically, the second routing table shown in Table 10 includes the second index identifier (e.g., second Idx = 0). Then, the CPU obtains the identifier of the second port (e.g., Port3) included in the second routing table, and sends the first access message to the NPU through Port3. This embodiment takes the CPU matching the second routing table through the second index identifier corresponding to the first sub-shared resource in the second shared resource access list as an example. In other examples, the CPU can also match the second routing table through the first network address corresponding to the first sub-shared resource in the second shared resource access list.

[0170] Step 503: The first sub-shared resource of the NPU is accessed by the first access message that has been verified.

[0171] The NPU verifies the first access message. If the verification passes, the CPU can access the NPU's first sub-shared resource based on the first access message. The following describes the optional verification process:

[0172] For example, if the NPU detects that the destination network address, destination identifier, and UPI included in the first access packet are the same as the first network address, first identifier, and UPI included in the first device information table shown in Table 7, then the NPU detects that the first access packet satisfies the first verification condition. If the NPU detects that the destination network address included in the first access packet is different from the first network address included in the first device information table shown in Table 7, and / or, the destination identifier included in the first access packet is different from the first identifier included in the first device information table shown in Table 7, and / or, the UPI included in the first access packet is different from the UPI included in the first device information table shown in Table 7, then the NPU detects that the first access packet does not satisfy the first verification condition, and the NPU discards the first access packet.

[0173] For example, if the NPU detects that the destination access address and the first shared ID included in the first access message are the same as the first access address and the first shared ID included in the first resource access translation table shown in Table 3, then the NPU detects that the first access message satisfies the second verification condition. If the NPU detects that the destination access address included in the first access message is different from the first access address included in the first resource access translation table, and / or, the first shared ID included in the first access message is different from the first shared ID included in the first resource access translation table, then the NPU detects that the first access message does not satisfy the second verification condition, and the NPU discards the first access message.

[0174] For example, if the NPU detects that the first access message includes a destination TokenValue that is the same as the TokenValue corresponding to the first access address and the first shared ID in the first resource access translation table shown in Table 3, then the NPU detects that the first access message satisfies the third verification condition. A first access message that satisfies the third verification condition has the permission to access the first sub-shared resource carried by FE1. If the NPU detects that the first access message does not satisfy the third verification condition, the NPU sends a response message to the CPU. This response message indicates that the TokenValue carried by the first access message is incorrect, and the CPU cannot access the NPU's first sub-shared resource.

[0175] The first access message passing verification in this embodiment specifically means that the first access message passes the first verification condition, the second verification condition, and the third verification condition. It can be understood that if the first access message meets all three verification conditions, it indicates that the first access message originates from FE2 bound to FE1. In other examples, the first access message passing verification may also mean that the first access message passes some of the first, second, and third verification conditions; the specific details are not limited. The description of the verification conditions in this embodiment is an optional example and is not limited. In other examples, the NPU can also verify the read and write permissions of the first access message. For example, if the NPU determines that the read and write permissions corresponding to the first sub-shared resource to be accessed by the first access message are read-only (e.g., based on the first resource access conversion table shown in Table 3), and the first access message requests to perform a write operation to the first sub-shared resource, then the NPU determines that the first access message has failed verification and may discard the first access message and / or send a response message to the CPU indicating a mismatch in read and write permissions.

[0176] If the first access message passes verification, the NPU obtains the HPA (e.g., 0x4650000000) corresponding to the first sub-shared resource in the first resource access translation table described in Table 3. The NPU accesses 8 bytes in the memory indicated by the HPA (e.g., 0x4650000000) and writes 8 parameters to achieve the purpose of the CPU sending the first access message to the NPU to access the NPU.

[0177] Figure 6 A flowchart illustrating the steps of a second embodiment for accessing shared resources provided in this application. Figure 6 The illustrated embodiment describes NPU access to the CPU, where NPU access to the CPU refers to the process of the NPU writing or reading data from the CPU. For a description of the CPU and NPU, please refer to [link to documentation / reference]. Figure 3 The specific details of the corresponding embodiments are not elaborated here.

[0178] Step 601: The NPU obtains the second access message.

[0179] The NPU shown in this embodiment can access the CPU's second shared resource. To achieve this, the NPU is configured with a second access message. This second access message is shown in Table 15.

[0180] Table 15

[0181]

[0182] First, the NPU obtains the first shared resource access list shown in Table 11 based on the first local HPA corresponding to the second shared resource (e.g., first local HPA = 0x20000000000). When the NPU needs to access the CPU's second shared resource, it obtains the corresponding destination network address, destination identifier, destination access address, destination TokenValue, number of bytes of memory accessed, and second shared ID according to Table 11. The destination network address, destination identifier, destination access address, destination TokenValue, and second shared ID all correspond to the second shared resource to be accessed by the NPU. Therefore, the NPU obtains the destination network address as the second network address (e.g., CNA = 0x30000000), the destination identifier as the second identifier (e.g., second identifier = 3), and the destination TokenValue as 0x300aaaabbbb according to Table 11. The number of bytes of memory accessed refers to the size of the data accessed (written to or read from) by the NPU in the memory corresponding to the CPU's second shared resource (the size of this memory is 0x10000 as shown in Table 11), in bytes. The second access message also includes the second shared ID (e.g., shared ID = 2) corresponding to the second shared resource.

[0183] The NPU obtains its own stored first network address (e.g., CNA = 0x20000000) and first identifier (e.g., first identifier = 2). For an explanation of the NPU's first network address and first identifier, please refer to [link to documentation / reference]. Figure 3 The corresponding explanations are not detailed here. The source network address included in the second access message is the first network address (e.g., CNA = 0x20000000), and the source identifier is the first identifier (e.g., first identifier = 2). Optionally, the second access message may also include a UPI (e.g., UPI = 1). Among these, the source identifier, destination identifier, UPI, destination TokenValue, and second shared ID included in the second access message are all optional.

[0184] The NPU obtains read and write permissions corresponding to the second shared resource. This embodiment does not limit the specific method of obtaining these permissions. For example, the NPU can obtain read and write permissions corresponding to the first local HPA = 0x20000000000 by querying Table 13. Alternatively, the NPU can obtain read and write permissions corresponding to the second shared resource by the first access information from the control device. The write parameter carried in the second access message is the specific parameter value written by the NPU (for example, the parameter value written is 8). It should be noted that the specific value of the written parameter in this embodiment is only an example and is not limited.

[0185] Step 602: The NPU sends a second access message to the CPU.

[0186] If the NPU successfully obtains the second access packet as shown in Table 15, the NPU obtains the first index identifier (e.g., first Idx = 0) corresponding to the second shared resource in the first shared resource access list shown in Table 11, and obtains the first routing table (e.g., Table 8) to which the first index identifier is matched. Specifically, the first routing table shown in Table 8 includes the first index identifier (e.g., first Idx = 0). Then, the NPU obtains the identifier of the first port (e.g., Port2) included in the first routing table, and the NPU sends the second access packet to the CPU through Port2. This embodiment takes the example of the NPU matching the first routing table through the first index identifier corresponding to the second shared resource in the first shared resource access list. In other examples, the NPU can also match the first routing table through the second network address corresponding to the second shared resource in the first shared resource access list.

[0187] Step 603: The CPU's second shared resource is accessed by the verified second access message.

[0188] The CPU verifies the second access message. If the verification passes, the NPU can access the CPU's second shared resource based on the second access message. The following describes the optional verification process:

[0189] For example, if the CPU detects that the destination network address, destination identifier, and UPI included in the second access message are the same as the second network address, second identifier, and UPI included in the second device information table shown in Table 9, then the CPU detects that the second access message satisfies the first verification condition. If the CPU detects that the destination network address included in the second access message is different from the second network address included in the second device information table shown in Table 9, and / or, the destination identifier included in the second access message is different from the second identifier included in the second device information table shown in Table 9, and / or, the UPI included in the second access message is different from the UPI included in the second device information table shown in Table 9, then the CPU detects that the second access message does not satisfy the first verification condition, and the CPU discards the second access message.

[0190] For example, if the CPU detects that the destination access address and second shared ID included in the second access message are the same as the second access address and second shared ID included in the second resource access translation table shown in Table 6, then the CPU detects that the second access message satisfies the second verification condition. If the CPU detects that the destination access address included in the second access message is different from the second access address included in the second resource access translation table, and / or, the second shared ID included in the second access message is different from the second shared ID included in the second resource access translation table, then the CPU detects that the second access message does not satisfy the second verification condition, and the CPU discards the second access message.

[0191] For example, if the CPU detects that the second access message includes a destination TokenValue that is the same as the TokenValue corresponding to the second access address and the second shared ID in the second resource access translation table shown in Table 6, then the CPU detects that the second access message satisfies the third verification condition. A second access message that satisfies the third verification condition has the permission to access the second shared resource carried by FE2. If the CPU detects that the second access message does not satisfy the third verification condition, the CPU sends a response message to the NPU. This response message indicates that the TokenValue carried by the second access message is incorrect, and the NPU cannot access the CPU's second shared resource.

[0192] In this embodiment, the second access message passing verification specifically means that, taking the first access message passing the first, second, and third verification conditions as an example, it can be understood that if the second access message meets the first, second, and third verification conditions, it indicates that the second access message originates from FE1 bound to FE2. In other examples, the second access message passing verification may also mean that the second access message passes some of the first, second, and third verification conditions; the specific details are not limited. The description of the verification conditions in this embodiment is an optional example and is not limited. In other examples, the CPU can also verify the read and write permissions of the second access message. For example, if the CPU determines that the read and write permissions corresponding to the second shared resource to be accessed by the second access message are read and write (e.g., based on the second resource access conversion table shown in Table 6), and the second access message requests to perform read and write operations on the second shared resource, then the CPU determines that the second access message has passed verification.

[0193] If the second access message passes verification, the CPU obtains the HPA (e.g., 0x2650000000) corresponding to the second shared resource in the second resource access translation table described in Table 6. The CPU accesses 8 bytes and writes 8 parameters on the memory indicated by the HPA (e.g., 0x2650000000), so as to realize the purpose of the second access message sent by the CPU to the CPU to access the CPU.

[0194] Figure 7 This is a structural example diagram of a third embodiment of the computing network provided in this application. The computing network 700 shown in this embodiment includes a processor resource pool 701, a computing card resource pool 703, and a management and control device 710. For a description of the processor resource pool 701, the computing card resource pool 703, and the management and control device 710, please refer to [link to documentation]. Figure 2 The corresponding explanations are not detailed here. The computing network 700 shown in this embodiment also includes a network device resource pool 702, which includes one or more network devices. These network devices can be implemented by any device, such as a router or switch, that enables data exchange between the processor and the computing card. The network device resource pool 702 is connected to the processor resource pool 701, the computing card resource pool 703, and the management and control device 710, respectively.

[0195] based on Figure 7 The computational network shown, Figure 8 A flowchart illustrating the steps of a second embodiment of the resource access method provided in this application. In this embodiment, the CPU and NPU communicate via a network device. For a description of the control device, CPU, and NPU executing the method of this embodiment, please refer to [link to relevant documentation]. Figure 3 The corresponding explanations will not be elaborated upon here.

[0196] Step 801: The control device receives a resource request.

[0197] Step 802: The control device sends the first resource allocation instruction to the NPU.

[0198] Step 803: The NPU creates the first shared node according to the first resource allocation instruction.

[0199] Step 804: The NPU sends the first shared message to the control device.

[0200] Step 805: The control device sends a second resource allocation instruction to the CPU.

[0201] Step 806: The CPU creates a second shared node according to the second resource allocation instruction.

[0202] Step 807: The CPU sends a second shared message to the control device.

[0203] Step 808: The control device sends a second access message to the NPU.

[0204] Step 809: The control device sends the first access message to the CPU.

[0205] For a description of the execution process of steps 801 to 809 shown in this embodiment, please refer to [link to documentation]. Figure 3 The corresponding steps 301 to 309 are shown below, and will not be described in detail.

[0206] Step 810: The control device sends a routing message to the network device.

[0207] In this embodiment, the control device sends routing messages to network devices based on the binding relationship between the NPU and the CPU. The network devices are those connected between the CPU and NPU within the network device resource pool. The control device sends routing messages to the network devices so that the network devices can configure a first network routing table based on the routing messages. The network devices then use this first network routing table to achieve communication between the CPU and NPU. This first network routing table is shown in Table 16.

[0208] Table 16

[0209]

[0210] It can be understood that this routing message carries the first network address, UPI, and first outgoing port identifier (e.g., port0) corresponding to the NPU, and the second network address, UPI, and second outgoing port identifier (e.g., port1) corresponding to the CPU, which are in a bound state. Based on this routing message, the network device can create a first network routing table as shown in Table 16. Here, the first outgoing port is a port included in the network device, used to forward the first access packet to the NPU. The second outgoing port is another port included in the network device, used to forward the second access packet to the CPU.

[0211] If a network device receives a first access packet from the CPU, based on the destination network address (e.g., first network address = 0x20000000) and UPI (e.g., UPI = 1) carried in the first access packet, and determines the corresponding outgoing port identifier as port0, then the network device forwards the first access packet to port0 of the network device, so that the first access packet passing through port0 can be successfully transmitted to the NPU. For an explanation of the first access packet, please refer to [link to documentation]. Figure 5 The specific details of the corresponding embodiments are omitted. If the network device receives a second access packet from the NPU, and determines the corresponding outgoing port identifier as port1 based on the destination network address (e.g., second network address = 0x30000000) and UPI (e.g., UPI = 1) carried in the second access packet, then the network device forwards the second access packet to port1 so that the second access packet passing through port1 can be successfully transmitted to the CPU. For an explanation of the second access packet, please refer to [link to documentation]. Figure 6 The specific details of the corresponding embodiments are not elaborated here.

[0212] Step 811: The CPU creates an intermediary device.

[0213] For a description of the execution process of step 811 in this embodiment, please refer to [link to documentation]. Figure 3 The corresponding step 310 is shown below, and will not be elaborated further.

[0214] Figure 9 A flowchart illustrating the steps of a third embodiment of the method for accessing resources provided in this application. Figure 9 In the illustrated embodiment, the processor included in the computing network is a CPU and the computing card is an NPU. It should be clarified that for processors that are not CPU types and computing cards that are not NPU types, the execution... Figure 9 For a description of the resource access method process shown, please refer to the description of the CPU and NPU execution process shown in this embodiment, which will not be elaborated here. Figure 3 In a corresponding embodiment, the NPU can access the CPU, and the CPU can also access the NPU. Figure 9 In the corresponding embodiment, only the CPU can access the NPU, while the NPU cannot access the CPU.

[0215] Step 901: The control device receives a resource request.

[0216] Step 902: The control device sends the first resource allocation instruction to the NPU.

[0217] Step 903: The NPU creates the first shared node according to the first resource allocation instruction.

[0218] Step 904: The NPU sends the first shared message to the control device.

[0219] Step 905: The control device sends a second resource allocation instruction to the CPU.

[0220] The control device sends a second resource allocation instruction to the CPU based on the requested resources. This second resource allocation instruction instructs the CPU to allocate a second shared resource. The second shared resource can access one or more shared resources on one or more NPUs. The second shared resource configured on the CPU can access the NPU. The second resource allocation instruction specifically includes second allocation information and fourth allocation information. The second allocation information is shown in Table 4 and will not be elaborated further. Since the NPU does not have permission to access the CPU, the fourth allocation information may include the second resource instruction and the UPI, without needing to include the identifier of the second port. For an explanation of the second resource instruction and the UPI, please refer to Table 5 and will not be elaborated further.

[0221] Step 906: The CPU creates a second shared node according to the second resource allocation instruction.

[0222] For a description of the execution process of step 906, please refer to [link / reference]. Figure 3 The corresponding step 306 is shown below, and will not be elaborated further.

[0223] Step 907: The CPU sends a creation response message to the control device.

[0224] If the CPU successfully creates FE2, it sends the creation response message to the control device. The creation response message is used to indicate that the CPU has successfully created FE2. In this embodiment, step 907 is an optional step, that is, if the CPU has created FE2, it may not send the creation response message to the control device.

[0225] Step 908: The control device sends a second access message to the NPU to enable the CPU to access the NPU.

[0226] Step 909: The control device sends the first access message to the CPU to enable the CPU to access the NPU.

[0227] In this embodiment, upon receiving the first shared message and the creation response message, the control device creates a binding relationship between the NPU and the CPU, enabling the CPU to access the NPU while preventing the NPU from accessing the CPU. When the control device creates a binding relationship between FE1 and FE2, it sends the first access message to the CPU. This first access message specifically carries first allocation information (as shown in Table 1) and first access information corresponding to the NPU bound to the CPU, thus enabling the CPU to access the NPU. For a description of the first access message, please refer to [link to documentation]. Figure 3 The corresponding explanations are not detailed here. The control device sends the second access message to the NPU, wherein the second access message specifically carries the second allocation information corresponding to the CPU bound to the NPU (as shown in Table 4, for example). Relative to Figure 3 In the embodiment shown, the second access message does not need to carry second access information, so that the NPU cannot access the CPU.

[0228] To enable the CPU's second shared resource to access the NPU's first shared resource, the NPU creates a first device information table, as shown in Table 7, which will not be elaborated further. Since the NPU in this embodiment does not have permission to access the CPU, the NPU does not need to create a first routing table as shown in Table 8. Similarly, since the NPU does not have permission to access the CPU, the CPU does not need to create a second device information table as shown in Table 9.

[0229] To enable the CPU's second shared resource to access the NPU's first shared resource, the CPU creates a second routing table as shown in Table 10 based on the first access message. For details, please refer to Table 10. Further details will not be elaborated here.

[0230] Since the NPU does not have permission to access the CPU, the NPU does not need to create the first shared resource access list shown in Table 11. In order to enable the CPU's second shared resources to access the NPU's first shared resources, the CPU also needs to create the second shared resource access list shown in Table 12. See Table 12 for details, which will not be elaborated further.

[0231] Step 910: The CPU creates the target intermediary device.

[0232] For the execution process of step 910, please refer to [link / reference]. Figure 3 The corresponding step 310 is shown below, and will not be elaborated further.

[0233] based on Figure 9 For an explanation of the CPU accessing the NPU process, please refer to [link / reference]. Figure 5 The specific details of the corresponding embodiments are not elaborated here.

[0234] Regarding the above method embodiments, it should be noted that:

[0235] (1) The step numbers of the flowcharts described in the embodiments are only examples of the execution flow and do not constitute a restriction on the order of execution of the steps. There is no strict execution order between steps that have no temporal dependency relationship with each other in the embodiments of this application. In addition, not all steps shown in the flowcharts are mandatory steps. Some steps can be added or deleted based on the actual needs of each flowchart.

[0236] (2) In the various embodiments of this application, unless otherwise specified or logically conflicting, the terms and / or descriptions of different embodiments are consistent and can be referenced by each other. The technical features of different embodiments can be combined to form new embodiments according to their inherent logical relationship.

[0237] The methods provided by the embodiments of this application have been described in detail above. The apparatus and chip provided by the embodiments of this application will be described in detail below. It should be understood that the descriptions of the apparatus embodiments correspond to the descriptions of the method embodiments; therefore, any content not described in detail can be referred to the method embodiments above, and for the sake of brevity, will not be repeated here.

[0238] The above-mentioned resource access methods are mainly described from the perspective of the interaction between the control device, NPU, and CPU. It is understood that, in order to achieve the above functions, the control device, NPU, and CPU include hardware structures and / or software modules corresponding to the execution of each function. To implement the functions in the above embodiments, the control device, NPU, and CPU include hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should readily recognize that, based on the units and method steps described in conjunction with the embodiments disclosed in this application, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed by hardware or by computer software driving hardware depends on the specific application scenario and design constraints of the technical solution.

[0239] Figure 10 This is a structural example diagram of a first embodiment of the computing device provided in this application. The computing device 1000 shown in this embodiment includes a controller 1001. Optionally, the computing device 1000 also includes a memory 1002 connected to the controller 1001. Optionally, the computing device 1000 also includes a system bus 1003. The controller 1001 and the memory 1002 are respectively connected to the system bus 1003. The controller 1001 can access the memory 1002 through the system bus 1003; for example, the controller 1001 can perform data read / write or code execution in the memory 1002 through the system bus. The system bus 1003 may be, for example, a quick path interconnect (QPI) or an ultra path interconnect (UPI). The system bus 1003 is divided into an address bus, a data bus, a control bus, etc. The main function of the controller 1001 is to interpret the instructions (or code) of the computer program and process the data in the computer software. The instructions of the computer program and the data in the computer software can be stored in the memory 1002. The computing device 1000 also includes a port 1004 connected to the system bus 1003, through which the computing device 1000 communicates with external devices.

[0240] like Figure 10 The computing device shown serves as a control device, used to execute the above-mentioned... Figure 3 , Figure 8 , Figure 9 For details regarding the process executed by the control device and the controller type 1001, please refer to the above description of the processor type; further details will not be repeated here. Figure 3 In the corresponding embodiment, controller 1001 and port 1004 are used to execute steps 301, 302, 304, 305, 307, 308, and 307. Figure 8 In the corresponding embodiment, controller 1001 and port 1004 are used to execute steps 801, 802, 804, 805, 807, 808, 809, and 810. Figure 9 In the corresponding embodiment, the controller 1001 and port 1004 are used to execute steps 901, 902, 904, 905, 907, 908 and 909.

[0241] like Figure 10 The computing device shown is used to perform the above. Figure 3 , Figure 5 , Figure 6 , Figure 8 , Figure 9 In the process executed by the computing card, the controller 1001 included in the computing device 1000 can be the computing card shown above, and further details will not be elaborated. Figure 3 In the corresponding embodiment, controller 1001 and port 1004 are used to execute steps 302, 304, and 308, and controller 1001 is used to execute step 303. Figure 5 In a corresponding embodiment, controller 1001 and port 1004 are used to execute steps 502 and 503. Figure 6 In the corresponding embodiment, controller 1001 and port 1004 are used to execute steps 601 and 602. Figure 8 In the corresponding embodiment, controller 1001 and port 1004 are used to execute steps 802, 803, 804, and 808. Figure 9 In the corresponding embodiment, controller 1001 and port 1004 are used to execute steps 902, 903, 904 and 908.

[0242] like Figure 10 The computing device shown is used to perform the above. Figure 3 , Figure 5 , Figure 6 , Figure 8 , Figure 9 In the process executed by the processor, the controller 1001 included in the computing device 1000 can be the CPU shown above, which will not be described in detail here. Figure 3 In the corresponding embodiment, controller 1001 and port 1004 are used to execute steps 305, 306, 307, 309, and 310. Figure 5 In a corresponding embodiment, controller 1001 and port 1004 are used to execute steps 501 and 502. Figure 6 In the corresponding embodiment, controller 1001 and port 1004 are used to execute steps 602 and 603. Figure 8 In the corresponding embodiment, controller 1001 and port 1004 are used to execute steps 805, 806, 807, 809, and 811. Figure 9 In the corresponding embodiment, the controller 1001 and port 1004 are used to execute steps 905, 906, 907, 909, and 910.

[0243] Figure 11 This is a structural example diagram of a second embodiment of the computing device provided in this application. Specifically, the computing device 1100 includes a transmitting module 1101, a processing module 1102, and a receiving module 1103. The transmitting module 1101 may also be referred to as a transmitter, transmitting unit, transmitting device, etc. The receiving module 1103 may also be referred to as a receiver, receiving unit, receiving device, etc. The processing module 1102 is used to implement corresponding processing functions. The transmitting module 1101 and the receiving module 1103 may also be referred to as a communication interface or communication unit.

[0244] Optionally, the computing device 1100 further includes a storage unit that can be used to store instructions and / or data. The processing module 1102 can read the instructions and / or data in the storage unit to execute corresponding processing control actions.

[0245] For example, computing device 1100 can be a control device for executing the above method embodiments, or it can be a module applied to the control device. In this case, the sending module 1101 is used to execute the sending-related steps performed by the control device as shown in the above method embodiments, the processing module 1102 is used to execute the processing-related steps performed by the control device as shown in the above method embodiments, and the receiving module 1103 is used to execute the receiving-related steps performed by the control device as shown in the above method embodiments. As another example, computing device 1100 can be an NPU for executing the above method embodiments, or it can be a module applied to the NPU. In this case, the sending module 1101 is used to execute the sending-related steps performed by the NPU as shown in the above method embodiments, the processing module 1102 is used to execute the processing-related steps performed by the NPU as shown in the above method embodiments, and the receiving module 1103 is used to execute the receiving-related steps performed by the NPU as shown in the above method embodiments. For example, the computing device 1100 can be used as a CPU to execute the above method embodiments, or it can be a module applied to the CPU. In this case, the sending module 1101 is used to execute the sending-related steps performed by the CPU as shown in the above method embodiments, the processing module 1102 is used to execute the processing-related steps performed by the CPU as shown in the above method embodiments, and the receiving module 1103 is used to execute the receiving-related steps performed by the CPU as shown in the above method embodiments.

[0246] It should be understood that the specific process of each module performing the above-mentioned steps has been described in detail in the above method embodiments, and will not be repeated here for the sake of brevity.

[0247] Figure 12 This is a structural example diagram of one embodiment of the chip provided in this application. The chip 1200 (or processing system) includes a processing unit 1210 and an interface circuit 1220. The processing unit 1210 can be a processing circuit within the chip 1200. The processing unit 1210 can be coupled to a storage unit, calling instructions from the storage unit, enabling the chip 1200 to implement the methods and functions of the various embodiments of this application. The interface circuit 1220 can be an input / output circuit within the chip 1200, outputting processed information from the chip 1200, or inputting data or signaling information to be processed into the chip 1200 for processing.

[0248] Optionally, the processing unit 1210 may be implemented by one or more controllers, including the one or more controllers or the processing portion of the one or more controllers. Optionally, the interface circuit 1220 may include transceiver circuitry, a network interface card (NIC), input / output circuitry, or a communication interface.

[0249] As one approach, the chip 1200 is used to implement the operations performed by the control device, processor, and computing card in the various method embodiments described above.

[0250] Specifically, the processing unit 1210 is used to implement the processing-related operations performed by the control device, processor, and computing card in the above method embodiments; the interface circuit 1220 is used to implement the sending and / or receiving-related operations performed by the control device, processor, and computing card in the above method embodiments.

[0251] This application also provides a computer-readable storage medium storing computer instructions for implementing the methods executed by the control device, processor, and computing card in the above-described method embodiments.

[0252] For example, when the computer program is executed by the computer, the computer can implement the methods executed by the control device, processor, and computing card in the various embodiments of the above methods.

[0253] This application also provides a computer program product comprising instructions that, when executed by a computer, implement the methods performed by the control device, processor, and computing card in the above-described method embodiments.

[0254] This application also provides a computing network, and a description of the computing network can be found above. Figure 2 The corresponding explanations will not be elaborated upon here.

[0255] The explanations and beneficial effects of the relevant contents in any of the devices provided above can be found in the corresponding method embodiments provided above, and will not be repeated here.

[0256] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method for accessing a resource, characterized in that, The method includes: The control device sends a first resource allocation instruction to the computing card. The first resource allocation instruction carries first allocation information, which is used to instruct the computing card to allocate a first shared resource. The control device sends a second resource allocation instruction to the processor. The second resource allocation instruction carries second allocation information, which is used to instruct the processor to allocate a second shared resource. The control device receives a first shared message from the computing card, the first shared message carrying first access information for accessing the first shared resource; The control device sends a first access message to the processor. The first access message carries the first allocation information and the first access information. The first access message is used for the second shared resource to access the first shared resource.

2. The method according to claim 1, characterized in that, After the control device sends a first resource allocation instruction to the computing card, the method further includes: The control device receives a second shared message from the processor, the second shared message carrying second access information for accessing the second shared resource; The control device sends a second access message to the computing card. The second access message carries the second allocation information and the second access information. The second access message is used for the first shared resource to access the second shared resource.

3. The method according to claim 1 or 2, characterized in that, Before the control device sends the first resource allocation instruction to the computing card, the method further includes: The control device receives a resource request, and the first shared resource and the second shared resource satisfy the resource requested by the resource request.

4. The method according to any one of claims 1 to 3, characterized in that, The first allocation information includes a first network address. The first allocation information is used to configure a first shared node on the computing card. The first shared node is used to carry the first shared resource. The network address corresponding to the first shared node is the first network address.

5. The method according to claim 4, characterized in that, The first allocation information also carries a first identifier, and the identifier corresponding to the first shared node is the first identifier.

6. The method according to any one of claims 1 to 5, characterized in that, The first resource allocation indication also carries third allocation information, which includes at least one of the following: a first resource indication, a user partition identifier (UPI), and an identifier of a first port. The first resource indication is used to indicate the type and / or size of the first shared resource. The UPI is used to isolate the tenant corresponding to the first shared node. The first shared node is used to carry the first shared resource. The identifier of the first port is used to identify the first port of the computing card. The first port is used to send an access message to the processor.

7. The method according to any one of claims 1 to 6, characterized in that, The first resource allocation instruction is further used to instruct the computing card to allocate a first access address, a first memory size, and a first host physical address to the first shared node. The first shared node is used to carry the first shared resource. The first memory size is the memory size allocated to the first shared node, and the first host physical address is the physical address of the memory allocated to the first shared node. The first access information includes the first access address and the first memory size.

8. The method according to claim 7, characterized in that, The first resource allocation instruction is further used to instruct the computing card to allocate at least one of the following to the first shared node: a first shared identifier, a token value corresponding to the first shared node, and read / write permissions corresponding to the first shared node, wherein the first shared identifier is used to identify the computing service performed by the first shared node; The first access information includes at least one of the following: the first shared identifier, the token value corresponding to the first shared node, and the read / write permissions corresponding to the first shared node.

9. The method according to any one of claims 1 to 6, characterized in that, The first resource allocation instruction is further used to instruct the computing card to allocate a sub-access address, a sub-memory size, and a sub-host physical address to the sub-shared resource. The first shared resource includes K sub-shared resources, where the sub-shared resource is any one of the K sub-shared resources, and K is any integer greater than 1. The sub-memory size is the memory size allocated to the sub-shared resource, and the sub-host physical address is the physical address of the memory allocated to the sub-shared resource. The first access information includes the sub-access address and the sub-memory size.

10. The method according to any one of claims 1 to 9, characterized in that, The control device is connected to a network device, and the network device is connected between the computing card and the processor. After the control device receives a first shared message from the computing card, the method further includes: The control device sends a routing message to the network device, the routing message instructing the network device to transmit the first access packet from the processor to the computing card. The routing message includes a first network address corresponding to the first shared resource and an identifier of a first output port, the first output port being used to send the first access packet to the computing card.

11. The method according to claim 10, characterized in that, The routing message is also used to instruct the network device to transmit the second access message from the computing card to the processor, wherein the routing message includes the second network address corresponding to the second shared resource and the identifier of the second output port, and the second output port is used to send the second access message to the processor.

12. A method for accessing a resource, characterized in that, The method includes: The computing card receives a first resource allocation instruction from the control device. The first resource allocation instruction carries first allocation information, which is used to instruct the computing card to allocate a first shared resource. The computing card sends a first sharing message to the control device, the first sharing message carrying first access information for accessing the first shared resource; The computing card receives a first access message from the processor. The first access message is used to access the first shared resource based on a first access message. The first access message carries the first allocation information and the first access information.

13. The method according to claim 12, characterized in that, The local resources of the computing card are divided into the first shared resource and the third shared resource, which are used to provide different computing services.

14. The method according to claim 12 or 13, characterized in that, The first allocation information includes a first network address. After the computing card receives a first resource allocation instruction from the control device, the method further includes: The computing card configures a first shared node according to the first allocation information. The first shared node is used to carry the first shared resource, and the network address corresponding to the first shared node is the first network address.

15. The method according to claim 14, characterized in that, The first allocation information also carries a first identifier, and the identifier corresponding to the first shared node is the first identifier.

16. The method according to any one of claims 12 to 15, characterized in that, After the computing card receives the first resource allocation instruction from the control device, the method further includes: The computing card allocates a first access address, a first memory size, and a first host physical address to the first shared node according to the first resource allocation instruction. The first shared node is used to carry the first shared resource. The first memory size is the memory size allocated to the first shared node, and the first host physical address is the physical address of the memory allocated to the first shared node. The first access information includes the first access address and the first memory size.

17. The method according to any one of claims 12 to 16, characterized in that, The first access message carries a first network address and a first access address, wherein the first network address and the first access address respectively correspond to a first shared node, and the first shared node is used to carry the first shared resource.

18. The method according to claim 17, characterized in that, The first access message also carries at least one of the following: the first identifier corresponding to the first shared node, the first shared identifier, the UPI corresponding to the first shared node, and the token value corresponding to the first shared node; Wherein, the UPI corresponding to the first shared node is used to isolate the tenant corresponding to the first shared node, and the first shared identifier is used to identify the computing service executed by the first shared node.

19. The method according to any one of claims 12 to 18, characterized in that, After the computing card receives the first resource allocation instruction from the control device, the method further includes: The computing card receives a second access message from the control device. The second access message carries second allocation information and second access information. The second allocation information is used to instruct the processor to allocate a second shared resource. The second sharing message carries second access information for accessing the second shared resource. The second access message is used for the first shared resource to access the second shared resource. The computing card sends a second access message to the processor, the second access message being used to access the second shared resource based on the second access message.

20. The method according to claim 19, characterized in that, The second access message carries a second network address and a second access address, wherein the second network address and the second access address respectively correspond to a second shared node, and the second shared node is used to carry the second shared resource.

21. The method according to claim 20, characterized in that, The second access message also carries at least one of the following: the second identifier corresponding to the second shared node, the second shared identifier, the UPI corresponding to the second shared node, and the token value corresponding to the second shared node; The UPI corresponding to the second shared node is used to isolate the tenant corresponding to the second shared node, and the second shared identifier is used to identify the computing service executed by the second shared node.

22. The method according to any one of claims 19 to 21, characterized in that, The computing card sends a second access message to the processor, including: The computing card sends the second access message to the processor through a first port, the first port corresponding to a second network address, wherein the second network address corresponds to a second shared node, and the second shared node is used to carry the second shared resource.

23. A method for accessing a resource, characterized in that, The method includes: The processor receives a second resource allocation instruction from the control device, the second resource allocation instruction carrying second allocation information, the second allocation information being used to instruct the processor to allocate a second shared resource; The processor receives a first access message from the control device. The first access message carries first allocation information and first access information. The first allocation information is used to instruct the computing card to allocate a first shared resource. The first access information is used to access the first shared resource. The first access message is used for the second shared resource to access the first shared resource. The processor sends a first access message to the computing card, the first access message being used to access the first shared resource based on the first access message.

24. The method according to claim 23, characterized in that, The processor's local resources are divided into a second shared resource and a fourth shared resource, which are used to provide different computing services.

25. The method according to claim 23 or 24, characterized in that, After the processor receives a second resource allocation instruction from the control device, the method further includes: The processor sends a second sharing message to the control device, the second sharing message carrying second access information for accessing the second shared resource; The processor receives a second access message from the computing card, the second access message being used to access the second shared resource based on the second access message.

26. A computing network, characterized in that, The device includes a control unit, a processor, and a computing card. The processor is connected to the computing card, and the control unit is connected to both the processor and the computing card. The control unit is used to execute the method according to any one of claims 1 to 11, the computing card is used to execute the method according to any one of claims 12 to 22, and the processor is used to execute the method according to any one of claims 23 to 25.

27. A computing device, characterized in that, Includes communication interfaces and controllers; The communication interface and the controller perform the method as described in any one of claims 1 to 11, or the communication interface and the controller perform the method as described in any one of claims 12 to 22, or the communication interface and the controller perform the method as described in any one of claims 23 to 25.

28. A computing device, characterized in that, It includes a module for performing the method of any one of claims 1 to 11, or includes a module for performing the method of any one of claims 12 to 22, or includes a module for performing the method of any one of claims 23 to 25.

29. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes instructions that, when executed by a processor, implement the method as claimed in any one of claims 1 to 11, or implement the method as claimed in any one of claims 12 to 22, or implement the method as claimed in any one of claims 23 to 25.

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