A substation relay protection device adaptive control method and system

Abstract

The application provides a substation relay protection device adaptive control method and system, the method comprises the following steps: constructing a mapping relationship between linear temporal logic sequences and relay protection events; detecting state change events, power grid operation events and manual operation events of each relay protection device in the substation, and assigning each event a globally unique event identifier and a timestamp to construct an unforgeable chain event log in the order of event occurrence, the chain event log stores original data and context information of all events; taking the chain event log as input, verifying through linear temporal logic sequences to correspondingly identify a target event sequence that violates the temporal constraint; analyzing the target event sequence to detect the corresponding target control action, and correspondingly generating a control path and a control object that adapt to the target control action. The application can greatly improve the control efficiency of the relay protection device.

Description

Technical Field

[0001] This invention relates to the field of substation control technology, and in particular to an adaptive control method and system for substation relay protection devices. Background Technology

[0002] With the rapid development of high-proportion renewable energy grid integration and AC / DC hybrid power grids, power system operation is exhibiting highly dynamic and uncertain characteristics. Traditional offline-setting relay protection devices have low matching accuracy with the real-time grid status, significantly increasing the risk of maloperation and failure to operate in scenarios with high renewable energy penetration and frequent topology changes. Therefore, substation relay protection adaptive control technology has become the mainstream development direction in the industry. By sensing the grid operating status in real time and dynamically adjusting protection strategies and settings, it effectively improves the adaptability of protection devices to complex operating conditions and has already been piloted in several substations across China.

[0003] However, the large-scale promotion of adaptive protection technology still faces core bottlenecks. The power industry clearly stipulates that relay protection devices must meet three basic principles: explainability, traceability, and verifiability, to ensure grid operation safety and accident handling efficiency. However, existing adaptive protection systems mostly rely on black-box intelligent algorithms such as deep learning and reinforcement learning, whose control processes lack transparency. When a protection device malfunctions or fails to operate, technicians cannot reconstruct the complete reasoning logic of the algorithm, making it difficult to accurately distinguish whether the accident was caused by algorithm model defects, abnormal input data, or hardware failure. This leads to difficulties in accident liability determination, significantly extends the accident analysis and processing cycle, and severely reduces the control efficiency of substation relay protection devices.

[0004] To address the aforementioned issues, existing technologies primarily employ peripheral solutions such as blockchain-based evidence storage and feature visualization. However, blockchain technology can only ensure the immutable storage of protection action results, failing to trace the intermediate processes involved in control generation. Attention mechanism visualization can only display the weight percentages of each input feature, unable to explain the causal relationships within the control. None of these solutions overcome the black-box limitation of the algorithm model itself, failing to fundamentally resolve the industry pain points of interpretability and accountability difficulties in adaptive protection control, and thus failing to meet the safety operation requirements of power systems for relay protection devices. Summary of the Invention

[0005] Based on this, the purpose of this invention is to provide an adaptive control method and system for substation relay protection devices, so as to solve the problem that the existing technology cannot trace the intermediate process of control generation and cannot explain the causal relationship of control, which leads to reduced control efficiency.

[0006] The first aspect of the present invention proposes: An adaptive control method for a substation relay protection device, wherein the method includes: The system detects the type identifiers, data structures, triggering conditions, and timing constraints of various relay protection events within the substation, so as to transform the action logic, interlocking logic, and coordination logic of the relay protection device into corresponding linear timing logic sequences, and constructs a mapping relationship between the linear timing logic sequences and the relay protection events. The system detects status change events of various relay protection devices, power grid operation events, and manual operation events within the substation, and assigns a globally unique event identifier and timestamp to each event to construct an immutable chain event log in chronological order of events. The chain event log stores the original data and context information of all events. Based on the mapping relationship, the chained event log is used as input, and the linear time-series logic sequence is used for verification processing to identify the target event sequence that violates the time-series constraints. The target event sequence is parsed and processed to detect the corresponding target control action, and a control path and control object adapted to the target control action are generated accordingly.

[0007] The beneficial effects of this invention are as follows: This technical solution effectively solves the problems of low control efficiency caused by the inability to trace the control process and the difficulty in explaining the causal relationship of existing substation relay protection devices. By transforming the action, interlocking, and coordination logic of the relay protection device into a linear time-series logic sequence and establishing a mapping relationship with various relay protection events, the formal expression and interpretability of the protection logic are realized. By constructing an immutable chained event log with a globally unique event identifier and a precise timestamp, the original data and contextual information of all state changes, power grid operation, and manual operation events are completely retained, realizing the traceability of the entire control process. Through linear time-series logic verification, abnormal event sequences that violate timing constraints are quickly identified, and the corresponding control paths and control objects are accurately generated, clearly clarifying the causal relationship of control actions, significantly improving the control efficiency and accuracy of abnormal handling of relay protection devices.

[0008] Furthermore, the step of detecting the type identifiers, data structures, triggering conditions, and timing constraints of various relay protection events within the substation, and converting the action logic, interlocking logic, and coordination logic of the relay protection device into a corresponding linear timing logic sequence, includes: The internal logic of the relay protection device is divided into a hardware driver layer, a firmware execution layer, and a protection application layer according to the execution level, and an independent finite state machine is constructed for each level. Each state transition rule of each finite state machine is labeled with preconditions and postconditions, and the preconditions and postconditions are converted into atomic propositions of linear sequential logic. Corresponding temporal contracts are defined for the input and output events between adjacent finite state machines. The temporal contracts include constraints on the order of time occurrence, time interval constraints, and triggering condition constraints. Based on the atomic proposition and the temporal contract, a linear temporal logic subsequence adapted to the finite state machine is generated, and the linear temporal logic subsequences at each level are nested and combined according to the hierarchical dependency relationship to generate the corresponding linear temporal logic sequence.

[0009] Furthermore, the step of generating a linear temporal logic subsequence adapted to the finite state machine based on the atomic proposition and the temporal contract includes: Perform a Cartesian product operation on the state set of the finite state machine and the state set of the temporal contract to generate a product state set. Synchronously combine the state transitions of the finite state machine and the state transitions of the temporal contract according to the input and output events to generate a product transition set. Generate a corresponding product finite state machine based on the product state set and the product transition set. The Hopcroft algorithm is used to perform state equivalence class partitioning on the product finite state machine, and equivalent regular expressions are generated based on the partitioning results. The regular expression is fused with the atomic proposition to generate a corresponding combined expression. The combined expression is then sorted according to the execution priority of the protection logic to generate the corresponding linear sequential logic subsequence.

[0010] Furthermore, the step of identifying the target event sequence that violates the timing constraints based on the mapping relationship, using the chained event log as input, and performing verification processing through the linear temporal logic sequence includes: The linear sequential logic sequence is parsed to generate the corresponding abstract syntax tree, and atomic proposition nodes in the abstract syntax tree are detected. Based on the mapping relationship between the atomic proposition nodes and the relay protection event, the chain event log is semantically filtered, and the filtered chain event log is segmented to generate several event slices. Each event slice is assigned an independent verification context, and each event slice is verified sequentially based on an incremental verification algorithm, so as to determine whether each event slice meets the preset requirements based on the verification results. If it is determined that an event slice does not meet the preset requirements, the dependency edges and state transition trajectories of the abstract syntax tree are traversed in reverse to locate the minimum set of events that cause the verification to fail, and the complete context of the minimum set of events in the chained event log is detected accordingly, so as to splice the events into the target event sequence according to the order of occurrence.

[0011] Furthermore, the step of detecting the complete context of the minimum event set in the chained event log, and then concatenating it into the target event sequence according to the order of event occurrence, includes: Each event in the minimum event set is mapped to a corresponding syntax node in the linear temporal logic sequence, and the semantic role of each event is determined based on the syntax node correspondence. Based on the semantic role of each event and its corresponding time interval, the time interval is bidirectionally expanded in the chained event log, and all expanded time intervals are merged to generate a complete context time window. All events within the context time window in the chained event log are detected and sorted in ascending order according to globally unique timestamps to generate the target event sequence.

[0012] Furthermore, the step of parsing the target event sequence to detect the corresponding target control action includes: The target event sequence is mapped to the corresponding counterexample proof tree generated during the verification process of the linear time-series logic sequence, and a corresponding proof tree node identifier is assigned to each event in the target event sequence. A target event sequence with logical semantic annotation is generated based on the proof tree node identifier. Using the target event sequence with logical semantic annotation as input, a temporal logic repair algorithm is used to generate a minimum logical correction set. Based on the action node identifiers corresponding to each correction in the minimum logical correction set, the corresponding relay protection device and functional module are located to convert the logical correction into the corresponding control action primitive. The execution order of each control action primitive is arranged according to the dependency relationship of the logical correction, and the target control action is generated accordingly.

[0013] Furthermore, the step of generating the corresponding control path and control object adapted to the target control action includes: The target control action is parsed to determine the target object type, execution permission, and timing dependency relationship, so as to construct the corresponding control action dependency graph based on the pre-dependency relationship and cross-device cooperation relationship between control actions; Perform a shortest path search with resource constraints on the control action dependency graph to identify all control action pairs with resource conflicts, and adjust the execution time window of the control action pairs accordingly to generate an initial control path that satisfies all temporal dependencies and resource constraints. The execution units corresponding to each control action in the control action dependency graph are detected, and each execution unit is integrated into the internal part of the initial control path to generate the control path and control object of the target control action.

[0014] The second aspect of the present invention proposes: An adaptive control system for a substation relay protection device, wherein the system comprises: The module is used to detect the type identifier, data structure, triggering conditions and timing constraints of various relay protection events in the substation, so as to convert the action logic, blocking logic and coordination logic of the relay protection device into the corresponding linear timing logic sequence, and construct the mapping relationship between the linear timing logic sequence and the relay protection event. The detection module is used to detect status change events of various relay protection devices, power grid operation events, and manual operation events in the substation, and assigns a globally unique event identifier and timestamp to each event to construct an immutable chain event log in the order of events. The chain event log stores the original data and context information of all events. The verification module is used to perform verification processing based on the mapping relationship, taking the chained event log as input, and the linear temporal logic sequence to identify the target event sequence that violates the temporal constraints. The parsing module is used to parse and process the target event sequence to detect the corresponding target control action and generate a control path and control object that are adapted to the target control action.

[0015] Furthermore, the building module is specifically used for: The internal logic of the relay protection device is divided into a hardware driver layer, a firmware execution layer, and a protection application layer according to the execution level, and an independent finite state machine is constructed for each level. Each state transition rule of each finite state machine is labeled with preconditions and postconditions, and the preconditions and postconditions are converted into atomic propositions of linear sequential logic. Corresponding temporal contracts are defined for the input and output events between adjacent finite state machines. The temporal contracts include constraints on the order of time occurrence, time interval constraints, and triggering condition constraints. Based on the atomic proposition and the temporal contract, a linear temporal logic subsequence adapted to the finite state machine is generated, and the linear temporal logic subsequences at each level are nested and combined according to the hierarchical dependency relationship to generate the corresponding linear temporal logic sequence.

[0016] Furthermore, the building module is specifically used for: Perform a Cartesian product operation on the state set of the finite state machine and the state set of the temporal contract to generate a product state set. Synchronously combine the state transitions of the finite state machine and the state transitions of the temporal contract according to the input and output events to generate a product transition set. Generate a corresponding product finite state machine based on the product state set and the product transition set. The Hopcroft algorithm is used to perform state equivalence class partitioning on the product finite state machine, and equivalent regular expressions are generated based on the partitioning results. The regular expression is fused with the atomic proposition to generate a corresponding combined expression. The combined expression is then sorted according to the execution priority of the protection logic to generate the corresponding linear sequential logic subsequence.

[0017] Furthermore, the verification module is specifically used for: The linear sequential logic sequence is parsed to generate the corresponding abstract syntax tree, and atomic proposition nodes in the abstract syntax tree are detected. Based on the mapping relationship between the atomic proposition nodes and the relay protection event, the chain event log is semantically filtered, and the filtered chain event log is segmented to generate several event slices. Each event slice is assigned an independent verification context, and each event slice is verified sequentially based on an incremental verification algorithm, so as to determine whether each event slice meets the preset requirements based on the verification results. If it is determined that an event slice does not meet the preset requirements, the dependency edges and state transition trajectories of the abstract syntax tree are traversed in reverse to locate the minimum set of events that cause the verification to fail, and the complete context of the minimum set of events in the chained event log is detected accordingly, so as to splice the events into the target event sequence according to the order of occurrence.

[0018] Furthermore, the verification module is specifically used for: Each event in the minimum event set is mapped to a corresponding syntax node in the linear temporal logic sequence, and the semantic role of each event is determined based on the syntax node correspondence. Based on the semantic role of each event and its corresponding time interval, the time interval is bidirectionally expanded in the chained event log, and all expanded time intervals are merged to generate a complete context time window. All events within the context time window in the chained event log are detected and sorted in ascending order according to globally unique timestamps to generate the target event sequence.

[0019] Furthermore, the parsing module is specifically used for: The target event sequence is mapped to the corresponding counterexample proof tree generated during the verification process of the linear time-series logic sequence, and a corresponding proof tree node identifier is assigned to each event in the target event sequence. A target event sequence with logical semantic annotation is generated based on the proof tree node identifier. Using the target event sequence with logical semantic annotation as input, a temporal logic repair algorithm is used to generate a minimum logical correction set. Based on the action node identifiers corresponding to each correction in the minimum logical correction set, the corresponding relay protection device and functional module are located to convert the logical correction into the corresponding control action primitive. The execution order of each control action primitive is arranged according to the dependency relationship of the logical correction, and the target control action is generated accordingly.

[0020] Furthermore, the parsing module is specifically used for: The target control action is parsed to determine the target object type, execution permission, and timing dependency relationship, so as to construct the corresponding control action dependency graph based on the pre-dependency relationship and cross-device cooperation relationship between control actions; Perform a shortest path search with resource constraints on the control action dependency graph to identify all control action pairs with resource conflicts, and adjust the execution time window of the control action pairs accordingly to generate an initial control path that satisfies all temporal dependencies and resource constraints. The execution units corresponding to each control action in the control action dependency graph are detected, and each execution unit is integrated into the internal part of the initial control path to generate the control path and control object of the target control action.

[0021] The third aspect of the present invention proposes: A computer includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, implements the adaptive control method for substation relay protection devices as described above.

[0022] The fourth aspect of the present invention proposes: A readable storage medium having a computer program stored thereon, wherein the program, when executed by a processor, implements the adaptive control method for substation relay protection devices as described above.

[0023] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0024] Figure 1 A flowchart of the adaptive control method for substation relay protection devices provided in the first embodiment of the present invention; Figure 2 The structural block diagram of the adaptive control system for substation relay protection device provided in the third embodiment of the present invention is shown.

[0025] The following detailed description, in conjunction with the accompanying drawings, will further illustrate the present invention. Detailed Implementation

[0026] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Several embodiments of the invention are illustrated in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0027] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.

[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0029] Please see Figure 1The figure shows the adaptive control method for substation relay protection devices provided in the first embodiment of the present invention. The adaptive control method for substation relay protection devices provided in this embodiment can quickly identify abnormal event sequences that violate timing constraints through linear timing logic verification, and accurately analyze and generate corresponding control paths and control objects, clearly clarifying the causal relationship of control actions, and significantly improving the control efficiency and accuracy of abnormal handling of relay protection devices.

[0030] Specifically, this embodiment provides: An adaptive control method for a substation relay protection device, wherein the method includes: Step S10: Detect the type identifier, data structure, triggering conditions, and timing constraints of various relay protection events in the substation, so as to convert the action logic, blocking logic, and coordination logic of the relay protection device into the corresponding linear timing logic sequence, and construct the mapping relationship between the linear timing logic sequence and the relay protection event. It is important to note that the core logic of relay protection is essentially a series of strict timing constraints, such as "overcurrent protection action must be completed within 100ms after a fault occurs," "circuit breaker tripping must occur after the protection output action," and "bus differential protection must block all outgoing line protections when it operates." These timing constraints cannot be fully described using traditional Boolean logic. Linear sequential logic can accurately express timing relationships such as "occurring at a future point in time," "remaining satisfied," and "until a certain event occurs," and is a standard tool for formally verifying timing constraints. This step extracts the core attributes of all relay protection events, unifies the three-layer core logic of the protection device (action, blocking, coordination) into a standardized linear sequential logic sequence, and establishes a mapping relationship between logical propositions and actual physical events, providing an executable formal benchmark for subsequent online verification.

[0031] Step S20: Detect the status change events of each relay protection device, power grid operation events, and manual operation events in the substation, and assign a globally unique event identifier and timestamp to each event to construct an immutable chain event log in chronological order of events. The chain event log stores the original data and context information of all events. It is important to note that traditional substation event logs are scattered across various protection devices, measurement and control devices, and monitoring systems. These devices suffer from clock asynchrony, inconsistent event log formats, and the risk of tampering, making global timing verification impossible. This step employs a unified high-precision clock synchronization system (such as IEEE 1588PTP) for the substation, assigning each event a globally unique event identifier and a timestamp with microsecond-level precision. A chained storage structure is also used, where each event block contains the hash value of the previous event block. Any tampering with historical events will break the hash chain, ensuring the immutability of the event log. The log stores not only the raw event data but also contextual information (such as grid operating parameters at the time of the event, device status, and related events), providing complete contextual support for subsequent timing verification and fault analysis.

[0032] Step S30: Based on the mapping relationship, using the chained event log as input, the linear temporal logic sequence is used for verification processing to identify the target event sequence that violates the temporal constraints. It's important to note that during substation operation, all protection actions, status changes, and manual operations are recorded in real-time in a chained event log. This step automatically compares the actual event sequence in the log with a pre-built linear timing logic sequence to verify whether the occurrence order, time intervals, and triggering conditions of the actual events meet the preset timing constraints. Once a violation of the timing constraints is detected, such as protection action timeouts, blocking logic failures, or cross-device coordination timing errors, the corresponding violation target event sequence is automatically identified. This online verification method can detect problems as soon as timing violations occur, much earlier than traditional post-fault analysis, buying valuable time for timely control measures and preventing the accident from escalating.

[0033] Step S40: The target event sequence is parsed to detect the corresponding target control action, and a control path and control object adapted to the target control action are generated accordingly.

[0034] It should be noted that this step identifies the root cause of timing violations by analyzing the logical semantics and contextual information of the violation target event sequence, such as the action delay of the protection device, incorrect logic parameter settings, and cross-device communication delay. Then, based on the principle of minimal modification, corresponding target control actions are generated, such as adjusting the delay parameters of the protection action, correcting the triggering conditions of the blocking logic, and optimizing the coordination timing of cross-devices. At the same time, suitable control paths and control objects are generated, clarifying the execution order, execution device, resource requirements, and timing constraints of the control actions to ensure that the control actions can be executed safely, accurately, and efficiently. Under the premise of not affecting the normal operation of the protection system, the timing violation problem is corrected and the correct logic of the relay protection system is restored.

[0035] Second Embodiment Furthermore, the step of detecting the type identifiers, data structures, triggering conditions, and timing constraints of various relay protection events within the substation, and converting the action logic, interlocking logic, and coordination logic of the relay protection device into a corresponding linear timing logic sequence, includes: The internal logic of the relay protection device is divided into a hardware driver layer, a firmware execution layer, and a protection application layer according to the execution level, and an independent finite state machine is constructed for each level. Each state transition rule of each finite state machine is labeled with preconditions and postconditions, and the preconditions and postconditions are converted into atomic propositions of linear sequential logic. Corresponding temporal contracts are defined for the input and output events between adjacent finite state machines. The temporal contracts include constraints on the order of time occurrence, time interval constraints, and triggering condition constraints. Based on the atomic proposition and the temporal contract, a linear temporal logic subsequence adapted to the finite state machine is generated, and the linear temporal logic subsequences at each level are nested and combined according to the hierarchical dependency relationship to generate the corresponding linear temporal logic sequence.

[0036] It's important to note that the internal logic of a relay protection device is a typical layered system, with significant differences in function and timing constraints across different layers: the hardware driver layer directly controls the hardware circuitry, with the strictest timing constraints (microseconds); the firmware execution layer executes the protection algorithm and performs logical judgments, with timing constraints at the millisecond level; and the protection application layer configures the protection function and coordinates with other devices, with relatively relaxed timing constraints. This step divides the protection logic according to these three execution layers, constructing an independent finite state machine (FSM) for each layer. A finite state machine is a classic model for describing the dynamic behavior of discrete event systems, clearly expressing the system's state, state transitions, and triggering conditions. Through layered modeling, the originally complex overall protection logic is decomposed into three relatively simple subsystems, significantly reducing the difficulty of formal modeling and facilitating subsequent layered verification and debugging.

[0037] This step involves clearly defining the preconditions (conditions that must be met before a state transition occurs) and postconditions (conditions that must be met after a state transition) for each state transition rule of each level of finite state machine. These conditions are then transformed into atomic propositions of linear sequential logic (LTL), which are the smallest units constituting an LTL formula. Simultaneously, timing contracts are defined for the input and output events between adjacent levels of finite state machines. These timing contracts are interface specifications for cross-level interactions, clearly defining the sequence constraints, time interval constraints, and trigger condition constraints between upper-level and lower-level events. For example, "After the protection application layer issues a trip instruction, the firmware execution layer must send the instruction to the hardware driver layer within 5ms." Through timing contracts, the originally independent hierarchical finite state machines are connected into an organic whole, ensuring that cross-level interactions meet timing requirements.

[0038] This step first generates a linear temporal logic subsequence for each level based on the atomic propositions and internal state transition rules. This subsequence fully describes all timing constraints within that level. Then, following the hierarchical dependency relationship of "hardware driver layer → firmware execution layer → protection application layer," the LTL subsequences of each layer are nested and combined. Simultaneously, cross-layer timing contracts are embedded as global constraints into the combined sequence, ultimately generating a complete linear temporal logic sequence covering all levels and all logic of the protection device. This nested combination method retains the simplicity of layered modeling while ensuring the integrity and consistency of the global logic, providing a unified formal benchmark for subsequent global timing verification.

[0039] Furthermore, the step of generating a linear temporal logic subsequence adapted to the finite state machine based on the atomic proposition and the temporal contract includes: Perform a Cartesian product operation on the state set of the finite state machine and the state set of the temporal contract to generate a product state set. Synchronously combine the state transitions of the finite state machine and the state transitions of the temporal contract according to the input and output events to generate a product transition set. Generate a corresponding product finite state machine based on the product state set and the product transition set. The Hopcroft algorithm is used to perform state equivalence class partitioning on the product finite state machine, and equivalent regular expressions are generated based on the partitioning results. The regular expression is fused with the atomic proposition to generate a corresponding combined expression. The combined expression is then sorted according to the execution priority of the protection logic to generate the corresponding linear sequential logic subsequence.

[0040] It's important to note that a standalone finite state machine can only describe the system's internal state transitions and cannot reflect the external constraints of the timing contract. A product finite state machine, however, is an effective method for synchronously combining the states and transitions of two finite state machines. This step involves multiplying the finite state machines within the hierarchy with their corresponding timing contracts: performing a Cartesian product of the state sets of the two state machines to generate a product state set, where each product state consists of a system state and a contract state; and synchronously combining the transitions of the two state machines according to input and output events, ensuring that the product state machine only transitions when both state machines transition under the same input event. The resulting product finite state machine encompasses both the system's internal behavior and all the constraints of the timing contract, fully describing all legal behaviors of the system under contract constraints.

[0041] Product operations lead to an exponential increase in the number of states, and the resulting product finite state machine often contains a large number of equivalent redundant states. These redundant states severely slow down formal verification. The Hopcroft algorithm is currently the most efficient finite state machine minimization algorithm, capable of dividing a finite state machine into several state equivalence classes in linear time. All states in each equivalence class exhibit identical output behavior under any input sequence. This step uses the Hopcroft algorithm to partition the product finite state machine into state equivalence classes, merging each equivalence class into a minimized state to generate a minimized finite state machine. Then, the minimized finite state machine is converted into an equivalent regular expression. Regular expressions are a standard tool for describing string patterns and can concisely express all legal behavioral sequences of a finite state machine.

[0042] This step maps the symbols in the regular expression to predefined atomic propositions, converting the regular expression into a composite expression containing atomic propositions. Then, based on the execution priority of the protection logic, the composite expressions are sorted, with expressions corresponding to higher-priority protection logic (such as primary protection) appearing first, and lower-priority expressions (such as backup protection) appearing later. Finally, the sorted composite expressions are converted into standard linear sequential logic formulas, generating the corresponding LTL subsequence. The LTL subsequences generated in this way are not only concise and free of redundancy, but also clearly reflect the priority relationships of the protection logic, significantly improving the efficiency and accuracy of subsequent online verification.

[0043] Furthermore, the step of identifying the target event sequence that violates the timing constraints based on the mapping relationship, using the chained event log as input, and performing verification processing through the linear temporal logic sequence includes: The linear sequential logic sequence is parsed to generate the corresponding abstract syntax tree, and atomic proposition nodes in the abstract syntax tree are detected. Based on the mapping relationship between the atomic proposition nodes and the relay protection event, the chain event log is semantically filtered, and the filtered chain event log is segmented to generate several event slices. Each event slice is assigned an independent verification context, and each event slice is verified sequentially based on an incremental verification algorithm, so as to determine whether each event slice meets the preset requirements based on the verification results. If it is determined that an event slice does not meet the preset requirements, the dependency edges and state transition trajectories of the abstract syntax tree are traversed in reverse to locate the minimum set of events that cause the verification to fail, and the complete context of the minimum set of events in the chained event log is detected accordingly, so as to splice the events into the target event sequence according to the order of occurrence.

[0044] It's important to note that a linear temporal logic sequence (LTL) can be parsed into an abstract syntax tree (AST). The leaf nodes of the tree are atomic propositions, and the internal nodes are logical and temporal operators. This step first parses the LTL sequence to generate the corresponding AST, extracting all atomic proposition nodes. Then, based on the mapping relationship between atomic propositions and relay protection events, semantic filtering is performed on the chained event log, retaining only events related to atomic propositions and removing all irrelevant event data, significantly reducing the amount of data to be verified. Finally, the filtered event log is segmented according to a fixed time window or the number of events, generating several independent event slices. This preprocessing method transforms the originally massive global log verification problem into multiple small-scale event slice verification problems, laying the foundation for subsequent incremental verification.

[0045] Traditional formal verification requires re-verifying the entire log each time, which cannot meet the requirements of online real-time verification in substations. The core idea of ​​incremental verification algorithms is to utilize the verification results of the previous slice, verifying only the newly added events in the current slice, without re-verifying all historical events. This step assigns an independent verification context to each event slice, containing the verification state and results of the previous slice. When verifying the current slice, verification is performed directly based on the state of the previous context, only processing the newly added events within the current slice. The time complexity of this verification method is linearly related to the number of new events, achieving millisecond-level verification latency, fully meeting the requirements of online real-time verification in substations.

[0046] When an event slice fails validation, it indicates the presence of an event violating timing constraints within that slice. This step starts from the failed validation state and traverses the dependency edges and state transition paths of the abstract syntax tree in reverse, gradually tracing back to the earliest event causing the validation failure. Ultimately, it locates the minimum set of events; specifically, removing any event from this set will allow validation to pass. The minimum set of events represents the root cause of the timing violation, eliminating all irrelevant events. Next, this step examines the complete context of this minimum set of events in the chained event log, concatenating related events in timestamp order to form a complete target event sequence. This clearly presents the complete process of the timing violation, providing a precise basis for subsequent control action generation.

[0047] Furthermore, the step of detecting the complete context of the minimum event set in the chained event log, and then concatenating it into the target event sequence according to the order of event occurrence, includes: Each event in the minimum event set is mapped to a corresponding syntax node in the linear temporal logic sequence, and the semantic role of each event is determined based on the syntax node correspondence. Based on the semantic role of each event and its corresponding time interval, the time interval is bidirectionally expanded in the chained event log, and all expanded time intervals are merged to generate a complete context time window. All events within the context time window in the chained event log are detected and sorted in ascending order according to globally unique timestamps to generate the target event sequence.

[0048] It's important to note that each event in the minimal event set corresponds to a specific syntax node in the abstract syntax tree, and different syntax nodes represent different logical semantics. This step maps each event in the minimal event set to its corresponding syntax node, determining the semantic role of each event based on the type and position of the syntax node. Examples include triggering events (the initial event causing a violation), violation events (the core event violating timing constraints), result events (the consequence events caused by the violation), and conditional events (the preconditions for the violation). Through semantic role identification, the role of each event in timing violations can be clearly understood, providing semantic support for subsequent context expansion and control action generation.

[0049] The minimum event set only contains the core events that caused the violation, lacking sufficient contextual information to comprehensively analyze the causes and impacts of the violation. This step expands the corresponding time interval bidirectionally according to the semantic role of each event: for triggering events, a certain time window is expanded forward to obtain the power grid state and device state before the trigger; for resulting events, a certain time window is expanded backward to obtain the system response after the violation; then all expanded time intervals are merged to generate a complete contextual time window. This time window covers the entire process of the timing violation from occurrence to completion, providing comprehensive contextual information.

[0050] This step extracts all events within the context time window from the chained event log, including the core event from the minimum event set and other relevant context events. Then, it sorts these events in ascending order according to globally unique microsecond-level timestamps, ensuring the order of events perfectly matches the actual order of occurrence. The resulting target event sequence not only contains the core event that caused the timing violation but also all relevant context events before and after the violation, fully reconstructing the entire process of the timing violation. This provides comprehensive and accurate information support for subsequent root cause analysis and control action generation.

[0051] Furthermore, the step of parsing the target event sequence to detect the corresponding target control action includes: The target event sequence is mapped to the corresponding counterexample proof tree generated during the verification process of the linear time-series logic sequence, and a corresponding proof tree node identifier is assigned to each event in the target event sequence. A target event sequence with logical semantic annotation is generated based on the proof tree node identifier. Using the target event sequence with logical semantic annotation as input, a temporal logic repair algorithm is used to generate a minimum logical correction set. Based on the action node identifiers corresponding to each correction in the minimum logical correction set, the corresponding relay protection device and functional module are located to convert the logical correction into the corresponding control action primitive. The execution order of each control action primitive is arranged according to the dependency relationship of the logical correction, and the target control action is generated accordingly.

[0052] It's important to note that during the linear sequential logic verification process, when verification fails, a corresponding counterexample proof tree is generated. This proof tree fully records the logical derivation process of the verification failure, with each node corresponding to a logical proposition or event. This step maps each event in the target event sequence to a corresponding node in the counterexample proof tree, assigning a unique proof tree node identifier to each event. Then, based on the logical semantics of the proof tree nodes, logical semantic annotations are added to each event in the target event sequence, such as which temporal constraint the event violated and its position in the logical derivation. In this way, a target event sequence with logical semantic annotations is generated, transforming the original physical event sequence into a semantic sequence with logical meaning, providing clear guidance for subsequent logical corrections.

[0053] Relay protection systems are the core of power system safety. Any logical modifications must adhere to the principle of minimal alteration to avoid introducing new risks. The timing logic repair algorithm is specifically designed to correct timing logic formulas. It finds the minimum set of logical modifications while maintaining the correctness of the original logic, ensuring the corrected logic eliminates counterexamples. This step takes a semantically labeled sequence of target events as input and uses the timing logic repair algorithm to automatically search for all possible logic correction schemes. Then, it selects the scheme with the least modification as the minimum logic correction set. The minimum logic correction set only modifies the core logic causing the timing violation, without affecting other normal protection logic, thus minimizing the risk of control actions.

[0054] As the "first line of defense" in the power system, the correctness of the relay protection system's logic directly affects the safe and stable operation of the power grid. Any logical modification may introduce unknown risks. Therefore, the "principle of minimum modification" is an ironclad rule that must be strictly followed when modifying relay protection logic. This principle is not simply about "modifying as little code as possible," but rather a complete methodology based on power system safety risk management. Its core objective is to minimize the new risks introduced by logic modifications while solving existing problems. The principle of minimum modification first emphasizes that modifications should not be made unless absolutely necessary. Any logical modification carries the risk of introducing new defects. Therefore, logical modifications are only permitted when the existing logic has clear and verifiable safety hazards that cannot be resolved through non-logical modifications such as parameter adjustment or operational mode optimization. Optimizations or redundant logic cleanup that do not affect the correctness of protection functions are, in principle, prohibited.

[0055] Based on this, the principle requires minimal changes, modifying only logic branches and variables directly related to timing violations, and absolutely avoiding any involvement of other normal protection modules. For example, if there is a timing problem with the action of distance protection segment I, no logic for segment II, segment III, or zero-sequence protection should be modified. Local variables and private logic should be modified first, and modifications to global variables or public functions shared by multiple modules are prohibited. Simultaneously, the degree of modification must also be minimized, selecting modification methods in order of increasing risk. Parameter adjustments that cause the least disruption to the original logic should be prioritized, followed by fine-tuning of logic conditions and timing operators. Only when the above methods fail to resolve the problem are adjustments to the combination order of sub-formulas or the addition of new logic branches permitted. The modified logic must also meet the principle of semantic consistency, meaning that its behavior is completely consistent with the original logic in all originally correct operating scenarios. Corrections should only eliminate erroneous scenarios, not change the output results of correct scenarios. In addition, logic modifications must not significantly increase the amount of computation or extend the action time, ensuring that the modified protection action time still meets the stability requirements of the power grid. All logic changes must be fully documented and reversible, and can be quickly rolled back to the stable version before the modification within 10 minutes. Furthermore, the modification should prioritize adding constraints rather than deleting constraints, because adding constraints will only limit the scope of protection action and will not increase the possibility of false operation.

[0056] The timing logic repair algorithm, as an automatic correction technique based on formal methods, aims to efficiently and safely resolve timing logic violations in relay protection systems while strictly adhering to the principle of minimal modification. The operational logic of relay protection is essentially timing logic, describing the temporal sequence and constraints of events. The core objective of the timing logic repair algorithm is to find a corrected formula that minimizes the difference from the original formula, given the original timing logic formula and a set of counterexamples. This corrected formula eliminates all counterexamples while preserving the correctness of all original positive examples. The algorithm uses linear timing logic as a unified modeling language because it is well-suited for describing event sequences in linear time, closely matching the operational process of relay protection. It represents the operation of the power system as a discrete-time state sequence, where each state corresponds to the system state at a specific moment, including the values ​​of all relevant analog quantities, switching quantities, and event flags. The semantically labeled target event sequence is a set of state trajectories marked with "positive examples / counterexamples."

[0057] The core of the algorithm is a counterexample-driven error localization mechanism. By analyzing the counterexample trajectories of temporal violations, it accurately locates the root cause of errors in the original logic. This process is based on model checking technology. After the original linear temporal logic formula and the counterexample trajectory are input into the model checker, the model checker verifies state by state whether the original formula satisfies the counterexample trajectory, finds the first invalid sub-formula and its corresponding state position, and then performs root cause analysis based on the violation type of the counterexample. For example, refusal to move is usually due to overly strict conditions or lack of triggering conditions in the original formula, while erroneous move is usually due to overly broad conditions or lack of locking conditions in the original formula. For the located erroneous sub-formula, the algorithm generates all possible candidate correction schemes from a predefined set of correction operations. Common correction operations include parameter correction, atomic proposition correction, temporal operator correction, and logic structure correction. To avoid an explosion in the number of candidate schemes, the algorithm adopts a heuristic pruning strategy, prioritizing the generation of correction operations with low risk levels, excluding obviously contradictory combinations, and limiting the number of correction operations. Each candidate correction scheme must undergo a two-dimensional correctness verification. First, it verifies whether the candidate scheme can satisfy all negative example trajectories. Second, it verifies whether the candidate scheme still satisfies all original positive example trajectories. This step is a crucial guarantee for the algorithm's safety, ensuring that the corrected logic solves the existing problem without destroying the original correct functionality. Finally, the algorithm quantifies the degree of difference between each candidate scheme and the original formula using a risk-weighted modification cost function. The weights of different types of modifications in the cost function are set according to the risk characteristics of relay protection. Modifying parameters has the lowest risk and the smallest cost, while modifying the logic structure has the highest risk and the largest cost. The algorithm calculates the total cost of each candidate scheme and selects the one with the smallest cost as the optimal correction scheme.

[0058] The temporal logic repair algorithm has a strict and standardized process for processing semantically labeled target event sequences. The semantically labeled target event sequences are the core input of the algorithm; each sequence contains a timestamp, event type, attribute value, and semantic label. The processing flow begins with preprocessing and formal transformation of the target event sequences. The algorithm parses the input event sequences, filtering out invalid, duplicate, or timestamp-inconsistent events, and completing missing attribute values. Then, it converts the continuous-time event sequences into discrete-time state trajectories, typically with 1ms as a time step, meeting the time accuracy requirements of relay protection. Simultaneously, the semantic labels of the sequences are transformed into formal verification conditions: positive examples are marked as "must satisfy the original formula," and negative examples are marked as "must not satisfy the original formula, and must satisfy the modified formula," with a violation type label attached. Next, the algorithm loads the original relay protection logic to be modified, converts it into a standard linear sequential logic formula, and constructs an abstract syntax tree of the original formula. The formula is decomposed into sub-formulas, atomic propositions, sequential operators and parameters, and a unique index is assigned to each node. At the same time, static analysis is performed on the original formula to extract all variable dependencies and influence ranges, providing a basis for subsequent modification range assessment.

[0059] In the violation localization and root cause analysis phase of counterexample trajectories, the algorithm verifies the original linear temporal logic formula using a model checker for each counterexample trajectory, locating the non-compliant sub-formula nodes and their corresponding state positions. Combining the violation type of the counterexample with the structure of the original formula, it performs root cause analysis from multiple dimensions, including the time parameters of temporal operators, the threshold of atomic propositions, the correctness of logical connectors, and whether necessary locking or triggering conditions are missing. A violation report is generated, listing all violation points, corresponding sub-formulas, and possible root causes. Subsequently, for each violation point and root cause, the algorithm generates all possible single-step correction operations from a predefined set of correction operations and combines these operations to generate multi-step correction schemes. Simultaneously, a heuristic pruning strategy is used to eliminate unreasonable schemes. The pruned candidate schemes undergo multi-dimensional correctness screening. First, counterexample exclusion verification is performed, eliminating schemes that cannot exclude all counterexamples. Then, positive example retention verification is performed, eliminating schemes that introduce new errors. Finally, boundary condition verification is performed to ensure that the logic remains correct under extreme conditions such as fault thresholds, action time thresholds, and fault transition scenarios between inside and outside the region. Candidate solutions that pass the correctness screening will enter the risk-weighted minimum modification evaluation stage. The algorithm will load a predefined risk-weighted cost function, traverse the abstract syntax tree of each candidate solution, count the number of modifications of different types, calculate the total modification cost of each solution, and sort them in ascending order of cost. For solutions with the same cost, the algorithm will further evaluate their impact range and verification difficulty, and select the optimal solution. Finally, the algorithm will compare the abstract syntax tree of the optimal candidate solution with the abstract syntax tree of the original formula, extract all modification points, generate a minimum logical correction set containing the modification location, modification type, modification content, modification reason, and verification result, and output the corrected linear timing logic formula and correction set report for relay protection engineers to review and implement.

[0060] The timing logic repair algorithm transforms relay protection logic modification from "human experience-driven" to "data-driven + formal verification" through a formal approach, perfectly aligning with all requirements of the principle of minimal modification. It not only accurately pinpoints the root cause of timing violations and automatically generates all possible correction schemes, but also ensures, through rigorous correctness verification and risk-weighted assessment, that the final selected scheme represents the least modification and lowest risk. The application of this algorithm will significantly improve the efficiency and correctness of relay protection logic modification, reduce grid security risks caused by human error, and provide a more solid guarantee for the safe and stable operation of the power system.

[0061] This step locates the corresponding relay protection device and functional module based on the proof tree node identifier corresponding to each correction in the minimum logical correction set, such as the setting parameter area, logic execution module, and communication module of the protection device. Then, the abstract logical corrections (such as adjusting time parameters or modifying trigger conditions) are transformed into control action primitives executable by the device, such as "modify the overcurrent stage I action delay to 120ms" or "add a bus differential action signal to the trigger condition of the blocking outgoing line protection." Finally, based on the dependencies between logical corrections, the execution order of the control action primitives is arranged to ensure that the preceding corrections are executed first, followed by subsequent corrections. The final generated target control action is a series of standardized instructions that can be directly issued to the protection device for execution, with clearly defined execution objects, execution content, and execution order.

[0062] Furthermore, the step of generating the corresponding control path and control object adapted to the target control action includes: The target control action is parsed to determine the target object type, execution permission, and timing dependency relationship, so as to construct the corresponding control action dependency graph based on the pre-dependency relationship and cross-device cooperation relationship between control actions; Perform a shortest path search with resource constraints on the control action dependency graph to identify all control action pairs with resource conflicts, and adjust the execution time window of the control action pairs accordingly to generate an initial control path that satisfies all temporal dependencies and resource constraints. The execution units corresponding to each control action in the control action dependency graph are detected, and each execution unit is integrated into the internal part of the initial control path to generate the control path and control object of the target control action.

[0063] It's important to note that each target control action has a clearly defined target object type (e.g., protection device, circuit breaker, monitoring system), execution authority (e.g., local execution, remote execution, manual confirmation required), and temporal dependencies (e.g., action A can only be executed after action B has been completed). This step first parses these attributes of all target control actions, and then constructs a control action dependency graph using control actions as nodes and directed edges representing prerequisite dependencies and cross-device coordination relationships between actions. The dependency graph clearly presents the dependencies between all control actions; any violation of the execution order of dependencies will lead to control action failure or adverse consequences.

[0064] Substation control resources are limited, such as communication bandwidth, device processing capacity, and operating power. Simultaneous execution of multiple control actions can lead to resource conflicts; for example, if two control actions simultaneously issue commands to the same device, it can cause the device to time out. This step performs a shortest path search with resource constraints on the control action dependency graph. During the search, all resource constraints are considered, and all pairs of control actions with resource conflicts are identified. Then, by adjusting the execution time windows of the conflicting action pairs, their execution times are staggered to eliminate resource conflicts. Finally, an initial control path that satisfies all temporal dependencies and resource constraints is generated, which clarifies the execution time and order of each control action.

[0065] This step identifies the corresponding execution unit based on the target object of each control action, such as the communication interface of the protection device, the operating mechanism of the circuit breaker, or the human-machine interface of the monitoring system. Then, the information of these execution units is integrated into the initial control path, specifying the concrete execution unit and communication path for each control action. Finally, a complete target control path and control object list are generated. The control path clarifies the execution sequence, execution time, communication path, and resource allocation of all control actions, while the control object list clarifies the specific execution unit for each control action. This scheme can be directly deployed to the substation's monitoring system for execution, ensuring that all control actions are completed safely, accurately, and orderly, achieving adaptive control of the relay protection device.

[0066] Please see Figure 2 The third embodiment of the present invention provides: An adaptive control system for a substation relay protection device, wherein the system comprises: The module is used to detect the type identifier, data structure, triggering conditions and timing constraints of various relay protection events in the substation, so as to convert the action logic, blocking logic and coordination logic of the relay protection device into the corresponding linear timing logic sequence, and construct the mapping relationship between the linear timing logic sequence and the relay protection event. The detection module is used to detect status change events of various relay protection devices, power grid operation events, and manual operation events in the substation, and assigns a globally unique event identifier and timestamp to each event to construct an immutable chain event log in the order of events. The chain event log stores the original data and context information of all events. The verification module is used to perform verification processing based on the mapping relationship, taking the chained event log as input, and the linear temporal logic sequence to identify the target event sequence that violates the temporal constraints. The parsing module is used to parse and process the target event sequence to detect the corresponding target control action and generate a control path and control object that are adapted to the target control action.

[0067] Furthermore, the building module is specifically used for: The internal logic of the relay protection device is divided into a hardware driver layer, a firmware execution layer, and a protection application layer according to the execution level, and an independent finite state machine is constructed for each level. Each state transition rule of each finite state machine is labeled with preconditions and postconditions, and the preconditions and postconditions are converted into atomic propositions of linear sequential logic. Corresponding temporal contracts are defined for the input and output events between adjacent finite state machines. The temporal contracts include constraints on the order of time occurrence, time interval constraints, and triggering condition constraints. Based on the atomic proposition and the temporal contract, a linear temporal logic subsequence adapted to the finite state machine is generated, and the linear temporal logic subsequences at each level are nested and combined according to the hierarchical dependency relationship to generate the corresponding linear temporal logic sequence.

[0068] Furthermore, the building module is specifically used for: Perform a Cartesian product operation on the state set of the finite state machine and the state set of the temporal contract to generate a product state set. Synchronously combine the state transitions of the finite state machine and the state transitions of the temporal contract according to the input and output events to generate a product transition set. Generate a corresponding product finite state machine based on the product state set and the product transition set. The Hopcroft algorithm is used to perform state equivalence class partitioning on the product finite state machine, and equivalent regular expressions are generated based on the partitioning results. The regular expression is fused with the atomic proposition to generate a corresponding combined expression. The combined expression is then sorted according to the execution priority of the protection logic to generate the corresponding linear sequential logic subsequence.

[0069] Furthermore, the verification module is specifically used for: The linear sequential logic sequence is parsed to generate the corresponding abstract syntax tree, and atomic proposition nodes in the abstract syntax tree are detected. Based on the mapping relationship between the atomic proposition nodes and the relay protection event, the chain event log is semantically filtered, and the filtered chain event log is segmented to generate several event slices. Each event slice is assigned an independent verification context, and each event slice is verified sequentially based on an incremental verification algorithm, so as to determine whether each event slice meets the preset requirements based on the verification results. If it is determined that an event slice does not meet the preset requirements, the dependency edges and state transition trajectories of the abstract syntax tree are traversed in reverse to locate the minimum set of events that cause the verification to fail, and the complete context of the minimum set of events in the chained event log is detected accordingly, so as to splice the events into the target event sequence according to the order of occurrence.

[0070] Furthermore, the verification module is specifically used for: Each event in the minimum event set is mapped to a corresponding syntax node in the linear temporal logic sequence, and the semantic role of each event is determined based on the syntax node correspondence. Based on the semantic role of each event and its corresponding time interval, the time interval is bidirectionally expanded in the chained event log, and all expanded time intervals are merged to generate a complete context time window. All events within the context time window in the chained event log are detected and sorted in ascending order according to globally unique timestamps to generate the target event sequence.

[0071] Furthermore, the parsing module is specifically used for: The target event sequence is mapped to the corresponding counterexample proof tree generated during the verification process of the linear time-series logic sequence, and a corresponding proof tree node identifier is assigned to each event in the target event sequence. A target event sequence with logical semantic annotation is generated based on the proof tree node identifier. Using the target event sequence with logical semantic annotation as input, a temporal logic repair algorithm is used to generate a minimum logical correction set. Based on the action node identifiers corresponding to each correction in the minimum logical correction set, the corresponding relay protection device and functional module are located to convert the logical correction into the corresponding control action primitive. The execution order of each control action primitive is arranged according to the dependency relationship of the logical correction, and the target control action is generated accordingly.

[0072] Furthermore, the parsing module is specifically used for: The target control action is parsed to determine the target object type, execution permission, and timing dependency relationship, so as to construct the corresponding control action dependency graph based on the pre-dependency relationship and cross-device cooperation relationship between control actions; Perform a shortest path search with resource constraints on the control action dependency graph to identify all control action pairs with resource conflicts, and adjust the execution time window of the control action pairs accordingly to generate an initial control path that satisfies all temporal dependencies and resource constraints. The execution units corresponding to each control action in the control action dependency graph are detected, and each execution unit is integrated into the internal part of the initial control path to generate the control path and control object of the target control action.

[0073] The fourth embodiment of the present invention provides a computer, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the adaptive control method for substation relay protection devices as described above.

[0074] The fifth embodiment of the present invention provides a readable storage medium storing a computer program thereon, wherein the program, when executed by a processor, implements the adaptive control method for substation relay protection devices as described above.

[0075] In summary, the adaptive control method and system for substation relay protection devices provided in the above embodiments of the present invention can quickly identify abnormal event sequences that violate timing constraints through linear timing logic verification, and accurately analyze and generate corresponding control paths and control objects, clearly clarifying the causal relationship of control actions, and significantly improving the control efficiency and accuracy of abnormal handling of relay protection devices.

[0076] It should be noted that the above modules can be functional modules or program modules, and can be implemented through software or hardware. For modules implemented through hardware, the above modules can reside in the same processor; or the above modules can be located in different processors in any combination.

[0077] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-including system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device.

[0078] More specific examples of computer-readable media (a non-exhaustive list) include: electrical connections (electronic devices) having one or more wires, portable computer disk drives (magnetic devices), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Furthermore, computer-readable media can even be paper or other suitable media on which the program can be printed, because the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in computer memory.

[0079] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0080] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0081] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the appended claims.

Claims

1. An adaptive control method for a substation relay protection device, characterized in that, The method includes: The system detects the type identifiers, data structures, triggering conditions, and timing constraints of various relay protection events within the substation, so as to transform the action logic, interlocking logic, and coordination logic of the relay protection device into corresponding linear timing logic sequences, and constructs a mapping relationship between the linear timing logic sequences and the relay protection events. The system detects status change events of various relay protection devices, power grid operation events, and manual operation events within the substation, and assigns a globally unique event identifier and timestamp to each event to construct an immutable chain event log in chronological order of events. The chain event log stores the original data and context information of all events. Based on the mapping relationship, the chained event log is used as input, and the linear time-series logic sequence is used for verification processing to identify the target event sequence that violates the time-series constraints. The target event sequence is parsed and processed to detect the corresponding target control action, and a control path and control object adapted to the target control action are generated accordingly.

2. The adaptive control method for substation relay protection devices according to claim 1, characterized in that, The steps of detecting the type identifiers, data structures, triggering conditions, and timing constraints of various relay protection events within the substation, and then converting the action logic, interlocking logic, and coordination logic of the relay protection device into corresponding linear timing logic sequences, include: The internal logic of the relay protection device is divided into a hardware driver layer, a firmware execution layer, and a protection application layer according to the execution level, and an independent finite state machine is constructed for each level. Each state transition rule of each finite state machine is labeled with preconditions and postconditions, and the preconditions and postconditions are converted into atomic propositions of linear sequential logic. Corresponding temporal contracts are defined for the input and output events between adjacent finite state machines. The temporal contracts include constraints on the order of time occurrence, time interval constraints, and triggering condition constraints. Based on the atomic proposition and the temporal contract, a linear temporal logic subsequence adapted to the finite state machine is generated, and the linear temporal logic subsequences at each level are nested and combined according to the hierarchical dependency relationship to generate the corresponding linear temporal logic sequence.

3. The adaptive control method for substation relay protection devices according to claim 2, characterized in that, The step of generating a linear temporal logic subsequence adapted to the finite state machine based on the atomic proposition and the temporal contract includes: Perform a Cartesian product operation on the state set of the finite state machine and the state set of the temporal contract to generate a product state set. Synchronously combine the state transitions of the finite state machine and the state transitions of the temporal contract according to the input and output events to generate a product transition set. Generate a corresponding product finite state machine based on the product state set and the product transition set. The Hopcroft algorithm is used to perform state equivalence class partitioning on the product finite state machine, and equivalent regular expressions are generated based on the partitioning results. The regular expression is fused with the atomic proposition to generate a corresponding combined expression. The combined expression is then sorted according to the execution priority of the protection logic to generate the corresponding linear sequential logic subsequence.

4. The adaptive control method for substation relay protection devices according to claim 1, characterized in that, The step of identifying target event sequences that violate timing constraints based on the mapping relationship, using the chained event log as input, and performing verification processing through the linear temporal logic sequence includes: The linear sequential logic sequence is parsed to generate the corresponding abstract syntax tree, and atomic proposition nodes in the abstract syntax tree are detected. Based on the mapping relationship between the atomic proposition nodes and the relay protection event, the chain event log is semantically filtered, and the filtered chain event log is segmented to generate several event slices. Each event slice is assigned an independent verification context, and each event slice is verified sequentially based on an incremental verification algorithm, so as to determine whether each event slice meets the preset requirements based on the verification results. If it is determined that an event slice does not meet the preset requirements, the dependency edges and state transition trajectories of the abstract syntax tree are traversed in reverse to locate the minimum set of events that cause the verification to fail, and the complete context of the minimum set of events in the chained event log is detected accordingly, so as to splice the events into the target event sequence according to the order of occurrence.

5. The adaptive control method for substation relay protection devices according to claim 4, characterized in that, The step of detecting the complete context of the minimum event set in the chained event log, and then concatenating it into the target event sequence according to the order of event occurrence, includes: Each event in the minimum event set is mapped to a corresponding syntax node in the linear temporal logic sequence, and the semantic role of each event is determined based on the syntax node correspondence. Based on the semantic role of each event and its corresponding time interval, the time interval is bidirectionally expanded in the chained event log, and all expanded time intervals are merged to generate a complete context time window. All events within the context time window in the chained event log are detected and sorted in ascending order according to globally unique timestamps to generate the target event sequence.

6. The adaptive control method for substation relay protection devices according to claim 1, characterized in that, The step of parsing the target event sequence to detect the corresponding target control action includes: The target event sequence is mapped to the corresponding counterexample proof tree generated during the verification process of the linear time-series logic sequence, and a corresponding proof tree node identifier is assigned to each event in the target event sequence. A target event sequence with logical semantic annotation is generated based on the proof tree node identifier. Using the target event sequence with logical semantic annotation as input, a temporal logic repair algorithm is used to generate a minimum logical correction set. Based on the action node identifiers corresponding to each correction in the minimum logical correction set, the corresponding relay protection device and functional module are located to convert the logical correction into the corresponding control action primitive. The execution order of each control action primitive is arranged according to the dependency relationship of the logical correction, and the target control action is generated accordingly.

7. The adaptive control method for substation relay protection devices according to claim 1, characterized in that, The steps of generating a control path and a control object that are adapted to the target control action include: The target control action is parsed to determine the target object type, execution permission, and timing dependency relationship, so as to construct the corresponding control action dependency graph based on the pre-dependency relationship and cross-device cooperation relationship between control actions; Perform a shortest path search with resource constraints on the control action dependency graph to identify all control action pairs with resource conflicts, and adjust the execution time window of the control action pairs accordingly to generate an initial control path that satisfies all temporal dependencies and resource constraints. The execution units corresponding to each control action in the control action dependency graph are detected, and each execution unit is integrated into the internal part of the initial control path to generate the control path and control object of the target control action.

8. An adaptive control system for a substation relay protection device, characterized in that, The system includes: The module is used to detect the type identifier, data structure, triggering conditions and timing constraints of various relay protection events in the substation, so as to convert the action logic, blocking logic and coordination logic of the relay protection device into the corresponding linear timing logic sequence, and construct the mapping relationship between the linear timing logic sequence and the relay protection event. The detection module is used to detect status change events of various relay protection devices, power grid operation events, and manual operation events in the substation, and assigns a globally unique event identifier and timestamp to each event to construct an immutable chain event log in the order of events. The chain event log stores the original data and context information of all events. The verification module is used to perform verification processing based on the mapping relationship, taking the chained event log as input, and the linear temporal logic sequence to identify the target event sequence that violates the temporal constraints. The parsing module is used to parse and process the target event sequence to detect the corresponding target control action and generate a control path and control object that are adapted to the target control action.

9. A computer comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the adaptive control method for substation relay protection devices as described in any one of claims 1 to 7.

10. A readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the adaptive control method for substation relay protection devices as described in any one of claims 1 to 7.

Images