Intelligent comprehensive edge solution gateway system and data processing method thereof

Abstract

The application relates to an intelligent comprehensive edge solution gateway system and a data processing method thereof, which comprises the following steps: a multi-source data acquisition module is used for accessing digital communication signals and analog sensing signals and outputting heterogeneous data; an edge preprocessing unit is used for generating engineering quantity data; an edge solution engine is used for performing real-time feature extraction and evolution determination on the engineering quantity data to generate state feature data; a local trigger controller is used for driving a physical output interface to perform a response action; and a cloud interaction management module is used for uploading the state feature data and a response action record, and receiving an algorithm configuration instruction and a parameter threshold update package; in summary, the local edge processing module is used for realizing data synchronization, feature extraction and local triggering, the real-time bottleneck and network dependence problems can be solved, the data processing real-time performance is improved, the network bandwidth occupation is reduced, the local decision-making capability is enhanced, and the dependence on cloud decision-making is reduced.

Description

Technical Field

[0001] This application relates to the technical field of industrial data processing, and in particular to an intelligent integrated edge computing gateway system and its data processing method. Background Technology

[0002] With the rapid development of Industrial Internet and intelligent manufacturing technologies, the demand for real-time monitoring, accurate evaluation, and closed-loop control of production processes in industrial settings is increasing. As the core connecting underlying physical devices and upper-level cloud platforms, the industrial gateway's function has evolved from traditional data routing to edge intelligent terminals with deep data processing and autonomous decision-making capabilities. In key areas such as power system monitoring, high-end equipment vibration analysis, and precision manufacturing, the synchronization accuracy of physical quantity acquisition, the immediacy of data feature extraction, and the millisecond-level response capability of feedback control in industrial settings have become crucial elements for measuring the level of intelligence.

[0003] Currently, the transparent data gateways or basic data acquisition units widely used in industrial sites are essentially designed to build a transparent data channel. They simply unpack and reconstruct the raw analog signals, pulse signals, or digital messages based on fieldbus protocols such as Modbus-RTU and CAN from the sensor output, and then upload the entire raw data to the central server via Ethernet or wireless link. While this existing architecture reduces front-end hardware costs and simplifies device networking in the early stages, its inherent defects are becoming increasingly apparent in complex industrial scenarios: First, the data processing link of the existing architecture has a serious real-time bottleneck. The raw data must go through a lengthy closed loop of edge acquisition, network transmission, cloud queuing, algorithm processing, and command issuance. Affected by network bandwidth fluctuations, routing jitter, and server concurrency latency, the total system response time often reaches hundreds of milliseconds to seconds. Furthermore, it is not suitable for instantaneous overload protection caused by high-frequency vibrations. In time-sensitive scenarios such as capturing abnormal trends in precision bearings, such delays can easily lead to control failures, causing equipment damage or production accidents. Secondly, in terms of resource utilization, the massive amounts of raw signals generated by industrial sensors contain a large amount of redundant information without feature increments. Forcing full uploads not only wastes communication network bandwidth but also results in low-value data being stored in the cloud, significantly increasing maintenance costs. Thirdly, the existing architecture suffers from significant fragmentation of functional modules. Acquisition, measurement, feature extraction, and logic triggering functions are scattered across independent hardware entities, such as dedicated acquisition cards, host computers, and PLCs. This not only increases the complexity of on-site wiring but may also introduce difficult-to-correct data alignment errors due to clock asynchrony and protocol compatibility issues between multiple devices. Furthermore, the existing architecture is highly dependent on the network environment. Once the communication link is interrupted, the edge side will completely lose its ability to monitor anomalies and trigger protection, creating a security blind spot in offline conditions. Summary of the Invention

[0004] To address the aforementioned shortcomings, this application provides an intelligent integrated edge computing gateway system and its data processing method.

[0005] The above-mentioned objective of this application is achieved through the following technical solution:

[0006] A smart integrated edge computing gateway system, comprising:

[0007] The multi-source data acquisition module is used to access digital communication signals and analog sensing signals output from the field device layer through multiple physical interfaces and output heterogeneous data. The physical interfaces include RS485 interface, CAN bus interface, analog input interface and GPIO interface.

[0008] An edge preprocessing unit is connected to the multi-source data acquisition module. The edge preprocessing unit is equipped with data synchronization alignment logic and signal cleaning filter, which are used to perform time-domain reconstruction, noise reduction conditioning and data conversion on heterogeneous data acquired from the multi-source data acquisition module to generate engineering quantity data.

[0009] An edge calculation engine is connected to the edge preprocessing unit via an on-chip bus. The edge calculation engine has a pre-set calculation algorithm library including a frequency domain transformation module, a feature value extraction module, and a trend prediction module, which is used to perform real-time feature extraction and evolution determination on engineering quantity data and generate state feature data characterizing the operating status of the equipment.

[0010] A local trigger controller is connected to the edge computing engine. The local trigger controller is equipped with a threshold comparison matrix and a logic action executor, which is used to compare the state feature data with a preset security threshold and drive the physical output interface to execute the corresponding response action according to the comparison result.

[0011] The cloud-based interaction management module establishes an encrypted connection with the cloud platform to upload status feature data and response action records, and to receive algorithm configuration instructions and parameter threshold update packages issued by the cloud platform.

[0012] The second objective of this invention is achieved through the following technical solution:

[0013] A data processing method for an intelligent integrated edge computing gateway system includes the following steps:

[0014] The system writes the sampling frequency, range, engineering quantity conversion coefficient, and edge calculation algorithm model to be called for each acquisition channel to the internal register through the configuration interface, and presets the logic trigger threshold, alarm level, and local execution strategy in the non-volatile memory.

[0015] The system acquires raw data from the target site in parallel through an analog-to-digital converter cluster, a serial communication controller, and a bus controller. The raw data is then timestamped by a preset clock management unit to obtain heterogeneous data, which includes continuous analog signals, discrete digital messages, and level states.

[0016] The edge preprocessing unit extracts the original bit stream and performs integrity verification. It then uses a signal cleaning filter to denoise the original waveform in real time and converts the heterogeneous data into engineering quantity data based on a preset scaling factor and nonlinear compensation logic, storing it in a high-speed ring buffer.

[0017] The edge processing engine extracts engineering quantity data from the high-speed ring buffer, performs windowing processing and fast Fourier transform through the frequency domain transformation module to extract harmonic components, and calculates statistical indicators within the data window through the feature value extraction module to form state feature data.

[0018] The local trigger controller acquires status feature data and inputs it into a threshold comparison matrix. If the feature parameters of the status feature data meet the preset trigger logic, a control command sequence is generated, which drives the actuator at the target site through the physical output interface to achieve edge-side closed-loop protection.

[0019] The cloud-based interactive management module encapsulates the status feature data and response action records into a lightweight protocol and sends them to the cloud platform. When the network is unstable, it uses a breakpoint resume strategy to temporarily store the data in local flash memory. Once the external communication network connection is restored, the temporarily stored data is resent sequentially based on the timestamp order.

[0020] During stable device operation, the cloud-based interactive management module performs dynamic downsampling to filter redundant data. Before and after a local trigger action, it automatically extracts raw waveform data of a preset length, compresses and uploads it, and continuously monitors algorithm configuration commands issued by the cloud platform to enable online upgrades of functions.

[0021] In summary, the intelligent integrated edge computing gateway system and data processing method provided in this application realize data synchronization, feature extraction and local triggering through a local edge processing module, which can solve the problems of real-time bottleneck and network dependence. It has the effects of improving the real-time performance of data processing, reducing network bandwidth consumption, enhancing local decision-making capabilities and reducing dependence on cloud decision-making. Attached Figure Description

[0022] Figure 1 This is a system framework diagram of an embodiment of an intelligent integrated edge computing gateway system according to this application;

[0023] Figure 2 This is a flowchart of an implementation of a data processing method for an intelligent integrated edge computing gateway system according to this application. Detailed Implementation

[0024] The following is in conjunction with the appendix Figures 1-2 This application will be described in further detail.

[0025] In one embodiment, such as Figure 1 As shown, this application discloses an intelligent integrated edge computing gateway system, specifically including:

[0026] The multi-source data acquisition module is used to access digital communication signals and analog sensing signals output from the field device layer through multiple physical interfaces and output heterogeneous data. The physical interfaces include RS485 interface, CAN bus interface, analog input interface and GPIO interface.

[0027] In this embodiment, the multi-source data acquisition module is used to acquire raw data of different types and formats from the field device layer, including digital communication signals and analog sensing signals. It connects with various industrial sensing devices and controllers through multiple physical interfaces and outputs the acquired raw data as heterogeneous data. Heterogeneous data refers to a set of raw data acquired from different sources and through different protocols or formats. Heterogeneous data may have different sampling frequencies, data structures and physical meanings, such as analog voltage signals from temperature sensors, Modbus digital messages from PLCs and switching signals from limit switches.

[0028] Specifically, the multi-source data acquisition module is used to access digital communication signals and analog sensing signals output from the field device layer and output heterogeneous data. This module can be configured to include various physical interfaces. For example, it can use an RS485 interface chip based on a universal asynchronous transceiver to exchange data with sensors or PLCs supporting the Modbus protocol; it can use a standard CAN controller chip to receive differential signal streams from vehicle or industrial control networks; it can use a multi-channel analog-to-digital converter as an analog input interface to acquire voltage or current signals; and it can use general-purpose input / output ports to acquire switching signals or pulse signals. Through these interfaces, the multi-source data acquisition module can aggregate raw data from different types of field devices to form a heterogeneous data stream to be processed.

[0029] An edge preprocessing unit is connected to the multi-source data acquisition module. The edge preprocessing unit is equipped with data synchronization alignment logic and signal cleaning filter, which are used to perform time-domain reconstruction, noise reduction conditioning and data conversion on heterogeneous data acquired from the multi-source data acquisition module to generate engineering quantity data.

[0030] In this embodiment, the edge preprocessing unit is connected to the multi-source data acquisition module and is used to perform preliminary processing on heterogeneous data. It is equipped with data synchronization alignment logic and signal cleaning filter, and can perform time-domain reconstruction, noise reduction conditioning and data conversion operations on heterogeneous data to generate standardized engineering quantity data. Engineering quantity data refers to data with clear physical meaning and units obtained after conversion by the edge preprocessing unit, such as converting the original voltage signal into temperature value, pressure value or vibration intensity value.

[0031] Specifically, the edge preprocessing unit is connected to the multi-source data acquisition module to perform time-domain reconstruction, denoising conditioning, and data conversion on heterogeneous data to generate engineering quantity data. The edge preprocessing unit can use software timers or scheduling mechanisms provided by the operating system to timestamp and initially align data from different interfaces to achieve time-domain reconstruction. For denoising conditioning, digital filter algorithms, such as moving average filters or finite impulse response filters, can be used to filter out random noise in the original signal. For data conversion, based on a preset linear scaling factor, the original voltage or current readings can be directly converted into corresponding physical quantity values, such as converting a voltage signal into a temperature value.

[0032] An edge calculation engine is connected to the edge preprocessing unit via an on-chip bus. The edge calculation engine has a pre-set calculation algorithm library including a frequency domain transformation module, a feature value extraction module, and a trend prediction module, which is used to perform real-time feature extraction and evolution determination on engineering quantity data and generate state feature data characterizing the operating status of the equipment.

[0033] In this embodiment, the edge computing engine is connected to the edge preprocessing unit via an on-chip bus and is the core computing unit of the system. It has a pre-set computing algorithm library, including a frequency domain transformation module, a feature value extraction module, and a trend prediction module, which are used to perform real-time analysis of engineering quantity data, extract key features, and determine the evolution trend of equipment operating status, and finally generate status feature data that characterizes the equipment operating status. The status feature data refers to the key indicators extracted by the edge computing engine from the engineering quantity data that can directly reflect the health status or operating mode of the equipment, such as the specific frequency peak of the vibration spectrum, the mean and variance of the temperature, and the effective value of the current.

[0034] Specifically, the edge processing engine connects to the edge preprocessing unit via an on-chip bus to perform real-time feature extraction and evolution determination on engineering quantity data, generating state feature data characterizing the equipment's operating status. The edge processing engine can have a built-in algorithm library containing algorithm modules for signal analysis. For example, the frequency domain transformation module can use the Discrete Fourier Transform algorithm to convert time-domain signals into frequency-domain signals to analyze their frequency components; the feature extraction module can calculate statistical indicators of the engineering quantity data, such as mean, variance, maximum, and minimum values; and the trend prediction module can use a simple linear regression algorithm to fit historical data to predict future data trends.

[0035] A local trigger controller is connected to the edge computing engine. The local trigger controller is equipped with a threshold comparison matrix and a logic action executor, which is used to compare the state feature data with a preset security threshold and drive the physical output interface to execute the corresponding response action according to the comparison result.

[0036] In this embodiment, the local trigger controller is connected to the edge computing engine and is used to make local decisions and controls based on the computing results. It has a threshold comparison matrix and a logic action actuator inside, which is used to compare the state feature data with the preset safety threshold and drive the physical output interface to execute the corresponding response action according to the comparison result. The physical output interface refers to the hardware interface used by the local trigger controller to interact with the field actuator, such as the relay output terminal or pulse output terminal. Through the physical output interface, the direct control of the field equipment can be realized, such as stopping, alarming, or adjusting.

[0037] Specifically, the local trigger controller connects to the edge computing engine to compare state feature data with preset security thresholds and drive the physical output interface to execute corresponding response actions based on the comparison results. The local trigger controller includes a threshold comparison matrix, which can be a lookup table or a series of conditional statements used to directly compare the state feature data output by the computing engine with preset fixed thresholds. When the state feature data exceeds or falls below a certain threshold, the logic actuator generates corresponding control signals through the physical output interface according to preset logic. For example, the physical output interface can be a relay drive circuit to control the power supply of external devices, or a pulse generator to output pulse signals of fixed frequency or width.

[0038] The cloud-based interaction management module establishes an encrypted connection with the cloud platform to upload status feature data and response action records, and to receive algorithm configuration instructions and parameter threshold update packages issued by the cloud platform.

[0039] In this embodiment, the cloud interaction management module is used to establish an encrypted connection with the remote cloud platform to realize two-way data communication. Its main functions include uploading status feature data and local response action records to the cloud, as well as receiving algorithm configuration instructions and parameter threshold update packages issued by the cloud platform, thereby realizing remote management and function upgrade of the system.

[0040] Specifically, the cloud-based interaction management module establishes an encrypted connection with the cloud platform to upload status feature data and response action records, and to receive algorithm configuration instructions and parameter threshold update packages from the cloud platform. The cloud-based interaction management module can use a standard Transmission Control Protocol / Internet Protocol stack and establish an encrypted channel through Secure Sockets Layer (SSL) or Transport Layer Security (TLS) protocols to ensure data transmission security. Data upload can use HTTP POST requests or the MQTT protocol to send status feature data and local trigger records to the cloud. Simultaneously, the cloud-based interaction management module can periodically poll the cloud platform to check for new algorithm configuration instructions or parameter threshold update packages, and then download and apply them.

[0041] Compared to the "terminal acquisition, cloud computing" architecture commonly used in existing technologies, this system achieves deep fusion and in-situ computing of multi-source heterogeneous data at the edge. Furthermore, by generating state feature data locally through the edge computing engine, only the state feature data and key event records are uploaded to the cloud, rather than the full original waveform data. This significantly reduces the demand for communication bandwidth and the amount of redundant data stored in the cloud, effectively saving network resources and cloud operation and maintenance costs. Moreover, by highly integrating multi-source data acquisition, edge preprocessing, edge computing, and local trigger control functions into a single hardware terminal, forming a closed-loop control chain, the system avoids data alignment errors and system complexity introduced by functional module fragmentation, asynchronous clocks between multiple devices, and protocol compatibility barriers in traditional solutions. Furthermore, the presence of a local trigger controller allows the system to independently monitor and trigger protection for devices even when the external communication network is unstable or interrupted. This autonomous decision-making capability in offline mode effectively solves the problem of excessive reliance on cloud-based central decision-making in existing technologies, thereby enhancing the system robustness and security of industrial production and avoiding decision-making vacuums and potential production accidents caused by network failures.

[0042] In one embodiment, the RS485 interface uses an isolated transceiver chip, supports half-duplex differential transmission mode, and supports data polling under the Modbus-RTU protocol;

[0043] In this embodiment, the RS485 interface employs an isolated transceiver chip, designed to cut off electrical connections on the data transmission path through electrical isolation, thereby effectively blocking the propagation of ground potential differences and common-mode noise, improving the anti-interference capability of communication and the security of the system. The isolated transceiver chip can employ magnetic coupling isolation technology, such as isolators based on transformers or magnetoresistive effects, or capacitive coupling isolation technology, using high-voltage capacitors to achieve signal transmission. Its interface supports half-duplex differential transmission mode, using two signal lines to transmit complementary signals, which can effectively suppress common-mode noise and improve signal transmission distance and reliability. At the same time, it supports data polling under the Modbus-RTU protocol, ensuring compatibility with widely used industrial control equipment and allowing the gateway to actively and periodically request device data.

[0044] The CAN bus interface is used to access the differential signal stream of the field controller and to filter the message identifier in real time through a hardware shielding filter.

[0045] In this embodiment, the CAN bus interface is used to access the differential signal stream of the field controller. It uses a hardware shielding filter to filter message identifiers in real time. The hardware shielding filter is a signal processing mechanism implemented at the physical layer. Its function is to perform preliminary screening of the incoming differential signal stream according to preset message identifier rules before the CAN controller receives a complete CAN message. This can effectively reduce the CPU load, avoid processing irrelevant messages, and thus improve the efficiency and real-time performance of CAN bus communication. The hardware shielding filter can be implemented based on a programmable gate array or a dedicated ASIC chip. The range of message IDs to be received or filtered or the mask can be set through configuration registers.

[0046] The analog input interface has a built-in 24-bit high-resolution analog-to-digital converter, which supports parallel acquisition of 4-20mA current signals or 0-10V voltage signals. Each channel is equipped with an overvoltage protection circuit including transient voltage suppression diodes and current limiting resistors, a signal conditioning operational amplifier, and digital isolation devices, and is triggered by a unified clock source for synchronous sampling.

[0047] In this embodiment, the analog input interface incorporates a 24-bit high-resolution analog-to-digital converter (ADC), which can convert continuously changing analog signals into high-precision digital signals, providing finer measurement resolution and capturing minute signal changes. This ADC can employ a σ-δ architecture to achieve high resolution and low noise performance. The interface supports parallel acquisition of 4-20mA current signals or 0-10V voltage signals, meaning multiple analog input channels can perform data conversion simultaneously, improving data acquisition efficiency and real-time performance. Furthermore, each channel is equipped with an overvoltage protection circuit including transient voltage suppression diodes and current-limiting resistors to prevent voltage fluctuations at the input. In the event of transient high voltage, the overvoltage is clamped to a safe level by transient voltage suppression diodes, and the current is limited by current-limiting resistors, thereby protecting subsequent precision circuits from damage. In addition, each channel is equipped with a signal conditioning operational amplifier to amplify, filter, or impedance match analog signals to optimize signal quality and make it more suitable for the input range and characteristics of the analog-to-digital converter. Digital isolation devices are used to provide electrical isolation between the analog front end and the digital back end to prevent ground loop noise and common-mode interference from affecting the accuracy of analog measurements. A unified clock source triggers synchronous sampling to ensure that all analog input channels are sampled at the same time, thereby guaranteeing the time synchronization between multi-channel data.

[0048] The GPIO interface is equipped with an optocoupler isolation circuit for acquiring switch status signals or pulse sequence signals.

[0049] In this embodiment, the GPIO interface is equipped with an optocoupler isolation circuit for acquiring switch status signals or pulse sequence signals. The optocoupler isolation circuit transmits electrical signals through an optical signal as a medium, achieving electrical isolation between the input and output terminals. This effectively prevents external interference signals from entering the gateway system through the ground or power lines, protecting the internal circuitry. Furthermore, the optocoupler isolation circuit typically consists of a light-emitting diode (LED) and a photosensitive receiver. When the input signal drives the LED to emit light, the photosensitive receiver receives the optical signal and converts it into an electrical signal for output. The GPIO interface can be configured in input mode to detect the on / off state of switch quantities, such as device operation / stop, door opening / closing, etc., or in counting mode to acquire pulse sequence signals, such as the pulse output of a flow meter or the pulse signal of a speed sensor.

[0050] Specifically, the RS485 interface uses an isolated transceiver chip and supports the Modbus-RTU protocol to ensure stable and compatible communication with industrial field equipment, and effectively resists noise through differential transmission mode; the CAN bus interface uses a hardware shielding filter to filter message identifiers in real time, reducing the burden on the edge preprocessing unit and thus improving data processing efficiency; the analog input interface integrates a 24-bit high-resolution analog-to-digital converter, parallel acquisition capability, multiple overvoltage protection circuits, signal conditioning operational amplifiers, and digital isolation devices, and is triggered by a unified clock source for synchronous sampling, enabling the gateway system to accurately and synchronously acquire analog sensor signals and effectively cope with the harsh electromagnetic environment of industrial fields; the optocoupler isolation circuit of the GPIO interface provides reliable electrical isolation for the acquisition of switching and pulse signals, which can further enhance the system's anti-interference capability and safety; through the synergy of these enhanced interfaces, interference-free heterogeneous data is provided to the edge preprocessing unit, thereby ensuring the stable operation and accurate decision-making of the entire intelligent integrated edge computing gateway system in complex industrial environments.

[0051] Through the above technical solutions, the enhanced physical interface can effectively suppress adverse factors such as electromagnetic interference, ground potential difference, and transient overvoltage, ensuring the integrity, accuracy, and real-time performance of the raw data; the high-resolution analog-to-digital converter and synchronous sampling mechanism can improve the precision and time consistency of analog signal acquisition; the hardware shielding filter and isolation circuit can reduce the burden on subsequent processing units and improve the overall anti-interference capability and security of the system; finally, through the synergy of these enhanced interfaces, the accuracy of the entire system in monitoring, diagnosing, and predicting the operating status of the equipment can be improved, and the reliability of the response action of the local trigger controller can be guaranteed.

[0052] In one embodiment, the analog input interface is provided with a signal conditioning circuit at the front end, the signal conditioning circuit including a differential amplifier circuit composed of an operational amplifier and a second-order Butterworth low-pass filter;

[0053] In this embodiment, the signal conditioning circuit is an electronic circuit used to preprocess electrical signals, its purpose being to convert the original signal into a form suitable for subsequent processing or measurement. The signal conditioning circuit can perform functions such as signal amplification, filtering, isolation, and linearization. Furthermore, in addition to the differential amplification and low-pass filtering mentioned in this embodiment, the signal conditioning circuit may also include level conversion circuits, impedance matching circuits, or current-to-voltage conversion circuits. The differential amplifier circuit, composed of operational amplifiers, is a circuit capable of amplifying the difference between two input signals while suppressing the common-mode components of the two input signals. Its implementation can be achieved by using a single operational amplifier in conjunction with a precision resistor network. Alternatively, an integrated instrumentation amplifier chip can be used, which typically offers higher common-mode rejection ratio and more stable performance. A high-performance differential amplifier circuit can also be constructed using a three-operation amplifier configuration. A second-order Butterworth low-pass filter is a filter with a maximally flat passband response, exhibiting no ripple within the passband. This filter can be implemented using active RC circuits, such as Sallen-Key topologies or multiple feedback topologies, with its cutoff frequency determined by selecting appropriate resistor and capacitor values. Alternatively, a switched-capacitor filter chip can be used, with its cutoff frequency programmable via an external clock signal.

[0054] The differential amplifier circuit is used to suppress common-mode interference in the input analog sensing signal and provides an adjustable gain ratio.

[0055] In this embodiment, suppressing common-mode interference in the input analog sensing signal refers to the ability of the differential amplifier circuit to attenuate the common-mode signal by amplifying the differential signal. When both input terminals are simultaneously affected by the same noise voltage, the differential amplifier circuit can effectively eliminate this common-mode noise, thereby improving the signal-to-noise ratio. Providing an adjustable gain ratio means that the amplification factor of the differential amplifier circuit can be adjusted according to actual needs. Specifically, this can be achieved by changing the resistance value of the feedback resistor in the differential amplifier circuit, for example, by using a variable resistor or a digital potentiometer for manual or programmed adjustment to adapt to sensor signals of different ranges.

[0056] The cutoff frequency of the second-order Butterworth low-pass filter is dynamically configured according to the sampling frequency of the analog-to-digital converter, and is set to less than half of the sampling frequency to eliminate aliasing during signal acquisition.

[0057] In this embodiment, the cutoff frequency can be dynamically configured according to the sampling frequency of the analog-to-digital converter, and set to less than half of the sampling frequency. This is intended to ensure that all signal components higher than the Nyquist frequency (i.e., half of the sampling frequency) are effectively attenuated before analog-to-digital conversion. Specifically, this can be achieved by adjusting the RC filter parameters with a digital potentiometer or by controlling the clock frequency of the switched capacitor filter with a microcontroller. The purpose is to prevent high-frequency signals from being folded into the low-frequency region during sampling, thereby generating aliasing errors. Eliminating aliasing during signal acquisition means using a low-pass filter before analog-to-digital conversion to filter out signal components higher than the Nyquist frequency, thereby preventing high-frequency components from being incorrectly interpreted as low-frequency signals after sampling.

[0058] Specifically, in the aforementioned intelligent integrated edge computing gateway system, the multi-source data acquisition module is used to access the analog sensor signals output from the field device layer. To ensure high fidelity of the analog sensor signals during the digitization process, a signal conditioning circuit is added at the front end of the analog input interface. The core of this signal conditioning circuit lies in its differential amplifier circuit composed of operational amplifiers and a second-order Butterworth low-pass filter. Specifically, when the analog sensor signal enters the analog input interface, it is first received by the differential amplifier circuit, which can effectively suppress common-mode interference commonly found in industrial environments, such as ground loop noise or power line coupling noise. It also provides an adjustable gain ratio, allowing sensor signals of different amplitudes to be amplified to the optimal input range of the analog-to-digital converter. After differential amplification... The signal-to-noise ratio is significantly improved, and common-mode noise is greatly reduced. Furthermore, the signal after differential amplification is fed into a second-order Butterworth low-pass filter, which acts as an anti-aliasing filter. The cutoff frequency is dynamically configured and strictly set to less than half of the analog-to-digital converter's sampling frequency, ensuring that all high-frequency noise and signal components that may cause aliasing are effectively filtered out before the analog-to-digital converter samples. In this way, even if the analog-to-digital converter has a built-in 24-bit high-resolution analog-to-digital converter, it can ensure that the sampled digital data is pure and free of aliasing distortion. Therefore, the collaboration between the signal conditioning circuit and the built-in analog-to-digital converter of the analog input interface can jointly ensure that the analog sensing signals acquired from the field equipment can be converted into engineering data with high accuracy and high reliability.

[0059] By adding a signal conditioning circuit containing a differential amplifier and a second-order Butterworth low-pass filter to the front end of the analog input interface, the common-mode interference and high-frequency noise commonly found in analog sensing signals in industrial settings can be effectively suppressed. Specifically, the differential amplifier ensures signal purity and adjustable gain, while the low-pass filter with dynamically configured cutoff frequency serves as an anti-aliasing measure, ensuring that the high-resolution analog-to-digital converter does not introduce spectral distortion during sampling. This improves the quality and accuracy of heterogeneous data acquisition, provides high-fidelity engineering data for the edge preprocessing unit, and makes subsequent real-time feature extraction and evolution determination more accurate and reliable. This enhances the intelligent integrated edge computing gateway system's ability to monitor and diagnose the operating status of equipment.

[0060] In one embodiment, the data synchronization alignment logic in the edge preprocessing unit is based on a unified timestamp generated by a hardware timer to perform time-domain reconstruction on heterogeneous data from different physical interfaces and different sampling frequencies. The hardware acquisition start-up delay is compensated by resampling or interpolation to ensure phase consistency of multi-source signals on the same time axis.

[0061] In this embodiment, the data synchronization alignment logic aims to solve the inconsistency problem of multi-source heterogeneous data in the time dimension. Its core function is to ensure that data points from different sensors or communication interfaces can be accurately correlated to the same time axis. The data synchronization alignment logic can be implemented based on software algorithms, such as timestamp synchronization through operating system scheduling or application layer protocols; it can also be implemented with hardware assistance, such as using dedicated synchronization chips or FPGA logic for high-precision time alignment. The hardware timer is a timing circuit integrated into the microcontroller or dedicated chip, capable of counting at a fixed clock frequency and generating precise time signals or interrupts. Its function is to provide a stable and reliable time reference for generating a unified timestamp. The hardware timer can be an independent real-time clock module or a general-purpose timer / counter within the microcontroller, and the required time accuracy can be achieved by configuring its operating mode and prescaler. A unified timestamp refers to assigning a common time reference marker to all acquired heterogeneous data. This time reference marker is typically a high-precision digital value representing the absolute or relative time of data acquisition or event occurrence. The generation of the unified timestamp can be achieved by the central processing unit reading the hardware timer register, or by a dedicated timer... Synchronization chips automatically complete the process, ensuring the comparability of time information from different data sources. Time-domain reconstruction refers to the process of reorganizing and adjusting data along the time dimension. For multi-source heterogeneous data, the goal of time-domain reconstruction is to eliminate time deviations caused by different sampling frequencies and acquisition delays, mapping all data onto a unified time axis. Specifically, this can include sorting and aligning data points, and, when necessary, performing time interpolation or resampling to generate a time-continuous and synchronized data stream. Resampling or interpolation refers to changing the sampling rate of the data sequence, such as downsampling high-sampling-rate data or upsampling low-sampling-rate data; interpolation refers to... Estimating the values ​​of unknown data points among known data points to fill gaps on the time axis or generate higher-density data points involves common interpolation methods, including linear interpolation, polynomial interpolation, or more complex algorithms based on signal characteristics. Resampling and interpolation processing can be used to unify data with different sampling frequencies and compensate for hardware acquisition startup delays, ensuring the continuity and alignment of data on the time axis. Phase consistency refers to the synchronization or predictable fixed relationship between the relative positions of multiple signals on the time axis. In multi-source data acquisition, ensuring phase consistency is crucial for accurately analyzing the correlations (such as causal relationships and correlations) between signals.

[0062] The signal cleaning filter integrates moving average filtering logic or adaptive weighted filtering logic. The adaptive weighted filtering logic dynamically adjusts the filtering coefficients by analyzing the local variance of heterogeneous data to filter out random white noise and pulse spikes in the original signal.

[0063] In this embodiment, the signal cleaning filter is a digital or analog circuit used to remove unwanted noise and interference from the original signal. Its purpose is to improve the signal-to-noise ratio of the signal, making subsequent data analysis and feature extraction more accurate and reliable. The signal cleaning filter can be implemented in various ways, such as a software filter based on digital signal processing algorithms, or an analog filter composed of resistors, capacitors, inductors, and operational amplifiers. The moving average filtering logic is a digital filtering method that smooths the signal by calculating the average value of data within a fixed-length window in the data sequence. This fixed-length window slides along the data sequence, calculating a new average value each time. Moving average filtering can effectively suppress random noise, but may cause signal delay and attenuation of high-frequency components. The adaptive weighted filtering logic is a filtering method that can dynamically adjust the filtering parameters according to the local characteristics of the signal. For example, it uses stronger smoothing in stable signal regions and weaker smoothing in regions of signal abrupt change (such as pulses or steps) to preserve signal details. The weight or filtering method for each data point can be determined by analyzing the signal's local variance, gradient, or other statistical characteristics. Intensity; Local variance refers to the variance value calculated within a local window of a data sequence. Variance is a statistic that measures the degree of dispersion of data. Local variance can reflect the intensity of signal fluctuations within a certain time period. By monitoring local variance, it is possible to distinguish between stable regions of the signal and regions containing abrupt changes or noise. Filter coefficients are parameters used in digital filters to weight input data to produce output data. In adaptive weighted filtering, the filter coefficients are not fixed but dynamically adjusted according to the local characteristics of the signal. For example, when the local variance is small, a larger smoothing coefficient can be used; when the local variance is large, a smaller smoothing coefficient is used to avoid over-smoothing the effective changes of the signal. Random white noise is a random signal with a power spectral density uniformly distributed across the entire frequency range. It is usually caused by factors such as internal circuitry of the sensor and environmental electromagnetic interference, and manifests as high-frequency, irregular fluctuations in the signal. Pulse spikes refer to brief, sharp abnormal fluctuations in the signal, usually with high amplitude and short duration. They may be caused by transient interference, power fluctuations, or momentary sensor malfunctions, and can interfere with data analysis.

[0064] Specifically, in the aforementioned intelligent integrated edge computing gateway system, to address the inconsistency of multi-source heterogeneous data in the time dimension, the edge preprocessing unit introduces data synchronization alignment logic and a signal cleaning filter to refine the heterogeneous data acquired from the multi-source data acquisition modules. Specifically, the data synchronization alignment logic utilizes a unified timestamp generated by a hardware timer to provide a common time reference for heterogeneous data from different physical interfaces such as RS485, CAN bus, analog input, and GPIO interfaces, which have different sampling frequencies. Furthermore, by reconstructing the heterogeneous data in the time domain and employing resampling or interpolation techniques, it compensates for potential delays in the startup of different hardware acquisition processes, thereby ensuring phase consistency of all multi-source signals on a unified time axis and avoiding misjudgments caused by time misalignment. Simultaneously, the signal cleaning filter denoises and conditions the original signal before it enters the edge computing engine, integrating moving average filtering logic or adaptive weighted filtering. The logic is as follows: the moving average filtering logic effectively suppresses random noise by averaging the data through a window, while the adaptive weighted filtering logic goes further by dynamically adjusting the filtering coefficients through real-time analysis of the local variance of heterogeneous data. This means that in stable signal regions, the filter can perform stronger smoothing to remove noise; while in regions where the signal undergoes abrupt changes or contains important features, the filter weakens the smoothing intensity to retain the effective information of the signal and avoid the misfiltering of key features. This can achieve efficient filtering of random white noise and pulse spikes in the original signal, improving the signal-to-noise ratio and data quality. Through the synergistic effect of the data synchronization alignment logic and the signal cleaning filter, the edge preprocessing unit can transform heterogeneous data that may have time deviations and noise interference into time-synchronized and high-quality engineering quantity data, so that the subsequent state feature data can more realistically reflect the operating status of the equipment, thereby improving the accuracy and reliability of fault diagnosis and prediction of the entire intelligent integrated edge computing gateway system.

[0065] Through the above technical solutions, the edge preprocessing unit can effectively solve the problems of timing inconsistency and noise interference that are common in the acquisition of multi-source heterogeneous data. Specifically, the data synchronization alignment logic can ensure a high degree of consistency in the time dimension of data from different physical interfaces and different sampling frequencies, eliminate analysis errors caused by time misalignment, and provide a reliable and unified time reference for the subsequent edge computing engine to perform accurate feature extraction and state determination. The signal cleaning filter, especially its adaptive weighted filtering logic, can denoise according to the local characteristics of the signal. While effectively filtering out random white noise and pulse spikes, it retains the key feature information in the signal to the maximum extent, avoids damage to the effective signal by over-filtering, and improves the quality and accuracy of engineering quantity data. This enables the edge computing engine to perform analysis based on more realistic and reliable data, thereby improving the accuracy of the entire intelligent integrated edge computing gateway system in assessing the operating status of equipment, the timeliness of fault diagnosis, and the reliability of prediction, and ultimately enhancing the overall performance and decision-making capabilities of the system.

[0066] In one embodiment, the edge preprocessing unit also integrates nonlinear compensation logic for nonlinear sensors when performing data conversion.

[0067] The nonlinear compensation logic corrects heterogeneous data by retrieving pre-stored piecewise linearized lookup table data or polynomial approximation data in memory, and converts it into calibrated engineering quantity data by combining a preset scaling factor. The engineering quantity data includes temperature, pressure, vibration intensity, and current.

[0068] In this embodiment, nonlinear compensation logic refers to the technical mechanism used to correct the nonlinear output of the sensor. Its purpose is to convert the sensor's nonlinear response into an output that is linearly related to the measured physical quantity, ensuring the accuracy of the measurement data. The nonlinear compensation logic can be based on a mathematical model, such as polynomial fitting, spline interpolation, or a pre-calibrated data table, such as piecewise linearized lookup table. Retrieving pre-stored piecewise linearized lookup table data or polynomial approximation data in memory indicates that the calibration parameters or mapping relationships required for nonlinear compensation are pre-stored in the gateway system's memory and are called during data conversion. The memory can be persistent storage, such as flash memory, for storing calibration curves or polynomial coefficients, or it can be a cache, such as RAM, for fast access. The piecewise linearized lookup table data approximates the nonlinear characteristics by dividing the sensor's entire measurement range into multiple linear segments and storing the corresponding conversion coefficients or calibration points for each segment. The polynomial approximation data... The nonlinear response of the sensor is described by fitting a high-order polynomial function, and its coefficients are stored and used for real-time calculation. Correction of heterogeneous data refers to the process of eliminating or reducing nonlinear errors in the raw sensor data obtained from the multi-source data acquisition module through nonlinear compensation logic. Converting the data into calibrated engineering quantity data by combining a preset scaling factor means that after nonlinear correction, a pre-set scaling factor is applied to convert the corrected data into engineering quantity data with actual physical meaning and standard units. For example, the corrected voltage value is converted into a temperature value, or the corrected resistance value is converted into a pressure value. This scaling factor is usually used for unit conversion or range adjustment. Engineering quantity data includes temperature, pressure, vibration intensity, and current, which are typical physical quantities that the intelligent integrated edge computing gateway system may process. These are usually measured by various sensors, and since many sensors have nonlinear characteristics, nonlinear compensation is required to ensure measurement accuracy.

[0069] Specifically, the solution in this application integrates nonlinear compensation logic into the data conversion stage of the edge preprocessing unit, which can solve the accuracy problem of nonlinear sensor data conversion. When heterogeneous data, such as the raw signal from a nonlinear sensor, is denoised and conditioned by time-domain reconstruction and signal cleaning filters, the nonlinear compensation logic is activated. It retrieves the corresponding calibration parameters from the piecewise linearized lookup table data or polynomial approximation data stored in memory, according to the sensor type. Furthermore, the retrieved calibration parameters are used to accurately correct the heterogeneous data, correcting the nonlinear response of the sensor to a linear response. The corrected data is then combined with a preset scaling factor to accurately convert it into calibrated engineering quantity data, such as temperature, pressure, vibration intensity, or current.

[0070] Through the above technical solutions, the intelligent integrated edge computing gateway system can effectively solve the measurement error problem introduced by nonlinear sensors. Specifically, by integrating nonlinear compensation logic into the data conversion stage of the edge preprocessing unit and using pre-stored calibration data to accurately correct heterogeneous data, the conversion process from raw sensor signals to engineering quantity data can be ensured to have high precision and high reliability. This improves the accuracy of the engineering quantity data, enabling the subsequent edge computing engine to perform feature extraction and status determination based on more realistic and reliable data. This improves the accuracy of equipment operation status monitoring and the effectiveness of local trigger controller response actions, avoiding misjudgments or omissions caused by inaccurate data, and enhancing the overall performance and robustness of the system.

[0071] In one embodiment, the solution algorithm library also integrates a pre-built logic deduction model, which allows for custom Boolean logic combinations of multi-channel signals based on the frequency domain transformation module, feature extraction module, and trend prediction module.

[0072] In this embodiment, the pre-built logical deduction model refers to a pre-designed framework for processing and combining logical judgments. This model can be a rule-based expert system, where users can define a series of conditional statements to express diagnostic logic. Alternatively, it can be a decision tree or state machine structure, guiding the judgment process through preset paths and state transitions, aiming to integrate outputs from different analysis modules to form diagnostic conclusions. Allowing custom Boolean logic combinations based on multi-channel signals from the frequency domain transformation module, feature extraction module, and trend prediction module means the system provides interfaces or tools that allow users or system administrators to define and configure complex logical judgment rules according to actual needs. For example, users can drag and drop Boolean logic gates through a graphical interface and connect them to the outputs of the frequency domain transformation module, feature extraction module, and trend prediction module to construct complex logic. Another implementation method is to provide a scripting language or configuration file format that allows users to write and load custom Boolean expressions in text form.

[0073] The edge computing engine includes a microprocessor core with parallel computing capabilities and a dedicated mathematical acceleration unit at the hardware level. It adopts a double-buffered ping-pong mechanism for data flow processing. That is, when the first buffer is executing a computing task, the multi-source data acquisition module is allowed to write new heterogeneous data into the second buffer to achieve the continuity of the computing task.

[0074] The frequency domain transformation module adopts fast Fourier transform logic based on butterfly operation structure, and performs windowing processing on the data block before fast Fourier transform. The feature value extraction module is used to calculate the effective value, peak value, skewness coefficient and energy distribution of the engineering quantity data.

[0075] In this embodiment, a microprocessor core with parallel computing capabilities refers to a central processing unit that has the ability to execute multiple instructions or operations simultaneously. This can be achieved through a multi-core architecture, such as using multiple processing cores, each of which can execute tasks independently; or it can be achieved through superscalar or single-instruction multiple-data instruction set extensions within a single-core processor, enabling a single instruction to process multiple data elements simultaneously. A dedicated mathematical acceleration unit refers to a hardware module optimized for performing specific mathematical operations. For example, it can be a floating-point arithmetic unit specifically designed for efficient floating-point calculations; it can also be a digital signal processor optimized for signal processing algorithms; or it can be a field-programmable gate array (FPGA) or application-specific integrated circuit (ASIC) for highly customized and parallelized implementations. The mathematical operation logic; the double-buffered ping-pong mechanism for data stream processing is a data processing technique that uses two independent buffers to alternately process the data stream. Specifically, while one buffer is being read by the processor and performing a calculation task, the other buffer is simultaneously used to receive new input data. Once the data processing in the first buffer is complete, the processor immediately switches to the second buffer for processing, while the first buffer is reopened to the data acquisition module to write new data. By parallelizing the data input and data processing processes, it can effectively avoid data waiting and processing interruptions, ensuring the continuity of the data stream and processing efficiency. When the first buffer is performing a calculation task, the multi-source data acquisition module is allowed to write new heterogeneous data into the second buffer to complete the calculation task. The continuity specifically refers to ensuring that data acquisition and data processing do not interfere with each other under the double-buffered ping-pong mechanism through task scheduling and hardware resource management. For example, the direct memory access controller can manage the writing of data from the multi-source data acquisition module to the buffer, and the reading from the buffer to the edge processing engine. This allows the memory access controller to fill another free buffer with new heterogeneous data when the microprocessor core or dedicated mathematical acceleration unit is busy processing the current buffer data. The frequency domain transformation module adopts Fast Fourier Transform logic based on the butterfly operation structure, which refers to using the Fast Fourier Transform algorithm to convert time-domain signals into frequency-domain signals. The butterfly operation structure is a computational mode of the Fast Fourier Transform algorithm, which... The large Discrete Fourier Transform (DFT) is decomposed into a series of smaller DFTs, and symmetry is used to reduce the computational load. Windowing is performed on the data block before the Fast Fourier Transform (FFT). This involves multiplying the data block by a window function before performing the FFT on the finite-length time-domain data. The purpose is to reduce the spectral leakage effect caused by signal truncation, thereby improving the accuracy of frequency domain analysis. Specifically, each sampling point of the time-domain data sequence is multiplied by the coefficient of the corresponding window function. The eigenvalue extraction module is used to calculate the effective value, peak value, skewness coefficient, and energy distribution of the engineering quantity data. This means that the eigenvalue extraction module can extract various statistical and signal characteristic indicators from the engineering quantity data. Among them, the effective value reflects the average energy of the signal.Peak value represents the maximum instantaneous amplitude of a signal; skewness measures the symmetry of the signal distribution; energy distribution refers to the proportion of signal energy across different frequency ranges, for example, obtained by calculating the power spectral density integral within a specific frequency band.

[0076] Specifically, the solution in this application enhances the intelligent diagnostic capabilities of the edge computing engine by integrating pre-built logical deduction models into the algorithm library and allowing for custom Boolean logic combinations of multi-channel signals based on frequency domain transformation, feature extraction, and trend prediction modules. This enables the system to determine device status based on complex conditions, rather than being limited to a single indicator or simple threshold. Simultaneously, the edge computing engine introduces a microprocessor core with parallel computing capabilities and a dedicated mathematical acceleration unit at the hardware level, which improves data processing throughput and computational efficiency, especially in computationally intensive frequency domain transformation and feature extraction tasks. Furthermore, by employing double buffering... The ping-pong mechanism processes data streams and allows the multi-source data acquisition module to write new data into another buffer while the calculation task is in progress. This ensures the continuity of data acquisition and calculation tasks, avoids data processing interruptions, and thus meets the real-time and high-concurrency data processing requirements of industrial sites. Furthermore, the frequency domain transformation module adopts Fast Fourier Transform logic based on a butterfly operation structure and performs windowing processing on the data blocks before the Fast Fourier Transform, which ensures the accuracy and efficiency of frequency domain analysis. Finally, the feature extraction module can comprehensively calculate the effective value, peak value, skewness coefficient, and energy distribution of engineering quantity data, providing accurate input parameters for subsequent logical deduction.

[0077] Through the above technical solutions, this application can improve the diagnostic accuracy and real-time response capability of the intelligent integrated edge computing gateway system in complex industrial environments. Specifically, the pre-built logical deduction model and custom Boolean logic combination function enable the system to flexibly adapt to diverse fault diagnosis needs, no longer limited by fixed algorithm logic, thereby more accurately identifying potential equipment anomalies. At the same time, by introducing a microprocessor core with parallel computing capabilities and a dedicated mathematical acceleration unit, combined with a double-buffered ping-pong mechanism, the efficiency and continuity of data processing are optimized, ensuring that the system can perform uninterrupted real-time analysis even in high-frequency, high-data-volume scenarios, thereby avoiding data processing delays or interruptions. In addition, the optimization of the frequency domain transformation module and the diversity of feature value extraction provide high-quality input for upper-layer logical deduction, which can further enhance the system's ability to comprehensively perceive and accurately judge the operating status of equipment.

[0078] In one embodiment, the edge computing engine allocates time slices to each computing task according to a preset priority order through a built-in task scheduler.

[0079] In this embodiment, the built-in task scheduler is a software or firmware module within the edge computing engine, used to manage and coordinate the execution of all computing tasks in the edge computing engine. The task scheduler can be the scheduling core of a real-time operating system or a customized lightweight task management logic. Its function is to determine which computing task can occupy computing resources such as the microprocessor core or dedicated mathematical acceleration unit at a given time. The preset priority order refers to the execution priority level assigned to each computing task in the edge computing engine. It can be statically configured based on factors such as the task's criticality, real-time requirements, or resource consumption. For example, the feature extraction task for sudden abnormal signals can be set to the highest priority, while the periodic trend prediction task can be set to a lower priority. Time slice allocation refers to the task scheduler dividing the processor's running time into several fixed or variable-length time periods and allocating these time periods to different computing tasks according to the preset priority order. When a task's time slice is used up, even if the task has not yet been completed, the processor will switch to the next higher-priority or waiting task, thereby achieving concurrent execution of multiple tasks.

[0080] Specifically, the solution in this application integrates a built-in task scheduler into the edge computing engine, enabling it to allocate time slices to each computing task according to a preset priority order, thereby achieving effective management of the edge computing engine's computing resources. Specifically, when the edge computing engine receives engineering data from the edge preprocessing unit, its internal computing tasks, such as the frequency domain transformation module, feature extraction module, trend prediction module, and pre-built logical deduction model, are uniformly scheduled by the task scheduler according to their preset priority order. High-priority tasks will receive more CPU time or faster response times, ensuring that key state feature data can be generated in a timely manner. Simultaneously, the time slice allocation mechanism ensures that even low-priority tasks receive some execution opportunities, improving the continuity and integrity of all computing tasks.

[0081] Through the above technical solutions, the edge computing engine can rationally allocate computing resources according to the real-time nature and importance of tasks, thereby avoiding resource contention and processing delays caused by concurrent execution of multiple tasks. This improves the efficiency and response speed of the system in real-time feature extraction and evolution determination of device operating status. Especially when dealing with high-priority or urgent events, it can ensure the timely completion of critical computing tasks, thereby providing accurate and real-time status feature data for subsequent local trigger controllers. This enhances the real-time performance and reliability of the intelligent integrated edge computing gateway system.

[0082] In one embodiment, the threshold comparison matrix integrates hysteresis comparison logic and a delay confirmation mechanism, and is provided with an opening threshold and a closing threshold. The actuator is driven by the difference between the opening threshold and the closing threshold, and a valid trigger is confirmed when the state feature data continuously exceeds a preset number of sampling periods.

[0083] In this embodiment, the hysteresis comparison logic introduces a memory effect mechanism into the threshold judgment to prevent frequent triggering and cancellation of actions when the signal fluctuates near the threshold. This is typically achieved by setting two different thresholds: an on threshold and a off threshold. Specifically, when the state characteristic data rises and exceeds the on threshold, the action is triggered; conversely, when the state characteristic data falls, the action is only cancelled when it falls below the off threshold. This effectively avoids false triggering and system oscillations caused by signal noise or minor fluctuations. The delayed confirmation mechanism verifies the validity of an event through a time dimension. It requires that a certain condition must be continuously met for a certain duration or number of sampling periods to be confirmed as a valid triggering event. This prevents unnecessary triggering caused by transient interference or brief abnormal signals. The system's response improves robustness and reliability. The activation threshold is the upper limit for triggering actions; when state characteristic data exceeds this value, triggering an action is considered. The deactivation threshold is the lower limit for canceling actions; when state characteristic data falls below this value, the triggered action is canceled. The confirmation of a valid trigger when state characteristic data continuously exceeds a preset number of sampling periods refers to the specific implementation of the delayed confirmation mechanism. Specifically, state characteristic data is continuously monitored. Once the data exceeds the activation threshold, a timer or counter starts working. Only when the data remains above the activation threshold for multiple consecutive sampling periods and reaches the preset number of sampling periods will it be ultimately confirmed as a valid trigger event requiring a response. This prevents erroneous actions caused by single or short-term data anomalies.

[0084] The physical output interface includes a relay output terminal and a pulse output terminal. The relay output terminal is used to control the on / off state of the power supply circuit, and the pulse output terminal is used to send high-speed control pulses to the actuator.

[0085] In this embodiment, the physical output interface includes a relay output terminal and a pulse output terminal. The relay output terminal is an electrical interface used to control the on / off state of high-power circuits. It controls the relay coil through a small current signal, thereby driving the relay contacts to close or open, realizing power supply or power-off control of external devices. For example, it can be used to control the start and stop of high-power loads such as motors, heaters, and lighting equipment. The pulse output terminal is an interface used to output electrical pulse signals of a specific frequency, duty cycle, or number. The output electrical pulse signals are usually used to drive actuators such as stepper motors, servo motors, and solenoid valves to realize position control, speed adjustment, or switching operations. For example, the opening degree of a valve or the movement distance of a robotic arm can be controlled by outputting various electrical pulse signals.

[0086] The local trigger controller also integrates an emergency intervention mechanism based on hardware interrupts. When a sudden structural damage signal or instantaneous overload signal is detected, it directly sends a non-maskable interrupt request to the central processing unit and directly operates the GPIO register in the interrupt service routine to generate the highest priority response action.

[0087] In this embodiment, the local trigger controller also integrates an emergency intervention mechanism based on hardware interrupts. This is a strategy that utilizes hardware interrupts to achieve rapid response. When a specific emergency event occurs, the hardware circuit directly generates an interrupt signal to notify the central processing unit (CPU) to suspend its current task and immediately switch to handling the emergency event. Sudden structural damage signals or instantaneous overload signals refer to abnormal event types that require emergency handling. Structural damage signals may originate from vibration sensors, strain gauges, etc., indicating that the equipment structure may be damaged. Instantaneous overload signals may originate from current sensors, pressure sensors, etc., indicating that the equipment has been subjected to an instantaneous load exceeding its design limits. Non-maskable interrupts are the highest priority interrupts. The CPU must respond immediately upon receiving a non-maskable interrupt and cannot be masked by other interrupts or software instructions. This ensures that even when the system is busy, emergency events can be handled with the highest priority. Interrupt service routines are specific codes executed by the CPU after responding to an interrupt. In the interrupt service routine, the state of the GPIO pins can be quickly changed by directly reading and writing general-purpose GPIO registers, thereby directly controlling external actuators, such as immediately cutting off power or triggering emergency braking, to achieve the highest priority response action and minimize delays and potential hazards.

[0088] Specifically, when the status characteristic data rises and exceeds a preset activation threshold, a counter or timer can be started. Only when the status characteristic data remains above the activation threshold for a preset number of sampling periods is it finally confirmed as a valid trigger event, and once triggered, the actuator is driven. When the status characteristic data falls, the triggered action will only be deactivated when it falls below a preset deactivation threshold. This enhances the system's resistance to noise and transient fluctuations, ensuring the stability and accuracy of the response. Furthermore, to meet the control requirements of different actuators, the physical output interface provides relay output terminals and pulse output terminals. The relay output terminals can directly control high-power power circuits by controlling the on / off state of relays, suitable for scenarios requiring simple switching control. The pulse output terminals can output precise pulse sequences to drive actuators requiring fine control, such as steppers. The system can control motors or servo valves to achieve complex motion or position control. Furthermore, for sudden and high-risk events that may occur during equipment operation, the local trigger controller also integrates an emergency intervention mechanism based on hardware interrupts. Specifically, when an emergency such as a sudden structural damage signal or a momentary overload signal is detected, it can bypass the conventional software processing flow and directly send a non-maskable interrupt request to the central processing unit. Upon receiving the non-maskable interrupt request, the central processing unit will immediately suspend all current tasks and execute a preset interrupt service routine. In the interrupt service routine, by directly manipulating the GPIO registers, the highest priority response action can be generated with the lowest latency, such as emergency shutdown or safety pressure relief, ensuring that the system can react as quickly as possible in extreme emergency situations, minimizing the potential equipment damage or accident risk, thereby improving the security and reliability of the intelligent integrated edge computing gateway system.

[0089] Through the above technical solutions, the introduction of hysteresis comparison logic and delayed confirmation mechanism can effectively avoid false triggering and frequent actions caused by on-site signal noise or instantaneous fluctuations. This enables the system to maintain higher stability and reliability in complex industrial environments, reducing unnecessary equipment start-up, shutdown, and maintenance costs. The diversification of physical output interfaces allows the gateway system to flexibly adapt to different types of actuators, effectively supporting both simple switch control and precise motion control, thus broadening the system's application scope. More importantly, the emergency intervention mechanism based on hardware interrupts enables the system to directly trigger the highest priority response action with extremely low latency when it detects high-risk signals such as sudden structural damage signals or instantaneous overload signals. This plays a crucial role in ensuring safe equipment operation, preventing the escalation of accidents, and protecting the lives and property of personnel, thereby enhancing the system's safety protection capabilities.

[0090] In one embodiment, the cloud interaction management module adopts a dual-caching data temporary storage strategy and a breakpoint resume protocol. When the external communication network is unstable or interrupted, the status feature data and response actions are recorded and stored in the local flash memory. After the external communication network is restored, the temporary data is resent sequentially based on the timestamp order.

[0091] In this embodiment, the dual-buffered data storage strategy refers to using two independent memory areas or logical buffers to temporarily store data. While one buffer is being written to new data, the other buffer can be read or processed, thereby achieving continuous data flow and uninterrupted storage. This effectively avoids data loss due to momentary network interruptions and improves the concurrency of data processing. Its implementation can include using a ping-pong caching mechanism, where data is alternately written to the two buffers, or switching between the two logical areas by managing read / write pointers. A breakpoint resumption protocol is a communication mechanism that allows data transmission to continue from the point of interruption after an interruption. It is typically implemented by recording successfully transmitted data blocks or byte ranges during data transmission. When the network recovers, the sender can query the status of the data received by the receiver and only send the untransmitted or failed-to-transmit portions. The breakpoint resumption protocol can... Data integrity can be ensured through block transmission combined with acknowledgment / retransmission mechanisms, or through sequence number tracking and status synchronization. Local flash memory is a non-volatile storage medium that can retain data even when power is off. It typically has fast read / write speeds and high storage density, making it suitable for temporary or long-term data storage in embedded systems. Local flash memory can be NAND flash memory, providing large capacity and cost-effectiveness, or NOR flash memory, providing faster random access speeds, or an eMMC module with an integrated controller. Retransmitting temporary data sequentially based on timestamp order refers to sending data blocks stored in local flash memory one by one to the cloud platform according to the order in which the data was generated after network recovery, ensuring the temporal consistency of data in the cloud. This can be achieved by using data structures to maintain the storage order of data and by sorting the data by timestamps before transmission.

[0092] The cloud-based interactive management module supports dynamic downsampling processing, which means that only low-frequency feature values ​​are uploaded during the stable operation period of the device, and high-frequency data is uploaded during the abnormal fluctuation period. Before and after the local trigger action, the module automatically extracts the original waveform data of a preset length, compresses it, and uploads it along with the alarm packet.

[0093] In this embodiment, dynamic downsampling is an adaptive data sampling or transmission strategy. Specifically, it dynamically adjusts the frequency and granularity of data acquisition or uploading based on the current state of the system or device. During stable periods, the sampling rate can be reduced or only key feature values ​​can be transmitted. During abnormal periods, the sampling rate can be increased or more detailed raw data can be transmitted. This can be achieved by setting different sampling periods, data aggregation rules, or threshold-based mode switching. Uploading only low-frequency feature values ​​during stable device operation means selectively uploading data that changes slowly, reflects long-term trends, or aggregates statistical characteristics, such as averages, maximums, minimums, or periodic reports, during normal and stable device operation. This helps reduce unnecessary network traffic and cloud storage overhead. During periods of abnormal fluctuations, the sampling rate is switched to high frequency. Data upload refers to immediately increasing the frequency of data uploads when an abnormality or drastic change in the device's operating status is detected. This involves transmitting denser, more detailed raw data or high-frequency characteristic values ​​to ensure sufficient information is available at critical moments for rapid diagnosis and decision-making. Automatically extracting and compressing raw waveform data of a preset length before and after a local trigger action and uploading it along with the alarm packet means that when the local trigger controller executes a response action according to preset logic, it automatically extracts the raw, high-resolution waveform data before and after the action from a circular buffer, compresses it, and sends it to the cloud along with alarm information containing details of the trigger event. This provides the cloud with detailed context of the event, facilitating in-depth analysis of the cause of the fault.

[0094] Specifically, when the external communication network is unstable or interrupted, the cloud interaction management module will activate a dual-caching data storage strategy, securely storing the status feature data generated by the edge computing engine and the response action records generated by the local trigger controller in local flash memory. Simultaneously, combined with a breakpoint resume protocol, it ensures that even if the network is interrupted for a long time, all critical data can be completely and accurately resent to the cloud platform in the order of its generated timestamps after the network is restored, thereby avoiding the risk of data loss and ensuring the continuity and accuracy of cloud data analysis. Furthermore, to optimize network bandwidth and cloud resource utilization, the cloud interaction management module also implements dynamic downsampling processing; specifically, during periods of stable device operation, only low-frequency data is uploaded. The system uses characteristic values ​​to reduce redundant data transmission and lower network load. When abnormal fluctuations are detected, it immediately switches to high-frequency data upload mode to ensure timely acquisition of detailed equipment operation data at critical moments, providing sufficient basis for fault diagnosis and early warning. Furthermore, when the local trigger controller executes a response action, it automatically captures and compresses the original waveform data of a preset length before and after the action, and uploads it along with the alarm packet. This provides the cloud with rich contextual information about the event, enhancing the depth and accuracy of fault analysis. This allows the cloud platform to more comprehensively understand the equipment status and fault causes, thereby improving the reliability, diagnostic capabilities, and resource utilization efficiency of the intelligent integrated edge computing gateway system.

[0095] Through the above technical solutions, the intelligent integrated edge computing gateway system of this application can effectively avoid data loss when facing unstable external communication networks, ensuring the integrity and reliability of status feature data and response action records. Specifically, the combination of dual-buffered data temporary storage strategy and breakpoint resume protocol enables all temporary data to be resent in time stamp order even after network interruption, thereby improving the continuity and accuracy of data analysis on the cloud platform. In addition, the dynamic downsampling processing mechanism can optimize the utilization efficiency of network bandwidth, reduce redundant data uploads during stable device operation, and provide high-frequency detailed data in a timely manner during abnormal fluctuations, ensuring rapid response and diagnosis of critical events. Furthermore, the system automatically captures and uploads original waveform data before and after local trigger actions, providing rich event context information to the cloud, improving the accuracy and efficiency of fault diagnosis, and contributing to a comprehensive understanding of device operating status and fault causes.

[0096] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0097] In one embodiment, such as Figure 2As shown, a data processing method for an intelligent integrated edge computing gateway system is provided. This data processing method for an intelligent integrated edge computing gateway system includes the following steps:

[0098] S10: Write the sampling frequency, range, engineering quantity conversion coefficient and edge calculation algorithm model to be called for each acquisition channel to the system internal register through the configuration interface, and preset the logic trigger threshold, alarm level and local execution strategy in the non-volatile memory;

[0099] S20: The raw data of the target site is acquired in parallel through the analog-to-digital conversion cluster, serial communication controller and bus controller, and the raw data is timestamped by the preset clock management unit to obtain heterogeneous data. The raw data includes continuous analog signals, discrete digital messages and level states.

[0100] S30: The edge preprocessing unit extracts the original bit stream and performs integrity verification. It performs real-time noise reduction on the original waveform through a signal cleaning filter and converts heterogeneous data into engineering quantity data based on a preset scaling factor and nonlinear compensation logic and stores it in a high-speed ring buffer.

[0101] S40: The edge calculation engine extracts engineering quantity data from the high-speed ring buffer, performs windowing processing and fast Fourier transform through the frequency domain transformation module to extract harmonic components, and calculates statistical indicators within the data window through the feature value extraction module to form state feature data.

[0102] S50: The local trigger controller acquires status feature data and inputs a threshold comparison matrix. If the feature parameters of the status feature data meet the preset trigger logic, a control command sequence is generated, which drives the actuator at the target site through the physical output interface to achieve edge-side closed-loop protection.

[0103] S60: The cloud-based interactive management module encapsulates the status feature data and response action records into a lightweight protocol and sends them to the cloud platform. When the network is unstable, it uses a breakpoint resume strategy to temporarily store the data in the local flash memory. After the external communication network is restored, the temporarily stored data is resent in the order of timestamps.

[0104] S70: The cloud-based interactive management module performs dynamic downsampling during stable device operation to filter redundant data. Before and after a local trigger action occurs, it automatically extracts raw waveform data of a preset length, compresses and uploads it, and continuously listens for algorithm configuration instructions issued by the cloud platform to achieve online function upgrades.

[0105] In this embodiment, by integrating the edge preprocessing unit, the edge computation engine, and the local trigger controller into a single hardware terminal, real-time extraction and closed-loop decision-making from raw signals to feature indicators are achieved at the data acquisition source. Specifically, existing technical solutions, due to the forced full upload of raw data, result in system response times on the order of hundreds of milliseconds or even seconds, making it difficult to meet the needs of time-sensitive scenarios such as high-frequency vibration overload protection. This application effectively solves the phase misalignment problem caused by sampling frequency differences and hardware delays in multi-source signals by performing time-domain reconstruction and denoising conditioning on heterogeneous data through the edge preprocessing unit. The edge computation engine adopts a collaborative processing mechanism of frequency domain transformation module and feature value extraction module to complete vibration spectrum analysis and statistical index calculation locally, avoiding redundant links in data uplink transmission and cloud queuing computation. The local trigger controller achieves millisecond-level closed-loop protection based on a threshold comparison matrix. When a sudden structural damage signal is detected, it directly drives the physical actuator through the physical output interface, eliminating the risk of control failure caused by network jitter and routing delay in traditional architectures.

[0106] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. An intelligent integrated edge computing gateway system, characterized in that, include: The multi-source data acquisition module is used to access digital communication signals and analog sensing signals output from the field device layer through multiple physical interfaces and output heterogeneous data. The physical interfaces include RS485 interface, CAN bus interface, analog input interface and GPIO interface. An edge preprocessing unit is connected to the multi-source data acquisition module. The edge preprocessing unit is equipped with data synchronization alignment logic and signal cleaning filter, which are used to perform time-domain reconstruction, noise reduction conditioning and data conversion on heterogeneous data acquired from the multi-source data acquisition module to generate engineering quantity data. An edge calculation engine is connected to the edge preprocessing unit via an on-chip bus. The edge calculation engine has a pre-set calculation algorithm library including a frequency domain transformation module, a feature value extraction module, and a trend prediction module, which is used to perform real-time feature extraction and evolution determination on engineering quantity data and generate state feature data characterizing the operating status of the equipment. A local trigger controller is connected to the edge computing engine. The local trigger controller is equipped with a threshold comparison matrix and a logic action executor, which is used to compare the state feature data with a preset security threshold and drive the physical output interface to execute the corresponding response action according to the comparison result. The cloud-based interaction management module establishes an encrypted connection with the cloud platform to upload status feature data and response action records, and to receive algorithm configuration instructions and parameter threshold update packages issued by the cloud platform.

2. The intelligent integrated edge computing gateway system according to claim 1, characterized in that: The RS485 interface uses an isolated transceiver chip, supports half-duplex differential transmission mode, and supports data polling under the Modbus-RTU protocol; The CAN bus interface is used to access the differential signal stream of the field controller and to filter the message identifier in real time through a hardware shielding filter. The analog input interface has a built-in 24-bit high-resolution analog-to-digital converter, which supports parallel acquisition of 4-20mA current signals or 0-10V voltage signals. Each channel is equipped with an overvoltage protection circuit including transient voltage suppression diodes and current limiting resistors, a signal conditioning operational amplifier, and digital isolation devices, and is triggered by a unified clock source for synchronous sampling. The GPIO interface is equipped with an optocoupler isolation circuit for acquiring switch status signals or pulse sequence signals.

3. The intelligent integrated edge computing gateway system according to claim 1, characterized in that: The analog input interface is equipped with a signal conditioning circuit at the front end, which includes a differential amplifier circuit composed of an operational amplifier and a second-order Butterworth low-pass filter. The differential amplifier circuit is used to suppress common-mode interference in the input analog sensing signal and provides an adjustable gain ratio. The cutoff frequency of the second-order Butterworth low-pass filter is dynamically configured according to the sampling frequency of the analog-to-digital converter, and is set to less than half of the sampling frequency to eliminate aliasing during signal acquisition.

4. The intelligent integrated edge computing gateway system according to claim 1, characterized in that: The data synchronization alignment logic in the edge preprocessing unit is based on a unified timestamp generated by a hardware timer. It performs time-domain reconstruction on heterogeneous data from different physical interfaces and different sampling frequencies, and compensates for hardware acquisition start-up delay through resampling or interpolation processing to ensure phase consistency of multi-source signals on the same time axis. The signal cleaning filter integrates moving average filtering logic or adaptive weighted filtering logic. The adaptive weighted filtering logic dynamically adjusts the filtering coefficients by analyzing the local variance of heterogeneous data to filter out random white noise and pulse spikes in the original signal.

5. The intelligent integrated edge computing gateway system according to claim 4, characterized in that: The edge preprocessing unit also integrates nonlinear compensation logic for nonlinear sensors when performing data conversion. The nonlinear compensation logic corrects heterogeneous data by retrieving pre-stored piecewise linearized lookup table data or polynomial approximation data in memory, and converts it into calibrated engineering quantity data by combining a preset scaling factor. The engineering quantity data includes temperature, pressure, vibration intensity, and current.

6. The intelligent integrated edge computing gateway system according to claim 1, characterized in that: The solution algorithm library also integrates a pre-built logic deduction model, which allows for custom Boolean logic combinations of multi-channel signals based on the frequency domain transformation module, feature extraction module, and trend prediction module. The edge computing engine includes a microprocessor core with parallel computing capabilities and a dedicated mathematical acceleration unit at the hardware level. It adopts a double-buffered ping-pong mechanism for data flow processing. That is, when the first buffer is executing a computing task, the multi-source data acquisition module is allowed to write new heterogeneous data into the second buffer to achieve the continuity of the computing task. The frequency domain transformation module adopts fast Fourier transform logic based on butterfly operation structure, and performs windowing processing on the data block before fast Fourier transform. The feature value extraction module is used to calculate the effective value, peak value, skewness coefficient and energy distribution of the engineering quantity data.

7. The intelligent integrated edge computing gateway system according to claim 6, characterized in that: The edge computing engine allocates time slices to each computing task according to a preset priority order through its built-in task scheduler.

8. The intelligent integrated edge computing gateway system according to claim 1, characterized in that: The threshold comparison matrix integrates hysteresis comparison logic and a delay confirmation mechanism, and is equipped with an opening threshold and a closing threshold. The actuator is driven by the difference between the opening threshold and the closing threshold, and the trigger is confirmed when the state feature data continuously exceeds the preset number of sampling periods. The physical output interface includes a relay output terminal and a pulse output terminal. The relay output terminal is used to control the on / off state of the power supply circuit, and the pulse output terminal is used to send high-speed control pulses to the actuator. The local trigger controller also integrates an emergency intervention mechanism based on hardware interrupts. When a sudden structural damage signal or instantaneous overload signal is detected, it directly sends a non-maskable interrupt request to the central processing unit and directly operates the GPIO register in the interrupt service routine to generate the highest priority response action.

9. The intelligent integrated edge computing gateway system according to claim 1, characterized in that: The cloud-based interactive management module adopts a dual-caching data storage strategy and a breakpoint resume protocol. When the external communication network is unstable or interrupted, it stores the status feature data and response actions in the local flash memory. After the external communication network is restored, the stored data is resent sequentially based on the timestamp order. The cloud-based interactive management module supports dynamic downsampling processing, which means that only low-frequency feature values ​​are uploaded during the stable operation period of the device, and high-frequency data is uploaded during the abnormal fluctuation period. Before and after the local trigger action, the module automatically extracts the original waveform data of a preset length, compresses it, and uploads it along with the alarm packet.

10. A data processing method for an intelligent integrated edge computing gateway system, characterized in that, Including the following steps: The system writes the sampling frequency, range, engineering quantity conversion coefficient, and edge calculation algorithm model to be called for each acquisition channel to the internal register through the configuration interface, and presets the logic trigger threshold, alarm level, and local execution strategy in the non-volatile memory. The system acquires raw data from the target site in parallel through an analog-to-digital converter cluster, a serial communication controller, and a bus controller. The raw data is then timestamped by a preset clock management unit to obtain heterogeneous data, which includes continuous analog signals, discrete digital messages, and level states. The edge preprocessing unit extracts the original bit stream and performs integrity verification. It then uses a signal cleaning filter to denoise the original waveform in real time and converts the heterogeneous data into engineering quantity data based on a preset scaling factor and nonlinear compensation logic, storing it in a high-speed ring buffer. The edge processing engine extracts engineering quantity data from the high-speed ring buffer, performs windowing processing and fast Fourier transform through the frequency domain transformation module to extract harmonic components, and calculates statistical indicators within the data window through the feature value extraction module to form state feature data. The local trigger controller acquires status feature data and inputs it into a threshold comparison matrix. If the feature parameters of the status feature data meet the preset trigger logic, a control command sequence is generated, which drives the actuator at the target site through the physical output interface to achieve edge-side closed-loop protection. The cloud-based interactive management module encapsulates the status feature data and response action records into a lightweight protocol and sends them to the cloud platform. When the network is unstable, it uses a breakpoint resume strategy to temporarily store the data in local flash memory. Once the external communication network connection is restored, the temporarily stored data is resent sequentially based on the timestamp order. During stable device operation, the cloud-based interactive management module performs dynamic downsampling to filter redundant data. Before and after a local trigger action, it automatically extracts raw waveform data of a preset length, compresses and uploads it, and continuously monitors algorithm configuration commands issued by the cloud platform to enable online upgrades of functions.

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